mesa.git
10 years agovc4: Start using tgsi_lowering for opcodes we haven't supported before.
Eric Anholt [Tue, 30 Sep 2014 20:25:24 +0000 (13:25 -0700)]
vc4: Start using tgsi_lowering for opcodes we haven't supported before.

10 years agogallium: Rename freedreno parts of tgsi_lowering.[ch].
Eric Anholt [Tue, 30 Sep 2014 20:14:02 +0000 (13:14 -0700)]
gallium: Rename freedreno parts of tgsi_lowering.[ch].

Acked-by: Rob Clark <robclark@freedesktop.org>
10 years agogallium: Reformat tgsi_lowering.c for the normal style.
Eric Anholt [Tue, 30 Sep 2014 20:08:56 +0000 (13:08 -0700)]
gallium: Reformat tgsi_lowering.c for the normal style.

Acked-by: Rob Clark <robclark@freedesktop.org>
10 years agogallium: Copy fd_lowering.[ch] to tgsi_lowering.[ch] for code sharing.
Eric Anholt [Tue, 30 Sep 2014 20:07:23 +0000 (13:07 -0700)]
gallium: Copy fd_lowering.[ch] to tgsi_lowering.[ch] for code sharing.

Lots of drivers need to transform the weird instructions in TGSI into
reasonable scalar ops, and this code can make those translations
canonical.

Acked-by: Rob Clark <robclark@freedesktop.org>
10 years agovc4: Set unused raddr fields to QPU_R_NOP.
Eric Anholt [Fri, 3 Oct 2014 06:32:59 +0000 (23:32 -0700)]
vc4: Set unused raddr fields to QPU_R_NOP.

The simulator assertion fails if you have a write to a reg and then a read
(for example, in the NOP side of an instruction), even if the read isn't
used for anything.  By setting unused raddrs to NOP, we avoid the problem
(since only the phsyical registers are tracked).

10 years agovc4: Abstract out the field-merging logic for instructions.
Eric Anholt [Fri, 3 Oct 2014 06:22:03 +0000 (23:22 -0700)]
vc4: Abstract out the field-merging logic for instructions.

I'm going to be doing the same logic for some more fields next.

10 years agor600: Use DMA transfers in r600_copy_global_buffer
Niels Ole Salscheider [Mon, 8 Sep 2014 18:10:31 +0000 (20:10 +0200)]
r600: Use DMA transfers in r600_copy_global_buffer

v2: Do not demote items that are already in the pool

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
10 years agoglsl: Optimize min/max expression trees
Iago Toral Quiroga [Tue, 29 Jul 2014 09:36:31 +0000 (12:36 +0300)]
glsl: Optimize min/max expression trees

Original patch by Petri Latvala <petri.latvala@intel.com>:

Add an optimization pass that drops min/max expression operands that
can be proven to not contribute to the final result. The algorithm is
similar to alpha-beta pruning on a minmax search, from the field of
AI.

This optimization pass can optimize min/max expressions where operands
are min/max expressions. Such code can appear in shaders by itself, or
as the result of clamp() or AMD_shader_trinary_minmax functions.

This optimization pass improves the generated code for piglit's
AMD_shader_trinary_minmax tests as follows:

total instructions in shared programs: 75 -> 67 (-10.67%)
instructions in affected programs:     60 -> 52 (-13.33%)
GAINED:                                0
LOST:                                  0

All tests (max3, min3, mid3) improved.

A full shader-db run:

total instructions in shared programs: 4293603 -> 4293575 (-0.00%)
instructions in affected programs:     1188 -> 1160 (-2.36%)
GAINED:                                0
LOST:                                  0

Improvements happen in Guacamelee and Serious Sam 3. One shader from
Dungeon Defenders is hurt by shader-db metrics (26 -> 28), because of
dropping of a (constant float (0.00000)) operand, which was
compiled to a saturate modifier.

Version 2 by Iago Toral Quiroga <itoral@igalia.com>:

Changes from review feedback:
- Squashed various cosmetic changes sent by Matt Turner.
- Make less_all_components return an enum rather than setting a class member.
  (Suggested by Mat Turner). Also, renamed it to compare_components.
- Make less_all_components, smaller_constant and larger_constant static.
  (Suggested by Mat Turner)
- Change mixmax_range to call its limits "low" and "high" instead of
  "range[0]" and "range[1]". (Suggested by Connor Abbot).
- Use ir_builder swizzle helpers in swizzle_if_required(). (Suggested by
  Connor Abbot).
- Make the logic more clearer by rearrenging the code and commenting.
  (Suggested by Connor Abbot).
- Added comment to explain why we need to recurse twice. (Suggested by
  Connor Abbot).
- If we cannot prune an expression, do not return early. Instead, attempt
  to prune its children. (Suggested by Connor Abbot).

Other changes:
- Instead of having a global "valid" visitor member, let the various functions
  that can determine this status return a boolean and check for its value
  to decide what to do in each case. This is more flexible and allows to
  recurse into children of parents that could not be prunned due to invalid
  ranges (so related to the last bullet in the review feedback).
- Make sure we always check if a range is valid before working with it. Since
  any use of get_range, combine_range or range_intersection can invalidate
  a range we should check for this situation every time we use any of these
  functions.

Version 3 by Iago Toral Quiroga <itoral@igalia.com>:

Changes from review feedback:
- Now we can make get_range, combine_range and range_intersection static too
  (suggested by Connor Abbot).
- Do not return NULL when looking for the larger or greater constant into
  mixed vector constants. Instead, produce a new constant by doing a
  component-wise minmax. With this we can also remove of the validations when
  we call into these functions (suggested by Connor Abbot).
- Add a comment explaining the meaning of the baserange argument in
  prune_expression (suggested by Connor Abbot).

Other changes:
- Eliminate minmax expressions operating on constant vectors with mixed values
  by resolving them.

No piglit regressions observed with Version 3.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76861

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
10 years agoglsl: do not emit error for non written varyings on OpenGL ES
Tapani Pälli [Tue, 16 Sep 2014 17:18:41 +0000 (20:18 +0300)]
glsl: do not emit error for non written varyings on OpenGL ES

Patch fixes following test case from 'shaders-with-varyings' WebGL
conformance suite: "vertex shader with unused varying and fragment
shader with used varying must succeed"

v2: emit still a warning if the condition happens (Ian)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoradeonsi: Use dummy pixel shader if compilation of the real shader failed
Michel Dänzer [Mon, 6 Oct 2014 08:05:38 +0000 (17:05 +0900)]
radeonsi: Use dummy pixel shader if compilation of the real shader failed

Instead of crashing.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79155#c5
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agoilo: let shaders determine surface counts
Chia-I Wu [Mon, 6 Oct 2014 04:42:56 +0000 (12:42 +0800)]
ilo: let shaders determine surface counts

When a shader needs N surfaces, we should upload N surfaces and not depend on
how many are bound.  This commit is larger than it should be because we did
not export how many surfaces a surface uses before.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
10 years agoilo: let shaders determine sampler counts
Chia-I Wu [Sat, 4 Oct 2014 02:51:20 +0000 (10:51 +0800)]
ilo: let shaders determine sampler counts

When a shader needs N samplers, we should upload N samplers and not depend on
how many are bound.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
10 years agotgsi: change tgsi_shader_info::properties to a one-dimensional array
Marek Olšák [Thu, 2 Oct 2014 14:36:51 +0000 (16:36 +0200)]
tgsi: change tgsi_shader_info::properties to a one-dimensional array

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
v2: fix svga too

10 years agoradeonsi: set number of userdata SGPRs of GS copy shader to 4
Marek Olšák [Tue, 23 Sep 2014 17:42:28 +0000 (19:42 +0200)]
radeonsi: set number of userdata SGPRs of GS copy shader to 4

It only needs the constant buffer with clip planes and read-write resources
for the GS->VS ring and streamout. That's 2 pointers.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: pass the GS shader directly to si_generate_gs_copy_shader
Marek Olšák [Tue, 30 Sep 2014 16:15:17 +0000 (18:15 +0200)]
radeonsi: pass the GS shader directly to si_generate_gs_copy_shader

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: set LLVMByValAttribute for all descriptor arrays
Marek Olšák [Tue, 30 Sep 2014 16:13:06 +0000 (18:13 +0200)]
radeonsi: set LLVMByValAttribute for all descriptor arrays

I hope this is correct.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: make the vertex shader key smaller
Marek Olšák [Thu, 25 Sep 2014 14:47:55 +0000 (16:47 +0200)]
radeonsi: make the vertex shader key smaller

We only support 16 vertex attribs, not 32.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: don't flush shader caches when building PM4 shader states
Marek Olšák [Tue, 23 Sep 2014 15:25:41 +0000 (17:25 +0200)]
radeonsi: don't flush shader caches when building PM4 shader states

This is a wrong place to flush caches to say the least.

I don't think we need to flush the instruction caches if we don't patch
shaders with DMA.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: remove interp_at_sample from the key, use TGSI_INTERPOLATE_LOC_SAMPLE
Marek Olšák [Tue, 30 Sep 2014 15:09:13 +0000 (17:09 +0200)]
radeonsi: remove interp_at_sample from the key, use TGSI_INTERPOLATE_LOC_SAMPLE

st/mesa has the same flag in its shader key, we don't need to do it
in the driver anymore.

Instead, use TGSI_INTERPOLATE_LOC_SAMPLE, which is what st/mesa sets.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: move geometry shader properties from si_shader to si_shader_selector
Marek Olšák [Tue, 30 Sep 2014 14:55:36 +0000 (16:55 +0200)]
radeonsi: move geometry shader properties from si_shader to si_shader_selector

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: always compile shaders on demand
Marek Olšák [Tue, 30 Sep 2014 14:25:18 +0000 (16:25 +0200)]
radeonsi: always compile shaders on demand

The first compiled shader is sometimes useless, because the key doesn't match
the key for the draw call where it's used.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: remove unused variable si_shader::gs_input_prim
Marek Olšák [Tue, 30 Sep 2014 14:11:59 +0000 (16:11 +0200)]
radeonsi: remove unused variable si_shader::gs_input_prim

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agotgsi: remove some not so useful variables from tgsi_shader_info
Marek Olšák [Tue, 30 Sep 2014 13:59:37 +0000 (15:59 +0200)]
tgsi: remove some not so useful variables from tgsi_shader_info

10 years agoradeonsi: get fs_write_all from tgsi_shader_info directly
Marek Olšák [Tue, 30 Sep 2014 13:56:14 +0000 (15:56 +0200)]
radeonsi: get fs_write_all from tgsi_shader_info directly

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agotgsi: simplify shader properties in tgsi_shader_info
Marek Olšák [Tue, 30 Sep 2014 13:48:22 +0000 (15:48 +0200)]
tgsi: simplify shader properties in tgsi_shader_info

Use an array of properties indexed by TGSI_PROPERTY_* definitions.

10 years agoradeonsi: get tgsi_shader_info only once before compilation
Marek Olšák [Tue, 30 Sep 2014 13:12:09 +0000 (15:12 +0200)]
radeonsi: get tgsi_shader_info only once before compilation

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agogallium/util: add util_bitcount64
Marek Olšák [Wed, 24 Sep 2014 16:26:21 +0000 (18:26 +0200)]
gallium/util: add util_bitcount64

I'll need this in radeonsi.

v2: use __builtin_popcountll if available

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoradeonsi: fix CS tracing and remove excessive CS dumping
Marek Olšák [Fri, 5 Sep 2014 09:59:10 +0000 (11:59 +0200)]
radeonsi: fix CS tracing and remove excessive CS dumping

10 years agogk110/ir: add dnz flag emission for fmul/fmad
Ilia Mirkin [Sun, 28 Sep 2014 16:07:03 +0000 (12:07 -0400)]
gk110/ir: add dnz flag emission for fmul/fmad

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
10 years agogm107/ir: add dnz emission for fmul
Ilia Mirkin [Sun, 28 Sep 2014 05:52:11 +0000 (01:52 -0400)]
gm107/ir: add dnz emission for fmul

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
10 years agost/wgl: add WINAPI qualifiers on wgl function typedefs
Brian Paul [Fri, 3 Oct 2014 15:55:34 +0000 (09:55 -0600)]
st/wgl: add WINAPI qualifiers on wgl function typedefs

Fixes a release build segfault when wglCreateContextAttribsARB()
calls the wglCreateContext() function.

Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matthew McClure <mcclurem@vmware.com>
10 years agofreedreno: query fixes
Rob Clark [Fri, 3 Oct 2014 16:48:31 +0000 (12:48 -0400)]
freedreno: query fixes

Fixes a few issues, including a potential empty-IB (which triggers gpu
hangs in piglit occlusion_query_meta_no_fragments)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno/a3xx: handle VS only outputting BCOLOR
Rob Clark [Fri, 3 Oct 2014 14:08:59 +0000 (10:08 -0400)]
freedreno/a3xx: handle VS only outputting BCOLOR

Possibly we should map the front color to black (zeroes).  But not sure
there is a way to do that without generating a shader variant.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno/ir3: fix lockups with lame FRAG shaders
Rob Clark [Fri, 3 Oct 2014 14:02:31 +0000 (10:02 -0400)]
freedreno/ir3: fix lockups with lame FRAG shaders

Shaders like:

  FRAG
  PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
  DCL IN[0], GENERIC[0], PERSPECTIVE
  DCL OUT[0], COLOR
  DCL SAMP[0]
  DCL TEMP[0], LOCAL
  IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
    0: TEX TEMP[0], IN[0].xyyy, SAMP[0], 2D
    1: MOV OUT[0], IMM[0].xyxx
    2: END

cause unhappyness.  They have an IN[], but once this is compiled the
useless TEX instruction goes away.  Leaving a varying that is never
fetched, which makes the hw unhappy.

In the process fix a signed vs unsigned compare.  If the vertex shader
has max_reg=-1, MAX2() vs an unsigned would not give the desired result.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agoi965/compaction: Disable compaction on SNB temporarily.
Matt Turner [Fri, 3 Oct 2014 17:01:54 +0000 (10:01 -0700)]
i965/compaction: Disable compaction on SNB temporarily.

Will investigate after XDC.

10 years agoRevert "i965: Emit ELSE/ENDIF JIP with type D on Gen 7."
Matt Turner [Fri, 3 Oct 2014 16:58:41 +0000 (09:58 -0700)]
Revert "i965: Emit ELSE/ENDIF JIP with type D on Gen 7."

This reverts commit 54e30dbf4db437748509d1319c3f6e4185f76c69.

Will investigate after XDC.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84557

10 years agoi965/fs: Remove dead generate_rep_fb_write prototype.
Matt Turner [Wed, 1 Oct 2014 06:18:34 +0000 (23:18 -0700)]
i965/fs: Remove dead generate_rep_fb_write prototype.

Added in commit f9dc7aab.

10 years agomesa: fix spurious wglGetProcAddress / GL_INVALID_OPERATION error
Brian Paul [Thu, 2 Oct 2014 15:36:54 +0000 (09:36 -0600)]
mesa: fix spurious wglGetProcAddress / GL_INVALID_OPERATION error

On Windows, the Piglit primitive-restart test was failing a
glGetError()==0 assertion when it was run w/out any command line
arguments.  Piglit's all.py script only runs primitive-restart
with arguments so this case isn't normally hit during a full
piglit run.

The basic problem is Microsoft's opengl32.dll calls glFlush
from wglGetProcAddress() and Piglit uses wglGetProcAddress() to
resolve glPrimitiveRestartNV() which is called inside glBegin/End.
See comments in the code for more info.

Plus, improve the comments for _mesa_alloc_dispatch_table().

Cc: <mesa-stable@lists.freedesktop.org>
Acked-by: Sinclair Yeh <syeh@vmware.com>
10 years agofreedreno/ir3: add TXF support
Ilia Mirkin [Wed, 24 Sep 2014 21:42:03 +0000 (17:42 -0400)]
freedreno/ir3: add TXF support

Still failing a bunch of the fairly picky texelFetch tests, but the
1D(Array) ones are full passes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: add TXD support and expose ARB_shader_texture_lod
Ilia Mirkin [Sat, 27 Sep 2014 14:50:40 +0000 (10:50 -0400)]
freedreno/ir3: add TXD support and expose ARB_shader_texture_lod

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: add texture offset support
Ilia Mirkin [Sat, 27 Sep 2014 06:52:42 +0000 (02:52 -0400)]
freedreno/ir3: add texture offset support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: shadow comes before array
Ilia Mirkin [Wed, 1 Oct 2014 00:02:37 +0000 (20:02 -0400)]
freedreno/ir3: shadow comes before array

Experimentally, this makes *ArrayShadow tex-miplevel-selection tests
pass.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: make TXQ return integers, not floats
Ilia Mirkin [Sun, 28 Sep 2014 23:37:27 +0000 (19:37 -0400)]
freedreno/ir3: make TXQ return integers, not floats

We're still doing something wrong for array textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: add UMAD support
Ilia Mirkin [Wed, 1 Oct 2014 05:13:38 +0000 (01:13 -0400)]
freedreno/ir3: add UMAD support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: add ISSG support
Ilia Mirkin [Mon, 29 Sep 2014 02:00:34 +0000 (22:00 -0400)]
freedreno/ir3: add ISSG support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: add MOD support
Ilia Mirkin [Wed, 1 Oct 2014 05:03:31 +0000 (01:03 -0400)]
freedreno/ir3: add MOD support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: add UMOD support, based on UDIV
Ilia Mirkin [Mon, 29 Sep 2014 01:05:05 +0000 (21:05 -0400)]
freedreno/ir3: add UMOD support, based on UDIV

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agofreedreno/ir3: add IDIV/UDIV support
Ilia Mirkin [Fri, 12 Sep 2014 03:15:11 +0000 (23:15 -0400)]
freedreno/ir3: add IDIV/UDIV support

Logic shamelessly copied from nv50 lowering pass.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agoradeonsi: Clear sampler view flags when binding a buffer
Michel Dänzer [Thu, 2 Oct 2014 07:00:26 +0000 (16:00 +0900)]
radeonsi: Clear sampler view flags when binding a buffer

Fixes assertion failure while running the Unreal Engine 4 Elemental demo:

.../si_blit.c:322:si_decompress_color_textures: Assertion `tex->cmask.size || tex->fmask.size' failed.

Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agovc4: Add support for framebuffer sRGB encoding.
Eric Anholt [Thu, 2 Oct 2014 21:14:48 +0000 (14:14 -0700)]
vc4: Add support for framebuffer sRGB encoding.

10 years agovc4: Add support for sampling from sRGB.
Eric Anholt [Thu, 2 Oct 2014 21:01:29 +0000 (14:01 -0700)]
vc4: Add support for sampling from sRGB.

This isn't perfect -- the filtering is happening on the srgb values, and
we're decoding afterwards, which is not what you want.  I think that's the
cause of some additional texwrap(GL_CLAMP, LINEAR) failures, though many
other texwrap tests on srgb start to pass since unfiltered values come out
correct.

10 years agofreedreno/ir3: avoid fan-in sources referring to same instruction
Ilia Mirkin [Wed, 1 Oct 2014 03:27:25 +0000 (23:27 -0400)]
freedreno/ir3: avoid fan-in sources referring to same instruction

Since the RA has to be done s.t. each one gets its own (adjacent)
register, it would complicate matters if instructions were allowed to be
repeated. This enables copy-propagation use in situations where
previously that might have happened.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno/a3xx: emit all immediates in one shot
Rob Clark [Wed, 1 Oct 2014 15:28:17 +0000 (11:28 -0400)]
freedreno/a3xx: emit all immediates in one shot

Makes the command stream a bit tighter when there are lots of
immediates.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno: instanced drawing/compute not yet supported
Ilia Mirkin [Thu, 2 Oct 2014 07:39:05 +0000 (03:39 -0400)]
freedreno: instanced drawing/compute not yet supported

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agomesa: fix GetTexImage for 1D array depth textures
Dave Airlie [Tue, 30 Sep 2014 23:22:13 +0000 (09:22 +1000)]
mesa: fix GetTexImage for 1D array depth textures

While running piglit in virgl, I hit an assert in intel driver.

"qemu-system-x86_64: intel_tex.c:219: intel_map_texture_image: Assertion `tex_image->TexObject->Target != 0x8C18 || h == 1' failed."

Thanks to Eric and Ken for pointing me in the right direction,

Fix the get_tex_depth to do the same fixup as get_tex_rgba does
for 1D array textures.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agost/mesa: Fix paths used in Android builds
Tomasz Figa [Sat, 27 Sep 2014 14:20:01 +0000 (16:20 +0200)]
st/mesa: Fix paths used in Android builds

With current makefiles the build fails because source and build paths
are generated incorrectly. With Android build system the top_srcdir and
top_builddir variables are undefined and all paths are relative to where
Android.mk is located. This ends up with path likes
external/mesa/src/mesa/src/mesa/ for both source and build paths, which
are obviously wrong.

This patch fixes this by overriding resulting SRCDIR and BUILDDIR
variables with empty string, so that paths end up being relative to
Android.mk file again. Appending correct build path to generated files
is already done in Android.gen.mk.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agost/mesa: Generate format_info.c in Android builds
Tomasz Figa [Sat, 27 Sep 2014 14:20:00 +0000 (16:20 +0200)]
st/mesa: Generate format_info.c in Android builds

Current Android makefiles lack generation of format_info.c, which is
a dependency of main/format.c. This patch adds necessary code to
Android.gen.mk.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agoutil: Include in Android builds
Tomasz Figa [Sat, 27 Sep 2014 14:19:59 +0000 (16:19 +0200)]
util: Include in Android builds

This patch fixes Android build failures by including src/util directory
in compilation. Files inside of this directory are compiled into
libmesa_util static library and linked with resulting libGLES_mesa.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agoi965/fs: Use the correct base_mrf for spilling pairs in SIMD8
Jason Ekstrand [Thu, 2 Oct 2014 23:04:57 +0000 (16:04 -0700)]
i965/fs: Use the correct base_mrf for spilling pairs in SIMD8

Before, we were hard-coding the base_mrf based on dispatch width not number
of registers spilled at a time.  This caused us to emit instructions with a
base_mrf or 14 and a mlen of 3 so we used the magical non-existant m16
register.  This fixes the problem.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965/fs: Add a MAX_GRF_SIZE define and use it various places
Jason Ekstrand [Wed, 1 Oct 2014 17:54:59 +0000 (10:54 -0700)]
i965/fs: Add a MAX_GRF_SIZE define and use it various places

Previously, we had a MAX_SAMPLER_MESSAGE_SIZE which we used instead.
However, some FB write messages can validly be longer than this so we need
something different.  Since MAX_SAMPLER_MESSAGE_SIZE is validly useful on
its own, we leave it alone and add a new MAX_GRF_SIZE that's big enough for
FB writes.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84539
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965/fs: Use the actual regsister width in brw_reg_from_fs_reg
Jason Ekstrand [Wed, 1 Oct 2014 17:46:48 +0000 (10:46 -0700)]
i965/fs: Use the actual regsister width in brw_reg_from_fs_reg

This fixes a bug where 1-wide operations don't properly translate down to
1-wide instructions.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965/fs_fp: Use null_reg from fs_visitor instead of rolling our own
Jason Ekstrand [Wed, 1 Oct 2014 17:27:24 +0000 (10:27 -0700)]
i965/fs_fp: Use null_reg from fs_visitor instead of rolling our own

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84529
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agofreedreno/a3xx: handle large shader program sizes
Rob Clark [Wed, 1 Oct 2014 19:26:26 +0000 (15:26 -0400)]
freedreno/a3xx: handle large shader program sizes

Above a certain limit use CACHE mode instead of BUFFER mode.  This
should solve gpu hangs with large shader programs.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno: update generated headers
Rob Clark [Wed, 1 Oct 2014 18:57:34 +0000 (14:57 -0400)]
freedreno: update generated headers

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno: dual-source render targets are not supported
Ilia Mirkin [Wed, 1 Oct 2014 04:26:03 +0000 (00:26 -0400)]
freedreno: dual-source render targets are not supported

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agogallium/hud: use u_sampler_view_default_template helper
Ilia Mirkin [Wed, 1 Oct 2014 23:43:38 +0000 (19:43 -0400)]
gallium/hud: use u_sampler_view_default_template helper

The existing code was not setting several fields, most importantly the
target, which is required on nv50/nvc0.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agoglsl: Fix memory leak in builtin_builder::_image_prototype.
Iago Toral Quiroga [Wed, 1 Oct 2014 10:12:38 +0000 (12:12 +0200)]
glsl: Fix memory leak in builtin_builder::_image_prototype.

in_var calls the ir_variable constructor, which dups the variable name.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agomesa: relax draw api validation on ES2
Tapani Pälli [Tue, 30 Sep 2014 07:28:26 +0000 (10:28 +0300)]
mesa: relax draw api validation on ES2

Patch fixes failing test in WebGL conformance test
'point-no-attributes' when running Chrome on OpenGL ES.
(Shader program may draw points using constant data in shader.)

No Piglit regressions.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoglsl: make consistent use of DECLARE_RALLOC_CXX_OPERATORS
Ilia Mirkin [Tue, 30 Sep 2014 04:12:40 +0000 (00:12 -0400)]
glsl: make consistent use of DECLARE_RALLOC_CXX_OPERATORS

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agovc4: Fix the mapping of the minification filter to HW values.
Eric Anholt [Wed, 1 Oct 2014 18:58:22 +0000 (11:58 -0700)]
vc4: Fix the mapping of the minification filter to HW values.

They're actually as documented in the HW specs and the GL mipmapping enums
order.  Fixes fbo-generatemipmap-filtering , and some other tests where we
were off by a few bits due to unexpected linear filtering.

10 years agovc4: Make the last static array in vc4_program.c dynamically sized.
Eric Anholt [Wed, 1 Oct 2014 17:58:02 +0000 (10:58 -0700)]
vc4: Make the last static array in vc4_program.c dynamically sized.

10 years agovc4: Fix some broken indentation.
Eric Anholt [Tue, 30 Sep 2014 23:10:09 +0000 (16:10 -0700)]
vc4: Fix some broken indentation.

10 years agovc4: Add support for the FACE semantic.
Eric Anholt [Tue, 30 Sep 2014 23:08:23 +0000 (16:08 -0700)]
vc4: Add support for the FACE semantic.

Fixes glsl-fs-frontfacing.

10 years agovc4: Add support for TGSI_OPCODE_CLAMP.
Eric Anholt [Tue, 30 Sep 2014 21:19:25 +0000 (14:19 -0700)]
vc4: Add support for TGSI_OPCODE_CLAMP.

This will be used by the shared LIT lowering code.

10 years agovc4: Fix compiler warning
Eric Anholt [Tue, 30 Sep 2014 23:26:51 +0000 (16:26 -0700)]
vc4: Fix compiler warning

10 years agometa: Fix make check failures in setup_glsl_msaa_blit_scaled_shader()
Anuj Phogat [Wed, 1 Oct 2014 22:24:27 +0000 (15:24 -0700)]
meta: Fix make check failures in setup_glsl_msaa_blit_scaled_shader()

introduced by commit 68ee950.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reported-by: Mark Janes <mark.a.janes@intel.com>
10 years agomesa: fix _mesa_alloc_dispatch_table() declaration
Brian Paul [Wed, 1 Oct 2014 15:03:13 +0000 (09:03 -0600)]
mesa: fix _mesa_alloc_dispatch_table() declaration

Insert 'void' parameter to match declaration in api_exec.h.  Trivial.

10 years agometa: (trivial) remove accidental double semicolon
Roland Scheidegger [Wed, 1 Oct 2014 21:14:46 +0000 (23:14 +0200)]
meta: (trivial) remove accidental double semicolon

10 years agoi965: Enable EXT_framebuffer_multisample_blit_scaled for gen8
Anuj Phogat [Thu, 4 Sep 2014 20:49:04 +0000 (13:49 -0700)]
i965: Enable EXT_framebuffer_multisample_blit_scaled for gen8

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
10 years agometa: Implement ext_framebuffer_multisample_blit_scaled extension
Anuj Phogat [Fri, 5 Sep 2014 19:19:22 +0000 (12:19 -0700)]
meta: Implement ext_framebuffer_multisample_blit_scaled extension

Extension enables doing a multisample buffer resolve and buffer
scaling using a single glBlitFrameBuffer() call. Currently, we
have this extension implemented in BLORP which is only used by
SNB and IVB. This patch implements the extension in meta path
which makes it available to Broadwell.

Implementation features:
 - Supports scaled resolves of 2X, 4X and 8X multisample buffers.

 - Avoids unnecessary shader compilations by storing the pre compiled
   shaders for each supported sample count.

 - Uses bilinear filtering for both GL_SCALED_RESOLVE_FASTEST_EXT and
   GL_SCALED_RESOLVE_NICEST_EXT filter options. This is an allowed
   behavior in the extension's spec.

 - I tried doing bicubic filtering for GL_SCALED_RESOLVE_NICEST_EXT
   filter. It made the edges in the image look little smoother but
   the image gets blurred causing no overall quality improvement.
   For now I have dropped the idea of doing different filtering for
   nicest filter.

V2:
 - Minor changes to simplify the fragment shader.
 - Refactor the code to move i965 specific sample_map computation out
   of Meta. We now use ctx->Const.SampleMap{2,4,8}x variables initialized
   by the driver.
 - Use a simple msaa resolve shader for scaled resolves with scaling
   factor = 1.0.

V3:
 - Make changes to create a string out of ctx->Const.SampleMap{2,4,8}x
   variables and use it in fragment shader.

V4:
 - Make changes to use uint8_t type ctx->Const.SampleMap{2,4,8}x
   variables.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
10 years agoi965: Initialize the SampleMap{2,4,8}x variables
Anuj Phogat [Tue, 23 Sep 2014 18:58:02 +0000 (11:58 -0700)]
i965: Initialize the SampleMap{2,4,8}x variables

with values specific to Intel hardware.

V2: Define and use gen6_get_sample_map() function to initialize
    the variables.

V3: Change the function name to gen6_set_sample_maps() and use
    memcpy() to fill in the data.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
10 years agomesa: Add new variables in gl_context to store sample layout
Anuj Phogat [Tue, 23 Sep 2014 18:56:54 +0000 (11:56 -0700)]
mesa: Add new variables in gl_context to store sample layout

SampleMap{2,4,8}x variables are used in later patches to implement
EXT_framebuffer_multisample_blit_scaled extension.

V2: Use integer array instead of a string.
    Bump up the comment.

V3: Use uint8_t type array.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
10 years agost/va: implement vlVa(Query|Create|Get|Put|Destroy)Image
Leo Liu [Thu, 18 Sep 2014 16:21:58 +0000 (12:21 -0400)]
st/va: implement vlVa(Query|Create|Get|Put|Destroy)Image

This patch implements functions for images support,
which basically supports copy data between video
surface and user buffers, in this case supports
SW decode, and other video output

v2: fix buffer size for odd-sized image case
    expose I420 format as well
v3: fix YUV 4:2:2 format data buffer size
    cleanup I420 format  exposure

Signed-off-by: Leo Liu <leo.liu@amd.com>
10 years agost/va: implement Picture functions for mpeg2 h264 and vc1
Christian König [Thu, 18 Sep 2014 15:57:46 +0000 (11:57 -0400)]
st/va: implement Picture functions for mpeg2 h264 and vc1

This patch implements codec for mpeg2 h264 and vc1,
populates codec parameters and pass them to HW driver.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
10 years agost/va: implement Context Surface and Buffer
Christian König [Fri, 4 Jul 2014 16:44:36 +0000 (12:44 -0400)]
st/va: implement Context Surface and Buffer

This patch implements context managements, relate it HW driver,
functions for video surface managements, and functions for
application data memory buffer managements.

implemented functions:
vlVa(Create|Destroy)Context
vlVa(Create|Destroy|Put)Surfaces
vlVa(Create|Destroy)Buffer

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
10 years agost/va: implement vlVa(Create|Destroy|Query|Get)Config
Christian König [Tue, 28 May 2013 16:02:58 +0000 (18:02 +0200)]
st/va: implement vlVa(Create|Destroy|Query|Get)Config

This patch is for application to query configuration,
such as profiles, entrypoints, and attributes

v2: fix missing profile with query

Signed-off-by: Michael Varga <michael.varga@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
10 years agost/va: skeleton VAAPI state tracker
Christian König [Wed, 2 Jul 2014 20:35:28 +0000 (16:35 -0400)]
st/va: skeleton VAAPI state tracker

This patch adds a skeleton VA-API state tracker,
which is filled with live in the subsequent patches.

v2: fixes in configure.ac and va state_tracker Makefile.am
v3: do not link against libva.
    detect libva version, and correctly set driver entrypoint name.
    rebase(cleanup) targets/va/Makefile.am
v4: cleanup va version auto detection
    add back targets/va/va.sym

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
10 years agost/vdpau: move common functions to util
Leo Liu [Mon, 22 Sep 2014 18:07:13 +0000 (14:07 -0400)]
st/vdpau: move common functions to util

Break out these functions so that they can be shared with a other
state trackers.  They will be used in subsequent patches for the new
VA-API state tracker.

Signed-off-by: Leo Liu <leo.liu@amd.com>
10 years agofreedreno: max-texture-lod-bias should be 15.0f
Rob Clark [Wed, 1 Oct 2014 11:26:39 +0000 (07:26 -0400)]
freedreno: max-texture-lod-bias should be 15.0f

Fixes piglit lodbias test.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agomesa: Avoid flagging _NEW_VIEWPORT on redundant viewport updates.
Kenneth Graunke [Fri, 26 Sep 2014 22:13:30 +0000 (15:13 -0700)]
mesa: Avoid flagging _NEW_VIEWPORT on redundant viewport updates.

Cuts the number of i965 color calculator viewport uploads by 100x
(11017983 -> 113385) in 'x11perf -gc' with Glamor in Xephyr.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoi965: Drop CACHE_NEW_VS_PROG from the gen7_sf_state atom.
Kenneth Graunke [Fri, 26 Sep 2014 22:13:29 +0000 (15:13 -0700)]
i965: Drop CACHE_NEW_VS_PROG from the gen7_sf_state atom.

I believe when I wrote this code, gen6_sf_state used CACHE_NEW_VS_PROG,
which has since been replaced by BRW_NEW_VUE_MAP_GEOM_OUT.  It's not
needed here anyway - only SBE needs it.  Just a copy and paste mistake.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoi965: Drop brwBindProgram driver hook.
Kenneth Graunke [Fri, 26 Sep 2014 18:12:34 +0000 (11:12 -0700)]
i965: Drop brwBindProgram driver hook.

This function flagged BRW_NEW_*_PROGRAM

When ctx->{Vertex,Geometry,Fragment}Program._Current changes, core Mesa
calls the BindProgram driver hook, which flagged BRW_NEW_*_PROGRAM.

However, brw_upload_state also checks for that changing, sets the same
flags, and also updates brw->fragment_program and so on.  So, this looks
to be entirely redundant.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965: Add missing /* BRW_NEW_FRAGMENT_PROGRAM */ comments.
Kenneth Graunke [Fri, 26 Sep 2014 17:13:02 +0000 (10:13 -0700)]
i965: Add missing /* BRW_NEW_FRAGMENT_PROGRAM */ comments.

I had to dig a bit to figure out why this was necessary.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965: Use "1ull" instead of "1" in BRW_NEW_* defines.
Kenneth Graunke [Fri, 26 Sep 2014 08:44:51 +0000 (01:44 -0700)]
i965: Use "1ull" instead of "1" in BRW_NEW_* defines.

Now that the bitfield is a uint64_t, we should use 1ull.  Currently, we
only have 32 entries, so 1 works fine, but it's not future-proof.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965: Use ~0ull when flagging all BRW_NEW_* dirty flags.
Kenneth Graunke [Fri, 26 Sep 2014 22:50:14 +0000 (15:50 -0700)]
i965: Use ~0ull when flagging all BRW_NEW_* dirty flags.

~0 is 0xFFFFFFFF, which only covers the first 32 bits.  We need all 64.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965: Fix INTEL_DEBUG=state to work with 64-bit dirty bits.
Kenneth Graunke [Fri, 26 Sep 2014 17:29:25 +0000 (10:29 -0700)]
i965: Fix INTEL_DEBUG=state to work with 64-bit dirty bits.

This will keep INTEL_DEBUG=state working when we add BRW_NEW_* bits
beyond 1 << 31.  We missed doing this when widening the driver flags
from uint32_t to uint64_t.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965: Delete CACHE_NEW_BLORP_CONST_COLOR_PROG.
Kenneth Graunke [Fri, 26 Sep 2014 08:27:11 +0000 (01:27 -0700)]
i965: Delete CACHE_NEW_BLORP_CONST_COLOR_PROG.

Unused since krh rewrote fast clears to use meta.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965: Fix typo in comment
Chris Forbes [Tue, 23 Sep 2014 09:27:24 +0000 (21:27 +1200)]
i965: Fix typo in comment

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965: Fix spelling of GEN7_SAMPLER_EWA_ANISOTROPIC_ALGORITHM
Chris Forbes [Sun, 28 Sep 2014 04:07:37 +0000 (17:07 +1300)]
i965: Fix spelling of GEN7_SAMPLER_EWA_ANISOTROPIC_ALGORITHM

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agollvmpipe: Add missing LLVMGetGlobalContext() arg in lp_test_format.c.
Vinson Lee [Wed, 1 Oct 2014 04:52:13 +0000 (21:52 -0700)]
llvmpipe: Add missing LLVMGetGlobalContext() arg in lp_test_format.c.

Fix build error introduced with commit
eedbce9c63a3f385908bdc8a69e8be98dd3522ff.

lp_test_format.c: In function ‘test_format_unorm8’:
lp_test_format.c:226:4: error: too few arguments to function ‘gallivm_create’
    gallivm = gallivm_create("test_module_unorm8");
    ^
In file included from ../../../../src/gallium/auxiliary/gallivm/lp_bld_format.h:38:0,
                 from lp_test_format.c:42:
../../../../src/gallium/auxiliary/gallivm/lp_bld_init.h:58:1: note: declared here
 gallivm_create(const char *name, LLVMContextRef context);
 ^

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84538
Signed-off-by: Vinson Lee <vlee@freedesktop.org>