Clifford Wolf [Tue, 16 Oct 2018 13:28:37 +0000 (15:28 +0200)]
Update command reference manual
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sun, 30 Sep 2018 16:43:35 +0000 (18:43 +0200)]
Fix handling of $past 2nd argument in read_verilog
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 28 Sep 2018 15:20:16 +0000 (17:20 +0200)]
Update to v2 YosysVS template
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sun, 23 Sep 2018 08:04:37 +0000 (10:04 +0200)]
Merge branch 'master' of https://github.com/mmicko/yosys into yosys-0.8-rc
Clifford Wolf [Sun, 23 Sep 2018 07:25:40 +0000 (09:25 +0200)]
Update CHANGELOG
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Miodrag Milanovic [Fri, 21 Sep 2018 18:43:49 +0000 (20:43 +0200)]
added prefix to FDirection constants, fixing windows build
Clifford Wolf [Fri, 21 Sep 2018 14:27:07 +0000 (16:27 +0200)]
Update CHANGLELOG
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 21 Sep 2018 11:55:20 +0000 (13:55 +0200)]
Update Changelog
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 19 Sep 2018 13:08:31 +0000 (15:08 +0200)]
Merge pull request #633 from mmicko/master
Fix Cygwin build and document needed packages
Clifford Wolf [Wed, 19 Sep 2018 13:07:28 +0000 (15:07 +0200)]
Merge pull request #631 from acw1251/master
Fixed typo in "verilog_write" help message
Miodrag Milanovic [Wed, 19 Sep 2018 08:16:53 +0000 (10:16 +0200)]
Fix Cygwin build and document needed packages
acw1251 [Tue, 18 Sep 2018 17:34:30 +0000 (13:34 -0400)]
Fixed typo in "verilog_write" help message
Clifford Wolf [Fri, 14 Sep 2018 10:36:13 +0000 (12:36 +0200)]
Merge pull request #625 from aman-goel/master
Minor revision to -expose in setundef pass
Clifford Wolf [Fri, 14 Sep 2018 10:34:51 +0000 (12:34 +0200)]
Merge pull request #627 from acw1251/master
Fixed minor typo in "sim" help message
acw1251 [Wed, 12 Sep 2018 22:33:27 +0000 (18:33 -0400)]
Fixed minor typo in "sim" help message
Aman Goel [Tue, 11 Sep 2018 01:44:36 +0000 (21:44 -0400)]
Minor revision to -expose in setundef pass
Adds default value option as -undef when -expose used. Not having set the value mode set can cause the setundef pass to abort.
Clifford Wolf [Mon, 10 Sep 2018 09:57:24 +0000 (11:57 +0200)]
Add iCE40 SB_SPRAM256KA simulation model
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 5 Sep 2018 22:18:01 +0000 (00:18 +0200)]
Add $lut support to Verilog back-end
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 4 Sep 2018 18:06:10 +0000 (20:06 +0200)]
Add "verific -L <int>" option
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 30 Aug 2018 10:26:26 +0000 (12:26 +0200)]
Add "make ystests"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Miodrag Milanović [Tue, 28 Aug 2018 15:17:33 +0000 (08:17 -0700)]
Add GCC to osx deps (#620)
* Add GCC to osx deps
* Force gcc-7 install
Clifford Wolf [Tue, 28 Aug 2018 11:37:11 +0000 (13:37 +0200)]
Merge pull request #619 from mmicko/master
Remove mercurial, since it is not needed anymore
Miodrag Milanovic [Tue, 28 Aug 2018 11:11:41 +0000 (13:11 +0200)]
Remove mercurial, since it is not needed anymore
Clifford Wolf [Tue, 28 Aug 2018 10:04:49 +0000 (12:04 +0200)]
Merge pull request #618 from ucb-bar/firrtl+modules+shiftfixes
Add support for modules.
Jim Lawson [Mon, 27 Aug 2018 19:13:04 +0000 (12:13 -0700)]
Merge branch 'master' into firrtl+modules+shiftfixes
Jim Lawson [Mon, 27 Aug 2018 17:18:33 +0000 (10:18 -0700)]
Remove unused functions.
Jim Lawson [Mon, 27 Aug 2018 17:09:39 +0000 (10:09 -0700)]
Merge pull request #3 from YosysHQ/master
merge with YosysHQ
Clifford Wolf [Mon, 27 Aug 2018 12:22:21 +0000 (14:22 +0200)]
Add "make coverage"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Mon, 27 Aug 2018 11:27:05 +0000 (13:27 +0200)]
Add ENABLE_GCOV build option
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sat, 25 Aug 2018 14:40:55 +0000 (16:40 +0200)]
Merge pull request #617 from mmicko/master
static link flag on main executable
Miodrag Milanovic [Sat, 25 Aug 2018 14:20:44 +0000 (16:20 +0200)]
static link flag on main executable
Jim Lawson [Thu, 23 Aug 2018 21:35:11 +0000 (14:35 -0700)]
Add support for module instances.
Don't pad logical operands to one bit.
Use operand width and signedness in $reduce_bool.
Shift amounts are unsigned and shouldn't be padded.
Group "is invalid" with the wire declaration, not its use (otherwise it is incorrectly wired to 0).
Clifford Wolf [Thu, 23 Aug 2018 12:43:25 +0000 (14:43 +0200)]
Merge pull request #610 from udif/udif_specify_round2
More specify/endspecify fixes
Clifford Wolf [Thu, 23 Aug 2018 12:41:41 +0000 (14:41 +0200)]
Merge pull request #614 from udif/pr_disable_dump_ptr
Added -no_dump_ptr flag for AST dump options in 'read_verilog'
Udi Finkelstein [Thu, 23 Aug 2018 12:19:46 +0000 (15:19 +0300)]
Added -no_dump_ptr flag for AST dump options in 'read_verilog'
This option disables the memory pointer display.
This is useful when diff'ing different dumps because otherwise the node pointers
makes every diff line different when the AST content is the same.
Jim Lawson [Wed, 22 Aug 2018 15:42:34 +0000 (08:42 -0700)]
Merge pull request #1 from YosysHQ/master
merge with YosysHQ master
Clifford Wolf [Wed, 22 Aug 2018 15:22:24 +0000 (17:22 +0200)]
Add "verific -work" help message
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 22 Aug 2018 11:30:22 +0000 (13:30 +0200)]
Add Verific -work parameter
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Udi Finkelstein [Mon, 20 Aug 2018 14:27:45 +0000 (17:27 +0300)]
Fixed all known specify/endspecify issues, without breaking 'make test'.
Some the of parser fixes may look strange but they were needed to avoid shift/reduce conflicts,
due to the explicit parentheses in path_delay_value, and the mintypmax values without parentheses
Udi Finkelstein [Sun, 19 Aug 2018 21:08:08 +0000 (00:08 +0300)]
Yosys can now parse https://github.com/verilog-to-routing/vtr-verilog-to-routing/blob/master/vtr_flow/primitives.v ,
(specify block ignored).
Must use 'read_verilog -defer' due to a parameter not assigned a default value.
Clifford Wolf [Sun, 19 Aug 2018 13:25:46 +0000 (15:25 +0200)]
Merge pull request #606 from cr1901/show-win
`show` pass `-format` and `-viewer` improvements on Windows
Clifford Wolf [Sat, 18 Aug 2018 17:17:42 +0000 (19:17 +0200)]
Merge pull request #608 from mmicko/master
Static builds and cross-compilation support
Miodrag Milanovic [Sat, 18 Aug 2018 17:17:02 +0000 (19:17 +0200)]
no -fPIC for any static build
Miodrag Milanovic [Sat, 18 Aug 2018 16:21:28 +0000 (18:21 +0200)]
respect DISABLE_ABC_THREADS if used
Miodrag Milanovic [Sat, 18 Aug 2018 13:11:58 +0000 (15:11 +0200)]
Enable propagating ARCHFLAGS
Miodrag Milanovic [Sat, 18 Aug 2018 12:14:17 +0000 (14:14 +0200)]
Added option to disable -fPIC on unsupported platforms
Miodrag Milanovic [Sat, 18 Aug 2018 12:00:55 +0000 (14:00 +0200)]
Added gcc-static for easier cross compilation
Clifford Wolf [Sat, 18 Aug 2018 11:22:39 +0000 (13:22 +0200)]
Merge pull request #575 from aman-goel/master
Adds -expose option to setundef pass
Aman Goel [Sat, 18 Aug 2018 03:38:07 +0000 (09:08 +0530)]
Revision to expose option in setundef pass
Corrects indentation
Simplifications and corrections
Aman Goel [Sat, 18 Aug 2018 02:48:40 +0000 (08:18 +0530)]
Merge pull request #3 from YosysHQ/master
Updates from official repo
Clifford Wolf [Thu, 16 Aug 2018 09:49:17 +0000 (11:49 +0200)]
Add "verific -set-<severity> <msg_id>.."
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 16 Aug 2018 09:31:19 +0000 (11:31 +0200)]
Verific workaround for VIPER ticket 13851
Signed-off-by: Clifford Wolf <clifford@clifford.at>
William D. Jones [Wed, 15 Aug 2018 21:16:07 +0000 (17:16 -0400)]
Update show pass documentation with Windows caveats.
William D. Jones [Wed, 15 Aug 2018 21:15:44 +0000 (17:15 -0400)]
Fix run_command() when using -format and -viewer in show pass.
Udi Finkelstein [Wed, 15 Aug 2018 16:56:30 +0000 (19:56 +0300)]
A few minor enhancements to specify block parsing.
Just remember specify blocks are parsed but ignored.
Clifford Wolf [Wed, 15 Aug 2018 17:12:38 +0000 (19:12 +0200)]
Merge pull request #605 from mmicko/master
Changes for MXE configuration in order to compile
Miodrag Milanovic [Wed, 15 Aug 2018 17:08:45 +0000 (19:08 +0200)]
Changes for MXE configuration in order to compile
Clifford Wolf [Wed, 15 Aug 2018 12:20:10 +0000 (14:20 +0200)]
Merge pull request #573 from cr1901/msys-64
Add support for 64-bit builds using msys2 environment, use msys-provided `libpthread`.
Clifford Wolf [Wed, 15 Aug 2018 12:05:38 +0000 (14:05 +0200)]
Merge pull request #591 from hzeller/virtual-override
Consistent use of 'override' for virtual methods in derived classes.
Clifford Wolf [Wed, 15 Aug 2018 12:01:34 +0000 (14:01 +0200)]
Merge pull request #590 from hzeller/remaining-file-error
Fix remaining log_file_error(); emit dependent file references in new…
Clifford Wolf [Wed, 15 Aug 2018 12:00:19 +0000 (14:00 +0200)]
Merge pull request #576 from cr1901/no-resource
Gate POSIX-only signals and resource module to only run on POSIX Pyth…
Clifford Wolf [Wed, 15 Aug 2018 11:37:25 +0000 (13:37 +0200)]
Merge pull request #592 from japm48/master
fix basys3 example
Clifford Wolf [Wed, 15 Aug 2018 11:35:41 +0000 (13:35 +0200)]
Merge pull request #513 from udif/pr_reg_wire_error
Add error checking for reg/wire/logic misuse - PR now passes 'make test' (plus a new test)
Clifford Wolf [Wed, 15 Aug 2018 11:14:23 +0000 (13:14 +0200)]
Merge pull request #562 from udif/pr_fix_illegal_port_decl
Detect illegal port declaration, e.g input/output/inout keyword must …
Clifford Wolf [Tue, 14 Aug 2018 21:31:25 +0000 (23:31 +0200)]
Fix use of signed integers in JSON back-end
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Tue, 14 Aug 2018 10:47:41 +0000 (12:47 +0200)]
Merge pull request #602 from litghost/add_eblif_extension
Map .eblif extension as blif.
litghost [Mon, 13 Aug 2018 21:02:53 +0000 (14:02 -0700)]
Map .eblif extension as blif.
Signed-off-by: litghost <537074+litghost@users.noreply.github.com>
Clifford Wolf [Wed, 8 Aug 2018 17:41:47 +0000 (19:41 +0200)]
Fixed use of char array for string in blifparse error handling
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 8 Aug 2018 17:39:23 +0000 (19:39 +0200)]
Merge pull request #596 from litghost/extend_blif_parser
#565 Add BLIF parsing support for .conn and .cname
litghost [Wed, 8 Aug 2018 17:22:55 +0000 (10:22 -0700)]
Report error reason on same line as syntax error.
Signed-off-by: litghost <537074+litghost@users.noreply.github.com>
Clifford Wolf [Mon, 6 Aug 2018 08:44:21 +0000 (10:44 +0200)]
Merge pull request #600 from jpathy/patch-1
Use `realpath`
Clifford Wolf [Mon, 6 Aug 2018 08:41:53 +0000 (10:41 +0200)]
Merge pull request #599 from kbeckmann/kbeckmann/fix_readme_quotes
readme: Fix formatting of a keyword
jpathy [Mon, 6 Aug 2018 06:51:07 +0000 (06:51 +0000)]
Use `realpath`
Use `os.path.realpath` instead to make sure symlinks are followed. This is also required to work for nix package manager.
Konrad Beckmann [Mon, 6 Aug 2018 04:30:33 +0000 (13:30 +0900)]
readme: Fix formatting of a keyword
Single quotes were used instead of backticks leading to
incorrect formatting.
litghost [Fri, 3 Aug 2018 15:02:49 +0000 (08:02 -0700)]
Use log_warning which does not immediately terminate.
litghost [Thu, 2 Aug 2018 21:33:39 +0000 (14:33 -0700)]
Add BLIF parsing support for .conn and .cname
japm48 [Sun, 22 Jul 2018 20:29:31 +0000 (22:29 +0200)]
fix basys3 example
Added `CONFIG_VOLTAGE` and `CFGBVS` to constraints file
to avoid warning `DRC 23-20`.
Added `open_hw` needed for programming.
Clifford Wolf [Sun, 22 Jul 2018 16:44:05 +0000 (18:44 +0200)]
Verific: Produce errors for instantiating unknown module
Because if the unknown module is connected to any constants, Verific will
actually break all constants in the same module, even if they have nothing
to do structurally with that instance of an unknown module.
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sun, 22 Jul 2018 13:21:59 +0000 (15:21 +0200)]
Add missing <deque> include (MSVC build fix)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sun, 22 Jul 2018 12:35:32 +0000 (14:35 +0200)]
Upodate ABC to git rev
ae6716b
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sun, 22 Jul 2018 12:28:45 +0000 (14:28 +0200)]
Add missing -lz to MXE build
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Henner Zeller [Sat, 21 Jul 2018 06:41:18 +0000 (23:41 -0700)]
Consistent use of 'override' for virtual methods in derived classes.
o Not all derived methods were marked 'override', but it is a great
feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
use the plain keyword going forward now that C++11 is established)
Henner Zeller [Sat, 21 Jul 2018 01:52:52 +0000 (18:52 -0700)]
Fix remaining log_file_error(); emit dependent file references in new line.
There are some places that reference dependent file locations ("this function was
called from ..."). These are now in a separate line for ease of jumping to
it with the editor (behaves similarly to compilers that emit dependent
messages).
Clifford Wolf [Fri, 20 Jul 2018 17:22:59 +0000 (19:22 +0200)]
Merge pull request #586 from hzeller/more-sourcepos-logging
Convert more log_error() to log_file_error() where possible.
Henner Zeller [Fri, 20 Jul 2018 16:37:44 +0000 (09:37 -0700)]
Convert more log_error() to log_file_error() where possible.
Mostly statements that span over multiple lines and haven't been
caught with the previous conversion.
Clifford Wolf [Fri, 20 Jul 2018 15:46:06 +0000 (17:46 +0200)]
Merge pull request #585 from hzeller/use-file-warning-error
Use log_file_warning(), log_file_error() functions
Henner Zeller [Fri, 20 Jul 2018 15:11:20 +0000 (08:11 -0700)]
Use log_file_warning(), log_file_error() functions.
Wherever we can report a source-level location.
Clifford Wolf [Fri, 20 Jul 2018 14:36:06 +0000 (16:36 +0200)]
Merge pull request #584 from hzeller/provide-source-location-logging
Provide source-location logging.
Henner Zeller [Thu, 19 Jul 2018 16:40:20 +0000 (09:40 -0700)]
Provide source-location logging.
o Provide log_file_warning() and log_file_error() that prefix the log
message with <filename>:<lineno>: to be easily picked up by IDEs that
need to step through errors.
o Simplify some duplicate logging code in kernel/log.cc
o Use the new log functions in genrtlil.
Clifford Wolf [Thu, 19 Jul 2018 13:31:12 +0000 (15:31 +0200)]
Add async2sync pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Aman Goel [Wed, 18 Jul 2018 15:34:18 +0000 (11:34 -0400)]
Merge pull request #2 from YosysHQ/master
Merging with official repo
Clifford Wolf [Tue, 17 Jul 2018 10:43:30 +0000 (12:43 +0200)]
Fix handling of eventually properties in verific importer
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Mon, 16 Jul 2018 16:46:06 +0000 (18:46 +0200)]
Fix verific -vlog-incdir and -vlog-libdir handling
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Mon, 16 Jul 2018 14:58:14 +0000 (16:58 +0200)]
Merge pull request #581 from daveshah1/ecp5
Adding ECP5 synthesis target
Clifford Wolf [Mon, 16 Jul 2018 14:48:09 +0000 (16:48 +0200)]
Fix "read -incdir"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
David Shah [Mon, 16 Jul 2018 13:56:12 +0000 (15:56 +0200)]
ecp5: Fixing miscellaneous sim model issues
Signed-off-by: David Shah <davey1576@gmail.com>
Clifford Wolf [Mon, 16 Jul 2018 13:32:38 +0000 (15:32 +0200)]
Merge branch 'master' of github.com:YosysHQ/yosys
Clifford Wolf [Mon, 16 Jul 2018 13:32:26 +0000 (15:32 +0200)]
Add "read -incdir"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
David Shah [Mon, 16 Jul 2018 13:20:34 +0000 (15:20 +0200)]
ecp5: Fixing 'X' issues with LUT simulation models
Signed-off-by: David Shah <davey1576@gmail.com>
David Shah [Mon, 16 Jul 2018 12:33:13 +0000 (14:33 +0200)]
ecp5: ECP5 synthesis fixes
Signed-off-by: David Shah <davey1576@gmail.com>