mesa.git
5 years agointel/genxml: Media instructions and structures for gen11
Toni Lönnberg [Wed, 16 Jan 2019 11:55:25 +0000 (13:55 +0200)]
intel/genxml: Media instructions and structures for gen11

v2: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    - fix missing type
    - fix *_FQM_*/*_QM_* commands
    - shorten some media structs using groups
    - factor out memory attributes
    - switch MI_FLUSH_DW fields to bool

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/genxml: Media instructions and structures for gen10
Toni Lönnberg [Wed, 16 Jan 2019 11:55:08 +0000 (13:55 +0200)]
intel/genxml: Media instructions and structures for gen10

v2: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    - fix missing type
    - fix *_FQM_*/*_QM_* commands
    - shorten some media structs using groups
    - factor out memory attributes
    - switch MI_FLUSH_DW fields to bool

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/genxml: Media instructions and structures for gen9
Toni Lönnberg [Wed, 16 Jan 2019 11:54:46 +0000 (13:54 +0200)]
intel/genxml: Media instructions and structures for gen9

v2: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    - fix missing type
    - fix *_FQM_*/*_QM_* commands
    - shorten some media structs using groups
    - factor out memory attributes
    - switch MI_FLUSH_DW fields to bool

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/genxml: Media instructions and structures for gen8
Toni Lönnberg [Wed, 16 Jan 2019 11:54:25 +0000 (13:54 +0200)]
intel/genxml: Media instructions and structures for gen8

v2: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    - switch MI_FLUSH_DW fields to bool

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/genxml: Media instructions and structures for gen7.5
Toni Lönnberg [Wed, 16 Jan 2019 11:54:02 +0000 (13:54 +0200)]
intel/genxml: Media instructions and structures for gen7.5

v2: Fixed MI_WAIT_FOR_EVENT to be for video also

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/genxml: Media instructions and structures for gen7
Toni Lönnberg [Wed, 16 Jan 2019 11:53:13 +0000 (13:53 +0200)]
intel/genxml: Media instructions and structures for gen7

v2: Fixed MI_WAIT_FOR_EVENT to be for blitter and video also

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/genxml: Media instructions and structures for gen6
Toni Lönnberg [Wed, 16 Jan 2019 11:52:11 +0000 (13:52 +0200)]
intel/genxml: Media instructions and structures for gen6

v2: Fixed MI_WAIT_FOR_EVENT to be for blitter and video also

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/genxml: Only handle instructions meant for render engine when generating
Toni Lönnberg [Thu, 15 Nov 2018 14:04:34 +0000 (16:04 +0200)]
intel/genxml: Only handle instructions meant for render engine when generating
headers

v2: Fixed the check for engine

v3: Changed engine into an argument given to the scripts

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agosoftpipe: add indirect store buffer/image unit
Dave Airlie [Wed, 27 Mar 2019 05:21:08 +0000 (15:21 +1000)]
softpipe: add indirect store buffer/image unit

The code to handle image unit indirect was missing

Fixes piglit tests/spec/arb_arrays_of_arrays/execution/image_store/basic-imageStore-mixed-const-non-const-uniform-index.shader_test

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
5 years agosoftpipe/draw: fix vertex id in soft paths.
Dave Airlie [Wed, 27 Mar 2019 04:06:50 +0000 (14:06 +1000)]
softpipe/draw: fix vertex id in soft paths.

This fixes the vertex id fetch in the non-llvm drawing paths.

This vertex id in elt mode comes from the elts not just a linear
value.

Note we don't bad basevertex in the elts case as it's already included
in the elts by the looks of it (at least tests fail if I add it)

Fixes piglit end-primitive tests and some others.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
5 years agofreedreno/ir3: Push UBOs to constant file
Kristian H. Kristensen [Tue, 26 Mar 2019 17:31:54 +0000 (10:31 -0700)]
freedreno/ir3: Push UBOs to constant file

We have a rather big constant file and it seems that the best way to
use it is to upload all UBOs and lower UBO access the load_uniform.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: Enable PIPE_CAP_PACKED_UNIFORMS
Kristian H. Kristensen [Tue, 26 Mar 2019 17:31:54 +0000 (10:31 -0700)]
freedreno/ir3: Enable PIPE_CAP_PACKED_UNIFORMS

This commit turns on the gallium cap and adds a pass to lower the
load_ubo intrinsics for block 0 back to load_uniform intrinsics and
adjust the backend where the cap switches units from vec4s to dwords.

As we stop using ir3_glsl_type_size() for uniform layout, this also
corrects an issue where we would allocate a vec4 slot for samplers in
uniforms, fixing:

  dEQP-GLES3.functional.shaders.struct.uniform.sampler_array_fragment
  dEQP-GLES3.functional.shaders.struct.uniform.sampler_array_vertex
  dEQP-GLES3.functional.shaders.struct.uniform.sampler_nested_fragment
  dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_vertex
  dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_fragment

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agost/glsl_to_nir: Calculate num_uniforms from NumParameterValues
Kristian H. Kristensen [Tue, 26 Mar 2019 16:53:38 +0000 (09:53 -0700)]
st/glsl_to_nir: Calculate num_uniforms from NumParameterValues

We don't need to determine the number of uniform slots here, it's
already available as prog->Parameters->NumParameterValues.  The way we
previously determined the number of slots was also broken for
PackedDriverUniformStorage, where we would add loc (in dwords) and
type_size() (in vec4s).

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agointel: Add Elkhart Lake PCI-IDs
Anuj Phogat [Mon, 21 May 2018 20:54:13 +0000 (13:54 -0700)]
intel: Add Elkhart Lake PCI-IDs

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel: Add Elkhart Lake device info
Anuj Phogat [Fri, 7 Sep 2018 21:40:12 +0000 (14:40 -0700)]
intel: Add Elkhart Lake device info

V2: Fix L3 bank count (Vivek)
    Fix simulator_id and num_eu_per_subslice (Lionel)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoradeon/vcn: add H.264 constrained baseline support
Leo Liu [Tue, 26 Mar 2019 18:36:09 +0000 (14:36 -0400)]
radeon/vcn: add H.264 constrained baseline support

VCN supports this profile as well as UVD, so add it

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
5 years agoegl/android: chose node type based on swrast and preprocessor flags
Gurchetan Singh [Wed, 27 Mar 2019 02:20:13 +0000 (19:20 -0700)]
egl/android: chose node type based on swrast and preprocessor flags

kms_swrast can work with primary nodes out of the box, but also
with rendernodes if the build environment specifies the
EGL_FORCE_RENDERNODE flag.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoegl/android: use software rendering when appropriate
Gurchetan Singh [Wed, 13 Mar 2019 17:59:59 +0000 (10:59 -0700)]
egl/android: use software rendering when appropriate

Now the init logic fallbacks to or forces software rendering.

v2: simplify flow (@eric)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoegl/android: use swrast option in droid_load_driver
Gurchetan Singh [Wed, 13 Mar 2019 17:49:20 +0000 (10:49 -0700)]
egl/android: use swrast option in droid_load_driver

Load the kms_swrast driver when specified.
Doesn't work with drm_gralloc.

v2: remove unneeded line (@eric)
v3: Remove swrast_loader_extensions (@evelikov)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoegl/android: plumb swrast option
Gurchetan Singh [Wed, 13 Mar 2019 17:43:35 +0000 (10:43 -0700)]
egl/android: plumb swrast option

It's good to have options.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoegl/android: refactor droid_load_driver a bit
Gurchetan Singh [Wed, 27 Mar 2019 00:13:01 +0000 (17:13 -0700)]
egl/android: refactor droid_load_driver a bit

This way, we can use primary nodes with kms_swrast too.
Also fix up some whitespace issues.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoegl/android: droid_open_device_drm_gralloc --> droid_open_device
Gurchetan Singh [Mon, 25 Mar 2019 23:50:46 +0000 (16:50 -0700)]
egl/android: droid_open_device_drm_gralloc --> droid_open_device

Makes things easier to follow.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoegl/android: move droid_open_device_drm_gralloc down a bit
Gurchetan Singh [Mon, 25 Mar 2019 23:46:31 +0000 (16:46 -0700)]
egl/android: move droid_open_device_drm_gralloc down a bit

1) Removes a forward declaration.
2) Makes next patch easier.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoegl/android: move droid_image_loader_extension down a bit
Gurchetan Singh [Mon, 25 Mar 2019 23:44:34 +0000 (16:44 -0700)]
egl/android: move droid_image_loader_extension down a bit

This removes some #ifdefs.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agodocs: update calendar, add news item and link release notes for 19.0.1
Dylan Baker [Wed, 27 Mar 2019 17:14:08 +0000 (10:14 -0700)]
docs: update calendar, add news item and link release notes for 19.0.1

5 years agodocs: Add SHA256 sums for mesa 19.0.1
Dylan Baker [Wed, 27 Mar 2019 17:10:37 +0000 (10:10 -0700)]
docs: Add SHA256 sums for mesa 19.0.1

5 years agodocs: Add release notes for 19.0.1
Dylan Baker [Wed, 27 Mar 2019 17:02:21 +0000 (10:02 -0700)]
docs: Add release notes for 19.0.1

5 years agoRevert "anv/radv: release memory allocated by glsl types during spirv_to_nir"
Jason Ekstrand [Wed, 27 Mar 2019 16:16:15 +0000 (11:16 -0500)]
Revert "anv/radv: release memory allocated by glsl types during spirv_to_nir"

This reverts commit 4e1bbb000cdfe4ba01bee5a6868c54fed7285dae.  It turns
out that some DXVK apps due to some implementation detail of DXVK or
other create and destroy instances in an interleaved way.  Freeing the
glsl_type memory without being a bit more careful causes use-after-free
issues.  Looks like we need to try again.

5 years agopanfrost: Wait for last job to finish in force_flush_fragment
Tomeu Vizoso [Wed, 27 Mar 2019 15:28:35 +0000 (16:28 +0100)]
panfrost: Wait for last job to finish in force_flush_fragment

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Pass the context BOs to the kernel so they aren't unmapped while in use
Tomeu Vizoso [Wed, 27 Mar 2019 15:26:49 +0000 (16:26 +0100)]
panfrost: Pass the context BOs to the kernel so they aren't unmapped while in use

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Also tell the kernel about the checksum_slab
Tomeu Vizoso [Wed, 27 Mar 2019 13:57:33 +0000 (14:57 +0100)]
panfrost: Also tell the kernel about the checksum_slab

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Set the GEM handle for AFBC buffers
Tomeu Vizoso [Wed, 27 Mar 2019 13:56:36 +0000 (14:56 +0100)]
panfrost: Set the GEM handle for AFBC buffers

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Fix sscanf format options
Tomeu Vizoso [Wed, 27 Mar 2019 13:56:00 +0000 (14:56 +0100)]
panfrost: Fix sscanf format options

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agovirgl: Fake MSAA when max samples is 1
Alexandros Frantzis [Mon, 18 Mar 2019 14:30:29 +0000 (16:30 +0200)]
virgl: Fake MSAA when max samples is 1

When the host is running on softpipe/llvmpipe the maximum number of
samples for multisampling is 1. GL 3.0 requires at least 4 samples, and
softpipe/llvmpipe get around this by enabling PIPE_CAP_FAKE_SW_MSAA.

This patch mimics softpipe/llvmpipe behavior in virgl by enabling the
same PIPE_CAP_FAKE_SW_MSAA workaround when the max sample count reported
by the host is 1. This change allows virgl on a softpipe/llvmpipe host
to advertise support for GL 3.0 and beyond.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
5 years agoac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3
Samuel Pitoiset [Mon, 25 Mar 2019 12:37:46 +0000 (13:37 +0100)]
ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agogitlab-ci: Automatically retry jobs after runner system failure
Michel Dänzer [Tue, 26 Mar 2019 17:39:41 +0000 (18:39 +0100)]
gitlab-ci: Automatically retry jobs after runner system failure

Up to twice, for a total of 3 attempts maximum.

This will hopefully avoid spurious CI pipeline failures due to
intermittent GitLab/docker infrastructure issues.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agogitlab-ci: Only pull/push cache contents in build+test stage jobs
Michel Dänzer [Tue, 26 Mar 2019 17:35:59 +0000 (18:35 +0100)]
gitlab-ci: Only pull/push cache contents in build+test stage jobs

The containers-build stage job doesn't use the cache, so this might save
some wasted time for it.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agogitlab-ci: Make sure clang job actually uses ccache
Michel Dänzer [Tue, 26 Mar 2019 09:04:27 +0000 (10:04 +0100)]
gitlab-ci: Make sure clang job actually uses ccache

Meson didn't automatically pick up ccache in this job for some reason.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agospirv: propagate the access flag for store and load derefs
Samuel Pitoiset [Tue, 26 Mar 2019 22:07:39 +0000 (23:07 +0100)]
spirv: propagate the access flag for store and load derefs

It was only propagated when UBO/SSBO access are lowered to offsets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: <Jason Ekstrand jason@jlekstrand.net>
5 years agonir: add nir_{load,store}_deref_with_access() helpers
Samuel Pitoiset [Tue, 26 Mar 2019 22:06:53 +0000 (23:06 +0100)]
nir: add nir_{load,store}_deref_with_access() helpers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: <Jason Ekstrand jason@jlekstrand.net>
5 years agospirv: make use of the select control support in nir
Timothy Arceri [Wed, 20 Mar 2019 04:56:54 +0000 (15:56 +1100)]
spirv: make use of the select control support in nir

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108841

5 years agonir: add support for user defined select control
Timothy Arceri [Wed, 20 Mar 2019 04:42:56 +0000 (15:42 +1100)]
nir: add support for user defined select control

This will allow us to make use of the selection control support in
spirv and the GL support provided by EXT_control_flow_attributes.

Note this only supports if-statements as we dont support switches
in NIR.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108841

5 years agospirv: make use of the loop control support in nir
Timothy Arceri [Wed, 20 Mar 2019 02:51:47 +0000 (13:51 +1100)]
spirv: make use of the loop control support in nir

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108841

5 years agonir: add support for user defined loop control
Timothy Arceri [Wed, 20 Mar 2019 02:39:36 +0000 (13:39 +1100)]
nir: add support for user defined loop control

This will allow us to make use of the loop control support in
spirv and the GL support provided by EXT_control_flow_attributes.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108841

5 years agopanfrost: Preliminary work for mipmaps
Alyssa Rosenzweig [Thu, 21 Mar 2019 02:54:38 +0000 (02:54 +0000)]
panfrost: Preliminary work for mipmaps

This patch refactors a substantial amount of code in preparation for
mipmaps. In particular, we know have a correct slice abstraction based
on offsets; cpu/gpu are no longer arbitrary pointers. We additionally
shuffle around other code to accompany these changes and cleanup how
tiled textures are handled, while drawing some attention to the blit
code.

Mipmaps are still disabled at this point, as autogeneration is not yet
implemented; enabling as-is would cause regressions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: fpow is a two-part operation
Alyssa Rosenzweig [Tue, 26 Mar 2019 04:48:20 +0000 (04:48 +0000)]
panfrost/midgard: fpow is a two-part operation

In fact, the native "fpow" instruction only does half of it; more work
is needed for the actual instruction. For now, just lower.

Fixes: 1ea42894c ("panfrost/midgard: Implement fpow")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Handle i2b constant
Alyssa Rosenzweig [Tue, 26 Mar 2019 04:36:58 +0000 (04:36 +0000)]
panfrost/midgard: Handle i2b constant

Fixes
dEQP-GLES2.functional.shaders.conversions.scalar_to_scalar.int_to_bool_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Expand fge lowering to more types
Alyssa Rosenzweig [Tue, 26 Mar 2019 04:01:33 +0000 (04:01 +0000)]
panfrost/midgard: Expand fge lowering to more types

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Add ult/ule ops
Alyssa Rosenzweig [Tue, 26 Mar 2019 04:00:33 +0000 (04:00 +0000)]
panfrost/midgard: Add ult/ule ops

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Stub out ES3 caps/callbacks
Alyssa Rosenzweig [Mon, 25 Mar 2019 04:57:27 +0000 (04:57 +0000)]
panfrost: Stub out ES3 caps/callbacks

Although this is not functional (and the command stream side is not
aiming for ES3 right now), this is enough to run dEQP-GLES3 shader
tests with the version override directive; this is useful, as some ES3
shader feature can occur in ES2 class shaders due to lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Cleanup midgard_nir_algebraic.py
Alyssa Rosenzweig [Mon, 25 Mar 2019 03:17:43 +0000 (03:17 +0000)]
panfrost/midgard: Cleanup midgard_nir_algebraic.py

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Lower source modifiers for ints
Alyssa Rosenzweig [Mon, 25 Mar 2019 02:49:04 +0000 (02:49 +0000)]
panfrost/midgard: Lower source modifiers for ints

On Midgard, float ops support standard source modifiers (abs/neg) and
destination modifiers (sat/pos/round). Integer ops do not support these,
however. To cope, we use native NIR source modifiers for floats, but
lower them away to iabs/ineg for integers, implementing those ops
simultaneously to avoid regressions.

Fixes the integer tests in
dEQP-GLES2.functional.shaders.operator.unary_operator.minus.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Implement b2i; improve b2f/f2b
Alyssa Rosenzweig [Mon, 25 Mar 2019 01:13:12 +0000 (01:13 +0000)]
panfrost/midgard: Implement b2i; improve b2f/f2b

Fixes
dEQP-GLES2.functional.shaders.conversions.scalar_to_scalar.bool_to_int_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Lower i2b32
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:56:48 +0000 (00:56 +0000)]
panfrost/midgard: Lower i2b32

Fixes
dEQP-GLES2.functional.shader.conversions.scalar_to_scalar.int_to_bool_vertex

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Lower f2b32 to fne
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:53:46 +0000 (00:53 +0000)]
panfrost/midgard: Lower f2b32 to fne

Fixes
dEQP-GLES2.functional.shaders.swizzles.vector_swizzles.mediump_bvec2_x_vertex

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Lower bool_to_int32
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:25:01 +0000 (00:25 +0000)]
panfrost/midgard: Lower bool_to_int32

Fixes dEQP-GLES2.functional.shaders.linkage.varying_type_vec2 (among
many others).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Map more bany/ball opcodes
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:12:06 +0000 (00:12 +0000)]
panfrost/midgard: Map more bany/ball opcodes

Some of these are not yet fully functional due to related bugs, but this
the correct op mapping. The native ball/bany opcodes act on vec4's
unconditionally. That said, both ball and bany have the nice property
that duplicating an argument does not affect their output, so the
default "hanging swizzles" allow us to implement 2/3-component opcodes
correctly, implicitly lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Add more ball/bany, iabs ops
Alyssa Rosenzweig [Mon, 25 Mar 2019 00:07:32 +0000 (00:07 +0000)]
panfrost/midgard: Add more ball/bany, iabs ops

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Schedule ball/bany to vectors
Alyssa Rosenzweig [Sun, 24 Mar 2019 22:41:15 +0000 (22:41 +0000)]
panfrost/midgard: Schedule ball/bany to vectors

Though they output scalars, they need a vector unit to make sense.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Add fcsel_i opcode
Alyssa Rosenzweig [Sun, 24 Mar 2019 22:27:06 +0000 (22:27 +0000)]
panfrost/midgard: Add fcsel_i opcode

Whereas a normal fcsel acts on a boolean input in r31.w, the fcsel_i
variant acts on an integer input in r31.w, which can be preloaded with
an instruction like imov (with the appropriate negate flag on the
source).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Implement scissor test
Alyssa Rosenzweig [Sun, 24 Mar 2019 21:51:49 +0000 (21:51 +0000)]
panfrost: Implement scissor test

This preliminary implementation should handle some basic cases. Future
work should scissor the FRAGMENT job as well for efficiency.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Fix viewports
Alyssa Rosenzweig [Sun, 24 Mar 2019 20:01:15 +0000 (20:01 +0000)]
panfrost: Fix viewports

Our viewport code hardcoded a number of wrong assumptions, which sort of
sometimes worked but was definitely wrong (and broke most of dEQP). This
corrects the logic, accounting for flipped-Y framebuffers, which
fixes... most of dEQP.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/midgard: Fix b2f32 swizzle for vectors
Alyssa Rosenzweig [Sun, 24 Mar 2019 16:07:31 +0000 (16:07 +0000)]
panfrost/midgard: Fix b2f32 swizzle for vectors

Fixes issues in most of dEQP-GLES2.functional.shaders.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agosoftpipe: fix clears to only clear specified color buffers.
Dave Airlie [Tue, 26 Mar 2019 05:25:18 +0000 (15:25 +1000)]
softpipe: fix clears to only clear specified color buffers.

This fixes piglit clearbuffer-mixed-format

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agodraw/vs: partly fix basevertex/vertex id
Dave Airlie [Mon, 25 Mar 2019 05:38:18 +0000 (15:38 +1000)]
draw/vs: partly fix basevertex/vertex id

This gets the basevertex from the draw depending on whether
it's an indexed or non-indexed draw.

We still fail a transform feedback test for vertex id, as
the vertex id actually an index id, and isn't getting translated
properly to a vertex id, suggestions on how/where to fix that welcome.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agoamd/surface: provide firstMipIdInTail for metadata surface calculations
Nicolai Hähnle [Wed, 9 Jan 2019 11:42:28 +0000 (12:42 +0100)]
amd/surface: provide firstMipIdInTail for metadata surface calculations

This field was added in a recent addrlib update, and while there
currently seems to be no issue with skipping it, we will have to
set it correctly in the future.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoac/nir: Return frag_coord as integer.
Bas Nieuwenhuizen [Tue, 19 Mar 2019 00:29:43 +0000 (01:29 +0100)]
ac/nir: Return frag_coord as integer.

To preserve the invariant that nir ssa defs are integers or pointers
in LLVM.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agofreedreno/ir3: Fix operand order for DSX/DSY
Kristian H. Kristensen [Mon, 25 Mar 2019 21:04:20 +0000 (14:04 -0700)]
freedreno/ir3: Fix operand order for DSX/DSY

Most cat5 instructions are constructed using ir3_SAM, which uses
regs[1] for the (sampler, tex) src. Not DSX/DSY though, so we look up
src1 and src2 differently for those two.

Fixes: 1dffb089 ("freedreno/ir3: fix sam.s2en encoding")
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: Track whether shader needs derivatives
Kristian H. Kristensen [Mon, 25 Mar 2019 21:12:41 +0000 (14:12 -0700)]
freedreno/ir3: Track whether shader needs derivatives

In 1088b788 ("freedreno/ir3: find # of samplers from uniform vars") we
started counting number of samplers based on the uniform vars instead
of number of cat5 instructions.  We used the number of samplers to
determine whether to enable derivatives, but when we only use
derivatives and no samplers, that now breaks.  Track whether we need
derivatives explicitly and use that to enable the state.

Fixes: 1088b788 ("freedreno/ir3: find # of samplers from uniform vars")
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agost/nine: enable csmt per default on iris
Andre Heider [Wed, 20 Mar 2019 20:38:40 +0000 (21:38 +0100)]
st/nine: enable csmt per default on iris

iris is thread safe, enable csmt for a ~5% performace boost.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
5 years agospirv: Handle the NonUniformEXT decoration
Jason Ekstrand [Wed, 27 Feb 2019 21:59:29 +0000 (15:59 -0600)]
spirv: Handle the NonUniformEXT decoration

5 years agonir: Add access flags to deref and SSBO atomics
Jason Ekstrand [Mon, 4 Mar 2019 19:04:45 +0000 (13:04 -0600)]
nir: Add access flags to deref and SSBO atomics

We will need them for a new ACCESS_NON_UNIFORM flag that's about to be
added in the next commit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agonir: Add texture sources and intrinsics for bindless
Jason Ekstrand [Sun, 28 Oct 2018 12:52:44 +0000 (07:52 -0500)]
nir: Add texture sources and intrinsics for bindless

On Intel, we have both bindless and bindful and we'd like to use them at
the same time if we can so we need to be able to distinguish at the NIR
level between the two.  This also fixes nir_lower_tex to properly handle
bindless in its tex_texture_size and get_texture_lod helpers.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agointel/fs: Make alpha test work with MRT and sample mask
Danylo Piliaiev [Wed, 27 Feb 2019 15:10:42 +0000 (17:10 +0200)]
intel/fs: Make alpha test work with MRT and sample mask

Fix the order of src0_alpha and sample mask in fb payload.
From SKL PRM Volume 7, "Data Payload Register Order
for Render Target Write Messages":
 Type   S0A  oM  sZ  oS  M2     M3       M4
 SIMD8   1   1   0   0   s0A    oM       R
 SIMD16  1   1   0   0   1/0s0A 3/2s0A   oM

It also fixes working of alpha to coverage with sample mask
on GEN6 since now they are in correct order.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoi965,iris,anv: Make alpha to coverage work with sample mask
Danylo Piliaiev [Wed, 20 Feb 2019 17:39:18 +0000 (19:39 +0200)]
i965,iris,anv: Make alpha to coverage work with sample mask

From "Alpha Coverage" section of SKL PRM Volume 7:
 "If Pixel Shader outputs oMask, AlphaToCoverage is disabled in
  hardware, regardless of the state setting for this feature."

From OpenGL spec 4.6, "15.2 Shader Execution":
 "The built-in integer array gl_SampleMask can be used to change
 the sample coverage for a fragment from within the shader."

From OpenGL spec 4.6, "17.3.1 Alpha To Coverage":
 "If SAMPLE_ALPHA_TO_COVERAGE is enabled, a temporary coverage value
  is generated where each bit is determined by the alpha value at the
  corresponding sample location. The temporary coverage value is then
  ANDed with the fragment coverage value to generate a new fragment
  coverage value."

Similar wording could be found in Vulkan spec 1.1.100
"25.6. Multisample Coverage"

Thus we need to compute alpha to coverage dithering manually in shader
and replace sample mask store with the bitwise-AND of sample mask and
alpha to coverage dithering.

The following formula is used to compute final sample mask:
  m = int(16.0 * clamp(src0_alpha, 0.0, 1.0))
  dither_mask = 0x1111 * ((0xfea80 >> (m & ~3)) & 0xf) |
     0x0808 * (m & 2) | 0x0100 * (m & 1)
  sample_mask = sample_mask & dither_mask
Credits to Francisco Jerez <currojerez@riseup.net> for creating it.

It gives a number of ones proportional to the alpha for 2, 4, 8 or 16
least significant bits of the result.

GEN6 hardware does not have issue with simultaneous usage of sample mask
and alpha to coverage however due to the wrong sending order of oMask
and src0_alpha it is still affected by it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109743

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agonir: Add a lowering pass for non-uniform resource access
Jason Ekstrand [Wed, 27 Feb 2019 20:36:44 +0000 (14:36 -0600)]
nir: Add a lowering pass for non-uniform resource access

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agonir/lower_io: Add a bounds-checked 64-bit global address format
Jason Ekstrand [Wed, 9 Jan 2019 20:56:02 +0000 (14:56 -0600)]
nir/lower_io: Add a bounds-checked 64-bit global address format

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agodraw/gs: fix point size outputs from geometry shader.
Dave Airlie [Mon, 25 Mar 2019 05:12:13 +0000 (15:12 +1000)]
draw/gs: fix point size outputs from geometry shader.

If the geom shader emits a point size we failed to find it here,
use the correct API to look it up.

Fixes:
tests/spec/glsl-1.50/execution/geometry/point-size-out.shader_test

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agodraw: bail instead of assert on instance count (v2)
Dave Airlie [Mon, 25 Mar 2019 03:17:31 +0000 (13:17 +1000)]
draw: bail instead of assert on instance count (v2)

With indirect rendering it's fine to set the instance count
parameter to 0, and expect the rendering to be ignored.

Fixes assert in KHR-GLES31.core.compute_shader.pipeline-gen-draw-commands
on softpipe

v2: return earlier before changing fpstate

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agovl/dri3: remove the wait before getting back buffer
Leo Liu [Tue, 19 Mar 2019 17:37:39 +0000 (13:37 -0400)]
vl/dri3: remove the wait before getting back buffer

The wait here is unnecessary since we got a pool of back buffers,
and the wait for swap buffer will happen before the present pixmap,
at the same time the previous back buffer will be put back to pool
for reuse after the check for PresentIdleNotify event

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
5 years agocompiler/nir: add lowering for 16-bit ldexp
Iago Toral Quiroga [Thu, 24 May 2018 07:54:45 +0000 (09:54 +0200)]
compiler/nir: add lowering for 16-bit ldexp

v2 (Topi):
 - Make bit-size handling order be 16-bit, 32-bit, 64-bit
 - Clamp lower exponent range at -28 instead of -30.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agocompiler/nir: add lowering for 16-bit flrp
Iago Toral Quiroga [Wed, 18 Apr 2018 09:02:51 +0000 (11:02 +0200)]
compiler/nir: add lowering for 16-bit flrp

And enable it on Intel.

v2:
 - Squash the change to enable it on Intel (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agocompiler/nir: add lowering option for 16-bit fmod
Iago Toral Quiroga [Wed, 18 Apr 2018 08:50:35 +0000 (10:50 +0200)]
compiler/nir: add lowering option for 16-bit fmod

And enable it on Intel.

v2:
 - Squash the change to enable this lowering on Intel (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agost/mesa: fix texture deletion context mix-up issues (v2)
Brian Paul [Thu, 21 Mar 2019 19:41:12 +0000 (13:41 -0600)]
st/mesa: fix texture deletion context mix-up issues (v2)

When we destroy a context, we need to temporarily make that context
the current one for the thread.

That's because during context tear-down we make many calls to
_mesa_reference_texobj(&texObj, NULL).  Note there's no context
parameter.  If the texture's refcount goes to zero and we need to
delete it, we use the thread's current context.  But if that context
isn't the context we're tearing down, we get into trouble when
deallocating sampler views.  See patch 593e36f956 ("st/mesa:
implement "zombie" sampler views (v2)") for background information.

Also, we need to release any sampler views attached to the fallback
textures.

Fixes a crash on exit with a glretrace of the Nobel Clinician
application.

v2: at end of st_destroy_context(), check if save_ctx == ctx and
unbind the context if so.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agonir: fix a few signed/unsigned comparison warnings
Brian Paul [Fri, 22 Mar 2019 01:19:05 +0000 (19:19 -0600)]
nir: fix a few signed/unsigned comparison warnings

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoandroid: static link with libexpat with Android O+
Kishore Kadiyala [Mon, 11 Mar 2019 09:23:03 +0000 (11:23 +0200)]
android: static link with libexpat with Android O+

In Android O, MESA needs to statically link libexpat so that
it's in same VNDK namespace.

v2: apply change also to anv driver (Tapani)
v3: use += in anv change (Eric Engestrom)

Change-Id: I82b0be5c817c21e734dfdf5bfb6a9aa1d414ab33
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoradv: write availability status vkGetQueryPoolResults() when the data is not available
Samuel Iglesias Gonsálvez [Thu, 21 Mar 2019 16:43:56 +0000 (17:43 +0100)]
radv: write availability status vkGetQueryPoolResults() when the data is not available

If VK_QUERY_RESULT_WITH_AVAILABILY_BIT is set and
VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not
set, we need return to VK_NOT_READY only and set the availability
status field for each query.

From Vulkan spec:

"If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both
not set then no result values are written to pData for queries that are
in the unavailable state at the time of the call, and
vkGetQueryPoolResults returns VK_NOT_READY. However, availability state
is still written to pData for those queries if
VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set."

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoradv: don't overwrite results in VkGetQueryPoolResults() when queries are not available
Samuel Iglesias Gonsálvez [Fri, 22 Mar 2019 09:03:29 +0000 (10:03 +0100)]
radv: don't overwrite results in VkGetQueryPoolResults() when queries are not available

If the query is not available and VK_QUERY_RESULT_WAIT_BIT and
VK_QUERY_RESULT_PARTIAL_BIT are both not set, the spec doesn't
allow to modify its result.

From Vulkan spec:

"If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are
both not set then no result values are written to pData for queries
that are in the unavailable state at the time of the call, and
vkGetQueryPoolResults returns VK_NOT_READY. However, availability state
is still written to pData for those queries
if VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set."

v2:
- Move VK_NOT_READY change to next patch (Samuel Pitoiset)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agost/mesa: fix warnings about implicit conversion on enumeration type
Tapani Pälli [Fri, 22 Mar 2019 12:33:00 +0000 (14:33 +0200)]
st/mesa: fix warnings about implicit conversion on enumeration type

These enums match but compiler warns about implicit conversion.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agost/mesa: fix compilation warning on storage_flags_to_buffer_flags
Tapani Pälli [Fri, 22 Mar 2019 12:29:38 +0000 (14:29 +0200)]
st/mesa: fix compilation warning on storage_flags_to_buffer_flags

(warning: 'const' type qualifier on return type has no effect)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agonir/split_vars: fixup some more explicit_stride related issues.
Dave Airlie [Fri, 22 Mar 2019 04:21:55 +0000 (14:21 +1000)]
nir/split_vars: fixup some more explicit_stride related issues.

With vkpipelinedb Samuel discovered a regression since we stopped
stripping types at the spir-v level.

This adds a check to the var splitting for the case where it
asserts the type hasn't changed, when it has just created a bare
type, and it's different than the original type which has an explicit
stride.

This also removes a pointless assert that also triggers.

Fixes: 3b3653c4cf (nir/spirv: don't use bare types, remove assert in split vars for testing)
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agospirv: Use interface type for block and buffer block
Caio Marcelo de Oliveira Filho [Thu, 21 Mar 2019 20:26:48 +0000 (13:26 -0700)]
spirv: Use interface type for block and buffer block

Also handle GLSL_TYPE_INTERFACE the same way we do GLSL_TYPE_STRUCT in
various places.  Motivated by ARB_gl_spirv work, that will take
advantage of the interface types when handling NIR coming from SPIR-V.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agointel/compiler: handle GLSL_TYPE_INTERFACE as GLSL_TYPE_STRUCT
Caio Marcelo de Oliveira Filho [Thu, 21 Mar 2019 22:02:38 +0000 (15:02 -0700)]
intel/compiler: handle GLSL_TYPE_INTERFACE as GLSL_TYPE_STRUCT

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agospirv: Add an execution environment to the options
Caio Marcelo de Oliveira Filho [Fri, 22 Mar 2019 05:37:50 +0000 (22:37 -0700)]
spirv: Add an execution environment to the options

Also updates gl_spirv to pick the right one.  At the moment nothing
uses it, but upcoming functionality part of ARB_gl_spirv will use it,
and we also later can be more assertful when handling certain features
for each of the execution environments.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
5 years agoegl: Add a 565 pbuffer-only EGL config under X11.
Eric Anholt [Sat, 25 Aug 2018 21:16:59 +0000 (14:16 -0700)]
egl: Add a 565 pbuffer-only EGL config under X11.

The CTS requires a 565-no-depth-no-stencil (meaning d/s not-required, not
not-present) config for ES 3.0, but at depth 24 of X11 we wouldn't do so.
We can satisfy that bad requirement using a pbuffer-only visual with
whatever other buffers the driver happens to have given us.

I've tried to raise this as an absurd requirement with Khronos and made no
progress.

v2: Make sure it's single sample, no depth, no stencil.  Comment typo fix

Reviewed-by: Adam Jackson <ajax@redhat.com>
5 years agonir: Handle array-deref-of-vector case in loop analysis
Caio Marcelo de Oliveira Filho [Fri, 22 Mar 2019 03:37:12 +0000 (20:37 -0700)]
nir: Handle array-deref-of-vector case in loop analysis

SPIR-V can produce those for SSBO and UBO access.  Found when testing
the ARB_gl_spirv series.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agodocs: update freedreno status
Rob Clark [Fri, 22 Mar 2019 20:35:48 +0000 (16:35 -0400)]
docs: update freedreno status

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno: add ESSL cap
Rob Clark [Thu, 21 Mar 2019 13:33:33 +0000 (09:33 -0400)]
freedreno: add ESSL cap

Report 320 for a6xx, which isn't *quite* true (no geom/tess, in
particular), but other caps keep the reported GL and GLSL versions
correct (3.1 / 3.10 es).  But reporting 320 will switch on
EXT_gpu_shader5, which is the goal.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agomesa/st: use ESSL cap top enable gpu_shader5
Rob Clark [Thu, 21 Mar 2019 13:29:58 +0000 (09:29 -0400)]
mesa/st: use ESSL cap top enable gpu_shader5

For GLES2+ contexts, enable EXT_gpu_shader5 if the driver exposes a
sufficiently high ESSL feature level, even if the GLSL feature level
isn't high enough.

This allows drivers to support EXT_gpu_shader5 in GLES contexts before
they support all the additional features of ARB_gpu_shader5 in GL
contexts.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agogallium: add PIPE_CAP_ESSL_FEATURE_LEVEL
Rob Clark [Thu, 21 Mar 2019 12:56:17 +0000 (08:56 -0400)]
gallium: add PIPE_CAP_ESSL_FEATURE_LEVEL

Adds a new cap to allow drivers to expose higher shading language
versions in GLES contexts, to avoid having to report an artificially
low version for the benefit of GL contexts.

The motivation is to expose EXT_gpu_shader5 even though a driver may
not support all the features needed for the corresponding GL extension
(ARB_gpu_shader5).

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>