openpower-isa.git
2 years agorename lw*br to lw*sh
Luke Kenneth Casson Leighton [Sun, 1 Aug 2021 15:04:03 +0000 (16:04 +0100)]
rename lw*br to lw*sh

2 years agoadd LD-half-swap for i-DCT which does not work. redesign needed
Luke Kenneth Casson Leighton [Sun, 1 Aug 2021 09:30:53 +0000 (10:30 +0100)]
add LD-half-swap for i-DCT which does not work. redesign needed

2 years agopywriter: BCD helpers
Dmitry Selyutin [Sat, 31 Jul 2021 19:14:49 +0000 (19:14 +0000)]
pywriter: BCD helpers

2 years agoisa/bcd: DPD_TO_BCD helper
Dmitry Selyutin [Sat, 31 Jul 2021 18:57:36 +0000 (18:57 +0000)]
isa/bcd: DPD_TO_BCD helper

2 years agoisa/bcd: BCD_TO_DPD helper
Dmitry Selyutin [Sat, 31 Jul 2021 18:56:16 +0000 (18:56 +0000)]
isa/bcd: BCD_TO_DPD helper

2 years agoremove hand-created DOUBLE function, now it is replaced with pseudocode
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 19:02:28 +0000 (20:02 +0100)]
remove hand-created DOUBLE function, now it is replaced with pseudocode
compiled version

2 years agoreplace DOUBLE function from helpers.py with pseudocode variant
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 18:48:46 +0000 (19:48 +0100)]
replace DOUBLE function from helpers.py with pseudocode variant

2 years agoadd SINGLE function to double2single, to replace manually-created version
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 18:38:07 +0000 (19:38 +0100)]
add SINGLE function to double2single, to replace manually-created version

2 years agowhoops, no ability to add comments in between functions in pseudocode
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 18:37:48 +0000 (19:37 +0100)]
whoops, no ability to add comments in between functions in pseudocode

2 years agoadd outer-inner RADIX2 iDCT unit test.
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 16:27:20 +0000 (17:27 +0100)]
add outer-inner RADIX2 iDCT unit test.
use FFT twin +/- MUL-ADD-SUB rather than the DCT +/- MUL-ADD-SUB

2 years agoisa/bcd.mdwn: fix incorrect declaration
Dmitry Selyutin [Sat, 31 Jul 2021 13:48:08 +0000 (13:48 +0000)]
isa/bcd.mdwn: fix incorrect declaration

In pseudocode used in our markdown files, dc[16] does not mean that
we declare a variable of 16 bits; it only means that we access bit
16 of variable dc. Details:

https://bugs.libre-soc.org/show_bug.cgi?id=656#c15

2 years agoadd SVP64 i-DCT unit test for inner butterfly, coefficients pre-computed
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 13:28:25 +0000 (14:28 +0100)]
add SVP64 i-DCT unit test for inner butterfly, coefficients pre-computed
at present

2 years agoadd i-DCT SVP64 unit test for outer butterfly
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 13:19:46 +0000 (14:19 +0100)]
add i-DCT SVP64 unit test for outer butterfly

2 years agoadd iDCT modes to interim svshape instruction pseudo-code
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 12:10:22 +0000 (13:10 +0100)]
add iDCT modes to interim svshape instruction pseudo-code

2 years agocorrections to iDCT demo printout
Luke Kenneth Casson Leighton [Sat, 31 Jul 2021 09:21:22 +0000 (10:21 +0100)]
corrections to iDCT demo printout

2 years agoisa/bcd.mdwn: fix assignment operator
Dmitry Selyutin [Fri, 30 Jul 2021 18:49:56 +0000 (18:49 +0000)]
isa/bcd.mdwn: fix assignment operator

2 years agoisa/bcd.mdwn: update addg6s pseudocode
Dmitry Selyutin [Fri, 30 Jul 2021 18:33:03 +0000 (18:33 +0000)]
isa/bcd.mdwn: update addg6s pseudocode

Not only this pseudocode is wrong, since some actions are put inside
the loop, but also the algorithm as is cannot be translated due to
use of function call (carry_out). For more details, check these
discussions:

https://libre-soc.org/irclog/%23libre-soc.2021-07-28.log.html
https://bugs.libre-soc.org/show_bug.cgi?id=656

2 years agoisatables: cbcdtd instruction
Dmitry Selyutin [Wed, 28 Jul 2021 17:24:16 +0000 (17:24 +0000)]
isatables: cbcdtd instruction

2 years agoisatables: cdtbcd instruction
Dmitry Selyutin [Wed, 28 Jul 2021 17:24:06 +0000 (17:24 +0000)]
isatables: cdtbcd instruction

2 years agogot i-DCT yield schedule operational in fastdctlee.py test
Luke Kenneth Casson Leighton [Fri, 30 Jul 2021 14:27:54 +0000 (15:27 +0100)]
got i-DCT yield schedule operational in fastdctlee.py test

2 years agostart adding i-dct schedule with debug-print, hard to tell what is going on
Luke Kenneth Casson Leighton [Fri, 30 Jul 2021 10:15:37 +0000 (11:15 +0100)]
start adding i-dct schedule with debug-print, hard to tell what is going on
need to actually create a schedule-variant of i-DCT function, next

2 years agorandom experimentation landed eventually on a "pass" of iDCT with
Luke Kenneth Casson Leighton [Thu, 29 Jul 2021 22:11:59 +0000 (23:11 +0100)]
random experimentation landed eventually on a "pass" of iDCT with
in-place half-swapping

2 years agouse coefficient table in iDCT
Luke Kenneth Casson Leighton [Thu, 29 Jul 2021 21:58:02 +0000 (22:58 +0100)]
use coefficient table in iDCT

2 years agomove half-reverse to before outer butterfly in I-DCT
Luke Kenneth Casson Leighton [Thu, 29 Jul 2021 20:28:01 +0000 (21:28 +0100)]
move half-reverse to before outer butterfly in I-DCT

2 years agoget byte-swapping functional in inverse-dct proof-of-concept
Luke Kenneth Casson Leighton [Thu, 29 Jul 2021 20:22:20 +0000 (21:22 +0100)]
get byte-swapping functional in inverse-dct proof-of-concept

2 years agosigh, I-DCT had to reverse the order of middle loop to stop
Luke Kenneth Casson Leighton [Thu, 29 Jul 2021 19:52:29 +0000 (20:52 +0100)]
sigh, I-DCT had to reverse the order of middle loop to stop
overwrite-accumulation of iterative sum

2 years agostart on inverse dct, turning recursive to iterative
Luke Kenneth Casson Leighton [Thu, 29 Jul 2021 17:12:53 +0000 (18:12 +0100)]
start on inverse dct, turning recursive to iterative

2 years agostart on inverse DCT, transforming to iterative
Luke Kenneth Casson Leighton [Wed, 28 Jul 2021 18:04:52 +0000 (19:04 +0100)]
start on inverse DCT, transforming to iterative

2 years agogot DCT LD-bit-rev demo operational in unit test
Luke Kenneth Casson Leighton [Wed, 28 Jul 2021 15:42:42 +0000 (16:42 +0100)]
got DCT LD-bit-rev demo operational in unit test

2 years agofix LD/ST bitreverse with Matrix REMAP to instead be non-bitreversed.
Luke Kenneth Casson Leighton [Wed, 28 Jul 2021 13:46:39 +0000 (14:46 +0100)]
fix LD/ST bitreverse with Matrix REMAP to instead be non-bitreversed.
slightly meaningless to bit-reverse on matrix LDs, but it is still possible

2 years agoargh, have LD-bitreverse select the offset from RA REMAP schedule
Luke Kenneth Casson Leighton [Wed, 28 Jul 2021 13:24:21 +0000 (14:24 +0100)]
argh, have LD-bitreverse select the offset from RA REMAP schedule

2 years agoadd mode for half-swap, to be combined with LD-bit-reversed for loading DCT
Luke Kenneth Casson Leighton [Wed, 28 Jul 2021 11:16:18 +0000 (12:16 +0100)]
add mode for half-swap, to be combined with LD-bit-reversed for loading DCT
data

2 years agocode comments
Luke Kenneth Casson Leighton [Wed, 28 Jul 2021 11:03:51 +0000 (12:03 +0100)]
code comments

2 years agofix test_power_decoder.py
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 17:26:51 +0000 (18:26 +0100)]
fix test_power_decoder.py

2 years agoget DCT shortened table operational
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 16:20:07 +0000 (17:20 +0100)]
get DCT shortened table operational

2 years agoisatables: addg6s instruction
Dmitry Selyutin [Tue, 27 Jul 2021 06:22:38 +0000 (06:22 +0000)]
isatables: addg6s instruction

2 years agopower_enums: cbcdtd instruction
Dmitry Selyutin [Mon, 26 Jul 2021 14:48:38 +0000 (14:48 +0000)]
power_enums: cbcdtd instruction

2 years agopower_enums: cdtbcd instruction
Dmitry Selyutin [Mon, 26 Jul 2021 14:48:25 +0000 (14:48 +0000)]
power_enums: cdtbcd instruction

2 years agopower_enums: addg6s instruction
Dmitry Selyutin [Mon, 26 Jul 2021 14:48:03 +0000 (14:48 +0000)]
power_enums: addg6s instruction

2 years agoadding reduced COS table DCT test
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 15:40:38 +0000 (16:40 +0100)]
adding reduced COS table DCT test

2 years agoadd new DCT inner butterfly shorter COS-gen mode unit test
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 15:17:52 +0000 (16:17 +0100)]
add new DCT inner butterfly shorter COS-gen mode unit test

2 years agofix new COSTABLE generator unit test,
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 13:31:05 +0000 (14:31 +0100)]
fix new COSTABLE generator unit test,
cross-reference it to transcendentals scalar version

2 years agofix up DCT modes for inner/outer butterfly,
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 13:27:41 +0000 (14:27 +0100)]
fix up DCT modes for inner/outer butterfly,
add new costables schedule and set up REMAP correctly

2 years agoargh, LD/ST using DS has to be computed differently.
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 13:20:57 +0000 (14:20 +0100)]
argh, LD/ST using DS has to be computed differently.
multiply DS by four, then compute SVP64 ELSTRIDE/UNITSTRIDE, then
*divide* DS by four afterwards
TODO, illegal instruction if the 2 LSBs are non-zero? does this ever occur?

2 years agofix errors in detection of ffmadds (etc), enabling FFT twin-regs moed
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 13:19:31 +0000 (14:19 +0100)]
fix errors in detection of ffmadds (etc), enabling FFT twin-regs moed
when it should not have been.  affected fcoss/fsins/fcfids

2 years agoclear persist bit if setvl explicitly called
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 12:03:55 +0000 (13:03 +0100)]
clear persist bit if setvl explicitly called

2 years agoadd new cos coefficient pre-computed and on-the-fly mode,
Luke Kenneth Casson Leighton [Tue, 27 Jul 2021 11:35:55 +0000 (12:35 +0100)]
add new cos coefficient pre-computed and on-the-fly mode,
reorganise DCT modes due to needing more bits

2 years agouse ydimsz as sub-mode in DCT/FFT butterfly
Luke Kenneth Casson Leighton [Mon, 26 Jul 2021 15:22:48 +0000 (16:22 +0100)]
use ydimsz as sub-mode in DCT/FFT butterfly

2 years agouse std not stw in transcendentals ld/st-convert test
Luke Kenneth Casson Leighton [Mon, 26 Jul 2021 15:22:26 +0000 (16:22 +0100)]
use std not stw in transcendentals ld/st-convert test

2 years agoadd dct cos 8 table test
Luke Kenneth Casson Leighton [Mon, 26 Jul 2021 14:57:07 +0000 (15:57 +0100)]
add dct cos 8 table test

2 years agoadd sv.fcoss SVP64Asm support
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 18:09:20 +0000 (19:09 +0100)]
add sv.fcoss SVP64Asm support

2 years agoadd DS-Form support for sv.std
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 18:08:53 +0000 (19:08 +0100)]
add DS-Form support for sv.std

2 years agoadded an extra SVP64 instruction, svstep, to replace setvl
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 16:43:09 +0000 (17:43 +0100)]
added an extra SVP64 instruction, svstep, to replace setvl
"get end state" mode

2 years agoadd experiment to convert int to float and multiply by PI etc.
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 12:06:47 +0000 (13:06 +0100)]
add experiment to convert int to float and multiply by PI etc.
for later use in DCT

2 years agoadd ability to get current SVSHAPE indices into a register,
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 10:43:23 +0000 (11:43 +0100)]
add ability to get current SVSHAPE indices into a register,
using setvl "Vertical First" test mode

2 years agocomments
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 09:59:28 +0000 (10:59 +0100)]
comments

2 years agoadd DCT unit test combining DCT inner and outer butterfly
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 07:31:16 +0000 (08:31 +0100)]
add DCT unit test combining DCT inner and outer butterfly

2 years agomake REMAP persistent (if persistence requested) even on svshape
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 07:30:45 +0000 (08:30 +0100)]
make REMAP persistent (if persistence requested) even on svshape

2 years agocreate schedule for calculating COS coefficient in DCT
Luke Kenneth Casson Leighton [Sat, 24 Jul 2021 06:59:10 +0000 (07:59 +0100)]
create schedule for calculating COS coefficient in DCT

2 years agoadd DCT outer butterfly iterative overlapping ADD schedule
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 17:29:43 +0000 (18:29 +0100)]
add DCT outer butterfly iterative overlapping ADD schedule

2 years agoadd DCT outer butterfly svshape setup
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 16:53:10 +0000 (17:53 +0100)]
add DCT outer butterfly svshape setup

2 years agosmall inner DCT butterfly test, fix up order of fdmadds
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 15:57:31 +0000 (16:57 +0100)]
small inner DCT butterfly test, fix up order of fdmadds

2 years agoadd DCT inner butterfly results test
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 14:41:54 +0000 (15:41 +0100)]
add DCT inner butterfly results test

2 years ago"fix" fdmadd DCT mul-add-sub unit test with values that will
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 13:48:53 +0000 (14:48 +0100)]
"fix" fdmadd DCT mul-add-sub unit test with values that will
not cause rounding.  "good enough" for now

2 years agoadd sv.fdmadds unit test
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 13:24:04 +0000 (14:24 +0100)]
add sv.fdmadds unit test

2 years agoadd sv.fdmadds to SVP64Asm
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 13:19:12 +0000 (14:19 +0100)]
add sv.fdmadds to SVP64Asm

2 years agoadd DCT mul-add to CSV and enums
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 13:17:59 +0000 (14:17 +0100)]
add DCT mul-add to CSV and enums

2 years agoadd DCT variant of twin MUL-ADD. actually an add and a MUL-SUB
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 13:16:59 +0000 (14:16 +0100)]
add DCT variant of twin MUL-ADD.  actually an add and a MUL-SUB

2 years agoadd DCT butterfly mode into svremap
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 13:16:23 +0000 (14:16 +0100)]
add DCT butterfly mode into svremap

2 years agoset up submodes for SVSHAPE, to include DCT butterfly yielders
Luke Kenneth Casson Leighton [Fri, 23 Jul 2021 10:09:53 +0000 (11:09 +0100)]
set up submodes for SVSHAPE, to include DCT butterfly yielders

2 years agosplit out 2nd dct outer butterfly scheduler
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 22:18:25 +0000 (23:18 +0100)]
split out 2nd dct outer butterfly scheduler

2 years agohalf way through converting in-place dct to yield unit test
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 16:31:29 +0000 (17:31 +0100)]
half way through converting in-place dct to yield unit test

2 years agoadd inner and outer yield version of DCT inner and out butterfly
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 14:46:56 +0000 (15:46 +0100)]
add inner and outer yield version of DCT inner and out butterfly

2 years agocopy of halfrev2 algorithm updated
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 14:24:36 +0000 (15:24 +0100)]
copy of halfrev2 algorithm updated

2 years agosimplification of halfrev2 algorithm (really neat)
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 14:24:00 +0000 (15:24 +0100)]
simplification of halfrev2 algorithm (really neat)

2 years agoadd REMAP DCT yield schedule function, TODO
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 14:12:43 +0000 (15:12 +0100)]
add REMAP DCT yield schedule function, TODO

2 years agoadd hybrid LD-ST-bitreverse with REMAP as an experiment
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 14:12:09 +0000 (15:12 +0100)]
add hybrid LD-ST-bitreverse with REMAP as an experiment

2 years agocorrections to SVP64 LD/ST unit tests
Luke Kenneth Casson Leighton [Thu, 22 Jul 2021 12:17:06 +0000 (13:17 +0100)]
corrections to SVP64 LD/ST unit tests

2 years agocomments
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 21:04:45 +0000 (22:04 +0100)]
comments

2 years agocreate cos table independent, outside of the inner loops
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 21:03:44 +0000 (22:03 +0100)]
create cos table independent, outside of the inner loops

2 years agocleanup
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 20:58:35 +0000 (21:58 +0100)]
cleanup

2 years agoadd iterative list-reversing algorithm, replace recursive variant.
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 20:49:23 +0000 (21:49 +0100)]
add iterative list-reversing algorithm, replace recursive variant.
actually really simple (to implement in hardware)

2 years agopre-reverse order of data indices in DCT so that *after* the inner
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 16:04:22 +0000 (17:04 +0100)]
pre-reverse order of data indices in DCT so that *after* the inner
butterfly is done the data is in the correct order for the outer one.
this so that no data-swaps are needed

2 years agotemporary reordering after the DCT schedule is carried out, this removes
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 14:56:43 +0000 (15:56 +0100)]
temporary reordering after the DCT schedule is carried out, this removes
the need for *data* swaps.

2 years agorealised that SVSHAPE0-3 is not privileged
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 13:08:06 +0000 (14:08 +0100)]
realised that SVSHAPE0-3 is not privileged

2 years agoadd inner sub-loop testing from svstep Rc=1
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 13:06:04 +0000 (14:06 +0100)]
add inner sub-loop testing from svstep Rc=1

2 years agocomments
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 09:01:08 +0000 (10:01 +0100)]
comments

2 years agocomments
Luke Kenneth Casson Leighton [Tue, 20 Jul 2021 08:58:09 +0000 (09:58 +0100)]
comments

2 years agobit of a reorg, adding option to test end of inner loops of SVSTATE(s)
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 19:45:25 +0000 (20:45 +0100)]
bit of a reorg, adding option to test end of inner loops of SVSTATE(s)
needed to pass the immediate to svstep as an option of which
SVSTATE0-3 to test

2 years agodo in-place swap
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 15:24:48 +0000 (16:24 +0100)]
do in-place swap

2 years agoannoying: missed out something in the unit test, not working yet
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 14:59:03 +0000 (15:59 +0100)]
annoying: missed out something in the unit test, not working yet

2 years agosimplify DCT code
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 14:53:17 +0000 (15:53 +0100)]
simplify DCT code

2 years agocreate coefficient table for DCT outside of loops
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 14:50:23 +0000 (15:50 +0100)]
create coefficient table for DCT outside of loops

2 years agoupdate comments
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 14:48:17 +0000 (15:48 +0100)]
update comments

2 years agomore comments
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 14:13:25 +0000 (15:13 +0100)]
more comments

2 years agoupdate comments and license
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 14:05:26 +0000 (15:05 +0100)]
update comments and license

2 years agoremove unneeded code
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 13:47:59 +0000 (14:47 +0100)]
remove unneeded code

2 years agono need for len(j) > 1 test, half of 1 is zero which stops swap anyway
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 13:46:25 +0000 (14:46 +0100)]
no need for len(j) > 1 test, half of 1 is zero which stops swap anyway

2 years agoremove unneeded code
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 13:44:20 +0000 (14:44 +0100)]
remove unneeded code

2 years agoswap the indices rather than the data in DCT top half: bizarrely this works!
Luke Kenneth Casson Leighton [Mon, 19 Jul 2021 13:41:04 +0000 (14:41 +0100)]
swap the indices rather than the data in DCT top half: bizarrely this works!