Florent Kermarrec [Thu, 20 Feb 2020 17:50:13 +0000 (18:50 +0100)]
cpu/blackparrot: first cleanup pass
Florent Kermarrec [Thu, 20 Feb 2020 15:16:07 +0000 (16:16 +0100)]
integration/soc: set base_address on LiteDRAMWishbone2Native, fix addressing with >= 1GB SDRAMs.
Florent Kermarrec [Thu, 20 Feb 2020 12:46:39 +0000 (13:46 +0100)]
build/sim: add Verilator FST tracing support.
enjoy-digital [Thu, 20 Feb 2020 07:17:54 +0000 (08:17 +0100)]
Merge pull request #390 from gsomlo/gls-add-sdcard
Import LiteSDCard support in to LiteX, using nexys4ddr as the initial test target
Gabriel Somlo [Thu, 20 Feb 2020 01:14:10 +0000 (20:14 -0500)]
targets/nexys4ddr: add optional sdcard support
Add the option to select LiteSDCard support in BaseSoC, via the
'--with-sdcard' command line argument.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Gabriel Somlo [Wed, 8 Jan 2020 17:49:52 +0000 (12:49 -0500)]
bios: add litesdcard test routines to boot menu
This is a straightforward import of the sdcard initialization and
testing routines from the LiteSDCard demo example, made available
as mainline LiteX bios boot-prompt commands.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Gabriel Somlo [Thu, 20 Feb 2020 01:10:32 +0000 (20:10 -0500)]
targets/nexys4ddr: add ethernet via method instead of inheritance
Switch adding LiteETH support to BaseSoc via a method instead of
inheritance. This allows further optional peripherals to be added
in the future, via additional methods.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Florent Kermarrec [Wed, 19 Feb 2020 13:58:55 +0000 (14:58 +0100)]
soc_core: fix missing init on main_ram
enjoy-digital [Tue, 18 Feb 2020 16:54:13 +0000 (17:54 +0100)]
Merge pull request #389 from antmicro/linux_flash_offsets
bios/boot: allow to customize flash offsets of Linux images
Florent Kermarrec [Tue, 18 Feb 2020 15:59:55 +0000 (16:59 +0100)]
cores/cpu: use standard+debug variant when only debug is specified.
Mateusz Holenko [Mon, 17 Feb 2020 15:52:08 +0000 (16:52 +0100)]
bios/boot: allow to customize flash offsets of Linux images
Florent Kermarrec [Tue, 18 Feb 2020 09:15:01 +0000 (10:15 +0100)]
soc/cores/clock: add reset_cycles parameter to S7IDELAYCTRL/USIDELAYCTRL
Florent Kermarrec [Tue, 18 Feb 2020 08:11:40 +0000 (09:11 +0100)]
soc/csr_bus: fix aligned_paging computation (should be done with SoC's Bus data width not bus.alignment)
Florent Kermarrec [Tue, 18 Feb 2020 07:27:59 +0000 (08:27 +0100)]
integration/soc: improve Region logger
Florent Kermarrec [Mon, 17 Feb 2020 18:21:35 +0000 (19:21 +0100)]
bios/boot: update and fix flashboot, improve verbosity
Florent Kermarrec [Mon, 17 Feb 2020 07:36:36 +0000 (08:36 +0100)]
soc: increase supporteds address_width/paging
Florent Kermarrec [Mon, 17 Feb 2020 07:34:10 +0000 (08:34 +0100)]
soc_core: expose CSR paging
Florent Kermarrec [Mon, 17 Feb 2020 07:28:56 +0000 (08:28 +0100)]
soc/csr_bus: improve CSR paging genericity
Florent Kermarrec [Sun, 16 Feb 2020 15:09:06 +0000 (16:09 +0100)]
tools/litex_sim: use new sdram verbosity parameter
Florent Kermarrec [Sun, 16 Feb 2020 11:32:05 +0000 (12:32 +0100)]
integration/soc: add configurable CSR Paging
Florent Kermarrec [Sat, 15 Feb 2020 18:04:47 +0000 (19:04 +0100)]
soc_core: add back identifier
enjoy-digital [Sat, 15 Feb 2020 16:05:50 +0000 (17:05 +0100)]
Merge pull request #387 from BracketMaster/master
litex_sim now working on MacOS and Linux
Yehowshua Immanuel [Fri, 14 Feb 2020 22:53:25 +0000 (17:53 -0500)]
update to work with mac
Florent Kermarrec [Sat, 15 Feb 2020 13:04:44 +0000 (14:04 +0100)]
tools/litex_sim: specify default local/remote-ip addresses.
Florent Kermarrec [Sat, 15 Feb 2020 13:01:46 +0000 (14:01 +0100)]
tools/litex_sim: add ethernet local/remote-ip arguments.
Florent Kermarrec [Fri, 14 Feb 2020 07:08:19 +0000 (08:08 +0100)]
interconnect/stream: cleanup imports/idents
enjoy-digital [Thu, 13 Feb 2020 15:53:12 +0000 (16:53 +0100)]
Merge pull request #386 from antmicro/sdram-timing-checker
tools/litex_sim: add cli options to control SDRAM timing checker
Piotr Binkowski [Thu, 13 Feb 2020 13:45:15 +0000 (14:45 +0100)]
tools/litex_sim: add cli options to control SDRAM timing checker
Florent Kermarrec [Thu, 13 Feb 2020 07:34:16 +0000 (08:34 +0100)]
soc_core: fix cpu_variant renaming regression
Sean Cross [Thu, 13 Feb 2020 00:47:58 +0000 (08:47 +0800)]
doc: rename lxsocdoc -> socdoc and update readme
With the merge of lxsocdoc into upstream litex, the old name of
"lxsocdoc" doesn't make as much sense. Additionally, the import paths
are now different.
Rename this file to reflect the new home of `soc/doc`, and update the
code examples to work with the new name.
Signed-off-by: Sean Cross <sean@xobs.io>
Sean Cross [Thu, 13 Feb 2020 00:32:44 +0000 (08:32 +0800)]
doc: fix regression with new irq manager
Previously, we were accessing the `soc.soc_interrupt_map` property in
order to be able to enumerate the interrupts. This has been subsumed
into a more general `irq` object that manages the interrupts.
Use `soc.irq.locs` instead of `soc.soc_interrupt_map` as the authority
on interrupts for both doc and export.
This fixes #385.
Signed-off-by: Sean Cross <sean@xobs.io>
Florent Kermarrec [Wed, 12 Feb 2020 20:55:30 +0000 (21:55 +0100)]
soc/CSR: show alignment in report and add info when updating.
Florent Kermarrec [Wed, 12 Feb 2020 20:25:20 +0000 (21:25 +0100)]
soc/add_cpu: use cpu.data_width as CSR alignment, fix regression on Rocket
Florent Kermarrec [Wed, 12 Feb 2020 17:16:38 +0000 (18:16 +0100)]
integration/soc: fix refactoring issues
Florent Kermarrec [Wed, 12 Feb 2020 15:43:11 +0000 (16:43 +0100)]
soc/integration/builder: update copyright, align arguments
enjoy-digital [Wed, 12 Feb 2020 15:38:04 +0000 (16:38 +0100)]
Merge pull request #383 from Xiretza/builder-directories
Unify output directory handling in builder
Xiretza [Wed, 12 Feb 2020 13:35:23 +0000 (14:35 +0100)]
Unify output directory handling in builder
enjoy-digital [Tue, 11 Feb 2020 17:39:33 +0000 (18:39 +0100)]
Merge pull request #382 from enjoy-digital/new_soc
Add new SoC/LiteXSoC classes and use it for SoCCore/SoCSDRAM
Florent Kermarrec [Tue, 11 Feb 2020 17:28:05 +0000 (18:28 +0100)]
soc_core/soc_sdram: add disclaimer
Florent Kermarrec [Tue, 11 Feb 2020 17:21:41 +0000 (18:21 +0100)]
soc_core: provide full retro-compatibily when add_wb_slave is called before add_memory_region
Florent Kermarrec [Tue, 11 Feb 2020 16:50:26 +0000 (17:50 +0100)]
soc: fix busword typo
Florent Kermarrec [Tue, 11 Feb 2020 16:44:24 +0000 (17:44 +0100)]
targets/EthernetSoC: be sure memory region is added before adding Wishbone Slave (required by new SoC)
enjoy-digital [Tue, 11 Feb 2020 16:22:06 +0000 (17:22 +0100)]
Merge branch 'master' into new_soc
Florent Kermarrec [Tue, 11 Feb 2020 16:19:22 +0000 (17:19 +0100)]
soc/integration: move mem_decoder to soc_core
Florent Kermarrec [Tue, 11 Feb 2020 16:16:24 +0000 (17:16 +0100)]
soc/integration/common: simplify get_version
Florent Kermarrec [Tue, 11 Feb 2020 15:55:37 +0000 (16:55 +0100)]
soc/add_uart: fix bridge
Florent Kermarrec [Tue, 11 Feb 2020 15:44:17 +0000 (16:44 +0100)]
soc_core/soc_sdram: remove disclaimer (we'll add it later when designs will be adapted)
Florent Kermarrec [Tue, 11 Feb 2020 15:39:37 +0000 (16:39 +0100)]
soc: avoid double definition of main_ram
Florent Kermarrec [Tue, 11 Feb 2020 15:24:57 +0000 (16:24 +0100)]
soc: improve log colors on error reporting
Florent Kermarrec [Tue, 11 Feb 2020 14:28:02 +0000 (15:28 +0100)]
soc: add linker regions management
Florent Kermarrec [Tue, 11 Feb 2020 13:50:16 +0000 (14:50 +0100)]
soc: improve log presentation/colors
Florent Kermarrec [Tue, 11 Feb 2020 13:17:32 +0000 (14:17 +0100)]
soc: fix cpu_reset_address
Florent Kermarrec [Tue, 11 Feb 2020 13:05:01 +0000 (14:05 +0100)]
tools/litex_sim_new: remove
Florent Kermarrec [Tue, 11 Feb 2020 12:23:46 +0000 (13:23 +0100)]
soc: fix build_time format
Florent Kermarrec [Tue, 11 Feb 2020 12:12:54 +0000 (13:12 +0100)]
cores/cpu: remove separators on io_regions (requires python 3.6)
enjoy-digital [Tue, 11 Feb 2020 12:11:33 +0000 (13:11 +0100)]
Merge pull request #380 from Xiretza/cpunone-all-io
Allow all memory regions to be used as IO with CPUNone
Florent Kermarrec [Tue, 11 Feb 2020 08:30:36 +0000 (09:30 +0100)]
soc/add_sdram: simplify L2 Cache, use FullMemoryWE on L2 Cache by default (seems better on all devices)
Florent Kermarrec [Tue, 11 Feb 2020 07:44:23 +0000 (08:44 +0100)]
soc_core/common: move old mem_decoder to soc_core, simplify get_version
Xiretza [Mon, 10 Feb 2020 18:56:36 +0000 (19:56 +0100)]
Allow all memory regions to be used as IO with CPUNone
Florent Kermarrec [Mon, 10 Feb 2020 18:40:56 +0000 (19:40 +0100)]
integration/common: fix mem_decoder (shadow base has been deprecated)
Florent Kermarrec [Mon, 10 Feb 2020 18:37:53 +0000 (19:37 +0100)]
tools/litex_sim_new: switch to dynamically allocated ethmac origin
Florent Kermarrec [Mon, 10 Feb 2020 18:34:18 +0000 (19:34 +0100)]
soc/SoCRegion/Decoder: pass bus to decoder and remove mask on origin
Florent Kermarrec [Mon, 10 Feb 2020 18:02:44 +0000 (19:02 +0100)]
soc/add_sdram: avoid L2 cache when l2_cache_size == 0.
Florent Kermarrec [Mon, 10 Feb 2020 17:38:59 +0000 (18:38 +0100)]
soc: remove unneeded \n
Florent Kermarrec [Mon, 10 Feb 2020 17:21:41 +0000 (18:21 +0100)]
tools/litex_sim_new: use new bus/csr/irq methods
Florent Kermarrec [Mon, 10 Feb 2020 17:19:35 +0000 (18:19 +0100)]
soc: use io_regions for alloc_region
Florent Kermarrec [Mon, 10 Feb 2020 17:00:46 +0000 (18:00 +0100)]
tools: add litex_sim_new based on SoCCore and using add_sdram method
Florent Kermarrec [Mon, 10 Feb 2020 16:43:29 +0000 (17:43 +0100)]
soc_core: use add_rom
Florent Kermarrec [Mon, 10 Feb 2020 16:40:46 +0000 (17:40 +0100)]
soc/add_cpu: simplify CPUNone integration
Florent Kermarrec [Mon, 10 Feb 2020 16:17:31 +0000 (17:17 +0100)]
soc/SoCBusHandler: add add_adapter method and use it to convert Master/Slave before connecting to the Bus
Florent Kermarrec [Mon, 10 Feb 2020 16:02:20 +0000 (17:02 +0100)]
soc/add_sdram: add sdram csr
Florent Kermarrec [Mon, 10 Feb 2020 15:55:15 +0000 (16:55 +0100)]
soc/add_sdram: fix rocket, shorten comments
Florent Kermarrec [Mon, 10 Feb 2020 15:38:20 +0000 (16:38 +0100)]
soc/add_sdram: improve API
Florent Kermarrec [Mon, 10 Feb 2020 15:28:11 +0000 (16:28 +0100)]
soc: add LiteXSoC class and mode add_identifier/uart/sdram to it
Florent Kermarrec [Mon, 10 Feb 2020 15:21:21 +0000 (16:21 +0100)]
soc_core/sdram: cleanup, add disclaimer
Florent Kermarrec [Mon, 10 Feb 2020 15:01:19 +0000 (16:01 +0100)]
soc: add add_sdram
Florent Kermarrec [Mon, 10 Feb 2020 14:10:08 +0000 (15:10 +0100)]
soc: add csr_regions, update copyright
Florent Kermarrec [Mon, 10 Feb 2020 13:48:46 +0000 (14:48 +0100)]
soc: add cpu rom/sram check
Florent Kermarrec [Mon, 10 Feb 2020 13:35:36 +0000 (14:35 +0100)]
soc: add SOCIORegion and manage it
Florent Kermarrec [Mon, 10 Feb 2020 12:07:09 +0000 (13:07 +0100)]
soc: reorder main components/peripherals
Florent Kermarrec [Sun, 9 Feb 2020 20:56:32 +0000 (21:56 +0100)]
soc: add add_cpu method
Florent Kermarrec [Sun, 9 Feb 2020 18:53:04 +0000 (19:53 +0100)]
.gitmodules/black-parrot: switch to https://github.com/enjoy-digital/black-parrot (without the submodules)
Florent Kermarrec [Sun, 9 Feb 2020 18:01:03 +0000 (19:01 +0100)]
soc: fix unit-tests
Florent Kermarrec [Sat, 8 Feb 2020 20:57:02 +0000 (21:57 +0100)]
soc: integrate constants/build
Florent Kermarrec [Sat, 8 Feb 2020 20:34:26 +0000 (21:34 +0100)]
soc: show sorted regions (by origin) / locs
Florent Kermarrec [Sat, 8 Feb 2020 20:30:34 +0000 (21:30 +0100)]
soc: simplify color theme
enjoy-digital [Sat, 8 Feb 2020 09:30:55 +0000 (10:30 +0100)]
Merge pull request #278 from scanakci/blackparrot_litex
Blackparrot litex
Florent Kermarrec [Sat, 8 Feb 2020 09:19:18 +0000 (10:19 +0100)]
soc: add add_uart method
Florent Kermarrec [Fri, 7 Feb 2020 22:16:29 +0000 (23:16 +0100)]
soc_core: cleanup imports
Florent Kermarrec [Fri, 7 Feb 2020 22:11:08 +0000 (23:11 +0100)]
soc_core: get_csr_address no longer used
Florent Kermarrec [Fri, 7 Feb 2020 18:50:35 +0000 (19:50 +0100)]
soc: integrate CSR master/interconnect/collection and IRQ collection
Florent Kermarrec [Fri, 7 Feb 2020 18:09:54 +0000 (19:09 +0100)]
soc: add add_constant/add_config methods
Florent Kermarrec [Fri, 7 Feb 2020 17:49:20 +0000 (18:49 +0100)]
soc: add add_csr_bridge method
Florent Kermarrec [Fri, 7 Feb 2020 15:21:40 +0000 (16:21 +0100)]
soc: add add_controller/add_identifier/add_timer methods
Florent Kermarrec [Fri, 7 Feb 2020 14:57:46 +0000 (15:57 +0100)]
soc: add add_ram/add_rom methods
Florent Kermarrec [Fri, 7 Feb 2020 14:29:54 +0000 (15:29 +0100)]
soc: add automatic bus data width convertion to add_master/add_slave
Florent Kermarrec [Fri, 7 Feb 2020 14:19:02 +0000 (15:19 +0100)]
soc/soc_core: cleanup, remove some unused attributes
Florent Kermarrec [Fri, 7 Feb 2020 13:52:53 +0000 (14:52 +0100)]
soc: move SoCController from soc_core to soc
Florent Kermarrec [Fri, 7 Feb 2020 12:25:54 +0000 (13:25 +0100)]
soc: create SoCLocHandler and use it to simplify SoCCSRHandler and SoCIRQHandler
Florent Kermarrec [Thu, 6 Feb 2020 18:50:44 +0000 (19:50 +0100)]
soc: add use_loc_if_exists on SoCIRQ.add to use current location is already defined