vc4: Add dumping for VC4_PACKET_LOAD/STORE_FULL_RES_TILE_BUFFER.

vc4: Don't try to CSE color reads.

It returns a new value for each sample in the TLB.  We've already avoided
trying to get the same index's color multiple times at the vc4_program.c
level, so we're not losing anything by doing this.

vc4: Make a helper for TLB color writes, too.

We've done so for all the other QIR instruction generation in this file.

vc4: Pull the blending operation out to a separate function.

It's fairly separate from the rest of the TLB operations at frag end time,
and we'll need to run it multiple times to support MSAA blending.

vc4: Clarify size calculation for Z/S writes.

It's the same value for loads and stores, because they're basically the
same packet.

vc4: Add an "args" temporary for RCL setup.

vc4: Reuse (and extend) the packet.h sizes for dumping.

vc4: Fix printfs for blit fallbacks.

tgsi_to_nir: Fix translation of TXF on MSAA targets.

Noticed while trying to add GL_ARB_texture_multisample support to vc4.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965/fs: Get rid of an unused variable in emit_barrier()

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Remove the brw_context from the visitors

As of this commit, nothing actually needs the brw_context.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/vec4_vs: Add an explicit use_legacy_snorm_formula flag

This way we can stop doing is_gles3 checks inside of the compiler.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/vec4: Turn some _mesa_problem calls into asserts

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/vs: Pass the current set of clip planes through run() and run_vs()

Previously, these were pulled out of the GL context conditionally based on
whether we were running ff/ARB or a GLSL program.  Now, we just pass them
in so that the visitor doesn't have to grab them itself.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/fs: Add a do_rep_send flag to run_fs

Previously, we were pulling it from brw->do_rep_send

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Pull calls to get_shader_time_index out of the visitor

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Use a single index per shader for shader_time.

Previously, each shader took 3 shader time indices which were potentially
at arbirary points in the shader time buffer.  Now, each shader gets a
single index which refers to 3 consecutive locations in the buffer.  This
simplifies some of the logic at the cost of having a magic 3 a few places.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Add compiler options to brw_compiler

This creates the options at screen cration time and then we just copy them
into the context at context creation time.  We also move is_scalar to the
brw_compiler structure.

We also end up manually setting some values that the core would have set by
default for us.  Fortunately, there are only two non-zero shader compiler
option defaults that we aren't overriding anyway so this isn't a big deal.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/fs: Plumb compiler debug logging through brw_compiler

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/fs: Do the no16 perf logging directly in fs_visitor::no16()

While we're at it, we'll drop the note about 10-20% performance loss.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/fs: Make no16 non-variadic

We never used the fact that it was variadic anyway.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move INTEL_DEBUG variable parsing to screen creation time

v2: Do bufmgr set_debug and set_aub_dump at screen time as well.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Remove the dependance on brw_context from the generators

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Plumb compiler debug logging through a function pointer in brw_compiler

v2 (Ken): Make shader_debug_log a printf-like function.
v3 (Jason): Add a void * to pass the brw_context through

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Add a va_args variant of _mesa_gl_debug().

This will be useful for wrapper functions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965: Replace some instances of brw->gen with devinfo->gen

i965: Initialize backend_shader::mem_ctx in its constructor.

We were initializing it in each subclasses' constructors for some
reason.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Assert that the GL primitive isn't out of range.

Coverity sees the if (mode >= BRW_PRIM_OFFSET (128)) test and assumes
that the else-branch might execute for mode to up 127, which out be out
of bounds.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965/cfg: Assert that cur_do/while/if pointers are non-NULL.

Coverity sees that the functions immediately below the new assertions
dereference these pointers, but is unaware that an ENDIF always follows
an IF, etc.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

mesa: Delete unused ICEIL().

Can't find any uses of it in git history.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965/fs: Don't mess up stride for uniform integer multiplication.

If the stride is 0, the source is a uniform and we should not modify the
stride.

Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91047
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

egl/x11: Remove duplicate call to dri2_x11_add_configs_for_visuals

The call to dri2_x11_add_configs_for_visuals (previously
dri2_add_configs_for_visuals) was moved downwards in commit f8c5b8a1,
but appeared again in its original position after its rename in
d019cd81. Remove it.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

i965/gen9: Don't use encrypted MOCS

On gen9+ MOCS is an index into a table. It is 7 bits, and AFAICT, bit 0 is for
doing encrypted reads.

I don't recall how I decided to do this for BXT. I don't know this patch was
ever needed, since it seems nothing is broken today on SKL. Furthermore, this
patch may no longer be needed because of the ongoing changes with MOCS setup. It
is what is being used/tested, so it's included in the series.

The chosen values are the old values left shifted. That was also an arbitrary
choice.

v2: Use shift in MOCS to make it clear what we're doing. (Ken)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data

Without first running the bo through pushbuf_refn, the nouveau drm
library will have uninitialized structures regarding this bo, and will
insert incorrect data.

This fixes supertuxkart 0.9 crash on start (where it ends up doing a lot
of indirect draws).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>

nvc0: always put all tfb bufs into bufctx

Since we clear the TFB bufctx binding point above, we need to put all of
the active tfb's back in, even if they haven't changed since last time.
Otherwise the tfb may get moved into sysmem and the underlying mapping
will generate write errors.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>

glsl: binding point is a texture unit, which is a combined space

This fixes compilation failures in Dota 2 Reborn where a texture unit
binding point was used that was numerically higher than the max
per stage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>

android: egl: do not link against libglapi

The only reason we touch glapi is to dlopen it in order to:
 - make sure that the unresolved _glapi* symbols in the dri modules are
provided.
 - fetch glFlush() and use it at various stages in the dri2 driver.

Cc: Chih-Wei Huang <cwhuang@linux.org.tw>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

gbm: do not (over)link against libglapi.so

The whole of GBM does not rely on even a single symbol from the GL
dispatch library, unsuprisingly. The only need for it comes from the
unresolved symbols in the DRI modules, which are now correctly handled
with Frank's commit.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

gbm: dlopen libglapi so gbm_create_device works

Dri driver libs are not linked to pull in libglapi so gbm_create_device()
fails when it tries to dlopen them (unless the application is linked
with something that does pull in libglapi, like libGL).
Until dri drivers can be fixed properly, dlopen libglapi before trying
to dlopen them.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Frank Henigman <fjhenigman@google.com>
[Emil Velikov: Drop misleading bugzilla link, mention that libname differs]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

configure: drop unused variable GBM_BACKEND_DIRS

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

configure: error out when building libEGL without shared-glapi

The latter is a hard requirement and without it we'll error out later
on in the build.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

configure: error out when building backend-less libEGL

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

drivers/x11: drop unneeded HAVE_X11_DRIVER check

Already handled in the Makefile which includes the drivers/x11 subdir.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

configure: allow building shared-glapi powered libgl-xlib

Cc: Brian Paul <brianp@vmware.com>
Cc: Adam Jackson <ajax@redhat.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>

targets/libgl-xlib: fix the build against shared_glapi

Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>

drivers/x11: fix the build against shared_glapi

Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>

configure: warn about shared_glapi & xlib-glx only when both are set

Printing out the message when shared_glapi is disabled only leads to
confusion.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

glapi: remap_helper.py: remove unused argument 'es'

Identical to the previous commit - unused by neither the Autotools,
Android or SCons build.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

glapi: gl_table.py: remove unused variable 'es'

None of the three build systems ever set it, as such we can clear things
up a bit.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

egl: Use the loader_open_device() helper to do open with CLOEXEC

We've moved the open with CLOEXEC idiom into a helper function, so
call it instead of duplicating the code.

This also replaces a couple of opens that didn't properly do CLOEXEC.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

glx: Use loader_open_device() helper

We've moved the open with CLOEXEC idiom into a helper function, so
call it instead of duplicating the code here.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

loader: Rename drm_open_device() to loader_open_device() and share it

This is already our common idiom for opening files with CLOEXEC and
it's a little ugly, so let's share this one implementation.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

egl/drm: Duplicate fd with F_DUPFD_CLOEXEC to prevent leak

Replacing dup() with fcntl F_DUPFD_CLOEXEC creates the duplicate
file descriptor with CLOEXEC so it won't be leaked to child
processes if the process fork()s later.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

draw,tgsi: Assume TGSI_PROPERTY_GS_INVOCATIONS default of 1.

If the shader doesn't specify number of invocations, assume one.

This fixes geometry shaders on state trackers other than Mesa (and
probably graw tests too.)

Trivial.

glsl: Specify the shader stage in linker errors due to too many in/outputs.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

docs: update GL3 with softpipe/llvmpipe gpu_shader5 pieces.

This just updates the bits I've added in the previous few patches.

Signed-off-by: Dave Airlie <airlied@redhat.com>

draw/gallivm: add invocation ID support for llvmpipe.

This extends the draw code to add support for invocations.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

draw/tgsi: implement geom shader invocation support.

This is just for softpipe, llvmpipe won't work without
some changes.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

tgsi: handle indirect sampler arrays. (v2)

This is required for ARB_gpu_shader5 support in softpipe.

v2: add support to txd/txf/txq paths.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

nir: Allow vec2/vec3/vec4 instructions in the select peephole pass.

These are basically just moves, so they should be safe as well.

When disabling i965's GLSL IR level scalarizer (channel expressions)
pass, I started seeing NIR code like this:

        if ssa_21 {
                block block_1:
                /* preds: block_0 */
                vec4 ssa_120 = vec4 ssa_82, ssa_83, ssa_84, ssa_30
                /* succs: block_3 */
        } else {
                block block_2:
                /* preds: block_0 */
                /* succs: block_3 */
        }
        block block_3:
        /* preds: block_1 block_2 */
        vec4 ssa_33 = phi block_1: ssa_120, block_2: ssa_2

Previously, the GLSL IR scalarizer pass would break the vec4 into a
series of fmovs, which were allowed by the peephole pass.  But with
the vec4 operation, they were not.  We want to keep getting selects.

Normal i965 on Broadwell:
instructions in affected programs:     200 -> 176 (-12.00%)
helped:                                4

With brw_fs_channel_expressions() disabled:
instructions in affected programs:     1832 -> 1646 (-10.15%)
helped:                                30

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

i965: Add and fix comments in brw_vue_map.c.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Split VUE map handling out of brw_vs.c into brw_vue_map.c.

This was originally only used by the vertex shader, but it's now used by
the geometry shader as well, and will also eventually be used for
tessellation control and evaluation shaders.

I suspect it will be easier to find in a file named after the concept.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/gen9: Implement Push Constant Buffer workaround

This implements a workaround (exact excerpt as a comment in the code). The docs
specify [clearly, after you struggle for a while] that the offset isn't relative
to state base. This actually makes sense. This fixes hangs on SKL.

Buffer #0 is meant to be used for normal uniforms.
Buffer #1 is typically used for gather constants when using RS.
Buffer #1-#3 could be used to push a bunch of UBO data which would just be
  somewhere in memory, and not relative to the dynamic state.

NOTE: I've moved away from the ternary operator for the new gen9 conditions.
Admittedly it's probably not great to do this, but I really want to fix this all
up in the subsequent patch and doing it here makes that diff a lot nicer. I want
to split out the gen8/9 code to make the function a bit more readable, but to
keep this easily cherry-pickable I am doing this fix first. If we decide not to
merge the cleanup patch then I can revisit this.

Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Valtteri Rantala <Valtteri.rantala@intel.com>

mesa: use _mesa_lookup_enum_by_nr() in print_array()

Print GL_FLOAT, etc. instead of hex value.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

ilo: emit 3DPRIMITIVE from gen6_3dprimitive_info

It allows us to remove ilo_ib_state::draw_start_offset and
ILO_PRIM_RECTANGLES.  gen6_3d_translate_pipe_prim() is also replaced by
ilo_translate_draw_mode().

ilo: align vertex buffer size in buf_create()

With ilo_format.[ch] moved out of core, the aligning of vertex buffers does
not belong to core anymore.

ilo: move ilo_format.[ch] out of core

They provide PIPE_FORMAT_x to GEN6_FORMAT_x translation as well as some
convenient helpers.  Move them out of core.

ilo: add ilo_state_surface_valid_format()

Check if a surface format can be used for the specified access type.

ilo: add ilo_state_vf_valid_element_format()

Check if a surface format can be used as a VE format.

nvc0: use NV_VRAM_DOMAIN() macro

Use the newly-introduced NV_VRAM_DOMAIN() macro to support alternative
VRAM domains for chips that do not have dedicated video memory.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>

nouveau: support for custom VRAM domains

Some GPUs (e.g. GK20A, GM20B) do not embed VRAM of their own and use
the system memory as a backend instead. For such systems, allocating
objects in VRAM results in errors since the kernel will not allow
VRAM objects allocations.

This patch adds a vram_domain member to struct nouveau_screen that can
optionally be initialized to an alternative domain to use for VRAM
allocations. If left untouched, NOUVEAU_BO_VRAM will be used for
systems that embed VRAM, and NOUVEAU_BO_GART will be used for VRAM-less
systems.

Code that uses GPU objects is then expected to use the NV_VRAM_DOMAIN()
macro in place of NOUVEAU_BO_VRAM to ensure correct behavior on
VRAM-less chips.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>

ilo: add ilo_state_compute

Replace gen6_idrt_data with ilo_state_compute, which has a bunch of
validations and is now preferred.

r600g: ignore sampler views for now.

This fixes a regression in that r600 stopped working when
sampler views were pushed.

Signed-off-by: Dave Airlie <airlied@redhat.com>

freedreno/ir3: pass sz to split_dest()

For query_levels, we generate a getinfo with writemask of (z), which RA
will consider as size==3.  But we were still generating four fanouts.
Which meant that RA would see it as two different register classes,
depending on the path to definer.  Ie. on the getinfo instruction itself
it would see size==3, but when chasing back through the fanouts it would
see size==4.

Easiest way to solve that is to just generate the chain of neighboring
fanouts to have the correct size in the first place.

Note: we may eventually want split_dest() to take start/end or wrmask
instead, since really we only need size==1.  But RA is not clever enough
for that, query_levels is not that common, and the other two registers
that get allocated are never used so those register slots can be
immediately re-used.  So bunch of work for probably no real gain.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3/nir: add more opcodes

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: only unminify txf coords on a3xx

Seems like a4xx gets this right.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno: remove int sampler shader variants

We get this information from NIR (which gets it from sview decl in tgsi
when translating from tgsi), so no need to maintain shader variants for
this.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: block reshuffling and loops!

This shuffles things around to allow the shader to have multiple basic
blocks.  We drop the entire CFG structure from nir and just preserve the
blocks.  At scheduling we know whether to schedule conditional branches
or unconditional jumps at the end of the block based on the # of block
successors.  (Dropping jumps to the following instruction, etc.)

One slight complication is that variables (load_var/store_var, ie.
arrays) are not in SSA form, so we have to figure out where to put the
phi's ourself.  For this, we use the predecessor set information from
nir_block.  (We could perhaps use NIR's dominance frontier information
to help with this?)

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: a4xx encodes larger immed offset

Without this, negative branch/jump offsets look like very large positive
offsets.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: simplify find_neighbors stop condition

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: move inputs/outputs to shader

These belong in the shader, rather than the block.  Mostly a lot of
churn and nothing too interesting.  But splitting this out from the
rest of ir3_block reshuffling to cut down the noise in the later
patch.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3/ra: use register_allocate

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: introduce ir3_compiler object

Right now, just provides a cleaner way to get at the gpu-id, given the
separation between compiler and context.  But we will need this also to
hold the reg-set for new register allocation.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: dump nocp option

No longer used, or even possible, with NIR frontend.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: silence warnings

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: remove tgsi f/e

Also remove ir3_flatten which was only used by tgsi f/e.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3/sched: convert to priority queue

Use a more standard priority-queue based scheduling algo.  It is simpler
and will make things easier once we have multiple basic blocks and flow
control.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: use standard list implementation

Use standard list_head double-linked list and related iterators,
helpers, etc, rather than weird combo of instruction array and next
pointers depending on stage.  Now block has an instrs_list.  In
certain stages where we want to remove and re-add to the blocks list
we just use list_replace() to copy the list to a new list_head.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: drop dot graph dumping

At least for now.. right now the instruction and instruction list
printing should suffice, and the re-working of ir3_block would require
a lot of changes in that code.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: more builder helpers

Use ir3_MOV() builder in a couple of spots, rather than open-coding the
instruction construction.  Also add ir3_NOP() builder and use that
instead of open coding.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

gallium/ttn: add missing SNE

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

util/list: add list_first/last_entry

I need an easier way to get at head/tail in ir3.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

gallium/ttn: add texture-type support

v2: rebased on using SVIEW to hold type information

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

glsl_to_tgsi: add SVIEW decl support

Freedreno needs sampler type information to deal with int/uint textures.
To accomplish this, start creating sampler-view declarations, as
suggested here:

 http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html

create a sampler-view with index matching the sampler, to encode the
texture type (ie. SINT/UINT/FLOAT).  Ie:

   DCL SVIEW[n], 2D, UINT
   DCL SAMP[n]
   TEX OUT[1], IN[1], SAMP[n]

For tgsi texture instructions which do not take an explicit SVIEW
argument, the SVIEW index is implied by the SAMP index.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util/blitter (and friends): generate appropriate SVIEW decls

Some hardware needs to know the sampler type.  Update the blit related
shaders to include SVIEW decl.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util/pstipple: updates for SVIEW decls

To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

draw: updates to support SVIEW decls

To allow for shaders which use SVIEW decls for TEX* instructions, we
need to preserve the constraint that the shader either has no SVIEW's or
it has one matching SVIEW for each SAMP.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

tgsi/transform: add support for SVIEW decls

TODO single return_type (use enum)

v2: single return_type arg, and use enum

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

tgsi: update docs for SVIEW usage with TEX* instructions

Based on mailing list discussion here:

http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

mesa: Back out an accidental change I had in a VC4 commit.

This was a hack as part of debugging some glamor-on-GLES2 behavior that
ended up being an xserver bug.  I suspect we can just flip this extension
on for GLES2, but the spec says it requires 3.1.