yosys.git
4 years agoqbfsat: Remove useless comment and #ifndef guards.
Alberto Gonzalez [Tue, 30 Jun 2020 07:00:14 +0000 (07:00 +0000)]
qbfsat: Remove useless comment and #ifndef guards.

4 years agoqbfsat: Specify default values for some options in the help message.
Alberto Gonzalez [Tue, 30 Jun 2020 06:57:45 +0000 (06:57 +0000)]
qbfsat: Specify default values for some options in the help message.

4 years agoqbfsat: Clean up external executable command lines and update temporary directory...
Alberto Gonzalez [Mon, 29 Jun 2020 23:01:56 +0000 (23:01 +0000)]
qbfsat: Clean up external executable command lines and update temporary directory name.

4 years agoqbfsat: Clean up and refactor data structures into `qbfsat.h`.
Alberto Gonzalez [Mon, 29 Jun 2020 22:06:43 +0000 (22:06 +0000)]
qbfsat: Clean up and refactor data structures into `qbfsat.h`.

4 years agoMerge pull request #2203 from antmicro/fix-grammar
clairexen [Wed, 1 Jul 2020 14:41:32 +0000 (16:41 +0200)]
Merge pull request #2203 from antmicro/fix-grammar

Signed and macro grammar update

4 years agoMerge pull request #2179 from splhack/static-cast
clairexen [Wed, 1 Jul 2020 14:40:20 +0000 (16:40 +0200)]
Merge pull request #2179 from splhack/static-cast

Support SystemVerilog Static Cast

4 years agoMerge pull request #2138 from boqwxp/qbfsat-oflag
clairexen [Wed, 1 Jul 2020 14:35:27 +0000 (16:35 +0200)]
Merge pull request #2138 from boqwxp/qbfsat-oflag

qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC

4 years agoMerge pull request #2206 from boqwxp/qbfsat-fix-name-specialization
clairexen [Wed, 1 Jul 2020 14:34:32 +0000 (16:34 +0200)]
Merge pull request #2206 from boqwxp/qbfsat-fix-name-specialization

qbfsat: Fix name-based hole specialization

4 years agoMerge pull request #2136 from zachjs/master
clairexen [Tue, 30 Jun 2020 15:38:49 +0000 (17:38 +0200)]
Merge pull request #2136 from zachjs/master

Allow constant function calls in for loops and generate if and case

4 years agoMerge pull request #2199 from YosysHQ/mmicko/sim_memory
clairexen [Tue, 30 Jun 2020 15:12:51 +0000 (17:12 +0200)]
Merge pull request #2199 from YosysHQ/mmicko/sim_memory

sim - error when memrd and memwr detected

4 years agoMerge pull request #2201 from YosysHQ/fix_test_cell_ilang
clairexen [Tue, 30 Jun 2020 15:11:13 +0000 (17:11 +0200)]
Merge pull request #2201 from YosysHQ/fix_test_cell_ilang

Use ID macro to fix assertion

4 years agoMerge pull request #2209 from YosysHQ/verific_update
clairexen [Tue, 30 Jun 2020 15:05:51 +0000 (17:05 +0200)]
Merge pull request #2209 from YosysHQ/verific_update

Update verific API version check

4 years agosimcells: Fix reset polarity for $_DLATCH_???_ cells.
Marcelina Kościelnicka [Tue, 30 Jun 2020 13:31:12 +0000 (15:31 +0200)]
simcells: Fix reset polarity for $_DLATCH_???_ cells.

4 years agoUpdate verific API version check
Miodrag Milanovic [Tue, 30 Jun 2020 10:13:13 +0000 (12:13 +0200)]
Update verific API version check

4 years agoqbfsat: Add `-O[012]` options to control pre-solving simplification with ABC.
Alberto Gonzalez [Tue, 30 Jun 2020 05:47:03 +0000 (05:47 +0000)]
qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC.

Thanks to @mwk for the gate mapping part of the ABC scripts.

Co-Authored-By: Marcelina Kościelnicka <mwk@0x04.net>
4 years agoqbfsat: Fix name-based hole specialization.
Alberto Gonzalez [Tue, 30 Jun 2020 01:53:21 +0000 (01:53 +0000)]
qbfsat: Fix name-based hole specialization.

Look for unique connections in the containing module with the $anyconst port Y SigBit on the RHS and use those. If no such connection is found, fall back to using the name of the $anyconst port Y SigBit.

4 years agoMerge pull request #2205 from whitequark/fix-2204
whitequark [Tue, 30 Jun 2020 00:08:08 +0000 (00:08 +0000)]
Merge pull request #2205 from whitequark/fix-2204

techmap: don't drop attributes on replaced cells

4 years agotechmap: don't drop attributes on replaced cells.
whitequark [Mon, 29 Jun 2020 23:14:13 +0000 (23:14 +0000)]
techmap: don't drop attributes on replaced cells.

This was introduced in 76c4ee4ea5cb6a3dc214f66237af22a1bedda010.

Fixes #2204.

4 years agoAllow constant function calls in for loops and generate if and case
Zachary Snow [Sat, 27 Jun 2020 02:52:36 +0000 (19:52 -0700)]
Allow constant function calls in for loops and generate if and case

4 years agoMerge pull request #2200 from YosysHQ/mmicko/fix_expose
Miodrag Milanović [Mon, 29 Jun 2020 13:16:29 +0000 (15:16 +0200)]
Merge pull request #2200 from YosysHQ/mmicko/fix_expose

expose pass fix

4 years agoGive error that options are exclusive
Miodrag Milanovic [Mon, 29 Jun 2020 12:45:49 +0000 (14:45 +0200)]
Give error that options are exclusive

4 years agocleanup
Miodrag Milanovic [Mon, 29 Jun 2020 12:42:48 +0000 (14:42 +0200)]
cleanup

4 years agoMerge pull request #2197 from Xiretza/test_cell-shifts
whitequark [Mon, 29 Jun 2020 12:34:09 +0000 (12:34 +0000)]
Merge pull request #2197 from Xiretza/test_cell-shifts

test_cell: don't generate directional shifts with \B_SIGNED=1

4 years agoUse ID macro to fix assertion
Miodrag Milanovic [Mon, 29 Jun 2020 11:18:13 +0000 (13:18 +0200)]
Use ID macro to fix assertion

4 years agoexpose pass fix
Miodrag Milanovic [Mon, 29 Jun 2020 09:56:43 +0000 (11:56 +0200)]
expose pass fix

4 years agosim - error when memrd and memwr detected
Miodrag Milanovic [Mon, 29 Jun 2020 08:33:39 +0000 (10:33 +0200)]
sim - error when memrd and memwr detected

4 years agotest_cell: don't generate directional shifts with \B_SIGNED=1
Xiretza [Sun, 28 Jun 2020 19:30:16 +0000 (21:30 +0200)]
test_cell: don't generate directional shifts with \B_SIGNED=1

This was made an explicit error in e97e33d, "kernel: require \B_SIGNED=0
on $shl, $sshl, $shr, $sshr.".

4 years agoFix crash in verific frontend
Miodrag Milanovic [Fri, 26 Jun 2020 18:11:01 +0000 (20:11 +0200)]
Fix crash in verific frontend

4 years agoAdd signed/unsigned tests
Kamil Rakoczy [Fri, 26 Jun 2020 13:35:35 +0000 (15:35 +0200)]
Add signed/unsigned tests

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoParse macro call attached semicolon as empty expression
Lukasz Dalek [Mon, 1 Jun 2020 13:25:24 +0000 (15:25 +0200)]
Parse macro call attached semicolon as empty expression

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
4 years agoFix integer signing grammar
Lukasz Dalek [Mon, 18 May 2020 19:01:16 +0000 (21:01 +0200)]
Fix integer signing grammar

This commit fixes signed/unsigned grammar in parameters as defined in SV
LRM A2.2.1. Example of correct parameters:

parameter integer signed i = 0;
parameter integer unsigned i = 0;

Example of incorrect parameters:

parameter signed integer i = 0;
parameter unsigned integer i = 0;

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoMerge pull request #2193 from whitequark/cxxrtl-help-text
whitequark [Fri, 26 Jun 2020 08:48:15 +0000 (08:48 +0000)]
Merge pull request #2193 from whitequark/cxxrtl-help-text

cxxrtl: update help text

4 years agocxxrtl: update help text.
whitequark [Fri, 26 Jun 2020 08:30:44 +0000 (08:30 +0000)]
cxxrtl: update help text.

4 years agoMerge pull request #2188 from antmicro/missing-operators
whitequark [Fri, 26 Jun 2020 07:30:27 +0000 (07:30 +0000)]
Merge pull request #2188 from antmicro/missing-operators

Add logic-assignments operators

4 years agoMerge pull request #2189 from antmicro/optional-labels
whitequark [Fri, 26 Jun 2020 07:29:24 +0000 (07:29 +0000)]
Merge pull request #2189 from antmicro/optional-labels

Add support for optional labels

4 years agoMerge pull request #2168 from whitequark/assert-unused-exprs
clairexen [Thu, 25 Jun 2020 16:21:51 +0000 (18:21 +0200)]
Merge pull request #2168 from whitequark/assert-unused-exprs

Use (and ignore) the expression provided to log_assert in NDEBUG builds

4 years agoMerge pull request #2135 from boqwxp/qbfsat-timeinfo
clairexen [Thu, 25 Jun 2020 16:18:09 +0000 (18:18 +0200)]
Merge pull request #2135 from boqwxp/qbfsat-timeinfo

log and qbfsat: Also include child process usage in `PerformanceTimer::query()` and report the time for each call to the QBF-SAT solver

4 years agoMerge pull request #2093 from boqwxp/qbfsat-bugfixes
clairexen [Thu, 25 Jun 2020 16:14:17 +0000 (18:14 +0200)]
Merge pull request #2093 from boqwxp/qbfsat-bugfixes

qbfsat: Multiple bugfixes

4 years agoMerge pull request #2192 from YosysHQ/verific_netbus_attr
clairexen [Thu, 25 Jun 2020 14:40:30 +0000 (16:40 +0200)]
Merge pull request #2192 from YosysHQ/verific_netbus_attr

verific - import attributes for net buses

4 years agoAdd sub-assign and and-assign tests
Kamil Rakoczy [Thu, 25 Jun 2020 12:20:47 +0000 (14:20 +0200)]
Add sub-assign and and-assign tests

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoMove combined assign tests to single file
Kamil Rakoczy [Thu, 25 Jun 2020 12:17:41 +0000 (14:17 +0200)]
Move combined assign tests to single file

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoSupport missing sub-assign and and-assign operators
Kamil Rakoczy [Thu, 25 Jun 2020 11:29:06 +0000 (13:29 +0200)]
Support missing sub-assign and and-assign operators

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agooptimization, all items should have same attributes
Miodrag Milanovic [Thu, 25 Jun 2020 07:18:53 +0000 (09:18 +0200)]
optimization, all items should have same attributes

4 years agoAdd xor-assignment test
Kamil Rakoczy [Wed, 24 Jun 2020 12:38:03 +0000 (14:38 +0200)]
Add xor-assignment test

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoSupport missing xor-assign operator
Lukasz Dalek [Tue, 23 Jun 2020 16:50:50 +0000 (18:50 +0200)]
Support missing xor-assign operator

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
4 years agoSupport optional labels at the end of package definition
Lukasz Dalek [Fri, 19 Jun 2020 18:46:38 +0000 (20:46 +0200)]
Support optional labels at the end of package definition

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
4 years agoSupport optional labels at the end of module definition
Lukasz Dalek [Tue, 19 May 2020 14:58:48 +0000 (16:58 +0200)]
Support optional labels at the end of module definition

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
4 years agoAdd or-assignment and plus-assignment tests
Kamil Rakoczy [Wed, 24 Jun 2020 09:45:38 +0000 (11:45 +0200)]
Add or-assignment and plus-assignment tests

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoAdd plus-assignment operator
Kamil Rakoczy [Wed, 3 Jun 2020 14:44:02 +0000 (16:44 +0200)]
Add plus-assignment operator

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoAdd or-assignment operator
Kamil Rakoczy [Wed, 3 Jun 2020 11:51:57 +0000 (13:51 +0200)]
Add or-assignment operator

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
4 years agoverific - import attributes for net buses as well
Miodrag Milanovic [Wed, 24 Jun 2020 09:01:06 +0000 (11:01 +0200)]
verific - import attributes for net buses as well

4 years agoMerge pull request #2185 from YosysHQ/mwk/cxxrtl-ff-types
whitequark [Wed, 24 Jun 2020 05:40:01 +0000 (05:40 +0000)]
Merge pull request #2185 from YosysHQ/mwk/cxxrtl-ff-types

cxxrtl: Add support for the new FF types.

4 years agocxxrtl: Add support for the new FF types.
Marcelina Kościelnicka [Wed, 24 Jun 2020 00:15:08 +0000 (02:15 +0200)]
cxxrtl: Add support for the new FF types.

4 years agosimplemap: Fix $dffsre mapping.
Marcelina Kościelnicka [Tue, 23 Jun 2020 21:16:43 +0000 (23:16 +0200)]
simplemap: Fix $dffsre mapping.

4 years agoMerge pull request #1818 from YosysHQ/mwk/new-ff-types
clairexen [Tue, 23 Jun 2020 18:25:52 +0000 (20:25 +0200)]
Merge pull request #1818 from YosysHQ/mwk/new-ff-types

Add new FF types to library.

4 years agoUpdate dff2dffe, dff2dffs, zinit to new FF types.
Marcelina Kościelnicka [Tue, 23 Jun 2020 15:25:46 +0000 (17:25 +0200)]
Update dff2dffe, dff2dffs, zinit to new FF types.

4 years agoAdd add* functions for the new FF types
Marcelina Kościelnicka [Tue, 23 Jun 2020 13:39:25 +0000 (15:39 +0200)]
Add add* functions for the new FF types

4 years agoAdd new FF types to simplemap.
Marcelina Kościelnicka [Thu, 9 Apr 2020 01:55:56 +0000 (03:55 +0200)]
Add new FF types to simplemap.

4 years agoAdd support for new FF types in some opt passes.
Marcelina Kościelnicka [Wed, 8 Apr 2020 22:26:17 +0000 (00:26 +0200)]
Add support for new FF types in some opt passes.

4 years agoAdd new builtin FF types
Marcelina Kościelnicka [Wed, 8 Apr 2020 19:42:50 +0000 (21:42 +0200)]
Add new builtin FF types

The new types include:

- FFs with async reset and enable (`$adffe`, `$_DFFE_[NP][NP][01][NP]_`)
- FFs with sync reset (`$sdff`, `$_SDFF_[NP][NP][01]_`)
- FFs with sync reset and enable, reset priority (`$sdffs`, `$_SDFFE_[NP][NP][01][NP]_`)
- FFs with sync reset and enable, enable priority (`$sdffce`, `$_SDFFCE_[NP][NP][01][NP]_`)
- FFs with async reset, set, and enable (`$dffsre`, `$_DFFSRE_[NP][NP][NP][NP]_`)
- latches with reset or set (`$adlatch`, `$_DLATCH_[NP][NP][01]_`)

The new FF types are not actually used anywhere yet (this is left
for future commits).

4 years agoMerge pull request #2182 from whitequark/update-abc
whitequark [Mon, 22 Jun 2020 17:01:59 +0000 (17:01 +0000)]
Merge pull request #2182 from whitequark/update-abc

Update ABC

4 years agoUpdate ABC.
whitequark [Mon, 22 Jun 2020 14:18:07 +0000 (14:18 +0000)]
Update ABC.

4 years agoMerge pull request #2181 from whitequark/minisat-wasm-signal
whitequark [Mon, 22 Jun 2020 00:10:25 +0000 (00:10 +0000)]
Merge pull request #2181 from whitequark/minisat-wasm-signal

minisat: add missing include guard for WASI

4 years agominisat: add missing include guard for WASI.
whitequark [Sun, 21 Jun 2020 21:26:21 +0000 (21:26 +0000)]
minisat: add missing include guard for WASI.

Including signal.h used to be allowed in WASI by mistake, but it's
an error since SDK 11.

4 years agoMerge pull request #2180 from Xiretza/pyosys-override
whitequark [Sun, 21 Jun 2020 15:19:23 +0000 (15:19 +0000)]
Merge pull request #2180 from Xiretza/pyosys-override

pyosys: Use C++11 override keyword for bindings

4 years agopyosys: Use C++11 override keyword for bindings
Xiretza [Sun, 21 Jun 2020 14:27:33 +0000 (16:27 +0200)]
pyosys: Use C++11 override keyword for bindings

7191dd16 dropped the YS_OVERRIDE macro, but it was still being generated
by the python bindings generator, resulting in errors like these when
compiled with ENABLE_PYOSYS=1:

kernel/python_wrappers.cc:350:21: error: expected ‘;’ at end of member declaration
  350 |   virtual void help() YS_OVERRIDE;
      |                     ^
      |                      ;
kernel/python_wrappers.cc:350:23: error: ‘YS_OVERRIDE’ does not name a type
  350 |   virtual void help() YS_OVERRIDE;
      |                       ^~~~~~~~~~~

4 years agolog: Remove unused `_POSIX_TIMERS` branch in `PerformanceTimer::query()`.
Alberto Gonzalez [Wed, 10 Jun 2020 18:21:07 +0000 (18:21 +0000)]
log: Remove unused `_POSIX_TIMERS` branch in `PerformanceTimer::query()`.

4 years agolog, qbfsat: Include child process time in `PerformanceTimer::query()` and report...
Alberto Gonzalez [Sun, 7 Jun 2020 07:45:24 +0000 (07:45 +0000)]
log, qbfsat: Include child process time in `PerformanceTimer::query()` and report the time for each call to the QBF-SAT solver.

4 years agoqbfsat: Simplify solution recovery parsing and tweak the solution regexes.
Alberto Gonzalez [Tue, 9 Jun 2020 21:44:45 +0000 (21:44 +0000)]
qbfsat: Simplify solution recovery parsing and tweak the solution regexes.

4 years agoqbfsat: Avoid instantiating `AttrObject`s directly.
Alberto Gonzalez [Tue, 9 Jun 2020 21:31:58 +0000 (21:31 +0000)]
qbfsat: Avoid instantiating `AttrObject`s directly.

Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
4 years agoqbfsat: Simplify solution format and replace `SigBit::str()` with `log_signal()`.
Alberto Gonzalez [Tue, 9 Jun 2020 05:27:09 +0000 (05:27 +0000)]
qbfsat: Simplify solution format and replace `SigBit::str()` with `log_signal()`.

Co-Authored-By: Claire Wolf <claire@symbioticeda.com>
4 years agoqbfsat: Fixes three bugs.
Alberto Gonzalez [Tue, 26 May 2020 23:12:15 +0000 (23:12 +0000)]
qbfsat: Fixes three bugs.

1. Infinite loop in the optimization procedure when the first solution found while maximizing is at zero.
2. A signed-ness issue when maximizing.
3. Erroneously entering bisection mode with no wire to optimize.

4 years agoqbfsat: Use bit precise mapping for hole value wires and a more robust hole spec...
Alberto Gonzalez [Fri, 22 May 2020 04:48:33 +0000 (04:48 +0000)]
qbfsat: Use bit precise mapping for hole value wires and a more robust hole spec for writing to and specializing from a solution file.

4 years agoMerge pull request #2177 from boqwxp/dict-iterator-jump
whitequark [Sun, 21 Jun 2020 02:05:12 +0000 (02:05 +0000)]
Merge pull request #2177 from boqwxp/dict-iterator-jump

hashlib, rtlil: Add `operator+()` and `operator+=()` to `dict` iterators

4 years agostatic cast: simplify
Kazuki Sakamoto [Sat, 20 Jun 2020 02:09:43 +0000 (19:09 -0700)]
static cast: simplify

4 years agostatic cast: add tests
Kazuki Sakamoto [Sun, 14 Jun 2020 22:26:47 +0000 (15:26 -0700)]
static cast: add tests

4 years agostatic cast: support changing size and signedness
Kazuki Sakamoto [Sun, 14 Jun 2020 22:15:59 +0000 (15:15 -0700)]
static cast: support changing size and signedness

Support SystemVerilog Static Cast
- size
- signedness
- (type is not supposted yet)

Fix #535

4 years agodict: Remove guard for past-the-end iterators that might mask problems in static...
Alberto Gonzalez [Fri, 19 Jun 2020 20:57:27 +0000 (20:57 +0000)]
dict: Remove guard for past-the-end iterators that might mask problems in static analysis.

Co-Authored-By: whitequark <whitequark@whitequark.org>
4 years agoMerge pull request #2178 from boqwxp/design-select
whitequark [Fri, 19 Jun 2020 19:57:25 +0000 (19:57 +0000)]
Merge pull request #2178 from boqwxp/design-select

rtlil: Add `Design::select()` for selecting whole modules

4 years agortlil: Add `Design::select()` for selecting whole modules.
Alberto Gonzalez [Wed, 17 Jun 2020 20:28:56 +0000 (20:28 +0000)]
rtlil: Add `Design::select()` for selecting whole modules.

4 years agohashlib, rtlil: Add `operator+=()` to `dict<>::iterator` and `dict<>::const_iterator...
Alberto Gonzalez [Wed, 17 Jun 2020 22:32:34 +0000 (22:32 +0000)]
hashlib, rtlil: Add `operator+=()` to `dict<>::iterator` and `dict<>::const_iterator` and add `operator+()` and `operator+=()` to `ObjIterator`.

4 years agoUse [[maybe_unused]] instead of YS_ATTRIBUTE(unused).
whitequark [Fri, 19 Jun 2020 15:45:52 +0000 (15:45 +0000)]
Use [[maybe_unused]] instead of YS_ATTRIBUTE(unused).

[[maybe_unused]] is available since C++17, so this commit adds
a polyfill YS_MAYBE_UNUSED. Once we require C++17 we can drop it.

4 years agoRemove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().
whitequark [Fri, 19 Jun 2020 01:32:48 +0000 (01:32 +0000)]
Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().

4 years agoUse (and ignore) the expression provided to log_debug in NDEBUG builds.
whitequark [Fri, 19 Jun 2020 01:51:53 +0000 (01:51 +0000)]
Use (and ignore) the expression provided to log_debug in NDEBUG builds.

4 years agoUse (and ignore) the expression provided to log_assert in NDEBUG builds.
whitequark [Wed, 17 Jun 2020 19:30:53 +0000 (19:30 +0000)]
Use (and ignore) the expression provided to log_assert in NDEBUG builds.

This avoids warnings in NDEBUG builds emitted when a variable is only
used in log_assert, but is always defined.

4 years agoMerge pull request #2175 from Xiretza/missing-noreturn
whitequark [Fri, 19 Jun 2020 15:46:54 +0000 (15:46 +0000)]
Merge pull request #2175 from Xiretza/missing-noreturn

Add missing [[noreturn]] to log_file_error()

4 years agoAdd missing [[noreturn]] to log_file_error()
Xiretza [Fri, 19 Jun 2020 09:46:06 +0000 (11:46 +0200)]
Add missing [[noreturn]] to log_file_error()

Previously this was tagged only with YS_ATTRIBUTE(noreturn), but not
YS_NORETURN, so it got lost in #2173, resulting in warnings in
frontends/ast/simplify.cc:

frontends/ast/simplify.cc:267:1: warning: function declared 'noreturn' should not return [-Winvalid-noreturn]
}
^
frontends/ast/simplify.cc:379:1: warning: function declared 'noreturn' should not return [-Winvalid-noreturn]
}
^

4 years agoMerge pull request #2173 from whitequark/use-cxx11-final-override
whitequark [Fri, 19 Jun 2020 06:15:33 +0000 (06:15 +0000)]
Merge pull request #2173 from whitequark/use-cxx11-final-override

Use C++11 final/override/[[noreturn]]

4 years agoMerge pull request #2174 from whitequark/fix-github-linguist
whitequark [Fri, 19 Jun 2020 06:09:42 +0000 (06:09 +0000)]
Merge pull request #2174 from whitequark/fix-github-linguist

Fix GitHub misidentifying *.v files as Coq

4 years agoFix GitHub misidentifying *.v files as Coq.
whitequark [Fri, 19 Jun 2020 06:08:18 +0000 (06:08 +0000)]
Fix GitHub misidentifying *.v files as Coq.

4 years agoMerge pull request #2171 from whitequark/cxxrtl-accessors
whitequark [Fri, 19 Jun 2020 03:52:29 +0000 (03:52 +0000)]
Merge pull request #2171 from whitequark/cxxrtl-accessors

cxxrtl: add .get() and .set() accessors on value<> and wire<>

4 years agocxxrtl: add .get() and .set() accessors on value<> and wire<>.
whitequark [Thu, 18 Jun 2020 21:51:30 +0000 (21:51 +0000)]
cxxrtl: add .get() and .set() accessors on value<> and wire<>.

For several reasons:
  * They're more convenient than accessing .data.
  * They accommodate variably-sized types like size_t transparently.
  * They statically ensure that no out of range conversions happen.

For now these are only provided for unsigned integers, but eventually
they should be provided for signed integers too. (Annoyingly this
affects conversions to/from `char` at the moment.)

Fixes #2127.

4 years agoMerge pull request #2170 from boqwxp/cutpoint-efficiency
whitequark [Fri, 19 Jun 2020 01:13:19 +0000 (01:13 +0000)]
Merge pull request #2170 from boqwxp/cutpoint-efficiency

cutpoint: Improve efficiency by iterating over module ports instead of module wires

4 years agoUse C++11 [[noreturn]] attribute.
whitequark [Fri, 19 Jun 2020 01:05:59 +0000 (01:05 +0000)]
Use C++11 [[noreturn]] attribute.

4 years agoUse C++11 final/override keywords.
whitequark [Thu, 18 Jun 2020 23:34:52 +0000 (23:34 +0000)]
Use C++11 final/override keywords.

4 years agocutpoint: Improve efficiency by iterating over module ports instead of module wires.
Alberto Gonzalez [Thu, 18 Jun 2020 17:42:36 +0000 (17:42 +0000)]
cutpoint: Improve efficiency by iterating over module ports instead of module wires.

4 years agoMerge pull request #2153 from boqwxp/splitnets-cleanup
N. Engelhardt [Thu, 18 Jun 2020 17:16:55 +0000 (19:16 +0200)]
Merge pull request #2153 from boqwxp/splitnets-cleanup

splitnets: Cleanup and efficiency improvements

4 years agoMerge pull request #2167 from whitequark/cxxrtl-fix-ndebug
whitequark [Thu, 18 Jun 2020 16:57:51 +0000 (16:57 +0000)]
Merge pull request #2167 from whitequark/cxxrtl-fix-ndebug

cxxrtl: don't compute vital values in log_assert()

4 years agoMerge pull request #2142 from whitequark/splitnets-hdlname
whitequark [Thu, 18 Jun 2020 16:57:24 +0000 (16:57 +0000)]
Merge pull request #2142 from whitequark/splitnets-hdlname

splitnets: propagate (*hdlname*) and disambiguate via start_offset

4 years agoMerge pull request #2164 from madebr/msvc
Miodrag Milanović [Thu, 18 Jun 2020 10:44:21 +0000 (12:44 +0200)]
Merge pull request #2164 from madebr/msvc

Get yosys building on Visual Studio