mesa.git
5 years agonv50ir/nir: move immediates before use
Karol Herbst [Thu, 16 Aug 2018 20:11:47 +0000 (22:11 +0200)]
nv50ir/nir: move immediates before use

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: handle user clip planes for each emitted vertex
Karol Herbst [Sat, 30 Jun 2018 14:22:17 +0000 (16:22 +0200)]
nv50/ir/nir: handle user clip planes for each emitted vertex

v9: convert to C++ style comments
    handle for tess eval shaders as well

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement intrinsic shader_clock
Karol Herbst [Tue, 9 Jan 2018 23:35:47 +0000 (00:35 +0100)]
nv50/ir/nir: implement intrinsic shader_clock

v9: mark as fixed

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement load_per_vertex_output
Karol Herbst [Sat, 6 Jan 2018 23:35:37 +0000 (00:35 +0100)]
nv50/ir/nir: implement load_per_vertex_output

v4: use smarter getIndirect helper
    use new getSlotAddress helper
v5: use loadFrom helper
v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: add memory barriers
Karol Herbst [Mon, 25 Dec 2017 22:15:03 +0000 (23:15 +0100)]
nv50/ir/nir: add memory barriers

v5: add more barrier intrinsics

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement images
Karol Herbst [Sat, 23 Dec 2017 17:05:49 +0000 (18:05 +0100)]
nv50/ir/nir: implement images

v3: fix compiler warnings
v4: use loadFrom helper
v5: fix signed min/max
v6: set tex mask
    add support for indirect image access
    set cache mode
v7: make compatible with 884d27bcf688d36c3bbe01bceca525595add3b33
    rework the whole deref thing to prepare for bindless
v8: port to deref instructions
    don't require C++11 features
v9: implement MS images
    rebase on master (image modifiers)
    fix regressions due to variable src compnents
    replace '(*it).' with 'it->'
    convert to C++ style comments

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement ssbo intrinsics
Karol Herbst [Sat, 23 Dec 2017 01:26:03 +0000 (02:26 +0100)]
nv50/ir/nir: implement ssbo intrinsics

v4: use loadFrom helper
v5: support indirect buffer access
v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement nir_intrinsic_load_ubo
Karol Herbst [Fri, 22 Dec 2017 17:01:38 +0000 (18:01 +0100)]
nv50/ir/nir: implement nir_intrinsic_load_ubo

v4: use loadFrom helper
v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement geometry shader nir_intrinsics
Karol Herbst [Thu, 21 Dec 2017 15:30:25 +0000 (16:30 +0100)]
nv50/ir/nir: implement geometry shader nir_intrinsics

v4: use smarter getIndirect helper
    use new getSlotAddress helper
    use loadFrom helper
v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement variable indexing
Karol Herbst [Mon, 11 Dec 2017 01:11:50 +0000 (02:11 +0100)]
nv50/ir/nir: implement variable indexing

We store those arrays in local memory and reserve some space for each of the
arrays. With NIR we could store those arrays packed, but we don't do that yet
as it causes MemoryOpt to generate unaligned memory accesses.

v3: use fixed size vec4 arrays until we fix MemoryOpt
v4: fix for 64 bit types
v5: use loadFrom helper
v8: don't require C++11 features
v9: convert to C++ style comments

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement vote and ballot
Karol Herbst [Wed, 20 Dec 2017 16:06:03 +0000 (17:06 +0100)]
nv50/ir/nir: implement vote and ballot

v2: add vote_eq support
    use the new subop intrinsic helper
    add ballot
v3: add read_(first_)invocation
v8: handle vectorized intrinsics
    don't require C++11 features
v9: lower_subgroups to 32 bit (produces less instructions)
    use getSSA and getScratch instead of new_LValue

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: add skeleton getOperation for intrinsics
Karol Herbst [Sat, 23 Dec 2017 01:25:41 +0000 (02:25 +0100)]
nv50/ir/nir: add skeleton getOperation for intrinsics

v7: don't assert in default case for getSubOp

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: implement nir_instr_type_tex
Karol Herbst [Tue, 12 Dec 2017 17:07:01 +0000 (18:07 +0100)]
nv50/ir/nir: implement nir_instr_type_tex

a lot of those fields are not valid for a lot of tex ops. Not quite sure if
it's worth the effort to check for those or just keep it like that. It seems
to kind of work.

v2: reworked offset handling
    add tex support with indirect R/S arguments
    handle GLSL_SAMPLER_DIM_EXTERNAL
    drop reference in convert(glsl_sampler_dim&, bool, bool)
    fix tg4 component selection
v5: fill up coords args with scratch values if coords provided is less than TexTarget.getArgCount()
v7: prepare for bindless_texture support
v8: don't require C++11 features
v9: convert to C++ style comments
    fix txf with a uniform constant 0 lod

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement nir_ssa_undef_instr
Karol Herbst [Thu, 14 Dec 2017 00:15:55 +0000 (01:15 +0100)]
nv50/ir/nir: implement nir_ssa_undef_instr

v2: use mkOp
v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: implement loading system values
Karol Herbst [Wed, 13 Dec 2017 21:14:03 +0000 (22:14 +0100)]
nv50/ir/nir: implement loading system values

v2: support more sys values
    fixed a bug where for multi component reads all values ended up in x
v3: add load_patch_vertices_in
v4: add subgroup stuff
v5: add helper invocation
v6: fix loading 64 bit system values
v8: don't require C++11 features
v9: convert to C++ style comments

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement intrinsic_discard(_if)
Karol Herbst [Wed, 13 Dec 2017 20:59:29 +0000 (21:59 +0100)]
nv50/ir/nir: implement intrinsic_discard(_if)

v9: use getSSA instead of new_LValue

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement load_(interpolated_)input/output
Karol Herbst [Mon, 11 Dec 2017 15:21:06 +0000 (16:21 +0100)]
nv50/ir/nir: implement load_(interpolated_)input/output

v3: and load_output
v4: use smarter getIndirect helper
    use new getSlotAddress helper
v5: don't use const_offset directly
    fix for indirects
v6: add support for interpolateAt
v7: fix compiler warnings
    add load_barycentric_sample
    handle load_output for fragment shaders
v8: set info->prop.fp.readsSampleLocations for at_sample interpolation
    don't require C++11 features
v9: convert to C++ style comments

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement nir_intrinsic_store_(per_vertex_)output
Karol Herbst [Mon, 11 Dec 2017 14:46:19 +0000 (15:46 +0100)]
nv50/ir/nir: implement nir_intrinsic_store_(per_vertex_)output

v3: add workaround for RA issues
    indirects have to be multiplied by 0x10
    fix indirect access
v4: use smarter getIndirect helper
    use storeTo helper
v5: don't use const_offset directly
v8: don't require C++11 features
v9: convert to C++ style comments
    handle clip planes correctly

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement nir_intrinsic_load_uniform
Karol Herbst [Tue, 12 Dec 2017 20:02:37 +0000 (21:02 +0100)]
nv50/ir/nir: implement nir_intrinsic_load_uniform

v2: use new getIndirect helper
    fixes symbols for 64 bit types
v4: use smarter getIndirect helper
    simplify address calculation
    use loadFrom helper
v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: implement nir_alu_instr handling
Karol Herbst [Tue, 12 Dec 2017 20:05:30 +0000 (21:05 +0100)]
nv50/ir/nir: implement nir_alu_instr handling

v2: user bitfield_insert instead of bfi
    rework switch helper macros
    remove some lowering code (LoweringHelper is now used for this)
v3: add pack_half_2x16_split
    add unpack_half_2x16_split_x/y
v5: replace first argument with nullptr in loadImm calls
    prefer getSSA over getScratch
v8: fix setting precise modifier for first instruction inside a block
    add guard in case no instruction gets inserted into an empty block
    don't require C++11 features
v9: use CC_NE for integer compares
    convert to C++ style comments
    fix b2f for doubles
    remove macros around nir ops to make it easier to grep them
    add handling for fpow

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: add skeleton for nir_intrinsic_instr
Karol Herbst [Thu, 21 Dec 2017 12:33:23 +0000 (13:33 +0100)]
nv50/ir/nir: add skeleton for nir_intrinsic_instr

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: implement nir_load_const_instr
Karol Herbst [Tue, 12 Dec 2017 20:01:39 +0000 (21:01 +0100)]
nv50/ir/nir: implement nir_load_const_instr

v8: fix loading 8/16 bit constants

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: parse NIR shader info
Karol Herbst [Fri, 15 Dec 2017 16:40:15 +0000 (17:40 +0100)]
nv50/ir/nir: parse NIR shader info

v2: parse a few more fields
v3: add special handling for GL_ISOLINES
v8: set info->prop.fp.readsSampleLocations
    don't require C++11 features
v9: replace '(*it).' with 'it->'
    convert to C++ style comments

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: add loadFrom and storeTo helpler
Karol Herbst [Tue, 9 Jan 2018 02:22:00 +0000 (03:22 +0100)]
nv50/ir/nir: add loadFrom and storeTo helpler

v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: run assignSlots
Karol Herbst [Mon, 11 Dec 2017 17:01:29 +0000 (18:01 +0100)]
nv50/ir/nir: run assignSlots

v2: add support for geometry shaders
    set idx
    add some missing mappings
    fix for 64bit inputs/outputs
    fix up some FP color output index messup
    parse centroid flag
v3: fix arrays in outputs as well
    fix input/ouput size calculation for tessellation shaders
v4: add getSlotAddress helper
    fix for 64 bit typed inputs
v5: change getSlotAddress interface for easier use
    fix sample inputs
    fix slot counting for mat
v7: fix driver_location of images
v8: don't require C++11 features
v9: convert to C++ style comments
    support VERT_ATTRIB_POINT_SIZE
    add more error checking to slots

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: add nir type helper functions
Karol Herbst [Mon, 18 Dec 2017 02:57:06 +0000 (03:57 +0100)]
nv50/ir/nir: add nir type helper functions

v4: treat imul as unsigned
v5: remove pointless !!
v7: inot is unsigned as well
v8: don't require C++11 features
v9: convert to C++ style comments
    improve formatting
    print error in all cases where codegen doesn't support a given type

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir/nir: track defs and provide easy access functions
Karol Herbst [Tue, 12 Dec 2017 20:01:28 +0000 (21:01 +0100)]
nv50/ir/nir: track defs and provide easy access functions

v2: add helper function for indirects
v4: add new getIndirect overload for easier use
v5: use getSSA for ssa values
    we can just create the values for unassigned registers in getSrc
v6: always create at least 32 bit values
v8: don't require C++11 features
v9: include unordered_map on supported stdlibs
    replace '(*it).' with 'it->'

Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonv50/ir/nir: run some passes to make the conversion easier
Karol Herbst [Sun, 10 Dec 2017 19:39:23 +0000 (20:39 +0100)]
nv50/ir/nir: run some passes to make the conversion easier

v2: add constant_folding
v6: print non final NIR only for verbose debugging
v8: add passes we will need for OpenCL compute shaders
v9: move type_size into anonymous namespace
    convert to C++ style comments
    lower bools to int32

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonouveau: fix nir and TGSI shader cache collision
Karol Herbst [Tue, 10 Apr 2018 14:41:01 +0000 (16:41 +0200)]
nouveau: fix nir and TGSI shader cache collision

v9: rename variable to driver_flags
    use constants for shader cache flags

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonouveau: add support for nir
Karol Herbst [Sun, 10 Dec 2017 14:06:45 +0000 (15:06 +0100)]
nouveau: add support for nir

not all those nir options are actually required, it just made the work a
little easier.

v2: fix asserts
    parse compute shaders
    don't lower bitfield_insert
v3: fix memory leak
v4: don't lower fmod32
v5: set lower_all_io_to_temps to false
    fix memory leak because we take over ownership of the nir shader
    merge: use the lowering helper
v6: include TGSI debug header for proper assert call
    add nv50 support
v7: fix Automake build
v8: free shader only for the set shader type
v9: check for IR type inside get_compiler_options
    squash "nouveau: add env var to make nir default"
    fix memory leak when creating compute shaders
    use debug_get_bool_option as it is available in non debug builds
    return failure if unsupported IR is encountered
    don't lower fpow in nir
    lower int 64 divmod inside nir to prevent crashes

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir: add lowering helper
Karol Herbst [Wed, 3 Jan 2018 14:31:15 +0000 (15:31 +0100)]
nv50/ir: add lowering helper

if we start supporting multiple input IRs we might want to move lowering code
into a common place and keep the initial translation simplier.

This will also allows us to react on ISA changes more easily.

v5: also handle SAT
v6: rename type variables
    fixed lowering of NEG
    add lowering of NOT
v8: don't require C++11 features

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonv50/ir: move common converter code in base class
Karol Herbst [Tue, 2 Jan 2018 18:02:30 +0000 (19:02 +0100)]
nv50/ir: move common converter code in base class

v2: remove TGSI related bits

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
5 years agonvc0: print the shader type when dumping headers
Karol Herbst [Fri, 15 Dec 2017 19:04:59 +0000 (20:04 +0100)]
nvc0: print the shader type when dumping headers

this makes debugging the shader header a little easier

Acked-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agoradeonsi: Remove implicit const cast.
Bas Nieuwenhuizen [Sat, 16 Mar 2019 21:58:38 +0000 (22:58 +0100)]
radeonsi: Remove implicit const cast.

Fixes: b9e02fe138e "gallium: add pipe_grid_info::last_block"
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
5 years agogitlab-ci: Build turnip.
Bas Nieuwenhuizen [Tue, 12 Mar 2019 23:15:09 +0000 (00:15 +0100)]
gitlab-ci: Build turnip.

No autotools build to care about.

The half baked turnips param is kind of ugly, but felt like a waste
defining more variables for it now.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agoturnip: Deconflict vk_format_table regeneration
Bas Nieuwenhuizen [Tue, 12 Mar 2019 23:38:02 +0000 (00:38 +0100)]
turnip: Deconflict vk_format_table regeneration

Avoids

src/freedreno/vulkan/meson.build:42:0: ERROR:  Tried to create target "vk_format_table.c", but a target of that name already exists.

when building both radv and turnip.

Fixes: 26380b3a9f8 "turnip: Add driver skeleton (v2)"
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agoturnip: Fix GCC compiles.
Bas Nieuwenhuizen [Tue, 12 Mar 2019 23:07:02 +0000 (00:07 +0100)]
turnip: Fix GCC compiles.

Apparently GCC does not consider static const variables to be
integer constants, and hence the array size and the static assert
result in compile failures.

Fixes: 4b9f967cd1a "turnip: add a more complete format table"
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agointel/nir: Lower array-deref-of-vector UBO and SSBO loads
Jason Ekstrand [Thu, 14 Mar 2019 17:58:16 +0000 (12:58 -0500)]
intel/nir: Lower array-deref-of-vector UBO and SSBO loads

This fixes a serious performance issue with DXVK:

https://github.com/doitsujin/dxvk/issues/937

This was caused by a recent change that to improve performance on RADV
which back-fired on ANV and killed performance for some apps:

https://github.com/doitsujin/dxvk/commit/e5a06d3f4a103a54cd4eb51970fedee405d1d698

Throwing in this bit of lowering lets us come along and CSE those UBO
loads (or copy-prop for SSBO load) and get one load where we previously
would have gotten several.

VkPipeline-db results on Kaby Lake:

    total instructions in shared programs: 5115361 -> 5073185 (-0.82%)
    instructions in affected programs: 1754333 -> 1712157 (-2.40%)
    helped: 5331
    HURT: 63

    total cycles in shared programs: 2544501169 -> 2481144545 (-2.49%)
    cycles in affected programs: 2531058653 -> 2467702029 (-2.50%)
    helped: 9202
    HURT: 4323

    total loops in shared programs: 3340 -> 3331 (-0.27%)
    loops in affected programs: 9 -> 0
    helped: 9
    HURT: 0

    total spills in shared programs: 3246 -> 3053 (-5.95%)
    spills in affected programs: 384 -> 191 (-50.26%)
    helped: 10
    HURT: 5

    total fills in shared programs: 4626 -> 4452 (-3.76%)
    fills in affected programs: 439 -> 265 (-39.64%)
    helped: 10
    HURT: 5

All of the shaders with hurt spilling were in Rise of the Tomb Raider
which also had shaders solidly helped in the spilling department.  Not
shown in those results (because I've not had success dumping the
shaders) is Witcher 3 where this reduces spilling and improves over-all
perf by around 20-25%.  There were no shader-db changes.  Apparently,
this just isn't a pattern that happens in OpenGL.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: "19.0" mesa-stable@lists.freedesktop.org
5 years agonir: Add a new pass to lower array dereferences on vectors
Jason Ekstrand [Mon, 11 Mar 2019 23:47:39 +0000 (18:47 -0500)]
nir: Add a new pass to lower array dereferences on vectors

This pass was originally written for lowering TCS output reads and
writes but it is also applicable just about anything including UBOs,
SSBOs, and shared variables.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agonir/builder: Add a vector extract helper
Jason Ekstrand [Mon, 11 Mar 2019 23:58:24 +0000 (18:58 -0500)]
nir/builder: Add a vector extract helper

This one's a tiny bit better than what we had in spirv_to_nir because it
emits a binary tree rather than a linear walk.  It also doesn't leave
around unneeded bcsel instructions for a constant index and returns an
undef for constant OOB access.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agosoftpipe: Enable PIPE_CAP_MIXED_COLORBUFFER_FORMATS
Gert Wollny [Fri, 15 Mar 2019 09:31:26 +0000 (10:31 +0100)]
softpipe: Enable PIPE_CAP_MIXED_COLORBUFFER_FORMATS
Ā Ā 
It seems softpipe actually supports this. This change enables the
following piglits as passing without regressions in the gpu test set:

 gl-3.1-mixed-int-float-fbo
 gl-3.1-mixed-int-float-fbo int_second
 fbo-blending-format-quirks

Changes for deqp:

 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_none_none QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_none_rbo QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_none_tex QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_rbo_none QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_tex_none QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_none_none QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_none_rbo QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_none_tex QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_rbo_none QualityWarning -> Pass
 dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_tex_none QualityWarning -> Pass

 dEQP-GLES3.functional.fbo.completeness.samples.rbo0_rbo0_tex Fail -> Pass
 dEQP-GLES3.functional.fbo.completeness.samples.rbo0_tex_none Fail -> Pass
 dEQP-GLES3.functional.fbo.completeness.samples.rbo1_rbo1_rbo1 Fail -> Pass
 dEQP-GLES3.functional.fragment_out.random.* NotSupported -> Pass

 dEQP-GLES31.functional.shaders.builtin_functions.common.frexp.*_fragment Fail -> Pass
 dEQP-GLES31.functional.shaders.builtin_functions.common.frexp.*_vertex Fail -> Pass
 dEQP-GLES31.functional.shaders.builtin_functions.precision.frexp.*_fragment.* Fail -> Pass
 dEQP-GLES31.functional.shaders.builtin_functions.precision.frexp.*_vertex.* Fail -> Pass

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agofreedreno/ir3/cp: fix ldib bug
Rob Clark [Tue, 26 Feb 2019 19:46:45 +0000 (14:46 -0500)]
freedreno/ir3/cp: fix ldib bug

Something that we didn't hit earlier because of the extra shr.b

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agogallium/auxiliary/vl: Change weave compute shader implementation
James Zhu [Wed, 6 Mar 2019 17:36:37 +0000 (12:36 -0500)]
gallium/auxiliary/vl: Change weave compute shader implementation

Use 2D_ARRARY instead of RECT to fetch texels for weave compute
shader.

Problem 2,3: Fixed interpolation issue with weave de-interlace

Fixes: 9364d66cb7f7 (Add video compositor compute shader render)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109646
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Bruno Milreu <bmilreu@gmail.com>
5 years agogallium/auxiliary/vl: Change grid setting
James Zhu [Wed, 6 Mar 2019 17:29:09 +0000 (12:29 -0500)]
gallium/auxiliary/vl: Change grid setting

Using draw area for grid setting instead of destination
buffer size.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Bruno Milreu <bmilreu@gmail.com>
5 years agogallium/auxiliary/vl: Increase shader_params size
James Zhu [Wed, 6 Mar 2019 17:01:07 +0000 (12:01 -0500)]
gallium/auxiliary/vl: Increase shader_params size

Increase shader_params size to pass sampler data to
compute shader during weave de-interlace.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Bruno Milreu <bmilreu@gmail.com>
5 years agoomx: add a compute path in enc_LoadImage_common
Marek OlÅ”Ć”k [Wed, 27 Feb 2019 22:19:55 +0000 (17:19 -0500)]
omx: add a compute path in enc_LoadImage_common

Acked-by: Leo Liu <leo.liu@amd.com>
5 years agoomx: clean up enc_LoadImage_common
Marek OlÅ”Ć”k [Wed, 27 Feb 2019 22:19:54 +0000 (17:19 -0500)]
omx: clean up enc_LoadImage_common

- add *pipe
- add documentation

Acked-by: Leo Liu <leo.liu@amd.com>
5 years agogallium: add pipe_grid_info::last_block
Marek OlÅ”Ć”k [Wed, 27 Feb 2019 22:19:53 +0000 (17:19 -0500)]
gallium: add pipe_grid_info::last_block

The OpenMAX state tracker will use this.

RadeonSI is adapted to use pipe_grid_info::last_block instead of its
internal state.

Acked-by: Leo Liu <leo.liu@amd.com>
5 years agonir/xfb: move varyings info out of nir_xfb_info
Alejandro PiƱeiro [Thu, 14 Mar 2019 10:02:52 +0000 (11:02 +0100)]
nir/xfb: move varyings info out of nir_xfb_info

When varyings was added we moved to use to dynamycally allocated
pointers, instead of allocating just one block for everything. That
breaks some assumptions of some vulkan drivers (like anv), that make
serialization and copying easier. And at the same time, varyings are
not needed for vulkan.

So this commit moves them out. Although it seems a little an overkill,
fixing the anv side would require a similar, or more, changes, so in
the end it is about to decide where do we want to put our effort.

v2: (from Jason review)
  * Don't use a temp variable on the _create methods, just return
    result of rzalloc_size
  * Wrap some lines too long.

Fixes: cf0b2ad486c9 ("nir/xfb: adding varyings on nir_xfb_info and gather_info")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoradv: always load 3 channels for formats that need to be shuffled
Samuel Pitoiset [Fri, 15 Mar 2019 09:36:00 +0000 (10:36 +0100)]
radv: always load 3 channels for formats that need to be shuffled

This fixes a rendering issue with Hellblade and DXVK.

Fixes: a66b186bebf ("radv: use typed buffer loads for vertex input fetches")
Reported-by: Philip Rebohle <philip.rebohle@tu-dortmund.de>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agomesa: Add assert to _mesa_primitive_restart_index.
Mathias Frƶhlich [Thu, 14 Mar 2019 04:58:43 +0000 (05:58 +0100)]
mesa: Add assert to _mesa_primitive_restart_index.

Make sure the inde_size parameter is meant to be in bytes.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agovbo: Fix GL_PRIMITIVE_RESTART_FIXED_INDEX in display list compiles.
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:54 +0000 (09:27 +0100)]
vbo: Fix GL_PRIMITIVE_RESTART_FIXED_INDEX in display list compiles.

The maximum value primitive restart index is different for each index data
type. Use the appropriate fixed restart index value.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agovbo: Fix basevertex handling in display list compiles.
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:54 +0000 (09:27 +0100)]
vbo: Fix basevertex handling in display list compiles.

The standard requires that the primitive restart comparison happens before
the basevertex value is added. Do this now, drop a reference to the standard
why this happens at this place.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use mapping tools in debug prints.
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:54 +0000 (09:27 +0100)]
mesa: Use mapping tools in debug prints.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agomesa: Remove _ae_{,un}map_vbos and dependencies.
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:53 +0000 (09:27 +0100)]
mesa: Remove _ae_{,un}map_vbos and dependencies.

Since mapping and unmapping the buffer objects in a VAO is handled
directly from the VAO, this part of the _NEW_ARRAY state is no longer
used. So remove this part of array element state.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agomesa: Replace _ae_{,un}map_vbos with _mesa_vao_{,un}map_arrays
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:53 +0000 (09:27 +0100)]
mesa: Replace _ae_{,un}map_vbos with _mesa_vao_{,un}map_arrays

Due to the use of bitmaps, the _mesa_vao_{,un}map_arrays functions
should provide comparable runtime efficienty to the currently used
_ae_{,un}map_vbos functions. So use this functions and enable
further cleanup.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use _mesa_array_element in dlist save.
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:53 +0000 (09:27 +0100)]
mesa: Use _mesa_array_element in dlist save.

Make use of the newly factored out _mesa_array_element function
in display list compilation. For now that duplicates out the
primitive restart logic. But that turns out to need a fix in
display list handling anyhow.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agomesa: Factor out _mesa_array_element.
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:53 +0000 (09:27 +0100)]
mesa: Factor out _mesa_array_element.

The factored out function handles emitting the vertex attributes
at the given index. The now public accessible function gets used
in the following patches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agomesa: Implement helper functions to map and unmap a VAO.
Mathias Frƶhlich [Fri, 1 Mar 2019 08:27:53 +0000 (09:27 +0100)]
mesa: Implement helper functions to map and unmap a VAO.

Provide a set of functions that maps or unmaps all VBOs held
in a VAO. The functions will be used in the following patches.

v2: Update comments.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Frƶhlich <Mathias.Froehlich@web.de>
5 years agost/mesa: Let NIR lower UBO and SSBO access when we have it
Jason Ekstrand [Sun, 10 Mar 2019 13:57:51 +0000 (08:57 -0500)]
st/mesa: Let NIR lower UBO and SSBO access when we have it

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoi965: Stop setting LowerBuferInterfaceBlocks
Jason Ekstrand [Sat, 9 Mar 2019 15:08:44 +0000 (09:08 -0600)]
i965: Stop setting LowerBuferInterfaceBlocks

Instead, we do UBO and SSBO deref lowering in NIR after we've given it a
chance to optimize SSBO access:

Shader-db results on Kaby Lake:

    total instructions in shared programs: 15235775 -> 15235484 (<.01%)
    instructions in affected programs: 14992 -> 14701 (-1.94%)
    helped: 19
    HURT: 20

    total cycles in shared programs: 339220331 -> 339027307 (-0.06%)
    cycles in affected programs: 79831981 -> 79638957 (-0.24%)
    helped: 540
    HURT: 602

    total loops in shared programs: 4402 -> 4348 (-1.23%)
    loops in affected programs: 186 -> 132 (-29.03%)
    helped: 27
    HURT: 0

    total spills in shared programs: 23261 -> 23234 (-0.12%)
    spills in affected programs: 38 -> 11 (-71.05%)
    helped: 1
    HURT: 0

    total fills in shared programs: 31442 -> 31371 (-0.23%)
    fills in affected programs: 98 -> 27 (-72.45%)
    helped: 1
    HURT: 0

    LOST:   12
    GAINED: 12

Most of the help and hurt in instruction counts was just churn caused by
re-ordering of optimizations and the fact that the NIR deref lowering
code is emitting slightly different instructions.  Nothing was hurt by
more than three instructions and most things weren't helped by more than
four.  The primary exception to this is one Car Chase shader:

    shaders/non-free/gfxbench4/carchase/341.shader_test CS SIMD32: 1144 -> 821 (-28.23%)

There is also one compute shader in Manhattan 3.1 and a fragment shader
in the UE4 Shooter Game demo that now get a loop partially unrolled.
Those showed up in the results as hurt instructions but were manually
removed to get the results above.

The lost/gained was a dozen Car Chase shaders that went from SIMD8 to
SIMD16 thanks to improved register pressure:

    shaders/non-free/gfxbench4/carchase/366.shader_test CS
    shaders/non-free/gfxbench4/carchase/368.shader_test CS
    shaders/non-free/gfxbench4/carchase/370.shader_test CS
    shaders/non-free/gfxbench4/carchase/372.shader_test CS
    shaders/non-free/gfxbench4/carchase/376.shader_test CS
    shaders/non-free/gfxbench4/carchase/378.shader_test CS
    shaders/non-free/gfxbench4/carchase/380.shader_test CS
    shaders/non-free/gfxbench4/carchase/382.shader_test CS
    shaders/non-free/gfxbench4/carchase/384.shader_test CS
    shaders/non-free/gfxbench4/carchase/388.shader_test CS
    shaders/non-free/gfxbench4/carchase/4.shader_test CS
    shaders/non-free/gfxbench4/carchase/6.shader_test CS

Given how much it appeared to be improved, I ran Car Chase on my laptop.
Unfortunately, I wasn't able to see any measurable improvement.  It
might be helped by 1-2% but it's in the noise.  It does render correctly
as far as I can tell so the improvement is legitimate.

All of the loops that got delete were in dolphin uber shaders.  I've had
no opportunity to test them for correctness or performance.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoglsl/nir: Add a pass to lower UBO and SSBO access
Jason Ekstrand [Sat, 9 Mar 2019 16:12:46 +0000 (10:12 -0600)]
glsl/nir: Add a pass to lower UBO and SSBO access

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoglsl/nir: Handle unlowered SSBO atomic and array_length intrinsics
Jason Ekstrand [Thu, 14 Mar 2019 17:00:04 +0000 (12:00 -0500)]
glsl/nir: Handle unlowered SSBO atomic and array_length intrinsics

We didn't have any of these before because all NIR consumers always
called lower_ubo_references.  Soon, we want to pass the derefs straight
through to NIR so we need to handle these intrinsics directly.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoglsl/nir: Set explicit types on UBO/SSBO variables
Jason Ekstrand [Sat, 9 Mar 2019 15:40:09 +0000 (09:40 -0600)]
glsl/nir: Set explicit types on UBO/SSBO variables

We want to be able to use variables and derefs for UBO/SSBO access in
NIR.  In order to do this, the rest of NIR needs to know the type layout
information.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoglsl: Don't lower vector derefs for SSBOs, UBOs, and shared
Jason Ekstrand [Mon, 11 Mar 2019 19:53:31 +0000 (14:53 -0500)]
glsl: Don't lower vector derefs for SSBOs, UBOs, and shared

All of these are backed by some sort of memory so if you have multiple
threads writing to different components of the same vector at the same
time, the load-vec-store pattern that GLSL IR emits won't work.  This
shouldn't affect any drivers today as they all call GLSL IR lowering
which lowers access to these variables to index+offset intrinsics before
we get to this point.  However, NIR will start handling the derefs
itself and won't want the lowering.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agonir/lower_io: Add a new buffer_array_length intrinsic and lowering
Jason Ekstrand [Sun, 10 Mar 2019 13:35:00 +0000 (08:35 -0500)]
nir/lower_io: Add a new buffer_array_length intrinsic and lowering

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agonir: Rename nir_address_format_vk_index_offset to not be vk
Jason Ekstrand [Sat, 9 Mar 2019 16:10:37 +0000 (10:10 -0600)]
nir: Rename nir_address_format_vk_index_offset to not be vk

It's just a 32-bit index and offset.  We're going to want to use it in
GL as well so stop talking about Vulkan.

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agonir/deref: Consider COHERENT decorated var derefs as aliasing
Jason Ekstrand [Sun, 10 Mar 2019 22:41:02 +0000 (17:41 -0500)]
nir/deref: Consider COHERENT decorated var derefs as aliasing

If we get to two deref_var paths with different variables, we usually
know they don't alias.  However, if both of the paths are marked
coherent, we don't have to worry about it.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agocompiler/types: Add helpers to get explicit types for standard layouts
Jason Ekstrand [Sat, 9 Mar 2019 15:06:27 +0000 (09:06 -0600)]
compiler/types: Add helpers to get explicit types for standard layouts

We also need to modify the current size/align helpers to not blow up
when they encounter an explicitly laid out type.  Previously we
considered using the size/align helpers mutually exclusive with standard
layouts but now we just assert that they match.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agocompiler/types: Add a C wrapper to get full struct field data
Jason Ekstrand [Mon, 11 Mar 2019 02:43:37 +0000 (21:43 -0500)]
compiler/types: Add a C wrapper to get full struct field data

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agocompiler/types: Add a new is_interface C wrapper
Jason Ekstrand [Sat, 9 Mar 2019 16:22:39 +0000 (10:22 -0600)]
compiler/types: Add a new is_interface C wrapper

Reviewed-by: Alejandro PiƱeiro <apinheiro@igalia.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agonir/validate: Allow 32-bit boolean load/store intrinsics
Jason Ekstrand [Sat, 9 Mar 2019 21:05:25 +0000 (15:05 -0600)]
nir/validate: Allow 32-bit boolean load/store intrinsics

With UBOs and SSBOs we have boolean types but they're actually 32-bit
values.  Make the validator a little less strict so that we can do a
32-bit load/store on boolean types.  We're about to add a lowering pass
called gl_nir_lower_buffers which will lower boolean load/store
operations to 32-bit and insert i2b and b2i instructions to convert
to/from 1-bit booleans.  We want that to be legal.

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agonir/validate: Only require bare types to match for copy_deref
Jason Ekstrand [Sat, 9 Mar 2019 19:06:28 +0000 (13:06 -0600)]
nir/validate: Only require bare types to match for copy_deref

If we want to be able to use copy_deref instructions on explicitly laid
out types, we have to be a little more flexible about what types we
allow.  Instead, of requiring the types to exactly match, only require
the bare types to match.

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agonir/algebraic: Add a couple optimizations for iabs and ishr
Jason Ekstrand [Sun, 10 Mar 2019 15:06:56 +0000 (10:06 -0500)]
nir/algebraic: Add a couple optimizations for iabs and ishr

Shader-db results on Kaby Lake:

    total instructions in shared programs: 15225213 -> 15222365 (-0.02%)
    instructions in affected programs: 43524 -> 40676 (-6.54%)
    helped: 203
    HURT: 0

Lots of shaders in Shadow Warrior had this pattern along with Deus Ex,
Civ, Shadow of Mordor, and several others.

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agomesa/st: Fix leaks of TGSI tokens in VP variants.
Eric Anholt [Tue, 12 Mar 2019 22:18:43 +0000 (15:18 -0700)]
mesa/st: Fix leaks of TGSI tokens in VP variants.

Starting a glxgears and closing it, I was seeing a lot of leaked TGSI for
the fixed function VPs.

v2: drop unused delete_ir() arg.

Fixes: 3b4929ec6e64 ("st/mesa: Copy VP TGSI tokens if they exist, even for NIR shaders.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agomesa/st: Make sure that prog_to_nir NIR gets freed.
Eric Anholt [Wed, 13 Mar 2019 00:07:16 +0000 (17:07 -0700)]
mesa/st: Make sure that prog_to_nir NIR gets freed.

GLSL NIR gets freed on relink by _mesa_delete_program(), but for ARB
programs we need to free the old NIR when PSN is used to set up new NIR in
the same gl_program.  Additionally, set the base .nir field so that it
will get freed by _mesa_delete_program().

Fixes: 3d7611e9a6c6 ("st/nir: use NIR for asm programs")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agopanfrost/midgard: Implement fpow
Alyssa Rosenzweig [Wed, 13 Mar 2019 05:01:43 +0000 (05:01 +0000)]
panfrost/midgard: Implement fpow

We have a native op for this, which was just found in a disassembly --
so instead of lowering, use it!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Compute viewport state on the fly
Alyssa Rosenzweig [Wed, 13 Mar 2019 01:50:40 +0000 (01:50 +0000)]
panfrost: Compute viewport state on the fly

Previously, we were caching this incorrectly; there's no real reason to
given how variable it is (sensitive to changes in viewport, framebuffer
dimensions, and scissors) and how cheap it is to recompute. So, just do
it on the fly each draw.

Fixes glmark-es2 -bshadow and -brefract.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost; Disable AFBC for depth buffers
Alyssa Rosenzweig [Wed, 13 Mar 2019 01:31:30 +0000 (01:31 +0000)]
panfrost; Disable AFBC for depth buffers

For inexplicable reasons, the depth buffer is faster if kept as linear,
whereas the colour buffers are faster if AFBC. Given both code paths are
available, we'll choose the faster one of each (which also helps with
testing coverage).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Allocate extra data for depth buffer
Alyssa Rosenzweig [Wed, 13 Mar 2019 00:53:34 +0000 (00:53 +0000)]
panfrost: Allocate extra data for depth buffer

It's not clear why the hardware "spills" a little bit, but if we don't
do this, we get MMU faults with linear depth buffers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Comment spelling fix
Alyssa Rosenzweig [Wed, 13 Mar 2019 00:53:18 +0000 (00:53 +0000)]
panfrost: Comment spelling fix

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/mfbd: Respect per-job depth write flag
Alyssa Rosenzweig [Tue, 12 Mar 2019 23:16:37 +0000 (23:16 +0000)]
panfrost/mfbd: Respect per-job depth write flag

While a depth buffer may be supplied, it only needs to be written to if
the depth writemask is set for any draw AND if the depth buffer is not
immediately invalidated (as is the case for scanout). This refactors
panfrost_job to provide a depth write requirement, which is now
implemented for MFBD depth buffers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost/mfbd: Implement linear depth buffers
Alyssa Rosenzweig [Tue, 12 Mar 2019 22:49:33 +0000 (22:49 +0000)]
panfrost/mfbd: Implement linear depth buffers

This removes a clunky hack where the depth buffer was enabled during the
*clear*, instead of during depth buffer linking. That said, this does
not yet support writeback like AFBC depth buffers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Minor comment cleanup (version detection)
Alyssa Rosenzweig [Tue, 12 Mar 2019 22:42:16 +0000 (22:42 +0000)]
panfrost: Minor comment cleanup (version detection)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Remove staging MFBD
Alyssa Rosenzweig [Tue, 12 Mar 2019 22:41:11 +0000 (22:41 +0000)]
panfrost: Remove staging MFBD

Same idea as the previous commit, but for the MFBD this time instead of
the SFBD.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Remove staging SFBD for pan_context
Alyssa Rosenzweig [Tue, 12 Mar 2019 22:01:23 +0000 (22:01 +0000)]
panfrost: Remove staging SFBD for pan_context

The fragment framebuffer descriptor should not be a context entry;
rather, it should be constructed only at fragment time to keep analysis
tractable.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agopanfrost: Break out fragment to SFBD/MFBD files
Alyssa Rosenzweig [Tue, 12 Mar 2019 03:32:17 +0000 (03:32 +0000)]
panfrost: Break out fragment to SFBD/MFBD files

This substantially cleans up the corresponding logic at the expense of a
bit of code duplication; nevertheless, it's a net win since otherwise
incompatible hardware code is mixed confusingly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
5 years agofreedreno: Use shared drm_find_modifier util
Alyssa Rosenzweig [Thu, 14 Mar 2019 04:14:37 +0000 (04:14 +0000)]
freedreno: Use shared drm_find_modifier util

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agovc4: Use shared drm_find_modifier util
Alyssa Rosenzweig [Thu, 14 Mar 2019 04:16:07 +0000 (04:16 +0000)]
vc4: Use shared drm_find_modifier util

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agov3d: Use shared drm_find_modifier util
Alyssa Rosenzweig [Thu, 14 Mar 2019 04:15:20 +0000 (04:15 +0000)]
v3d: Use shared drm_find_modifier util

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoutil: Add a drm_find_modifier helper
Alyssa Rosenzweig [Thu, 14 Mar 2019 04:13:45 +0000 (04:13 +0000)]
util: Add a drm_find_modifier helper

This function is replicated across vc4/v3d/freedreno and is needed in
Panfrost; let's make this shared code.

v2: Supply generic util_array_contains_u64 version (Eric Engestrom). Add
missing stdbool.h include (Eric Anholt). Mark inline (Christian
Gmeiner).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agomesa: add logging function for formatted string
Mark Janes [Fri, 7 Dec 2018 00:35:44 +0000 (16:35 -0800)]
mesa: add logging function for formatted string

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
5 years agomesa: rename logging functions to reflect that they format strings
Mark Janes [Fri, 7 Dec 2018 00:35:43 +0000 (16:35 -0800)]
mesa: rename logging functions to reflect that they format strings

In preparation for the definition of a function to log a formatted
string.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
5 years agomesa: properly report the length of truncated log messages
Mark Janes [Fri, 7 Dec 2018 00:35:42 +0000 (16:35 -0800)]
mesa: properly report the length of truncated log messages

_mesa_log_msg must provide the length of the string passed into the
KHR_debug api.  When the string formatted by _mesa_gl_vdebugf exceeds
MAX_DEBUG_MESSAGE_LENGTH, the length is incorrectly set to the number
of characters that would have been written if enough space had been
available.

Fixes: 30256805784450b8bb9d4dabfb56226271ca9d24
       ("mesa: Add support for GL_ARB_debug_output with dynamic ID allocation.")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
5 years agoanv: Only set 3DSTATE_PS::VectorMaskEnable on gen8+
Jason Ekstrand [Wed, 13 Mar 2019 22:27:39 +0000 (17:27 -0500)]
anv: Only set 3DSTATE_PS::VectorMaskEnable on gen8+

We don't set it on HSW and earlier in i965 and disabling it appears to
make derivatives somewhat more reliable.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agotravis: fix osx meson build
Eric Engestrom [Thu, 14 Mar 2019 12:30:15 +0000 (12:30 +0000)]
travis: fix osx meson build

5 years agoradv: always initialize HTILE when the src layout is UNDEFINED
Samuel Pitoiset [Thu, 14 Mar 2019 13:27:03 +0000 (14:27 +0100)]
radv: always initialize HTILE when the src layout is UNDEFINED

HTILE should always be initialized when transitioning from
VK_IMAGE_LAYOUT_UNDEFINED to other image layouts. Otherwise,
if an app does a transition from UNDEFINED to GENERAL, the
driver doesn't initialize HTILE and it tries to decompress
the depth surface. For some reasons, this results in VM faults.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107563
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agopanfrost: Adapt to uapi changes
Tomeu Vizoso [Thu, 14 Mar 2019 14:20:50 +0000 (15:20 +0100)]
panfrost: Adapt to uapi changes

Two ioctls had wrong DRM_IO* flags.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
5 years agoi965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9
Plamena Manolova [Tue, 12 Mar 2019 19:25:36 +0000 (21:25 +0200)]
i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9

ARB_fragment_shader_interlock depends on memory fences to
ensure fragment ordering and this ordering guarantee is
only supported from GEN9 onwards.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109980
Fixes: 939312702e35 "i965: Add ARB_fragment_shader_interlock support."
Signed-off-by: Plamena Manolova <plamena.n.manolova@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoiris: Don't mutate box in transfer map code
Kenneth Graunke [Wed, 13 Mar 2019 22:35:28 +0000 (15:35 -0700)]
iris: Don't mutate box in transfer map code

Not mutating the boxes is arguably cleaner.

Split from a patch by Chris Wilson but reworked to use a pointer to the
original box rather than making a copy at all.