Eric Botcazou [Tue, 14 Oct 2014 21:04:05 +0000 (21:04 +0000)]
re PR ada/62019 (gnat.dg/weak2.adb fails everywhere)
PR ada/62019
* tree-eh.c (tree_could_trap) <FUNCTION_DECL>: Revamp and really
do not choke on null node.
<VAR_DECL>: Likewise.
From-SVN: r216223
DJ Delorie [Tue, 14 Oct 2014 20:53:29 +0000 (16:53 -0400)]
More missed bits from the big __intN patch
From-SVN: r216222
DJ Delorie [Tue, 14 Oct 2014 20:01:39 +0000 (16:01 -0400)]
Missed bit of previous commit.
From-SVN: r216221
DJ Delorie [Tue, 14 Oct 2014 19:44:36 +0000 (15:44 -0400)]
machmode.h (int_n_data_t): New.
* machmode.h (int_n_data_t): New.
(int_n_enabled_p): New.
(int_n_data): New.
* tree.c (int_n_enabled_p): New.
(int_n_trees): New.
(make_or_reuse_type): Check for all __intN types, not just
__int128.
(build_common_tree_nodes): Likewise. Also fill in integer_typs[]
entries.
* tree.h (int128_integer_type_node): Remove.
(int128_unsigned_type_node): Remove.
(int_n_trees_t): New.
(int_n_enabled_p): New.
(int_n_trees): New.
* toplev.c (standard_type_bitsize): New.
(do_compile): Check which __intN types are enabled for the current
run.
* builtin-types.def (BT_INT128): Remove.
(BT_UINT128): Remove.
* machmode.def: Add macro to create __int128 for all targets.
* stor-layout.c (mode_for_size): Support __intN types.
(smallest_mode_for_size): Likewise.
(initialize_sizetypes): Support __intN types.
* genmodes.c (struct mode_data): Add int_n field.
(blank_mode): Likewise.
(INT_N): New.
(make_int_n): New.
(emit_insn_modes_h): Count __intN entries and define
NUM_INT_N_ENTS.
(emit_mode_int_n): New.
(emit_insn_modes_c): Call it.
* gimple.c (gimple_signed_or_unsigned_type): Check for all __intN
types, not just __int128.
* tree-core.h (integer_type_kind): Remove __int128-specific
entries, reserve spots for __intN entries.
libstdc++-v3/
* src/c++11/limits.cc: Add support for __intN types.
* include/std/type_traits: Likewise.
* include/std/limits: Likewise.
* include/c_std/cstdlib: Likewise.
* include/bits/cpp_type_traits.h: Likewise.
* include/c_global/cstdlib: Likewise.
c-family/
* c-pretty-print.c (pp_c_integer_constant): Check for all __intN
types, not just __int128.
* c-cppbuiltin.c (c_cpp_builtins): Add builtins for all __intN
types, not just __int128.
(cpp_atomic_builtins): Round pointer sizes up.
(type_suffix): Use type precision, not specific types.
* c-common.c (c_common_reswords): Remove __int128 special case.
(c_common_type_for_size): Check for all __intN types, not just
__int128.
(c_common_type_for_mode): Likewise.
(c_common_signed_or_unsigned_type): Likewise.
(c_build_bitfield_integer_type): Likewise.
(c_common_nodes_and_builtins): Likewise.
(keyword_begins_type_specifier): Likewise.
* c-common.h (rid): Remove RID_INT128 and add RID_INT_N_* for all
__intN variants.
c/
* c-parser.c (c_parse_init): Add RID entries for each __intN.
(c_token_starts_typename): Check all __intN, not just __int128.
(c_token_starts_declspecs): Likewise.
(c_parser_declspecs): Likewise.
(c_parser_attribute_any_word): Likewise.
(c_parser_objc_selector): Likewise.
* c-tree.h (c_typespec_keyword): cts_int128 -> cts_int_n.
(struct c_declspecs): Add int_n_idx field to record *which* __intN
is specified.
* c-decl.c (declspecs_add_type): Check for all __intN, not just
__int128.
(finish_declspecs): Likewise.
testsuite/
* g++.dg/abi/mangle64.C: New.
cp/
* typeck.c (cp_common_type): Check for all __intN types, not just
__int128.
* decl.c (grokdeclarator): Likewise.
* rtti.c (emit_support_tinfos): Check for all __intN types, not just
__int128.
* parser.c (cp_lexer_next_token_is_decl_specifier_keyword): Check
for all __intN types, not just __int128.
(cp_parser_simple_type_specifier): Likewise.
* mangle.c (integer_type_codes): Remove int128-specific codes.
* cp-tree.h (cp_decl_specifier_seq): Add int_n_idx to store which
__intN was specified.
* lex.c (init_reswords): Reserve all __intN keywords.
lto/
* lto-lang.c (lto_build_c_type_nodes): Check intN types for
size-type as well.
(lto_init): Initialize all intN types, not just int128.
From-SVN: r216220
Kito Cheng [Tue, 14 Oct 2014 19:13:33 +0000 (19:13 +0000)]
ira.c: Fix typo in comment.
2014-10-14 Kito Cheng <kito@0xlab.org>
* ira.c: Fix typo in comment.
* ira.h: Ditto.
* ira-build.c: Ditto.
* ira-color.c: Ditto.
* ira-emit.c: Ditto.
* ira-int.h: Ditto.
* ira-lives.c: Ditto.
From-SVN: r216218
Uros Bizjak [Tue, 14 Oct 2014 18:40:59 +0000 (20:40 +0200)]
re PR rtl-optimization/63475 (Postreload CSE propagates aliased memory operand)
PR rtl-optimization/63475
* alias.c (true_dependence_1): Always use get_addr to extract
true address operands from x_addr and mem_addr. Use extracted
address operands to check for references with alignment ANDs.
Use extracted address operands with find_base_term and
base_alias_check. For noncanonicalized operands call canon_rtx with
extracted address operand.
(write_dependence_1): Ditto.
(may_alias_p): Ditto. Remove unused calls to canon_rtx.
From-SVN: r216217
Joel Brobecker [Tue, 14 Oct 2014 17:57:08 +0000 (17:57 +0000)]
Use strtod instead of strtold in libiberty/d-demangle.c
strtold is currently used to decode templates which have a floating-point
value encoded inside; but this routine is not available on some systems,
such as Solaris 2.9 for instance.
This patch fixes the issue by replace the use of strtold by strtod.
It reduces a bit the precision, but it should still remain acceptable
in most cases.
libiberty/ChangeLog:
* d-demangle.c: Replace strtold with strtod in global comment.
(strtold): Remove declaration.
(strtod): New declaration.
(dlang_parse_real): Declare value as double instead of long
double. Replace call to strtold by call to strtod.
Update format in call to snprintf.
From-SVN: r216216
Jonathan Wakely [Tue, 14 Oct 2014 17:24:38 +0000 (18:24 +0100)]
intro.xml: Update.
* doc/xml/manual/intro.xml: Update.
* doc/xml/manual/status_cxx2011.xml: Update.
* doc/html/manual/*: Regenerate.
From-SVN: r216215
Jonathan Wakely [Tue, 14 Oct 2014 17:14:07 +0000 (18:14 +0100)]
1.cc: Add dg-require-stdint.
* testsuite/20_util/align/1.cc: Add dg-require-stdint.
* testsuite/20_util/align/2.cc: Likewise.
From-SVN: r216214
Rüdiger Sonderfeld [Tue, 14 Oct 2014 17:01:25 +0000 (17:01 +0000)]
re PR libstdc++/54354 (TODO extended iomanip manipulators std::get_time and std::put_time (C++11, section 27.7.5))
2014-10-14 Rüdiger Sonderfeld <ruediger@c-plusplus.de>
PR libstdc++/54354
* include/std/iomanip (_Put_time): New struct.
(put_time): New manipulator.
(operator<<): New overloaded function.
* testsuite/27_io/manipulators/extended/put_time/char/1.cc: New.
* testsuite/27_io/manipulators/extended/put_time/char/2.cc: New.
* testsuite/27_io/manipulators/extended/put_time/wchar_t/1.cc: New.
* testsuite/27_io/manipulators/extended/put_time/wchar_t/2.cc: New.
From-SVN: r216211
Kai Tietz [Tue, 14 Oct 2014 16:58:37 +0000 (18:58 +0200)]
re PR libstdc++/57440 (Memory usage with future and std containers)
2014-10-14 Kai Tietz <ktietz@redhat.com>
PR libstdc++/57440
* config/os/mingw32/os_defines.h (_GTHREAD_USE_MUTEX_INIT_FUNC):
Define to avoid leak.
* config/os/mingw32-w64/os_defines.h: Likewise.
From-SVN: r216210
Evgeny Stupachenko [Tue, 14 Oct 2014 16:26:57 +0000 (16:26 +0000)]
re PR target/63534 (Bootstrap failure on x86_64/i686-linux)
PR target/63534
gcc/
* config/i386/i386.c (ix86_expand_split_stack_prologue): Make
__morestack local.
From-SVN: r216208
Jakub Jelinek [Tue, 14 Oct 2014 15:56:52 +0000 (17:56 +0200)]
Makefile.am (DEFS): Add -DPIC.
* ubsan/Makefile.am (DEFS): Add -DPIC.
* ubsan/Makefile.in: Regenerated.
From-SVN: r216206
Manuel López-Ibáñez [Tue, 14 Oct 2014 14:45:36 +0000 (14:45 +0000)]
line-map.h (linemap_location_from_macro_expansion_p): const struct line_maps * argument.
libcpp/ChangeLog:
2014-10-14 Manuel López-Ibáñez <manu@gcc.gnu.org>
* include/line-map.h (linemap_location_from_macro_expansion_p):
const struct line_maps * argument.
(linemap_position_for_line_and_column): const struct line_map *
argument.
* line-map.c (linemap_add_macro_token): Use correct argument name
in comment.
(linemap_position_for_line_and_column): const struct line_map *
argument.
(linemap_macro_map_loc_to_def_point): Fix comment. Make static.
(linemap_location_from_macro_expansion_p): const struct line_maps *
argument.
(linemap_resolve_location): Fix argument names in comment.
From-SVN: r216205
Marc Glisse [Tue, 14 Oct 2014 13:40:36 +0000 (15:40 +0200)]
typeck.c (cp_build_unary_op): Accept float vectors.
2014-10-14 Marc Glisse <marc.glisse@inria.fr>
gcc/cp/
* typeck.c (cp_build_unary_op) [TRUTH_NOT_EXPR]: Accept float vectors.
gcc/testsuite/
* g++.dg/ext/vector9.C: Test ! with float vectors.
From-SVN: r216201
Alexander Ivchenko [Tue, 14 Oct 2014 08:56:56 +0000 (08:56 +0000)]
AVX-512. 77/n. Use blend for cond-set V32HI and V64QI.
gcc/
* config/i386/i386.c
(ix86_expand_sse_movcc): Handle V64QI and V32HI mode.
(ix86_expand_int_vcond): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216193
Alexander Ivchenko [Tue, 14 Oct 2014 08:52:11 +0000 (08:52 +0000)]
AVX-512. 74/n. Add byte/word max/mix reduction.
gcc/
* config/i386/i386.c
(emit_reduc_half): Handle V64QI and V32HI mode.
* config/i386/sse.md
(define_mode_iterator VI_AVX512BW): New.
(define_expand "reduc_<code>_<mode>"): Use VI512_48F_12BW.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216192
Alexander Ivchenko [Tue, 14 Oct 2014 08:50:43 +0000 (08:50 +0000)]
AVX-512. 73/n. Extend reduc min/max autogen.
gcc/
* config/i386/sse.md
(define_mode_iterator REDUC_SMINMAX_MODE): Add V64QI and V32HI modes.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216191
Alexander Ivchenko [Tue, 14 Oct 2014 08:49:23 +0000 (08:49 +0000)]
AVX-512. 72/n. Extend VI itterator.
gcc/
* config/i386/i386.c
(ix86_expand_vector_logical_operator): Handle V16SF and V8DF modes.
* config/i386/sse.md
(define_mode_iterator VI): Add V64QI and V32HI modes.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216190
Alexander Ivchenko [Tue, 14 Oct 2014 08:47:55 +0000 (08:47 +0000)]
AVX-512. 71/n. Remove redudant iterator attribute.
gcc/
* config/i386/sse.md (define_mode_attr avx2_avx512f): Remove.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216189
Paolo Carlini [Tue, 14 Oct 2014 08:45:38 +0000 (08:45 +0000)]
typedefs.cc: Rename to alias_decl.cc.
2014-10-14 Paolo Carlini <paolo.carlini@oracle.com>
* testsuite/20_util/add_lvalue_reference/requirements/typedefs.cc:
Rename to alias_decl.cc.
* testsuite/20_util/add_rvalue_reference/requirements/typedefs.cc:
Likewise.
* testsuite/20_util/common_type/requirements/typedefs-3.cc: Likewise.
* testsuite/20_util/conditional/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/decay/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/enable_if/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/make_signed/requirements/typedefs-3.cc: Likewise.
* testsuite/20_util/make_unsigned/requirements/typedefs-3.cc:
Likewise.
* testsuite/20_util/remove_reference/requirements/typedefs.cc:
Likewise.
* testsuite/20_util/result_of/requirements/typedefs.cc: Likewise.
* testsuite/20_util/underlying_type/requirements/typedefs-3.cc:
Likewise.
From-SVN: r216188
Alexander Ivchenko [Tue, 14 Oct 2014 08:45:17 +0000 (08:45 +0000)]
AVX-512. 70/n. Add vpmaxmin.
gcc/
* config/i386/sse.md
(define_insn "*sse4_1_<code><mode>3<mask_name>"): Add masking.
(define_insn "*sse4_1_<code><mode>3<mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216187
Alexander Ivchenko [Tue, 14 Oct 2014 08:42:02 +0000 (08:42 +0000)]
AVX-512. 69/n. Add vpmulhrsw insn support.
gcc/
* config/i386/sse.md
(define_insn "avx512bw_umulhrswv32hi3<mask_name>"): New.
(define_expand "<ssse3_avx2>_pmulhrsw<mode>3_mask"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216186
Alexander Ivchenko [Tue, 14 Oct 2014 08:40:34 +0000 (08:40 +0000)]
AVX-512. 68/n. Add vpmullw, vpacksdw, pmaddwd insn.
gcc/
* config/i386/sse.md
(define_c_enum "unspec"): Add UNSPEC_PMADDWD512.
(define_mode_iterator VI2_AVX2): Add V32HI mode.
(define_expand "mul<mode>3<mask_name>"): Add masking.
(define_insn "*mul<mode>3<mask_name>"): Ditto.
(define_expand "<s>mul<mode>3_highpart<mask_name>"): Ditto.
(define_insn "*<s>mul<mode>3_highpart<mask_name>"): Ditto.
(define_insn "avx512bw_pmaddwd512<mode><mask_name>"): New.
(define_mode_attr SDOT_PMADD_SUF): Ditto.
(define_expand "sdot_prod<mode>"): Add <SDOT_PMADD_SUF>.
(define_insn "<sse2_avx2>_packssdw<mask_name>"): Add masking.
(define_insn "*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>"): Ditto.
(define_insn "avx2_packusdw"): Delete.
(define_insn "sse4_1_packusdw"): Ditto.
(define_insn "<sse4_1_avx2>_packusdw<mask_name>"): New.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216185
Alexander Ivchenko [Tue, 14 Oct 2014 08:38:47 +0000 (08:38 +0000)]
AVX-512. 67/n. Update constraints in vec_dup insn.
gcc/
* config/i386/sse.md
(define_insn "vec_dup<mode>"): Update constraints.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216184
Alexander Ivchenko [Tue, 14 Oct 2014 08:35:12 +0000 (08:35 +0000)]
AVX-512. 66/n. Extend vpalignr insn patterns.
gcc/
* config/i386/sse.md
(define_mode_iterator SSESCALARMODE): Add V4TI mode.
(define_insn "<ssse3_avx2>_palignr<mode>_mask"): New.
(define_insn "<ssse3_avx2>_palignr<mode>"): Add EVEX version.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216183
Alexander Ivchenko [Tue, 14 Oct 2014 08:33:01 +0000 (08:33 +0000)]
AVX-512. 65/n. Add rest of VI1-AVX2: mul insn pattern.
gcc/
* config/i386/sse.md
(define_expand "mul<mode>3<mask_name>"): Add masking.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216182
Alexander Ivchenko [Tue, 14 Oct 2014 08:28:33 +0000 (08:28 +0000)]
AVX-512. 64/n. Add rest of VI1-AVX2: vpack[us]wb.
gcc/
* config/i386/sse.md
(define_insn "<sse2_avx2>_packsswb<mask_name>"): Add masking.
(define_insn "<sse2_avx2>_packuswb<mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216181
Alexander Ivchenko [Tue, 14 Oct 2014 08:26:09 +0000 (08:26 +0000)]
AVX-512. 62/n. Add vpmaddubsw,vdbpsadbw insn patterns.
gcc/
* config/i386/sse.md
(define_c_enum "unspec"): Add UNSPEC_DBPSADBW, UNSPEC_PMADDUBSW512.
(define_insn "avx512bw_pmaddubsw512<mode><mask_name>"): New.
(define_insn "<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>"):
Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216180
Alexander Ivchenko [Tue, 14 Oct 2014 08:20:43 +0000 (08:20 +0000)]
AVX-512. 61/n. Update FP logic insn patterns.
gcc/
* config/i386/sse.md
(define_insn "<sse>_andnot<VF_128_256:mode>3<mask_name>"): Add masking,
use VF_128_256 mode iterator and update assembler emit code.
(define_insn "<sse>_andnot<VF_512:mode>3<mask_name>"): New.
(define_expand "<any_logic:code><VF_128_256:mode>3<mask_name>"):
Add masking, use VF_128_256 mode iterator.
(define_expand "<any_logic:code><VF_512:mode>3<mask_name>"): New.
(define_insn "*<any_logic:code><VF_128_256:mode>3<mask_name>"):
Add masking, use VF_128_256 mode iterator and update assembler emit
code.
(define_insn "*<any_logic:code><VF_512:mode>3<mask_name>"): New.
(define_mode_attr avx512flogicsuff): Delete.
(define_insn "avx512f_<logic><mode>"): Ditto.
(define_insn "*andnot<mode>3<mask_name>"): Update MODE_XI, MODE_OI,
MODE_TI.
(define_insn "<mask_codefor><code><mode>3<mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216179
Alexander Ivchenko [Tue, 14 Oct 2014 08:19:17 +0000 (08:19 +0000)]
AVX-512. 60/n. Update 128bit ashrv insn pattern.
gcc/
* config/i386/sse.md
(define_mode_iterator VI128_128 [V16QI V8HI V2DI]): Delete.
(define_expand "vashr<mode>3<mask_name>"): Add masking,
use VI12_128 mode iterator.
(define_expand "ashrv2di3<mask_name>"): New.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216178
Alexander Ivchenko [Tue, 14 Oct 2014 08:15:32 +0000 (08:15 +0000)]
AVX-512. 59/n. Add vptest[n]m, ucmp, cmpeq insn patterns.
gcc/
* config/i386/i386.c
(ix86_expand_args_builtin): Handle CODE_FOR_avx512vl_cmpv4di3_mask,
CODE_FOR_avx512vl_cmpv8si3_mask, CODE_FOR_avx512vl_ucmpv4di3_mask,
CODE_FOR_avx512vl_ucmpv8si3_mask, CODE_FOR_avx512vl_cmpv2di3_mask,
CODE_FOR_avx512vl_cmpv4si3_mask, CODE_FOR_avx512vl_ucmpv2di3_mask,
CODE_FOR_avx512vl_ucmpv4si3_mask.
* config/i386/sse.md
(define_insn "avx512f_ucmp<mode>3<mask_scalar_merge_name>"): Delete.
"<avx512>_ucmp<VI12_AVX512VL:mode>3<mask_scalar_merge_name>"):New.
(define_insn
"<avx512>_ucmp<VI48_AVX512VL:mode>3<mask_scalar_merge_name>"):Ditto.
(define_expand "<avx512>_eq<mode>3<mask_scalar_merge_name>"): Ditto.
(define_insn "<avx512>_eq<mode>3<mask_scalar_merge_name>_1"): Ditto.
(define_insn "<avx512>_gt<mode>3<mask_scalar_merge_name>"): Ditto.
(define_insn "<avx512>_testm<mode>3<mask_scalar_merge_name>"): Ditto.
(define_insn "<avx512>_testnm<mode>3<mask_scalar_merge_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216177
Alexander Ivchenko [Tue, 14 Oct 2014 08:13:31 +0000 (08:13 +0000)]
AVX-512. 58/n. Add vpmul[u]dq insn patterns.
gcc/
* config/i386/sse.md
(define_expand "vec_widen_umult_even_v8si<mask_name>"): Add masking.
(define_insn "*vec_widen_umult_even_v8si<mask_name>"): Ditto.
(define_expand "vec_widen_umult_even_v4si<mask_name>"): Ditto.
(define_insn "*vec_widen_umult_even_v4si<mask_name>"): Ditto.
(define_expand "vec_widen_smult_even_v8si<mask_name>"): Ditto.
(define_insn "*vec_widen_smult_even_v8si<mask_name>"): Ditto.
(define_expand "sse4_1_mulv2siv2di3<mask_name>"): Ditto.
(define_insn "*sse4_1_mulv2siv2di3<mask_name>"): Ditto.
(define_insn "avx512dq_mul<mode>3<mask_name>"): New.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216176
Alexander Ivchenko [Tue, 14 Oct 2014 08:10:42 +0000 (08:10 +0000)]
AVX-512. 57/n. Extend blend/cmp/brodcast insn patterns.
gcc/
* config/i386/sse.md
(define_insn "avx512f_blendm<mode>"): Delete.
(define_insn "<avx512>_blendm<VI48_AVX512VL:mode>"): New.
(define_insn "<avx512>_blendm<VI12_AVX512VL:mode>"): Ditto..
(define_mode_attr cmp_imm_predicate): Add V8SF, V4DF, V8SI, V4DI, V4SF,
V2DF, V4SI, V2DI, V32HI, V64QI, V16HI, V32QI, V8HI, V16QI modes.
(define_insn
"avx512f_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>"):
Remove.
(define_insn
"<avx512>_cmp<VI48_AVX512VL:mode>3<mask_scalar_merge_name><round_saeonly_name>"):
New.
(define_insn
"<avx512>_cmp<VI12_AVX512VL:mode>3<mask_scalar_merge_name><round_saeonly_name>"):
Ditto.
(define_insn "<mask_codefor>avx512f_vec_dup<mode><mask_name>"): Delete.
(define_insn "<avx512>_vec_dup<V48_AVX512VL:mode><mask_name>"): New.
(define_insn "<avx512>_vec_dup<V12_AVX512VL:mode><mask_name>"): Ditto.
(define_insn "<mask_codefor>avx512f_vec_dup_gpr<mode><mask_name>"):
Delete.
(define_insn
"<mask_codefor><avx512>_vec_dup_gpr<VI48_AVX512VL:mode><mask_name>"):
New.
(define_insn
"<mask_codefor><avx512>_vec_dup_gpr<VI12_AVX512VL:mode><mask_name>"):
Ditto.
(define_insn·"<mask_codefor>avx512f_vec_dup_mem<mode><mask_name>"):
Delete.
(define_insn
"<mask_codefor><avx512>_vec_dup_mem<VI48_AVX512VL:mode><mask_name>"):
New.
(define_insn
"<mask_codefor><avx512>_vec_dup_mem<VI12_AVX512VL:mode><mask_name>"):
Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216175
Richard Biener [Tue, 14 Oct 2014 07:36:02 +0000 (07:36 +0000)]
re PR tree-optimization/63512 (ICE: error: virtual use of statement not up-to-date)
2014-10-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/63512
* tree-ssa-pre.c (create_expression_by_pieces): Mark stmts
modified.
* g++.dg/torture/pr63512.C: New testcase.
From-SVN: r216174
Oleg Endo [Tue, 14 Oct 2014 00:50:18 +0000 (00:50 +0000)]
re PR target/63260 ([SH] fabs, fneg do not need fp-mode setting and do not use fpscr)
gcc/
PR target/63260
* config/sh/sh.md (negsf2, negsf2_i, negdf2, negdf2_i, abssf2,
abssf2_i, absdf2, absdf2_i): Remove fp_mode attribute. Remove use
of FPSCR.
(negsf2_i): Rename to *negsf2_i.
(abssf2_i): Rename to *abssf2_i.
(negdf2_i): Rename to *negdf2_i.
(absdf2_i): Rename to *absdf2_i.
gcc/testsuite/
PR target/63260
* gcc.target/sh/pr63260.c: New.
From-SVN: r216173
GCC Administrator [Tue, 14 Oct 2014 00:16:25 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r216172
Felix Yang [Tue, 14 Oct 2014 00:12:51 +0000 (00:12 +0000)]
ira.c (struct equivalence): Change member "is_arg_equivalence" and "replace" into boolean bitfields...
gcc/
* ira.c (struct equivalence): Change member "is_arg_equivalence" and
"replace" into boolean bitfields; turn member "loop_depth" into a short
integer; add new member "no_equiv" and "reserved".
(no_equiv): Set no_equiv of struct equivalence if register is marked
as having no known equivalence.
(update_equiv_regs): Check all definitions for a multiple-set
register to make sure that the RHS have the same value.
Co-Authored-By: Jeff Law <law@redhat.com>
From-SVN: r216169
Anthony Brandon [Mon, 13 Oct 2014 21:00:55 +0000 (21:00 +0000)]
c-parser.c (c_parser_all_labels): New function to replace the duplicate code.
gcc/c/ChangeLog:
2014-10-13 Anthony Brandon <anthony.brandon@gmail.com>
* c-parser.c (c_parser_all_labels): New function to replace
the duplicate code.
(c_parser_statement): Call the new function.
From-SVN: r216165
Richard Henderson [Mon, 13 Oct 2014 20:20:44 +0000 (13:20 -0700)]
Handle cfa adjustments in csa pass
* combine-stack-adj.c (no_unhandled_cfa): New.
(maybe_merge_cfa_adjust): New.
(combine_stack_adjustments_for_block): Use them.
From-SVN: r216161
Aldy Hernandez [Mon, 13 Oct 2014 19:57:14 +0000 (19:57 +0000)]
* Makefile.in (TAGS): Tag ../include files.
From-SVN: r216160
Ulrich Weigand [Mon, 13 Oct 2014 17:47:20 +0000 (17:47 +0000)]
rs6000.h (DBX_REGISTER_NUMBER): Pass format argument to rs6000_dbx_register_number.
* config/rs6000/rs6000.h (DBX_REGISTER_NUMBER): Pass format argument
to rs6000_dbx_register_number.
(DWARF_FRAME_REGNUM): Redefine as identity map.
(DWARF2_FRAME_REG_OUT): Call rs6000_dbx_register_number.
* config/rs6000/rs6000-protos.h (rs6000_dbx_register_number): Update.
* config/rs6000/rs6000.c (rs6000_dbx_register_number): Add format
argument to handle .debug_frame and .eh_frame directly. Always
translate SPE high register numbers. Add special treatment for CR,
but only in .debug_frame. Respect RS6000_USE_DWARF_NUMBERING.
* config/rs6000/sysv.h (DBX_REGISTER_NUMBER): Do not undefine.
* config/rs6000/freebsd.h (DBX_REGISTER_NUMBER): Remove.
(RS6000_USE_DWARF_NUMBERING): Define.
* config/rs6000/freebsd64.h (DBX_REGISTER_NUMBER): Remove.
(RS6000_USE_DWARF_NUMBERING): Define.
* config/rs6000/netbsd.h (DBX_REGISTER_NUMBER): Remove.
(RS6000_USE_DWARF_NUMBERING): Define.
* config/rs6000/lynx.h (DBX_REGISTER_NUMBER): Remove.
(RS6000_USE_DWARF_NUMBERING): Define.
* config/rs6000/aix.h (RS6000_USE_DWARF_NUMBERING): Define.
* config/rs6000/darwin.h (RS6000_USE_DWARF_NUMBERING): Define.
From-SVN: r216157
Kirill Yukhin [Mon, 13 Oct 2014 17:29:31 +0000 (17:29 +0000)]
Add missing in r216154 test.
From-SVN: r216156
Evgeny Stupachenko [Mon, 13 Oct 2014 17:28:24 +0000 (17:28 +0000)]
i386.c (ix86_address_cost): Lower cost for when address contains GOT register.
gcc/
* config/i386/i386.c (ix86_address_cost): Lower cost for
when address contains GOT register.
From-SVN: r216155
Kirill Yukhin [Mon, 13 Oct 2014 17:26:49 +0000 (17:26 +0000)]
re PR target/8340 (ICE on x86 inline asm w/ -fPIC)
gcc/
PR target/8340
PR middle-end/47602
PR rtl-optimization/55458
* config/i386/i386.c (ix86_use_pseudo_pic_reg): New.
(ix86_init_pic_reg): New.
(ix86_select_alt_pic_regnum): Add check on pseudo register.
(ix86_save_reg): Likewise.
(ix86_expand_prologue): Remove PIC register initialization
now performed in ix86_init_pic_reg.
(ix86_output_function_epilogue): Add check on pseudo register.
(set_pic_reg_ever_alive): New.
(legitimize_pic_address): Replace df_set_regs_ever_live with new
set_pic_reg_ever_alive.
(legitimize_tls_address): Likewise.
(ix86_pic_register_p): New check.
(ix86_delegitimize_address): Add check on pseudo register.
(ix86_expand_call): Insert move from pseudo PIC register to ABI
defined REAL_PIC_OFFSET_TABLE_REGNUM.
(TARGET_INIT_PIC_REG): New.
(TARGET_USE_PSEUDO_PIC_REG): New.
* config/i386/i386.h (PIC_OFFSET_TABLE_REGNUM): Return INVALID_REGNUM
if pic_offset_table_rtx exists.
* doc/tm.texi.in (TARGET_USE_PSEUDO_PIC_REG, TARGET_INIT_PIC_REG):
Document.
* doc/tm.texi: Regenerate.
* function.c (assign_parms): Generate pseudo register for PIC.
* init-regs.c (initialize_uninitialized_regs): Ignor pseudo PIC
register.
* ira-color.c (color_pass): Add check on pseudo register.
* ira-emit.c (change_loop): Don't create copies for PIC pseudo
register.
* ira.c (split_live_ranges_for_shrink_wrap): Add check on pseudo
register.
(ira): Add target specific PIC register initialization.
(do_reload): Keep PIC pseudo register.
* lra-assigns.c (spill_for): Add checks on pseudo register.
* lra-constraints.c (contains_symbol_ref_p): New.
(lra_constraints): Enable lra risky transformations when PIC is pseudo
register.
* shrink-wrap.c (try_shrink_wrapping): Add check on pseudo register.
* target.def (use_pseudo_pic_reg): New.
(init_pic_reg): New.
gcc/testsuite/
PR target/8340
PR middle-end/47602
PR rtl-optimization/55458
* gcc.target/i386/pic-1.c: Remove dg-error as test should pass now.
* gcc.target/i386/pr55458.c: Likewise.
* gcc.target/i386/pr47602.c: New.
* gcc.target/i386/pr23098.c: Move to XFAIL.
From-SVN: r216154
Evgeny Stupachenko [Mon, 13 Oct 2014 17:22:32 +0000 (17:22 +0000)]
x86-tune.def (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Remove m_SILVERMONT and m_INTEL from the tune.
gcc/
* config/i386/x86-tune.def (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY):
Remove m_SILVERMONT and m_INTEL from the tune.
From-SVN: r216153
John David Anglin [Mon, 13 Oct 2014 17:02:35 +0000 (17:02 +0000)]
re PR libfortran/63471 (unix.c:1906:10: error: implicit declaration of function 'ttyname_r')
PR libfortran/63471
* config/pa/pa-hpux11.h (TARGET_OS_CPP_BUILTINS): Define _REENTRANT
when _HPUX_SOURCE is defined.
From-SVN: r216152
H.J. Lu [Mon, 13 Oct 2014 16:01:40 +0000 (16:01 +0000)]
Cast size and elements to long for %l
* mangle.c (mangle_conv_op_name_for_type): Cast elements to
unsigned long.
(print_template_statistics): Cast size and elements to long.
From-SVN: r216151
Jan Hubicka [Mon, 13 Oct 2014 14:43:24 +0000 (16:43 +0200)]
re PR c++/62127 (ICE with VLA in constructor)
PR tree-optimization/62127
* g++.dg/torture/pr62127.C: New testcase.
* tree.c (remap_type_1): When remapping array, remap
also its type.
From-SVN: r216150
Jonathan Wakely [Mon, 13 Oct 2014 14:08:44 +0000 (15:08 +0100)]
re PR libstdc++/57350 (std::align missing)
PR libstdc++/57350
* include/std/memory (align): Do not adjust correctly aligned address.
* testsuite/20_util/align/2.cc: New.
From-SVN: r216149
Christophe Lyon [Mon, 13 Oct 2014 14:01:19 +0000 (16:01 +0200)]
Update ChangeLog for previous commit.
From-SVN: r216148
Christophe Lyon [Mon, 13 Oct 2014 13:56:34 +0000 (15:56 +0200)]
Makefile.in: (check-%): Update comment, as RUNTESTFLAGS no longer impact parallelization.
2014-10-13 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* Makefile.in: (check-%): Update comment, as RUNTESTFLAGS no
longer impact parallelization.
From-SVN: r216147
Jan Hubicka [Mon, 13 Oct 2014 12:44:00 +0000 (14:44 +0200)]
re PR bootstrap/63496 (../../gcc/ipa-polymorphic-call.c:2117:1: error: assuming signed overflow does not occur when assuming that (X + c) < X is always false [-Werror=strict-overflow])
PR bootstrap/63496
* ipa-polymorphic-call.c (extr_type_from_vtbl_ptr_store): Fix pasto.
From-SVN: r216146
Siva Chandra Reddy [Mon, 13 Oct 2014 11:23:10 +0000 (11:23 +0000)]
xmethods.py: Add xmethods for std::array, std::deque, std::forward_list, std::list, std::vector.
2014-10-13 Siva Chandra Reddy <sivachandra@google.com>
* python/libstdcxx/v6/xmethods.py: Add xmethods for std::array,
std::deque, std::forward_list, std::list, std::vector.
* testsuite/libstdc++-xmethods/array.cc: New file.
* testsuite/libstdc++-xmethods/deque.cc: Likewise.
* testsuite/libstdc++-xmethods/forwardlist.cc: Likewise.
* testsuite/libstdc++-xmethods/list.cc: Likewise.
* testsuite/libstdc++-xmethods/vector.cc: Add tests.
From-SVN: r216145
Marat Zakirov [Mon, 13 Oct 2014 10:44:45 +0000 (10:44 +0000)]
asan.c (instrument_derefs): BIT_FIELD_REF added.
gcc/ChangeLog:
2014-09-19 Marat Zakirov <m.zakirov@samsung.com>
* asan.c (instrument_derefs): BIT_FIELD_REF added.
gcc/testsuite/ChangeLog:
2014-09-19 Marat Zakirov <m.zakirov@samsung.com>
* c-c++-common/asan/bitfield-5.c: New test.
From-SVN: r216144
Rüdiger Sonderfeld [Mon, 13 Oct 2014 10:05:21 +0000 (10:05 +0000)]
memory (align): Define.
2014-10-13 Rüdiger Sonderfeld <ruediger@c-plusplus.de>
* include/std/memory (align): Define.
* testsuite/20_util/align/1.cc: New.
From-SVN: r216143
Marc Glisse [Mon, 13 Oct 2014 10:00:27 +0000 (12:00 +0200)]
re PR libstdc++/61347 (std::distance(list.first(),list.end()) in O(1))
2014-10-13 Marc Glisse <marc.glisse@inria.fr>
PR libstdc++/61347
PR libstdc++/63345
* include/bits/list.tcc (_List_base::_M_clear()): Delay cast so it
isn't done for the sentinel.
* include/bits/stl_list.h (_List_base::_M_size): Move...
(_List_base::_List_impl::_M_node): ... here.
(_List_base::_M_get_size(), _List_base::_M_set_size(size_t),
_List_base::_M_inc_size(size_t), _List_base::_M_dec_size(size_t),
_List_base::_M_node_count): Adapt to the move.
* 23_containers/list/requirements/dr438/assign_neg.cc: Update
line number.
* 23_containers/list/requirements/dr438/constructor_1_neg.cc: Likewise.
* 23_containers/list/requirements/dr438/constructor_2_neg.cc: Likewise.
* 23_containers/list/requirements/dr438/insert_neg.cc: Likewise.
From-SVN: r216142
Eric Botcazou [Mon, 13 Oct 2014 08:19:45 +0000 (08:19 +0000)]
re PR ada/63225 (ada bootstrap failure when -fno-inline in STAGE1_CFLAGS)
PR ada/63225
* uintp.adb (Vector_To_Uint): Move from here to...
* uintp.ads (UI_Vector): Make public.
(Vector_To_Uint): ...here.
Co-Authored-By: Alan Modra <amodra@gmail.com>
From-SVN: r216139
Richard Biener [Mon, 13 Oct 2014 07:58:05 +0000 (07:58 +0000)]
re PR c++/63419 (verify_gimple failed: "vector CONSTRUCTOR element is not a GIMPLE value")
2014-10-13 Richard Biener <rguenther@suse.de>
PR tree-optimization/63419
* gimple-fold.h (gimple_convert): New function.
* gimple-fold.c (gimple_convert): Likewise.
* tree-ssa-pre.c (create_expression_by_pieces): Use gimple_convert
to split out required conversions early.
* g++.dg/torture/pr63419.C: New testcase.
From-SVN: r216138
Richard Sandiford [Mon, 13 Oct 2014 07:05:46 +0000 (07:05 +0000)]
rtlanal.c (generic_subrtx_iterator <T>::add_subrtxes_to_queue): Add the parts of an insn in reverse order, with the pattern at the top of the queue.
gcc/
* rtlanal.c (generic_subrtx_iterator <T>::add_subrtxes_to_queue):
Add the parts of an insn in reverse order, with the pattern at
the top of the queue. Detect when we're iterating over a SEQUENCE
pattern and in that case just consider patterns of subinstructions.
From-SVN: r216137
GCC Administrator [Mon, 13 Oct 2014 00:16:27 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r216131
Oleg Endo [Sun, 12 Oct 2014 23:14:07 +0000 (23:14 +0000)]
re PR target/59401 ([SH] GBR addressing mode optimization produces wrong code)
gcc/
PR target/59401
* config/sh/sh-protos (sh_find_equiv_gbr_addr): Use rtx_insn* instead
of rtx.
* config/sh/sh.c (sh_find_equiv_gbr_addr): Use def chains instead of
insn walking.
(sh_find_equiv_gbr_addr): Do nothing if input mem is already a GBR
address. Use def chains to handle GBR clobbering call insns.
gcc/testsuite/
PR target/59401
PR target/54760
* gcc.target/pr54760-5.c: New.
* gcc.target/pr54760-6.c: New.
* gcc.target/sh/pr59401-1.c: New.
From-SVN: r216128
Trevor Saunders [Sun, 12 Oct 2014 22:22:53 +0000 (22:22 +0000)]
move many gc hashtab to hash_table
gcc/
* asan.c, cfgloop.c, cfgloop.h, cgraph.c, cgraph.h,
config/darwin.c, config/m32c/m32c.c, config/mep/mep.c,
config/mips/mips.c, config/rs6000/rs6000.c, dwarf2out.c,
function.c, function.h, gimple-ssa.h, libfuncs.h, optabs.c,
output.h, rtl.h, sese.c, symtab.c, tree-cfg.c, tree-dfa.c,
tree-ssa.c, varasm.c: Use hash-table instead of hashtab.
* doc/gty.texi (for_user): Document new option.
* gengtype.c (create_user_defined_type): Don't try to get a struct for
char.
(walk_type): Don't error out on for_user option.
(write_func_for_structure): Emit user marking routines if requested by
for_user option.
(write_local_func_for_structure): Likewise.
(main): Mark types with for_user option as used.
* ggc.h (gt_pch_nx): Add overload for unsigned int.
* hash-map.h (hash_map::hash_entry::pch_nx_helper): AddOverloads.
* hash-table.h (ggc_hasher): New struct.
(hash_table::create_ggc): New function.
(gt_pch_nx): New overload for hash_table.
java/
* class.c, decl.c, except.c, expr.c, java-tree.h, lang.c: Use
hash_table instead of hashtab.
objc/
* objc-act.c: use hash_table instead of hashtab.
cp/
* cp-gimplify.c, cp-tree.h, decl.c, mangle.c, name-lookup.c,
pt.c, semantics.c, tree.c, typeck2.c: Use hash_table instead of
hashtab.
fortran/
* trans-decl.c, trans.c, trans.h: Use hash_table instead of hashtab.
c-family/
* c-common.c: Use hash_table instead of hashtab.
From-SVN: r216127
Manuel López-Ibáñez [Sun, 12 Oct 2014 15:05:28 +0000 (15:05 +0000)]
README: Do not mention CVS.
2014-10-12 Manuel López-Ibáñez <manu@gcc.gnu.org>
* INSTALL/README: Do not mention CVS.
From-SVN: r216126
Jason Merrill [Sun, 12 Oct 2014 01:42:31 +0000 (21:42 -0400)]
re PR c++/62115 (ICE with invalid default argument)
PR c++/62115
* class.c (build_base_path): Preserve rvalueness.
* call.c (convert_like_real) [ck_base]: Let convert_to_base handle &/*.
* rtti.c (build_dynamic_cast_1): Call convert_to_reference later.
From-SVN: r216124
GCC Administrator [Sun, 12 Oct 2014 00:16:21 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r216123
François-Xavier Coudert [Sat, 11 Oct 2014 16:57:32 +0000 (16:57 +0000)]
re PR fortran/48979 (FRACTION und EXPONENT return invalid results for infinity/NaN)
PR fortran/48979
* simplify.c (gfc_simplify_atan): Use mpfr_zero_p to check for zeros.
(gfc_simplify_log): Likewise.
(gfc_simplify_scale): Likewise.
(gfc_simplify_exponent): Handle infinities and NaNs.
(gfc_simplify_fraction): Handle infinities.
(gfc_simplify_rrspacing): Handle signed zeros and NaNs.
(gfc_simplify_set_exponent): Handle infinities and NaNs.
(gfc_simplify_spacing): Handle zeros, infinities and NaNs.
* gfortran.dg/ieee/intrinsics_1.f90: New test.
From-SVN: r216120
Oleg Endo [Sat, 11 Oct 2014 13:11:58 +0000 (13:11 +0000)]
sh.h (TARGET_SH4A_ARCH): Remove macro.
gcc/
* config/sh/sh.h (TARGET_SH4A_ARCH): Remove macro.
* config/sh/sh.h: Replace uses of TARGET_SH4A_ARCH with TARGET_SH4A.
* config/sh/sh.c: Likewise.
* config/sh/sh-mem.cc: Likewise.
* config/sh/sh.md: Likewise.
* config/sh/predicates.md: Likewise.
* config/sh/sync.md: Likewise.
From-SVN: r216119
Christophe Lyon [Sat, 11 Oct 2014 11:33:37 +0000 (11:33 +0000)]
target-supports.exp (check_effective_target_shared): New function.
2014-10-11 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_shared): New
function.
* g++.dg/ipa/devirt-28a.C: Check if -shared is supported.
From-SVN: r216117
Jason Merrill [Sat, 11 Oct 2014 02:26:33 +0000 (22:26 -0400)]
re PR c++/63194 (ICE in maybe_explain_implicit_delete, at cp/method.c:1552)
PR c++/63194
* method.c (defaulted_late_check): Call maybe_instantiate_noexcept.
From-SVN: r216114
GCC Administrator [Sat, 11 Oct 2014 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r216113
Martin Liska [Fri, 10 Oct 2014 23:37:42 +0000 (01:37 +0200)]
cgraphunit.c (symbol_table::process_new_functions): Missing call for call_cgraph_insertion_hooks added.
PR/63376
* cgraphunit.c (symbol_table::process_new_functions): Missing call
for call_cgraph_insertion_hooks added.
From-SVN: r216110
Jason Merrill [Fri, 10 Oct 2014 20:27:07 +0000 (16:27 -0400)]
method.c (implicitly_declare_fn): Handle deleted lambda default ctor and copy assop here.
* method.c (implicitly_declare_fn): Handle deleted lambda default
ctor and copy assop here.
* class.c (check_bases_and_members): Not here.
(add_implicitly_declared_members): And don't set
CLASSTYPE_LAZY_MOVE_ASSIGN.
From-SVN: r216105
Jason Merrill [Fri, 10 Oct 2014 20:24:36 +0000 (16:24 -0400)]
* semantics.c (finish_id_expression): Check for error_mark_node.
From-SVN: r216104
Jakub Jelinek [Fri, 10 Oct 2014 17:43:21 +0000 (19:43 +0200)]
re PR c/63495 (struct __attribute__ ((aligned (8))) broken on x86)
PR c/63495
* stor-layout.c (min_align_of_type): Don't decrease alignment
through BIGGEST_FIELD_ALIGNMENT or ADJUST_FIELD_ALIGN if
TYPE_USER_ALIGN is set.
* gcc.target/i386/pr63495.c: New test.
From-SVN: r216101
Uros Bizjak [Fri, 10 Oct 2014 17:36:21 +0000 (19:36 +0200)]
re PR target/63483 (Scheduler performs Invalid move of aliased memory reference)
PR rtl-optimization/63483
* alias.c (true_dependence_1): Do not exit early for MEM_READONLY_P
references when alignment ANDs are involved.
(write_dependence_p): Ditto.
(may_alias_p): Ditto.
From-SVN: r216100
Marek Polacek [Fri, 10 Oct 2014 17:19:25 +0000 (17:19 +0000)]
asan.c (pass_sanopt::execute): Handle IFN_UBSAN_OBJECT_SIZE.
* asan.c (pass_sanopt::execute): Handle IFN_UBSAN_OBJECT_SIZE.
* doc/invoke.texi: Document -fsanitize=object-size.
* flag-types.h (enum sanitize_code): Add SANITIZE_OBJECT_SIZE and
or it into SANITIZE_UNDEFINED.
* gimple-fold.c (gimple_fold_call): Optimize IFN_UBSAN_OBJECT_SIZE.
* internal-fn.c (expand_UBSAN_OBJECT_SIZE): New function.
* internal-fn.def (UBSAN_OBJECT_SIZE): Define.
* opts.c (common_handle_option): Handle -fsanitize=object-size.
* ubsan.c: Include tree-object-size.h.
(ubsan_type_descriptor): Call tree_to_uhwi instead of tree_to_shwi.
(ubsan_expand_bounds_ifn): Use false instead of 0.
(ubsan_expand_objsize_ifn): New function.
(instrument_object_size): New function.
(pass_ubsan::execute): Add object size instrumentation.
* ubsan.h (ubsan_expand_objsize_ifn): Declare.
testsuite/
* c-c++-common/ubsan/object-size-1.c: New test.
* c-c++-common/ubsan/object-size-2.c: New test.
* c-c++-common/ubsan/object-size-3.c: New test.
* c-c++-common/ubsan/object-size-4.c: New test.
* c-c++-common/ubsan/object-size-5.c: New test.
* c-c++-common/ubsan/object-size-6.c: New test.
* c-c++-common/ubsan/object-size-7.c: New test.
* c-c++-common/ubsan/object-size-8.c: New test.
* c-c++-common/ubsan/object-size-9.c: New test.
* g++.dg/ubsan/object-size-1.C: New test.
* gcc.dg/ubsan/object-size-9.c: New test.
From-SVN: r216099
Jonathan Wakely [Fri, 10 Oct 2014 16:14:59 +0000 (17:14 +0100)]
* testsuite/Makefile.in: Regenerate.
From-SVN: r216098
Jonathan Wakely [Fri, 10 Oct 2014 16:14:52 +0000 (17:14 +0100)]
re PR libstdc++/49561 ([C++0x] std::list::size complexity)
PR libstdc++/49561
* acinclude.m4 (GLIBCXX_ENABLE_LIBSTDCXX_CXX11_ABI): Define.
* configure.ac: Use GLIBCXX_ENABLE_LIBSTDCXX_CXX11_ABI.
* configure: Regenerate.
* include/Makefile.am (stamp-cxx11-abi): New target.
(c++config.h): Set _GLIBCXX_USE_CXX11_ABI macro.
* include/Makefile.in: Regenerate.
* include/bits/c++config: Add _GLIBCXX_USE_CXX11_ABI placeholder and
define _GLIBCXX_DEFAULT_ABI_TAG.
* include/bits/list.tcc (list::emplace(const_iterator, _Args&...)):
Increment size.
(list::emplace(const_iterator, const value_type&)): Likewise.
(list::merge(list&), list::merge(list&, _StrictWeakOrdering)): Adjust
list sizes.
* include/bits/stl_list.h (_List_base, list): Add ABI tag macro.
(_List_base::_M_size): New data member in cxx11 ABI mode.
(_List_base::_S_distance(_List_node_base*, _List_node_base*)): New
function.
(_List_base::_M_get_size(), _List_base::_M_set_size(size_t),
_List_base::_M_inc_size(size_t), _List_base::_M_dec_size(size_t),
_List_base::_M_distance, _List_base::_M_node_count): New functions for
accessing list size correctly for the ABI mode.
(_List_base::_List_base(_List_base&&)): Copy size and reset source.
(_List_base::_M_init()): Initialize size member.
(list::size()): Use _List_base::_M_node_count.
(list::swap(list&)): Swap sizes.
(list::splice(iterator, list&)): Update sizes.
(list::splice(iterator, list&, iterator)): Likewise.
(list::insert(iterator, const value_type&)): Update size.
(list::insert(iterator, _Args&&...)): Likewise.
(list::_M_erase(iterator)): Likewise.
* testsuite/23_containers/list/requirements/dr438/assign_neg.cc:
Adjust.
* testsuite/23_containers/list/requirements/dr438/constructor_1_neg.cc:
Adjust.
* testsuite/23_containers/list/requirements/dr438/constructor_2_neg.cc:
Adjust.
* testsuite/23_containers/list/requirements/dr438/insert_neg.cc:
Adjust.
* testsuite/ext/profile/mutex_extensions_neg.cc: Adjust.
# End of auto-generated commit message
Fix date and whitespace in libstdc++-v3/ChangeLog
From-SVN: r216097
Richard Henderson [Fri, 10 Oct 2014 15:56:07 +0000 (08:56 -0700)]
re PR target/63404 (gcc 5 miscompiles linux block layer)
PR target/63404
* shrink-wrap.c (move_insn_for_shrink_wrap): Don't use single_set.
Restrict the set of expressions we're willing to move.
From-SVN: r216096
Jeff Law [Fri, 10 Oct 2014 15:47:19 +0000 (09:47 -0600)]
ira.c (struct equivalence): Promote INIT_INSNs field to an rtx_insn_list.
* ira.c (struct equivalence): Promote INIT_INSNs field to
an rtx_insn_list. Add comments.
(no_equiv): Promote LIST to an rtx_insn_list. Update
testing for and creating the special marker. Use methods
to extract the insn and next pointers. Promote INSN to an
rtx_insn.
(update_equiv_regs): Update test for special marker in the
INIT_INSNs list.
From-SVN: r216095
Jonathan Wakely [Fri, 10 Oct 2014 15:33:57 +0000 (16:33 +0100)]
re PR libstdc++/49561 ([C++0x] std::list::size complexity)
PR libstdc++/49561
* acinclude.m4 (GLIBCXX_ENABLE_LIBSTDCXX_CXX11_ABI): Define.
* configure.ac: Use GLIBCXX_ENABLE_LIBSTDCXX_CXX11_ABI.
* configure: Regenerate.
* include/Makefile.am (stamp-cxx11-abi): New target.
(c++config.h): Set _GLIBCXX_USE_CXX11_ABI macro.
* include/Makefile.in: Regenerate.
* include/bits/c++config: Add _GLIBCXX_USE_CXX11_ABI placeholder and
define _GLIBCXX_DEFAULT_ABI_TAG.
* include/bits/list.tcc (list::emplace(const_iterator, _Args&...)):
Increment size.
(list::emplace(const_iterator, const value_type&)): Likewise.
(list::merge(list&), list::merge(list&, _StrictWeakOrdering)): Adjust
list sizes.
* include/bits/stl_list.h (_List_base, list): Add ABI tag macro.
(_List_base::_M_size): New data member in cxx11 ABI mode.
(_List_base::_S_distance(_List_node_base*, _List_node_base*)): New
function.
(_List_base::_M_get_size(), _List_base::_M_set_size(size_t),
_List_base::_M_inc_size(size_t), _List_base::_M_dec_size(size_t),
_List_base::_M_distance, _List_base::_M_node_count): New functions for
accessing list size correctly for the ABI mode.
(_List_base::_List_base(_List_base&&)): Copy size and reset source.
(_List_base::_M_init()): Initialize size member.
(list::size()): Use _List_base::_M_node_count.
(list::swap(list&)): Swap sizes.
(list::splice(iterator, list&)): Update sizes.
(list::splice(iterator, list&, iterator)): Likewise.
(list::insert(iterator, const value_type&)): Update size.
(list::insert(iterator, _Args&&...)): Likewise.
(list::_M_erase(iterator)): Likewise.
* testsuite/23_containers/list/requirements/dr438/assign_neg.cc:
Adjust.
* testsuite/23_containers/list/requirements/dr438/constructor_1_neg.cc:
Adjust.
* testsuite/23_containers/list/requirements/dr438/constructor_2_neg.cc:
Adjust.
* testsuite/23_containers/list/requirements/dr438/insert_neg.cc:
Adjust.
* testsuite/ext/profile/mutex_extensions_neg.cc: Adjust.
From-SVN: r216094
Arnaud Charlet [Fri, 10 Oct 2014 14:50:48 +0000 (16:50 +0200)]
Minor reformatting.
From-SVN: r216093
Arnaud Charlet [Fri, 10 Oct 2014 14:49:04 +0000 (16:49 +0200)]
[multiple changes]
2014-10-10 Robert Dewar <dewar@adacore.com>
* freeze.adb, sem_attr.adb: Minor reformatting.
2014-10-10 Johannes Kanig <kanig@adacore.com>
* a-cfdlli.ads, a-cfhama.ads, a-cfhase.ads, a-cforma.ads,
a-cforse.ads, a-cofove.ads: add "Default_Initial_Condition"
to container type.
2014-10-10 Vincent Celier <celier@adacore.com>
* prj-conf.adb (Do_Autoconf): In Codepeer mode, do not try to get
any configuration switches from the project file.
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* sem_ch12.adb (Build_Wrapper): Renamed as Build_Operator_Wrapper.
(Build_Function_Wrapper): New function, to construct a wrapper
function for actuals that are functions with an arbitrary
number of parameters. Used in GNATProve mode to simplify proof
propagation in instantiations.
From-SVN: r216092
Arnaud Charlet [Fri, 10 Oct 2014 14:45:27 +0000 (16:45 +0200)]
[multiple changes]
2014-10-10 Robert Dewar <dewar@adacore.com>
* freeze.adb, gnat1drv.adb, sem_ch13.adb: Minor reformatting and
code clean up.
2014-10-10 Hristian Kirtchev <kirtchev@adacore.com>
* sem_res.adb (Is_OK_Volatile_Context): Allow
a volatile object reference to appear as the expression of a
type conversion.
From-SVN: r216091
Arnaud Charlet [Fri, 10 Oct 2014 14:42:22 +0000 (16:42 +0200)]
[multiple changes]
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* sem_ch13.adb (Analyze_Aspect_Specifications, Library_Unit_Aspects):
Aspect specification is legal on a local instantiation of a
library-level generic unit.
2014-10-10 Gary Dismukes <dismukes@adacore.com>
* gnat1drv.adb (Adjust_Global_Switches): Set Front_End_Inlining
if inlining has been enabled via -gnatn and the target is not GCC.
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* freeze.adb (Freeze_Entity): Freezing a subprogram does
not always freeze its profile. In particular, an attribute
reference that takes the access type does not freeze the types
of the formals.
From-SVN: r216090
Arnaud Charlet [Fri, 10 Oct 2014 14:39:14 +0000 (16:39 +0200)]
[multiple changes]
2014-10-10 Robert Dewar <dewar@adacore.com>
* errout.adb (Adjust_Name_Case): New procedure.
(Set_Msg_Node): Use Adjust_Name_Case.
* errout.ads (Adjust_Name_Case): New procedure.
* exp_intr.adb (Add_Source_Info): Minor code reorganization
(use Ekind_In).
(Write_Entity_Name): Use Errout.Adjust_Name_Case.
* sem_prag.adb (Is_Non_Significant_Pragma_Reference): Review
and fix up entries in Sig_Flags, and correct logical errors in
function itself.
* sprint.adb (Sprint_Node_Actual): Properly print string for
raise statement.
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* sem_ch3.adb (Analyze_Object_Declaration): For an object of an
anonymous array type with delayed aspects, defer freezing of
type until object itself is frozen.
* freeze.adb (Freeze_Entity): When freezing an object of an
anonymous array type with delayed aspects, remove freeze node of
object after freezing type, to prevent out-of-order elaboration
in the back-end. The initialization call for the object has
already been constructed when expanding the object declaration.
From-SVN: r216089
Robert Dewar [Fri, 10 Oct 2014 14:36:07 +0000 (14:36 +0000)]
exp_intr.adb (Write_Entity_Name): Moved to outer level
2014-10-10 Robert Dewar <dewar@adacore.com>
* exp_intr.adb (Write_Entity_Name): Moved to outer level
(Write_Entity_Name): Properly handle operator names
(Expand_Source_Info): New procedure.
* exp_intr.ads (Add_Source_Info): New procedure.
2014-10-10 Robert Dewar <dewar@adacore.com>
* butil.ads: Minor reformatting.
* sem_ch5.adb: Code clean up.
2014-10-10 Robert Dewar <dewar@adacore.com>
* exp_ch11.adb (Expand_N_Raise_Statement): Handle
Prefix_Exception_Messages.
* opt.adb: Handle new flags Prefix_Exception_Message[_Config].
* opt.ads: New flags Prefix_Exception_Message[_Config].
* par-prag.adb: New dummy entry for pragma Prefix_Exception_Messages.
* snames.ads-tmpl: Add entries for new pragma Prefix_Exception_Messages.
* sem_prag.adb: Implement new pragma Prefix_Exception_Messages
* gnat_rm.texi: Document pragma Prefix_Exception_Messages.
From-SVN: r216088
Arnaud Charlet [Fri, 10 Oct 2014 14:32:30 +0000 (16:32 +0200)]
[multiple changes]
2014-10-10 Gary Dismukes <dismukes@adacore.com>
* sinfo.ads, gnat_ugn.texi, a-except.adb, a-except-2005.adb,
raise-gcc.c Spelling changes (prolog => prologue, epilog => epilogue).
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* sem_ch5.adb (Is_Wrapped_In_Block): Handle properly blocks that
contain pragmas generated for loop invariants and type predicates.
Clarify use of this subprogram.
From-SVN: r216087
Arnaud Charlet [Fri, 10 Oct 2014 14:00:07 +0000 (16:00 +0200)]
[multiple changes]
2014-10-10 Yannick Moy <moy@adacore.com>
* sem_prag.adb (Analyze_Global_Item): Accept formal objects in Global
contracts.
* errout.adb, errout.ads (SPARK_Msg_NE): Issue error unless
SPARK_Mode is Off.
2014-10-10 Vadim Godunko <godunko@adacore.com>
* a-stwima.adb (To_Sequence): Compute size of result array.
2014-10-10 Javier Miranda <miranda@adacore.com>
* gnat_ugn.texi (Interfacing with C++ at the Class Level): Update the
sources of the example to avoid a warning when the Ada files are
automatically generated by the binding generator.
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* sem_attr.adb (Resolve_Attribute, case 'Update): Set
Do_Range_Check on the expression of a record component
association when needed, as is done for array components, when
the corresponding type is a scalar type.
From-SVN: r216084
Arnaud Charlet [Fri, 10 Oct 2014 13:57:55 +0000 (15:57 +0200)]
[multiple changes]
2014-10-10 Gary Dismukes <dismukes@adacore.com>
* a-coinho-shared.adb: Minor typo fix.
* prj-env.ads: Minor reformatting.
2014-10-10 Hristian Kirtchev <kirtchev@adacore.com>
* sem_res.adb (Resolve_String_Literal): Do not
generate a string literal subtype for the default expression of
a formal parameter in GNATprove mode.
2014-10-10 Yannick Moy <moy@adacore.com>
* errout.adb (SPARK_Msg_N): Issue error unless SPARK_Mode is Off.
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* exp_ch5.adb (Expand_Formal_Container_Element_Loop): Analyze
declaration for loop parameter before rest of loop, and set
entity kind to prevent assignments to it in the user code.
* sem_ch3.adb (Analyze_Object_Contract): No contracts apply to the
loop parameter in an element iteration over o formal container.
2014-10-10 Robert Dewar <dewar@adacore.com>
* gnat_ugn.texi: Document use of user-level routines to handle
e.g. col major arrays.
2014-10-10 Doug Rupp <rupp@adacore.com>
* s-osinte-android.adb: Fix misspelling.
* gsocket.h: Tweak the Android quirks.
2014-10-10 Robert Dewar <dewar@adacore.com>
* errout.ads (SPARK_Msg_N): Fix spec to match change in body.
From-SVN: r216083
Max Ostapenko [Fri, 10 Oct 2014 13:41:13 +0000 (16:41 +0300)]
asan-dg.exp (asan_link_flags): Save ld_library_path.
gcc/testsuite/
2014-10-10 Max Ostapenko <m.ostapenko@partner.samsung.com>
* lib/asan-dg.exp (asan_link_flags): Save ld_library_path.
(asan_finish): Remove restore_ld_library_path_env_vars.
Restore ld_library_path with saved value. Restore LD_LIBRARY_PATH
related env variables by calling set_ld_library_path_env_vars.
* lib/tsan-dg.exp (tsan_link_flags): Save ld_library_path.
(tsan_finish): Remove restore_ld_library_path_env_vars.
Restore ld_library_path with saved value. Restore LD_LIBRARY_PATH
related env variables by calling set_ld_library_path_env_vars.
* lib/ubsan-dg.exp (ubsan_link_flags): Save ld_library_path.
(ubsan_finish): Remove restore_ld_library_path_env_vars.
Restore ld_library_path with saved value. Restore LD_LIBRARY_PATH
related env variables by calling set_ld_library_path_env_vars.
From-SVN: r216082
Arnaud Charlet [Fri, 10 Oct 2014 13:28:21 +0000 (15:28 +0200)]
[multiple changes]
2014-10-10 Robert Dewar <dewar@adacore.com>
* sem_ch13.adb: Minor code reorganization.
2014-10-10 Pat Rogers <rogers@adacore.com>
* gnat_rm.texi: Text now indicates pragma No_Run_Time is not
for users.
2014-10-10 Vadim Godunko <godunko@adacore.com>
* a-coinho-shared.adb: Add minor comment.
* a-stzmap.adb (To_Sequence): Compute size of result array.
From-SVN: r216081
Javier Miranda [Fri, 10 Oct 2014 13:23:22 +0000 (13:23 +0000)]
exp_ch3.adb (Build_Init_Procedure): Complete the condition of an if-stmt to match its current documentation.
2014-10-10 Javier Miranda <miranda@adacore.com>
* exp_ch3.adb (Build_Init_Procedure): Complete the condition of an
if-stmt to match its current documentation.
From-SVN: r216080
Kyrylo Tkachov [Fri, 10 Oct 2014 12:31:51 +0000 (12:31 +0000)]
[AArch64] Add --enable-fix-cortex-a53-835769 configure-time option
* configure.ac: Add --enable-fix-cortex-a53-835769 option.
* configure: Regenerate.
* config/aarch64/aarch64.c (aarch64_override_options): Handle
TARGET_FIX_ERR_A53_835769_DEFAULT.
* config/aarch64/aarch64.opt (mfix-cortex-a53-835769): Set Init
value to 2.
* doc/install.texi (aarch64*-*-*): Document
new --enable-fix-cortex-a53-835769 option.
From-SVN: r216076
Kyrylo Tkachov [Fri, 10 Oct 2014 12:28:45 +0000 (12:28 +0000)]
[AArch64] Implement workaround for ARM Cortex-A53 erratum 835769
* config/aarch64/aarch64.h (FINAL_PRESCAN_INSN): Define.
(ADJUST_INSN_LENGTH): Define.
* config/aarch64/aarch64.opt (mfix-cortex-a53-835769): New option.
* config/aarch64/aarch64.c (is_mem_p): New function.
(is_memory_op): Likewise.
(aarch64_prev_real_insn): Likewise.
(is_madd_op): Likewise.
(dep_between_memop_and_curr): Likewise.
(aarch64_madd_needs_nop): Likewise.
(aarch64_final_prescan_insn): Likewise.
* doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-835769
and -mno-fix-cortex-a53-835769 options.
From-SVN: r216075
Arnaud Charlet [Fri, 10 Oct 2014 12:21:19 +0000 (14:21 +0200)]
[multiple changes]
2014-10-10 Robert Dewar <dewar@adacore.com>
* sem_ch7.adb, einfo.adb, einfo.ads, sem_prag.adb, sem_ch12.adb,
freeze.adb, sem_util.adb, sem_res.adb, exp_ch6.adb, exp_ch13.adb,
sem_ch6.adb, sem_cat.adb, sem_disp.adb
(Is_Subprogram_Or_Generic_Subprogram): New primitive. Use this primitive
throughout where appropriate.
2014-10-10 Bob Duff <duff@adacore.com>
* a-coinho-shared.ads: Minor reformatting.
* s-traceb.adb: Minor clean up.
2014-10-10 Robert Dewar <dewar@adacore.com>
* ali.adb (Scan_ALI): Read and process new GP flag on ALI P line.
* ali.ads (GNATprove_Mode): New component in ALI table.
(GNATprove_Mode_Specified): New global.
* gnatbind.adb (Gnatbind): Give fatal error if any file compiled
in GNATProve mode.
* lib-writ.ads, lib-writ.adb (GP): New flag on P line for
GNATProve_Mode.
2014-10-10 Javier Miranda <miranda@adacore.com>
* exp_ch3.adb (Build_Init_Procedure): Adding assertion.
(Build_Init_Statement): Ensure that statements
associated with the parent components are located at the beginning
of the returned list of statements.
2014-10-10 Ed Schonberg <schonberg@adacore.com>
* sem_ch13.adb (Inherit_Aspects_At_Freeze_Node): If the full
view of a private type T that has a type invariant is a scalar
or constrained array type, the base type created for the full
view has the same type invariant.
From-SVN: r216074
Robert Dewar [Fri, 10 Oct 2014 12:18:17 +0000 (12:18 +0000)]
exp_util.ads, [...]: Minor code reorganization.
2014-10-10 Robert Dewar <dewar@adacore.com>
* exp_util.ads, sem_ch12.adb, exp_util.adb, i-fortra.ads: Minor code
reorganization.
From-SVN: r216073
Jakub Jelinek [Fri, 10 Oct 2014 12:15:30 +0000 (14:15 +0200)]
re PR tree-optimization/63464 (compare one character to many: faster)
PR tree-optimization/63464
* tree-switch-conversion.c (struct case_bit_test): Remove
hi and lo fields, add wide_int mask field.
(emit_case_bit_tests): Add MAXVAL argument, rewrite uses of
hi/lo fields into wide_int mask operations, optimize by pretending
minval to be 0 if maxval is small enough.
(process_switch): Adjust caller.
From-SVN: r216072
Richard Biener [Fri, 10 Oct 2014 11:17:13 +0000 (11:17 +0000)]
re PR tree-optimization/63379 (Incorrect vectorization when enabling SSE and O3, initialises loop with wrong value)
2014-10-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/63379
* tree-vect-slp.c (vect_get_constant_vectors): Do not compute
a neutral operand for min/max when it is not a reduction chain.
* gcc.dg/vect/pr63379.c: New testcase.
From-SVN: r216070
projects / gcc.git / log