Eddie Hung [Thu, 27 Jun 2019 18:31:30 +0000 (11:31 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Thu, 27 Jun 2019 18:31:19 +0000 (11:31 -0700)]
Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung [Thu, 27 Jun 2019 18:23:30 +0000 (11:23 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Thu, 27 Jun 2019 18:22:49 +0000 (11:22 -0700)]
Add warning if synth_xilinx -abc9 with family != xc7
Eddie Hung [Thu, 27 Jun 2019 18:20:40 +0000 (11:20 -0700)]
Remove unneeded include
Eddie Hung [Thu, 27 Jun 2019 18:20:15 +0000 (11:20 -0700)]
Merge origin/master
Eddie Hung [Thu, 27 Jun 2019 14:24:47 +0000 (07:24 -0700)]
synth_xilinx -arch -> -family, consistent with older synth_intel
Eddie Hung [Thu, 27 Jun 2019 14:21:31 +0000 (07:21 -0700)]
Merge pull request #1142 from YosysHQ/clifford/fix1132
Fix handling of partial covers in muxcover
Eddie Hung [Thu, 27 Jun 2019 13:04:56 +0000 (06:04 -0700)]
Merge pull request #1138 from YosysHQ/koriakin/xc7nocarrymux
synth_xilinx: Add -nocarry and -nowidelut options
Eddie Hung [Thu, 27 Jun 2019 13:02:45 +0000 (06:02 -0700)]
Merge remote-tracking branch 'origin/clifford/fix1132' into xc7mux
Eddie Hung [Thu, 27 Jun 2019 13:02:25 +0000 (06:02 -0700)]
Revert muxcover.cc to master
Eddie Hung [Thu, 27 Jun 2019 13:01:50 +0000 (06:01 -0700)]
Copy tests from eddie/fix1132
Clifford Wolf [Thu, 27 Jun 2019 07:42:49 +0000 (09:42 +0200)]
Fix handling of partial covers in muxcover, fixes #1132
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Thu, 27 Jun 2019 03:09:28 +0000 (20:09 -0700)]
MUXF78 -> $__MUXF78 to indicate internal
Eddie Hung [Thu, 27 Jun 2019 03:07:31 +0000 (20:07 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Thu, 27 Jun 2019 03:03:34 +0000 (20:03 -0700)]
Fix spacing
Eddie Hung [Thu, 27 Jun 2019 03:02:38 +0000 (20:02 -0700)]
Improve debugging message for comb loops
Eddie Hung [Thu, 27 Jun 2019 03:02:19 +0000 (20:02 -0700)]
Add WE to ECP5 dist RAM's abc_scc_break too
Eddie Hung [Thu, 27 Jun 2019 03:00:15 +0000 (20:00 -0700)]
Update comment on boxes
Eddie Hung [Thu, 27 Jun 2019 02:58:09 +0000 (19:58 -0700)]
Add "WE" to dist RAM's abc_scc_break
Eddie Hung [Thu, 27 Jun 2019 02:57:54 +0000 (19:57 -0700)]
Support more than one port in the abc_scc_break attr
Eddie Hung [Thu, 27 Jun 2019 02:17:11 +0000 (19:17 -0700)]
Add write_xaiger into CHANGELOG
Eddie Hung [Thu, 27 Jun 2019 00:57:10 +0000 (17:57 -0700)]
synth_xilinx's muxcover call to be very conservative -- -nodecode
Eddie Hung [Thu, 27 Jun 2019 00:48:49 +0000 (17:48 -0700)]
Accidentally removed "simplemap $mux"
Eddie Hung [Thu, 27 Jun 2019 00:42:50 +0000 (17:42 -0700)]
Replace with <internal options>
Eddie Hung [Thu, 27 Jun 2019 00:41:21 +0000 (17:41 -0700)]
Rework help_mode for synth_xilinx -widemux
Eddie Hung [Thu, 27 Jun 2019 00:34:22 +0000 (17:34 -0700)]
Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux
Eddie Hung [Thu, 27 Jun 2019 00:33:26 +0000 (17:33 -0700)]
Emprically (even if I don't fully understand it) this passes picorv32 tb
Eddie Hung [Thu, 27 Jun 2019 00:16:11 +0000 (17:16 -0700)]
Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux
Eddie Hung [Thu, 27 Jun 2019 00:13:56 +0000 (17:13 -0700)]
Remove redundant check (done further down)
Eddie Hung [Wed, 26 Jun 2019 23:25:48 +0000 (16:25 -0700)]
Return to upstream synth_xilinx with opt -full and wreduce
Eddie Hung [Wed, 26 Jun 2019 23:24:38 +0000 (16:24 -0700)]
Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux
Eddie Hung [Wed, 26 Jun 2019 23:16:44 +0000 (16:16 -0700)]
Restore sigmap wrapper
Eddie Hung [Wed, 26 Jun 2019 23:07:18 +0000 (16:07 -0700)]
Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux
Eddie Hung [Wed, 26 Jun 2019 23:07:07 +0000 (16:07 -0700)]
Add more tests
Eddie Hung [Wed, 26 Jun 2019 23:06:30 +0000 (16:06 -0700)]
muxcover to be undef-sensitive when computing decoders
Eddie Hung [Wed, 26 Jun 2019 22:13:25 +0000 (15:13 -0700)]
Revert "Rework muxcover decoder gen if more significant muxes are 1'bx"
This reverts commit
b2b5cf78e21def63c54c080217d77afefba8e4c7.
Eddie Hung [Wed, 26 Jun 2019 21:48:35 +0000 (14:48 -0700)]
Merge remote-tracking branch 'origin/eddie/fix1132' into xc7mux
Eddie Hung [Wed, 26 Jun 2019 21:16:44 +0000 (14:16 -0700)]
Let's not go crazy: use nonzero costs
Eddie Hung [Wed, 26 Jun 2019 20:50:19 +0000 (13:50 -0700)]
Rework muxcover decoder gen if more significant muxes are 1'bx
Eddie Hung [Wed, 26 Jun 2019 20:49:51 +0000 (13:49 -0700)]
Add tests
Eddie Hung [Wed, 26 Jun 2019 18:48:35 +0000 (11:48 -0700)]
Instead of blocking wreduce on $mux, use -keepdc instead #1132
Eddie Hung [Wed, 26 Jun 2019 18:38:28 +0000 (11:38 -0700)]
Do not call opt with -full before muxcover
Eddie Hung [Wed, 26 Jun 2019 18:24:39 +0000 (11:24 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Wed, 26 Jun 2019 18:23:57 +0000 (11:23 -0700)]
Cleanup abc_box_id
Eddie Hung [Wed, 26 Jun 2019 17:47:53 +0000 (10:47 -0700)]
Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung [Wed, 26 Jun 2019 17:47:03 +0000 (10:47 -0700)]
Grrr
Eddie Hung [Wed, 26 Jun 2019 17:33:54 +0000 (10:33 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Wed, 26 Jun 2019 17:33:07 +0000 (10:33 -0700)]
Remove unused var
Eddie Hung [Wed, 26 Jun 2019 17:23:29 +0000 (10:23 -0700)]
Add _nowide variants of LUT libraries in -nowidelut flows
Eddie Hung [Wed, 26 Jun 2019 17:10:16 +0000 (10:10 -0700)]
Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Eddie Hung [Wed, 26 Jun 2019 17:09:59 +0000 (10:09 -0700)]
Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung [Wed, 26 Jun 2019 17:09:18 +0000 (10:09 -0700)]
Fix spacing
Eddie Hung [Wed, 26 Jun 2019 17:08:40 +0000 (10:08 -0700)]
Merge branch 'koriakin/xc7nocarrymux' into xaig
Eddie Hung [Wed, 26 Jun 2019 17:06:33 +0000 (10:06 -0700)]
Oops. Actually use nocarry flag as spotted by @koriakin
Clifford Wolf [Wed, 26 Jun 2019 17:06:10 +0000 (19:06 +0200)]
Merge pull request #1137 from mmicko/cell_sim_fix
Simulation model verilog fix
Eddie Hung [Wed, 26 Jun 2019 17:04:01 +0000 (10:04 -0700)]
Merge branch 'koriakin/xc7nocarrymux' into xaig
Miodrag Milanovic [Wed, 26 Jun 2019 16:34:34 +0000 (18:34 +0200)]
Simulation model verilog fix
Eddie Hung [Wed, 26 Jun 2019 16:33:48 +0000 (09:33 -0700)]
synth_ecp5 rename -nomux to -nowidelut, but preserve former
Eddie Hung [Wed, 26 Jun 2019 16:33:38 +0000 (09:33 -0700)]
Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriakin/xc7nocarrymux
Eddie Hung [Wed, 26 Jun 2019 16:16:45 +0000 (09:16 -0700)]
Rename -minmuxf to -widemux
Eddie Hung [Wed, 26 Jun 2019 16:15:28 +0000 (09:15 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Clifford Wolf [Wed, 26 Jun 2019 15:54:17 +0000 (17:54 +0200)]
Improve opt_clean handling of unused public wires
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Wed, 26 Jun 2019 15:51:11 +0000 (08:51 -0700)]
Merge pull request #1136 from YosysHQ/xaig_ice40_wire_del
abc9: Add wire delays to synth_ice40
Clifford Wolf [Wed, 26 Jun 2019 15:42:00 +0000 (17:42 +0200)]
Improve BTOR2 handling of undriven wires
Signed-off-by: Clifford Wolf <clifford@clifford.at>
David Shah [Wed, 26 Jun 2019 10:39:44 +0000 (11:39 +0100)]
abc9: Add wire delays to synth_ice40
Signed-off-by: David Shah <dave@ds0.me>
Clifford Wolf [Wed, 26 Jun 2019 09:09:43 +0000 (11:09 +0200)]
Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 26 Jun 2019 09:00:44 +0000 (11:00 +0200)]
Do not clean up buffer cells with "keep" attribute, closes #1128
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 26 Jun 2019 08:58:39 +0000 (10:58 +0200)]
Escape scope names starting with dollar sign in smtio.py
Signed-off-by: Clifford Wolf <clifford@clifford.at>
whitequark [Tue, 25 Jun 2019 16:37:36 +0000 (16:37 +0000)]
Add more ECP5 Diamond flip-flops.
This includes all I/O registers, and a few more regular FFs where it
was convenient.
Eddie Hung [Tue, 25 Jun 2019 17:39:08 +0000 (10:39 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Tue, 25 Jun 2019 17:38:42 +0000 (10:38 -0700)]
Missing muxpack.o in Makefile
Eddie Hung [Tue, 25 Jun 2019 16:36:12 +0000 (09:36 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Tue, 25 Jun 2019 06:05:28 +0000 (23:05 -0700)]
Realistic delays for RAM32X1D too
Eddie Hung [Tue, 25 Jun 2019 05:54:35 +0000 (22:54 -0700)]
Add RAM32X1D box info
Eddie Hung [Tue, 25 Jun 2019 16:33:11 +0000 (09:33 -0700)]
Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung [Tue, 25 Jun 2019 16:21:46 +0000 (09:21 -0700)]
This optimisation doesn't seem to work...
Eddie Hung [Tue, 25 Jun 2019 15:43:58 +0000 (08:43 -0700)]
Add testcase from #335, fixed by #1130
Clifford Wolf [Tue, 25 Jun 2019 15:34:44 +0000 (17:34 +0200)]
Merge pull request #1130 from YosysHQ/eddie/fix710
memory_dff: walk through more than one mux for computing read enable
Eddie Hung [Tue, 25 Jun 2019 15:33:17 +0000 (08:33 -0700)]
Fix spacing
Eddie Hung [Tue, 25 Jun 2019 15:29:55 +0000 (08:29 -0700)]
Move only one consumer check outside of while loop
Eddie Hung [Tue, 25 Jun 2019 15:22:57 +0000 (08:22 -0700)]
Merge pull request #1129 from YosysHQ/eddie/ram32x1d
Add RAM32X1D support
Clifford Wolf [Tue, 25 Jun 2019 15:21:59 +0000 (17:21 +0200)]
Merge pull request #1075 from YosysHQ/eddie/muxpack
Add new "muxpack" command for packing chains of $mux cells
Eddie Hung [Tue, 25 Jun 2019 06:37:01 +0000 (23:37 -0700)]
nullptr check
Eddie Hung [Tue, 25 Jun 2019 06:37:01 +0000 (23:37 -0700)]
nullptr check
Eddie Hung [Tue, 25 Jun 2019 06:05:28 +0000 (23:05 -0700)]
Realistic delays for RAM32X1D too
Eddie Hung [Tue, 25 Jun 2019 06:04:25 +0000 (23:04 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Tue, 25 Jun 2019 06:02:53 +0000 (23:02 -0700)]
Use LUT delays for dist RAM delays
Eddie Hung [Tue, 25 Jun 2019 05:54:35 +0000 (22:54 -0700)]
Add RAM32X1D box info
Eddie Hung [Tue, 25 Jun 2019 05:48:49 +0000 (22:48 -0700)]
Merge remote-tracking branch 'origin/xaig' into xc7mux
Eddie Hung [Tue, 25 Jun 2019 05:16:56 +0000 (22:16 -0700)]
Fix for abc_scc_break is bus
Eddie Hung [Tue, 25 Jun 2019 05:12:55 +0000 (22:12 -0700)]
More meaningful error message
Eddie Hung [Tue, 25 Jun 2019 05:12:50 +0000 (22:12 -0700)]
Re-enable dist RAM boxes for ECP5
Eddie Hung [Tue, 25 Jun 2019 05:10:28 +0000 (22:10 -0700)]
Revert "Re-enable dist RAM boxes for ECP5"
This reverts commit
ca0225fcfaa8c9c68647034351a1569464959edf.
Eddie Hung [Tue, 25 Jun 2019 05:04:22 +0000 (22:04 -0700)]
Do not use log_id as it strips \\, also fix scc for |wire| > 1
Eddie Hung [Tue, 25 Jun 2019 04:55:54 +0000 (21:55 -0700)]
Re-enable dist RAM boxes for ECP5
Eddie Hung [Tue, 25 Jun 2019 04:54:01 +0000 (21:54 -0700)]
Add Xilinx dist RAM as comb boxes
Eddie Hung [Tue, 25 Jun 2019 04:53:18 +0000 (21:53 -0700)]
Fix abc9's scc breaker, also break on abc_scc_break attr
Eddie Hung [Tue, 25 Jun 2019 04:52:53 +0000 (21:52 -0700)]
Add tests/various/abc9.{v,ys} with SCC test
Eddie Hung [Tue, 25 Jun 2019 03:01:43 +0000 (20:01 -0700)]
Merge remote-tracking branch 'origin/master' into xaig
projects / yosys.git / log