mesa.git
7 years agoglsl: do not add unnamed struct types to the symbol table
Nicolai Hähnle [Sun, 14 May 2017 17:59:27 +0000 (19:59 +0200)]
glsl: do not add unnamed struct types to the symbol table

We removed the need for lookups, and we will assign them all the same
name in the future.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoglsl: do not lookup struct types by typename
Nicolai Hähnle [Sun, 14 May 2017 17:58:53 +0000 (19:58 +0200)]
glsl: do not lookup struct types by typename

This changes the logic during the conversion of the declaration list

   struct S {
      ...
   } v;

from AST to IR, but should not change the end result.

When assigning the type of v, instead of looking `S' up in the symbol
table, we read the type from the member variable of ast_struct_specifier.

This change is necessary for the subsequent change to how anonymous types
are handled.

v2: remove a type override when redefining a structure; should be
    the same type in that case anyway

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agoglsl: fix a race condition when inserting new types
Nicolai Hähnle [Fri, 12 May 2017 10:37:00 +0000 (12:37 +0200)]
glsl: fix a race condition when inserting new types

By splitting glsl_type::mutex into two, we can avoid dropping the hash
mutex while creating the new type instance (e.g. struct/record,
interface).

This fixes a time-of-check/time-of-use race where two threads would
simultaneously attempt to create the same type but end up with different
instances of glsl_type.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
7 years agost/mesa: skip texture validation logic when nothing has changed
Timothy Arceri [Sat, 10 Jun 2017 04:52:46 +0000 (14:52 +1000)]
st/mesa: skip texture validation logic when nothing has changed

Based on the same logic in the i965 driver 2f225f61451abd51 and
16060c5adcd4.

perf reports st_finalize_texture() going from 0.60% -> 0.16% with
this change when running the Xonotic benchmark from PTS.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoac/gpu: drop duplicated code line.
Dave Airlie [Mon, 12 Jun 2017 23:47:00 +0000 (09:47 +1000)]
ac/gpu: drop duplicated code line.

has_hw_decode is assigned twice.

Pointed out by coverity.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: move assert down in radv_bind_descriptor_set
Dave Airlie [Mon, 12 Jun 2017 23:36:15 +0000 (09:36 +1000)]
radv: move assert down in radv_bind_descriptor_set

coverity complains about the deref before NULL check.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: return correct error on invalid handle from vkAllocateMemory
Dave Airlie [Mon, 12 Jun 2017 19:48:40 +0000 (05:48 +1000)]
radv: return correct error on invalid handle from vkAllocateMemory

Coverity pointed out this was returning uninitialised.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agost_glsl_to_tgsi: don't try and pass 32-bit values to get_deref_offsets
Dave Airlie [Mon, 12 Jun 2017 19:33:19 +0000 (05:33 +1000)]
st_glsl_to_tgsi: don't try and pass 32-bit values to get_deref_offsets

Just use a temporary 16-bit index.

This fixes coverity issue, pointed to me by Ilia.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agou_dynarray: fix coverity warning about ignoring return value from reralloc
Dave Airlie [Mon, 12 Jun 2017 19:50:18 +0000 (05:50 +1000)]
u_dynarray: fix coverity warning about ignoring return value from reralloc

>>>     Ignoring storage allocated by "reralloc_size(buf->mem_ctx, buf->data, buf->size)" leaks it.

Reviewed-by: Thomas Helland<thomashelland90@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoglsl/lower_distance: only set max_array_access for 1D clip dist arrays
Dave Airlie [Sun, 11 Jun 2017 23:45:36 +0000 (00:45 +0100)]
glsl/lower_distance: only set max_array_access for 1D clip dist arrays

The max_array_access field applies to the first dimension, which means
we only want to set it for the 1D clip dist arrays.

This fixes an ir_validate assert seen with
KHR-GL44.cull_distance.functional
on nouveau and radeon with debug builds.

Fixes: a08c4ebbe (glsl: rewrite clip/cull distance lowering pass)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoi965: fix missing break
Lionel Landwerlin [Mon, 12 Jun 2017 09:32:36 +0000 (10:32 +0100)]
i965: fix missing break

Pretty obvious missing break statement.

CID: 1412564
Fixes: 641405f797 "i965: Use the new tracking mechanism for HiZ"
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed by: Elie Tournier <elie.tournier@collabora.com>

7 years agoradeonsi: pack si_context better
Marek Olšák [Fri, 9 Jun 2017 17:59:54 +0000 (19:59 +0200)]
radeonsi: pack si_context better

there isn't much to gain here

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: pack si_framebuffer better
Marek Olšák [Fri, 9 Jun 2017 17:51:36 +0000 (19:51 +0200)]
radeonsi: pack si_framebuffer better

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: pack si_sampler_view better
Marek Olšák [Fri, 9 Jun 2017 17:46:43 +0000 (19:46 +0200)]
radeonsi: pack si_sampler_view better

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: pack si_buffer_resources better
Marek Olšák [Fri, 9 Jun 2017 17:40:44 +0000 (19:40 +0200)]
radeonsi: pack si_buffer_resources better

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: pack struct si_descriptors better
Marek Olšák [Fri, 9 Jun 2017 17:36:13 +0000 (19:36 +0200)]
radeonsi: pack struct si_descriptors better

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: pack struct si_vertex_elements better
Marek Olšák [Fri, 9 Jun 2017 17:32:49 +0000 (19:32 +0200)]
radeonsi: pack struct si_vertex_elements better

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: replace si_vertex_elements::elements with separate fields
Marek Olšák [Fri, 9 Jun 2017 17:29:27 +0000 (19:29 +0200)]
radeonsi: replace si_vertex_elements::elements with separate fields

It makes si_vertex_elements a little smaller.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: rename si_vertex_element -> si_vertex_elements
Marek Olšák [Fri, 9 Jun 2017 17:33:24 +0000 (19:33 +0200)]
radeonsi: rename si_vertex_element -> si_vertex_elements

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: allocate si_state_rasterizer::pm4_poly_offset only when needed
Marek Olšák [Fri, 9 Jun 2017 17:21:18 +0000 (19:21 +0200)]
radeonsi: allocate si_state_rasterizer::pm4_poly_offset only when needed

Each element has over 700 bytes.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: pack si_state_rasterizer fields
Marek Olšák [Fri, 9 Jun 2017 17:17:25 +0000 (19:17 +0200)]
radeonsi: pack si_state_rasterizer fields

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: remove 8 bytes from si_shader_key with uint32_t ff_tcs_inputs_to_copy
Marek Olšák [Fri, 9 Jun 2017 15:26:27 +0000 (17:26 +0200)]
radeonsi: remove 8 bytes from si_shader_key with uint32_t ff_tcs_inputs_to_copy

The previous patch helps with this.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: use uint32_t to declare si_shader_key.opt.kill_outputs
Marek Olšák [Fri, 9 Jun 2017 15:25:29 +0000 (17:25 +0200)]
radeonsi: use uint32_t to declare si_shader_key.opt.kill_outputs

the next patch will benefit from this

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: remove 8 bytes from si_shader_key by flattening opt.hw_vs
Marek Olšák [Fri, 9 Jun 2017 15:15:07 +0000 (17:15 +0200)]
radeonsi: remove 8 bytes from si_shader_key by flattening opt.hw_vs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: don't emit DB_STENCIL_CONTROL if it has no effect
Marek Olšák [Thu, 8 Jun 2017 00:42:53 +0000 (02:42 +0200)]
radeonsi: don't emit DB_STENCIL_CONTROL if it has no effect

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: fix missing num_L2_invalidates increment
Marek Olšák [Wed, 7 Jun 2017 23:32:51 +0000 (01:32 +0200)]
radeonsi: fix missing num_L2_invalidates increment

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: get rid of more compressed_colortex_mask names
Marek Olšák [Wed, 7 Jun 2017 20:29:10 +0000 (22:29 +0200)]
radeonsi: get rid of more compressed_colortex_mask names

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/noop: fix sampler views
Marek Olšák [Thu, 8 Jun 2017 00:26:28 +0000 (02:26 +0200)]
gallium/noop: fix sampler views

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/docs: clarify gen_name/get_vendor/get_device_vendor behavior
Marek Olšák [Wed, 7 Jun 2017 21:18:09 +0000 (23:18 +0200)]
gallium/docs: clarify gen_name/get_vendor/get_device_vendor behavior

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agost/mesa: call check_program_state only when needed
Marek Olšák [Wed, 7 Jun 2017 21:06:09 +0000 (23:06 +0200)]
st/mesa: call check_program_state only when needed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agor600g: set pipe_context::priv = NULL
Marek Olšák [Wed, 7 Jun 2017 12:43:28 +0000 (14:43 +0200)]
r600g: set pipe_context::priv = NULL

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101254

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agovl,omx,va,vdpau,xvmc: don't set the priv pointer in context_create
Marek Olšák [Wed, 7 Jun 2017 12:47:13 +0000 (14:47 +0200)]
vl,omx,va,vdpau,xvmc: don't set the priv pointer in context_create

Unused and radeonsi ignores it anyway.

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agor600/eg: distribute egd_tables.py in the dist file
Juan A. Suarez Romero [Fri, 9 Jun 2017 14:57:26 +0000 (14:57 +0000)]
r600/eg: distribute egd_tables.py in the dist file

Otherwise, `make distcheck` will fail.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoi965: include gen4_blorp_exec.h into EXTRA_DIST
Juan A. Suarez Romero [Fri, 9 Jun 2017 14:01:25 +0000 (14:01 +0000)]
i965: include gen4_blorp_exec.h into EXTRA_DIST

Otherwise, `make distcheck` will fail.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Call intel_prepare_render() from intel_update_state()
Kenneth Graunke [Fri, 9 Jun 2017 19:57:09 +0000 (12:57 -0700)]
i965: Call intel_prepare_render() from intel_update_state()

The resolve code looks at the current color draw buffers.  These are not
valid until intel_prepare_render() is called.  You can end up with one
color buffer bound, but where the renderbuffer has zero width/height and
no miptree allocated.

You can get a call chain like: _mesa_Clear -> _mesa_update_state ->
intel_update_state, where no brw driver hooks were called, so there is
no other point at which we could have called this.

Fixes crashes in KWin where Clear was causing intel_disable_rb_aux_buffer
to crash on irb != NULL but irb->mt == NULL.

According to Tapani, this also fixes crashes seen on Android.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
7 years agoradv: fix trace dumping for !use_ib_bos
Grazvydas Ignotas [Sun, 11 Jun 2017 13:46:17 +0000 (16:46 +0300)]
radv: fix trace dumping for !use_ib_bos

Fixes trace dumping crash for SI or when RADV_DEBUG=noibs is set.

Fixes: 97dfff5410 "radv: Dump command buffer on hang."
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
7 years agoradv: don't even attempt to prefetch on SI
Grazvydas Ignotas [Sat, 10 Jun 2017 15:34:22 +0000 (18:34 +0300)]
radv: don't even attempt to prefetch on SI

Before bcae327469 this was emitting CP DMA packet even on SI, but
apparently hasn't caused too many problems. After that commit the
CP DMA code now always sets the CIK+ only bit for prefetch. Just
follow radeonsi there and don't try to prefetch at all.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101334
Fixes: bcae327469 "radv: realign cp dma code with radeonsi"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
7 years agoradv: assert on CP_DMA_USE_L2 for SI
Grazvydas Ignotas [Sat, 10 Jun 2017 15:20:13 +0000 (18:20 +0300)]
radv: assert on CP_DMA_USE_L2 for SI

The register header (and radeonsi comment) states V_411_SRC_ADDR_TC_L2
is for CIK+ only, so let's assert on earlier ASICs.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
7 years agoegl/android: support for EGL_KHR_partial_update
Harish Krupo [Fri, 9 Jun 2017 14:43:34 +0000 (20:13 +0530)]
egl/android: support for EGL_KHR_partial_update

This patch adds support for the EGL_KHR_partial_update extension for
android platform. It passes 36/37 tests in dEQP for EGL_KHR_partial_update.
1 test not supported.

v2: add fallback for eglSetDamageRegionKHR (Tapani)

v3: The native_window_set_surface_damage call is available only from
    Android version 6.0. Reintroduce the ANDROID_VERSION guard and
    advertise extension only if version is >= 6.0. (Emil Velikov)

v4: use newly introduced ANDROID_API_LEVEL guard rather than
    ANDROID_VERSION guard to advertise the extension.The extension
    is advertised only if ANDROID_API_LEVEL >= 23 (Android 6.0 or
    greater). Add fallback function for platforms other than Android.
    Fix possible math overflow. (Emil Velikov)
    Return immediately when n_rects is 0. Place function's entrypoint
    in alphabetical order. (Eric Engestrom)

v5: Replace unnecessary calloc with malloc (Eric)
    Check for BAD_ALLOC error (Emil)
    Check for error in native_window_set_damage_region. (Emil, Tapani,
    Eric).

Signed-off-by: Harish Krupo <harish.krupo.kps@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
7 years agogallium: fixed modulo zero crashes in tgsi interpreter (v2)
Marius Gräfe [Fri, 9 Jun 2017 13:39:00 +0000 (15:39 +0200)]
gallium: fixed modulo zero crashes in tgsi interpreter (v2)

softpipe throws integer division by zero exceptions on windows
when using % with integers in a geometry shader.

v2: Made error results consistent with existing div/mod zero handling in
    tgsi. 64 bit signed integer division by zero returns zero like in
    micro_idiv, unsigned returns ~0u like in micro_udiv.
    Modulo operations always set all result bits to one (like in
    micro_umod).

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agonir: make various getters take const pointers
Grazvydas Ignotas [Tue, 6 Jun 2017 23:19:15 +0000 (02:19 +0300)]
nir: make various getters take const pointers

This will allow to constify other things.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agoi965/cnl: Add a preliminary device for Cannonlake
Ben Widawsky [Thu, 11 May 2017 22:37:45 +0000 (15:37 -0700)]
i965/cnl: Add a preliminary device for Cannonlake

v2 (Anuj):
Rebased on master and updated pci ids
Remove redundant initialization of max_wm_threads to 64 * 12.
For gen9+ max_wm_threads are initialized in gen_get_device_info().

v3 (Anuj):
Move the patch to end of series.
Remove unused gt1, gt2, gt3 functions.
Remove l3_banks variable. Variable is now available on master.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agoanv: Don't advertise support on anything above gen9
Jason Ekstrand [Fri, 9 Jun 2017 00:10:05 +0000 (17:10 -0700)]
anv: Don't advertise support on anything above gen9

This will prevent the driver from even trying to work on Cannon Lake
until we get actual support added.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agoi965/cnl: Enable CCS_E and RT support for few formats
Anuj Phogat [Tue, 25 Apr 2017 20:54:19 +0000 (13:54 -0700)]
i965/cnl: Enable CCS_E and RT support for few formats

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Reformat surface_format_info table to accomodate gen10+
Anuj Phogat [Tue, 25 Apr 2017 18:34:59 +0000 (11:34 -0700)]
i965/cnl: Reformat surface_format_info table to accomodate gen10+

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3
Anuj Phogat [Tue, 5 Jan 2016 16:41:39 +0000 (08:41 -0800)]
i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3

v1: By Ben Widawsky <benjamin.widawsky@intel.com>
v2: v1 had an assert only for VS. Add the restriction for GS, HS and
    DS as well and make sure the allocated sizes are not multiple of 3.
v3: Move the entry_size checks in to compiler code (Ken)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965/cnl: Don't resolve single sampled color rb in case of sRGB formats
Anuj Phogat [Thu, 27 Apr 2017 17:35:05 +0000 (10:35 -0700)]
i965/cnl: Don't resolve single sampled color rb in case of sRGB formats

As sRGB now supports lossless compression, we also need to stop resolving
single sampled color render buffers for sRGB formats in Gen 10.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Implement depth count workaround
Ben Widawsky [Mon, 4 Jan 2016 18:48:39 +0000 (10:48 -0800)]
i965/cnl: Implement depth count workaround

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Start using CNL MOCS defines
Anuj Phogat [Mon, 15 May 2017 20:04:57 +0000 (13:04 -0700)]
i965/cnl: Start using CNL MOCS defines

CNL MOCS defines are duplicates of SKL MOCS defines.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Handle gen10 in switch cases across the driver
Anuj Phogat [Tue, 16 May 2017 17:15:17 +0000 (10:15 -0700)]
i965/cnl: Handle gen10 in switch cases across the driver

V2: Start using gen10 functions isl_gen10*(), gen10_blorp_exec()
    gen10_init_atoms() (Jason)
    Remove Vulkan changes. Do them later in a separate patch.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Update few assertions
Anuj Phogat [Thu, 11 May 2017 22:57:46 +0000 (15:57 -0700)]
i965/cnl: Update few assertions

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Add cnl bits in aubinator
Anuj Phogat [Wed, 19 Apr 2017 21:07:13 +0000 (14:07 -0700)]
i965/cnl: Add cnl bits in aubinator

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Add pci id for INTEL_DEVID_OVERRIDE
Anuj Phogat [Mon, 17 Apr 2017 19:55:19 +0000 (12:55 -0700)]
i965/cnl: Add pci id for INTEL_DEVID_OVERRIDE

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Wire up android Mesa build files for gen10
Anuj Phogat [Thu, 11 May 2017 18:57:11 +0000 (11:57 -0700)]
i965/cnl: Wire up android Mesa build files for gen10

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
7 years agoi965/cnl: Wire up Mesa build files for gen10
Anuj Phogat [Thu, 11 May 2017 21:18:52 +0000 (14:18 -0700)]
i965/cnl: Wire up Mesa build files for gen10

V2: Remove isl_gen10.c and isl_gen10.h

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agointel/genxml: Update genx_bits for gen10+
Anuj Phogat [Fri, 14 Apr 2017 22:09:42 +0000 (15:09 -0700)]
intel/genxml: Update genx_bits for gen10+

This commit adds a gen10 case to the switch statement and
drops some unneeded code for handling gen numbers which
doesn't work on gen10 and above.

V2: Drop "z = float(z)" and the "z *= 10" lines

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Add gen10 specific function declarations
Anuj Phogat [Thu, 11 May 2017 21:58:13 +0000 (14:58 -0700)]
i965/cnl: Add gen10 specific function declarations

These declarations will help the code start compiling
once we wire up the makefiles for gen10. Later patches
will start using these functions for gen10.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Include gen10_pack.h
Anuj Phogat [Thu, 11 May 2017 21:35:10 +0000 (14:35 -0700)]
i965/cnl: Include gen10_pack.h

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/cnl: Define genX(x) and GENX(x) for gen10
Anuj Phogat [Mon, 17 Apr 2017 20:48:55 +0000 (13:48 -0700)]
i965/cnl: Define genX(x) and GENX(x) for gen10

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/genxml: Add gen10.xml
Jason Ekstrand [Thu, 11 May 2017 21:16:44 +0000 (14:16 -0700)]
i965/genxml: Add gen10.xml

V2(Anuj):
Add default value for length of 3DPRIMITIVE command
Add values for 'Attribute Active Component Format'
Rename few fields to match gen9.xml

V3 (Ander Conselvan de Oliveira)
Add gen10 alias for MOCS
Make 3DSTATE_CONSTANT_BODY on Gen10 use arrays

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agoi965: Make feature macros gen8 based
Ben Widawsky [Tue, 29 Dec 2015 17:11:02 +0000 (09:11 -0800)]
i965: Make feature macros gen8 based

All the "features" of the hardware are similar starting with GEN8, so remove as
much of the GEN9 uniqueness as possible. This makes implementing future gen
platforms a bit easier.

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoradv: set fmask state to all 0s when no fmask. (v2)
Dave Airlie [Fri, 9 Jun 2017 01:11:29 +0000 (02:11 +0100)]
radv: set fmask state to all 0s when no fmask. (v2)

The shader reads the descriptor to decide if it should take the
fmask value, however we weren't initing it always, which meant
random crap, esp with MSAA depth textures.

Fixes random hangs with:
dEQP-VK.glsl.builtin_var.fragdepth.*

v2: check fmask_state is not NULL

Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoi965: Temporarily disable async mappings on non-LLC
Matt Turner [Thu, 8 Jun 2017 22:13:42 +0000 (15:13 -0700)]
i965: Temporarily disable async mappings on non-LLC

Fixes regressions from commits e0a9b261e593 and a16355d67d92 by
neutering async mappings on non-LLC to be synchronous, like they were
before those two commits. :(

The failing tests include

piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_index_only
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_combined_vertex_and_index
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_separate_vertex_and_index
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_vertex_only
piglit-test piglit.spec.arb_pixel_buffer_object.texsubimage-unpack pbo

7 years agomesa/main/debug: Check if we successfully reopened the ppm file.
Rafael Antognolli [Mon, 5 Jun 2017 18:04:26 +0000 (11:04 -0700)]
mesa/main/debug: Check if we successfully reopened the ppm file.

Since we created the file, we should be able to reopen it for appending, but
some weird filesystem error could cause that to be false. So simply check
whether we could reopen it or not.

CID: 1177144
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agotgsi: clarify TGSI_SEMANTIC_SAMPLEMASK documentation
Brian Paul [Fri, 9 Jun 2017 13:45:02 +0000 (07:45 -0600)]
tgsi: clarify TGSI_SEMANTIC_SAMPLEMASK documentation

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium/wgl: Allow context creation even if SetPixelFormat() wasn't called
Frank Richter [Wed, 7 Jun 2017 07:43:43 +0000 (09:43 +0200)]
gallium/wgl: Allow context creation even if SetPixelFormat() wasn't called

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101326
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agost/dri: support format modifier queries
Varad Gautam [Tue, 30 May 2017 11:53:47 +0000 (17:23 +0530)]
st/dri: support format modifier queries

ask the driver for supported modifiers for a given format.

v2: move to __DRIimageExtension v16.
v3: fail if the supplied format is not supported by driver.
v4: purge PIPE_CAP_QUERY_DMABUF_ATTRIBS.
v5:
- move to __DRIimageExtension v15, pass external_only to the driver.

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de> (v4)
Cc: Lucas Stach <l.stach@pengutronix.de>
7 years agogallium: introduce format modifier querying
Varad Gautam [Tue, 30 May 2017 11:53:46 +0000 (17:23 +0530)]
gallium: introduce format modifier querying

format modifiers tokens are driver specific, and hence, need to come
in from the driver. this allows drivers to be queried for supported
format modifiers for EGL_EXT_image_dma_buf_import_modifiers.

v2: rebase to master.
v3: drivers must return false on query failure.
v4: use pscreen->is_format_supported instead of adding a separate
    format query handle, remove PIPE_CAP_QUERY_DMABUF_ATTRIBS.
    (Lucas Stach)
v5: add external_only parameter.

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
7 years agost/dri: support format queries
Varad Gautam [Tue, 30 May 2017 11:53:45 +0000 (17:23 +0530)]
st/dri: support format queries

ask the driver for supported dmabuf formats

v2: rebase to master.
v3: return false on failure.
v4: use pscreen->is_format_supported instead of adding a new query.
    (Lucas Stach)
v5: stylefix to conform to formatting rules (Brian Paul). add fourcc list
    here instead of using struct image_format from v4.

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de> (v4)
Cc: Lucas Stach <l.stach@pengutronix.de>
7 years agost/dri: implement DRIimage creation from dmabufs with modifiers
Varad Gautam [Tue, 30 May 2017 11:53:44 +0000 (17:23 +0530)]
st/dri: implement DRIimage creation from dmabufs with modifiers

support importing dmabufs into DRIimage while taking format modifiers
in account, as per DRIimage extension version 15.

v2: initialize winsys modifier to DRM_FORMAT_MOD_INVALID (Daniel Stone)
v3: do not bump DRIimageExtension version. split out winsys changes.

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
7 years agost/dri: implement createImageWithModifiers in DRIimage
Varad Gautam [Tue, 30 May 2017 11:53:43 +0000 (17:23 +0530)]
st/dri: implement createImageWithModifiers in DRIimage

adds a pscreen->resource_create_with_modifiers() to create textures
with modifier.

v2:
- stylefixes (Emil Velikov)
- don't return selected modifier from resource_create_with_modifiers. we can
  use the winsys_handle to get this.

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de> (v1)
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
7 years agost/dri: enable DRIimage modifier queries
Varad Gautam [Tue, 30 May 2017 11:53:42 +0000 (17:23 +0530)]
st/dri: enable DRIimage modifier queries

return the modifier selected by the driver when creating this image.

v2: since we can use winsys_handle->modifier to serve these, remove
    DRIimage->modifier from v1.
    use DRM_API_HANDLE_TYPE_KMS instead of DRM_API_HANDLE_TYPE_FD to avoid
    ownership transfer. (Lucas)

Suggested-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
7 years agogallium/winsys/drm: introduce modifier field to winsys_handle
Varad Gautam [Tue, 30 May 2017 11:53:41 +0000 (17:23 +0530)]
gallium/winsys/drm: introduce modifier field to winsys_handle

we use this to import resources with format modifiers, and to support
per-resource modifier queries.

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
7 years agomesa: make use of NewScissorTest driver flags
Samuel Pitoiset [Tue, 6 Jun 2017 13:23:58 +0000 (15:23 +0200)]
mesa: make use of NewScissorTest driver flags

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: make use of NewScissorRect driver flags
Samuel Pitoiset [Tue, 6 Jun 2017 13:21:43 +0000 (15:21 +0200)]
mesa: make use of NewScissorRect driver flags

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: add gl_driver_flags::NewScissor{Rect,Test}
Samuel Pitoiset [Tue, 6 Jun 2017 13:03:50 +0000 (15:03 +0200)]
mesa: add gl_driver_flags::NewScissor{Rect,Test}

_NEW_SCISSOR mesa flag is set when a scissor test is enabled/disabled
or when a new rectangle is defined. However, it triggers too much
changes in the state tracker.

Actually, ST_NEW_RASTERIZER should only be called when a scissor
test is enabled/disabled, while ST_NEW_SCISSOR should be called
in both situations.

In other words, this will avoid to update the rasterizer every
time a new rectangle is defined using glScissor*().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoegl: fix _eglQuerySurface in EGL_BUFFER_AGE_EXT case
Tapani Pälli [Thu, 8 Jun 2017 09:24:24 +0000 (12:24 +0300)]
egl: fix _eglQuerySurface in EGL_BUFFER_AGE_EXT case

Specification states that in case of error, value should not be
written, patch changes buffer age queries to return -1 in case of
error so that we can skip changing the value.

In addition, small change to droid_query_buffer_age to return 0
in case buffer does not have a back buffer available.

Fixes:
   dEQP-EGL.functional.negative_partial_update.not_postable_surface

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: mesa-stable@lists.freedesktop.org
7 years agoradv: introduce perf test env var and allow to enable chaining
Dave Airlie [Tue, 9 May 2017 03:17:30 +0000 (04:17 +0100)]
radv: introduce perf test env var and allow to enable chaining

We have some features that seem to slow things down or cause other
possible undesireable side effects, but it would be nice to test
games etc with them easily.

I forsee multisample DCC and maybe some shader opt changes using this.

For now use it for batch chaining.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agomesa: add KHR_no_error support to glDrawRangeElements*()
Timothy Arceri [Thu, 8 Jun 2017 06:15:58 +0000 (16:15 +1000)]
mesa: add KHR_no_error support to glDrawRangeElements*()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agomesa: rework _ae_invalidate_state() so that it just sets a dirty flag
Timothy Arceri [Wed, 7 Jun 2017 04:02:03 +0000 (14:02 +1000)]
mesa: rework _ae_invalidate_state() so that it just sets a dirty flag

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: remove redundant _ae_invalidate_state() call
Timothy Arceri [Wed, 7 Jun 2017 03:58:34 +0000 (13:58 +1000)]
mesa: remove redundant _ae_invalidate_state() call

The FLUSH_VERTICES(ctx, _NEW_ARRAY) above this will already cause
this to be called.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: inline vbo_exec_invalidate_state() and call from mesa core
Timothy Arceri [Wed, 7 Jun 2017 03:26:16 +0000 (13:26 +1000)]
mesa: inline vbo_exec_invalidate_state() and call from mesa core

Rather than calling it indirectly in each driver.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: rework vbo_exec_init()
Timothy Arceri [Wed, 7 Jun 2017 02:43:27 +0000 (12:43 +1000)]
mesa: rework vbo_exec_init()

Here we make some assumptions about the AEcontext and set the
recalculate bools directly.

Some formating fixes are also made while we are here.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: stop passing state bitfield to UpdateState()
Timothy Arceri [Wed, 7 Jun 2017 02:19:13 +0000 (12:19 +1000)]
mesa: stop passing state bitfield to UpdateState()

The code comment which seems to have been added in cab974cf6c2db
(from year 2000) says:

   "Set ctx->NewState to zero to avoid recursion if
   Driver.UpdateState() has to call FLUSH_VERTICES().  (fixed?)"

As far as I can tell nothing in any of the UpdateState() calls
should cause it to be called recursively.

V2: add a wrapper around the osmesa update function so it can still
    be used internally.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agost/mesa: add st_invalidate_buffers() helper
Timothy Arceri [Wed, 7 Jun 2017 02:14:54 +0000 (12:14 +1000)]
st/mesa: add st_invalidate_buffers() helper

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agor200/radeon: stop calling _ae_invalidate_state() directly
Timothy Arceri [Wed, 7 Jun 2017 01:28:23 +0000 (11:28 +1000)]
r200/radeon: stop calling _ae_invalidate_state() directly

It is already called via _vbo_InvalidateState().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
7 years agoswr: relax c++ requirement from c++14 to c++11
Tim Rowley [Thu, 8 Jun 2017 15:38:52 +0000 (10:38 -0500)]
swr: relax c++ requirement from c++14 to c++11

Remove c++14 generic lambda to keep compiler requirement at c++11.

No regressions on piglit or vtk test suites.

Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
CC: mesa-stable@lists.freedesktop.org
7 years agoradeonsi: call LLVMAddEarlyCSEMemSSAPass only for LLVM >= 4.0
Juan A. Suarez Romero [Thu, 8 Jun 2017 19:22:08 +0000 (21:22 +0200)]
radeonsi: call LLVMAddEarlyCSEMemSSAPass only for LLVM >= 4.0

LLVMAddEarlyCSEMemSSAPass() is defined in LLVM 4.0.

Fixes: 257b538 ("radeonsi: do EarlyCSEMemSSA LLVM pass)
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agogallium/radeon: don't allocate HTILE in a separate buffer
Marek Olšák [Tue, 6 Jun 2017 21:54:23 +0000 (23:54 +0200)]
gallium/radeon: don't allocate HTILE in a separate buffer

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: rename depth decompress functions
Marek Olšák [Tue, 6 Jun 2017 22:58:46 +0000 (00:58 +0200)]
radeonsi: rename depth decompress functions

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: rename shader resource decompress masks to their true meaning
Marek Olšák [Tue, 6 Jun 2017 22:51:23 +0000 (00:51 +0200)]
radeonsi: rename shader resource decompress masks to their true meaning

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: rename is_compressed_colortex -> color_needs_decompression
Marek Olšák [Tue, 6 Jun 2017 22:27:14 +0000 (00:27 +0200)]
radeonsi: rename is_compressed_colortex -> color_needs_decompression

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: disable the patch ID workaround on SI when the patch ID isn't used (v2)
Marek Olšák [Tue, 6 Jun 2017 13:23:42 +0000 (15:23 +0200)]
radeonsi: disable the patch ID workaround on SI when the patch ID isn't used (v2)

The workaround causes a massive performance decrease on 1-SE parts.
(Cape Verde, Hainan, Oland)

The performance regression is already part of 17.0 and 17.1.

v2: check tess_uses_prim_id

Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: don't update dependent states if it has no effect (v2)
Marek Olšák [Mon, 5 Jun 2017 00:00:52 +0000 (02:00 +0200)]
radeonsi: don't update dependent states if it has no effect (v2)

This and the previous clip_regs commit decrease IB sizes and the number of
si_update_shaders invocations as follows:

                 IB size   si_update_shaders calls
Borderlands 2      -10%            -27%
Deus Ex: MD         -5%            -11%
Talos Principle     -8%            -30%

v2: always dirty cb_render_state in set_framebuffer_state

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoi965: Add format/modifier advertising
Varad Gautam [Tue, 30 May 2017 11:54:09 +0000 (17:24 +0530)]
i965: Add format/modifier advertising

v2: Rebase and reuse tiling/modifier map. (Daniel Stone)
v3: bump DRIimageExtension to version 15, fill external_only array.
v4: Y-tiling works since gen 6

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Support dmabuf import with modifiers
Varad Gautam [Tue, 30 May 2017 11:54:08 +0000 (17:24 +0530)]
i965: Support dmabuf import with modifiers

Add support for createImageFromDmaBufs2, adding a modifier to the
original, and allow importing CCS resources with auxiliary data from
dmabufs.

v2: avoid DRIimageExtension version bump, pass single modifier to
    createImageFromDmaBufs2.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Improve same-buffer restriction for imports
Daniel Stone [Tue, 30 May 2017 11:53:48 +0000 (17:23 +0530)]
i965: Improve same-buffer restriction for imports

Intel hardware requires that all planes of an image come from the same
buffer, which is currently implemented by testing that all FDs are
numerically the same.

However, when going through a winsys (e.g.) or anything which transits
FDs individually, the FDs may be different even if the underlying buffer
is the same.

Instead of checking the FDs for equality, we must check if they actually
point to the same buffer (Jason).

Reviewed-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Allocate tile aligned height
Ben Widawsky [Tue, 30 May 2017 11:53:55 +0000 (17:23 +0530)]
i965: Allocate tile aligned height

This patch shouldn't actually do anything because the libdrm function
should already do this alignment. However, it preps us for a future
patch where we add in the CCS AUX size, and in the process it serves as
a good place to find bisectable issues if libdrm or kernel does
something incorrectly.

v2: Do proper alignment for X tiling, and make sure non-tiled case is
handled (Jason)
v3: Rebase (Daniel)

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Move fallback size assignment out of bufmgr
Daniel Stone [Tue, 6 Jun 2017 10:53:55 +0000 (11:53 +0100)]
i965: Move fallback size assignment out of bufmgr

The bufmgr took a mandatory size argument, which would only be used if
the kernel size query failed, i.e. an older kernel. It didn't actually
check that the BO size was sufficient for use.

Pull the check out of the bufmgr, and actually check that the BO is
sufficiently-sized for our import one level up. This also resolves a
chicken/egg we have when importing bufers without explicit modifiers,
namely that we need the tiling mode to calculate the size, but we need
the BO imported to query the tiling mode.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Invert image modifier/tiling inference
Daniel Stone [Tue, 30 May 2017 11:53:49 +0000 (17:23 +0530)]
i965: Invert image modifier/tiling inference

When allocating images, we record a tiling mode and then work backwards
to infer the modifier. Unfortunately this is the wrong way around, since
it is a one:many mapping (e.g. TILING_Y can be plain Y-tiling, or
Y-tiling with CCS).

Invert the mapping, so we record a modifier first and then map this to a
tiling mode.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>