Jason Ekstrand [Thu, 2 Jun 2016 20:43:19 +0000 (13:43 -0700)]
nir/spirv: Complete the list of capabilities
Previously we supported a subset of capabilities and just left a default
case for the others. It's time to stop being lazy and actually audit the
capabilities. This should bring them up-to-date with reality.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 1 Jun 2016 03:16:01 +0000 (20:16 -0700)]
anv/pipeline: Add support for early depth stencil
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 2 Jun 2016 01:53:32 +0000 (18:53 -0700)]
mesa: Get rid of _mesa_active_fragment_shader_has_side_effects
It is no longer used.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 2 Jun 2016 01:55:35 +0000 (18:55 -0700)]
i965/ps_state: Use wm_prog_data.has_side_effects
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 2 Jun 2016 01:46:30 +0000 (18:46 -0700)]
i965/fs Add a wm_prog_data bit for has_side_effects
This is more accurate than calling
_mesa_active_fragment_shader_has_side_effects because it looks at whether
or not the SSBOs, images, or atomic buffers are actually written rather
than just existing in the program.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 2 Jun 2016 01:29:09 +0000 (18:29 -0700)]
nir/info: Get rid of uses_interp_var_at_offset
We were using this briefly in the i965 driver to trigger recompiles but we
haven't been using it since we switched to the NIR y-transform lowering
pass.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 1 Jun 2016 05:23:18 +0000 (22:23 -0700)]
anv/pipeline: Silently pass tests if depth or stencil is missing
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 1 Jun 2016 05:19:53 +0000 (22:19 -0700)]
anv/pipeline: Unify gen7/8 emit_ds_state
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 1 Jun 2016 05:15:38 +0000 (22:15 -0700)]
genxml/gen6,7,75: s/BackFace/Backface
This is more consistent with gen8+
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 1 Jun 2016 18:20:22 +0000 (11:20 -0700)]
nir/spirv: Handle the WorkgroupSize builtin decoration
This fixes the 7 dEQP-VK.pipeline.spec_constant.compute.local_size.* tests
in the latest dev version of the Vulkan CTS.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 1 Jun 2016 17:34:04 +0000 (10:34 -0700)]
nir/spirv: Use breaks instead of returns in constant handling
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 31 May 2016 23:27:19 +0000 (16:27 -0700)]
anv/pipeline: Refactor specialization constant handling a bit
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 31 May 2016 22:02:10 +0000 (15:02 -0700)]
nir/lower_indirect_derefs: Use the direct array deref for recursion
This fixes about 100 of the new Vulkan CTS tests.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 31 May 2016 18:26:06 +0000 (11:26 -0700)]
anv/clear: Handle ClearImage on 3-D images
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Francisco Jerez [Fri, 3 Jun 2016 19:32:15 +0000 (12:32 -0700)]
Revert "i965/fs: Allow scalar source regions on SNB math instructions."
This reverts commit
c1107cec44ab030c7fcc97c67baa12df1cc9d7b5.
Apparently the hardware spec text I quoted in the commit message was
outright lying about scalar source math being supported on SNB, the
hardware seems to load 32 contiguous bits of data for each channel
regardless of the regioning mode. Fixes regressions in the following
CTS tests (which we didn't catch early due to CTS being temporarily
disabled in our CI system):
es2-cts.gtf.gl.atan.atan_vec3_frag_xvary
es2-cts.gtf.gl.cos.cos_vec2_frag_xvary
es2-cts.gtf.gl.atan.atan_vec2_frag_xvary
es2-cts.gtf.gl.pow.pow_vec2_frag_xvary_yconsthalf
es2-cts.gtf.gl.cos.cos_float_frag_xvary
es2-cts.gtf.gl.pow.pow_float_frag_xvary_yconsthalf
es2-cts.gtf.gl.atan.atan_vec3_frag_xvaryyvary
es2-cts.gtf.gl.pow.pow_vec3_frag_xvary_yconsthalf
es2-cts.gtf.gl.cos.cos_vec3_frag_xvary
es2-cts.gtf.gl.atan.atan_vec2_frag_xvaryyvary
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96346
Reported-by: Mark Janes <mark.a.janes@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Wed, 1 Jun 2016 23:27:52 +0000 (16:27 -0700)]
i965/vec4: Fix cmod propagation not to propagate non-identity cmod into CMP(N).
The conditional mod of these instructions determines the semantics of
the comparison itself (rather than being evaluated based on the result
of the instruction as is usually the case for most other instructions
that allow conditional mods), so it's in general not legal to
propagate a conditional mod into a CMP instruction. This prevents
cmod propagation from (mis)optimizing:
cmp.z.f0 tmp, ...
mov.z.f0 null, tmp
into:
cmp.z.f0 tmp, ...
which gives the negation of the flag result of the original sequence.
I originally noticed this while working on SIMD32 in the scalar
back-end, but the same scenario is likely to be possible in vec4
programs so this commit ports the bugfix with the same name from the
scalar back-end to the vec4 cmod propagation pass.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Emil Velikov [Fri, 3 Jun 2016 23:20:53 +0000 (00:20 +0100)]
anv: add the X related and Wayland CFLAGS to VULKAN_ENTRYPOINT_CPPFLAGS
Otherwise we will fail to find the headers in some scenarios.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Emil Velikov [Fri, 3 Jun 2016 23:18:40 +0000 (00:18 +0100)]
nir: automake: add nir_search_helpers.h to the sources list(s)
Fixes: dfbae7d64f4 ("nir/algebraic: support for power-of-two
optimizations")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Rob Clark [Mon, 9 May 2016 16:41:00 +0000 (12:41 -0400)]
freedreno/ir3: do idiv lowering after main opt loop
Give algebraic-opt pass a chance to catch udiv by const power-of-two,
before running lower-idiv pass.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 7 May 2016 17:01:24 +0000 (13:01 -0400)]
nir/algebraic: support for power-of-two optimizations
Some optimizations, like converting integer multiply/divide into left/
right shifts, have additional constraints on the search expression.
Like requiring that a variable is a constant power of two. Support
these cases by allowing a fxn name to be appended to the search var
expression (ie. "a#32(is_power_of_two)").
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Nicolai Hähnle [Thu, 2 Jun 2016 20:17:40 +0000 (22:17 +0200)]
radeonsi: mark buffer texture range valid for shader images
When a shader image view into a buffer texture can be written to, the buffer's
valid range must be updated, or subsequent transfers may incorrectly skip
synchronization.
This fixes a bug that was exposed in Xephyr by PBO acceleration for glReadPixels,
reported by Michel Dänzer.
Cc: Michel Dänzer <michel.daenzer@amd.com>
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Fri, 3 Jun 2016 09:25:19 +0000 (11:25 +0200)]
Revert "egl: Check if API is supported when using eglBindAPI."
This reverts commit
e8b38ca202fbe8c281aeb81a4b64256983f185e0.
It broke Glamor for Gallium at least.
Alejandro Piñeiro [Fri, 6 May 2016 14:13:26 +0000 (16:13 +0200)]
mesa/formatquery: expand NUM_SAMPLE_COUNTS OpenGL ES comment
For ES 3.0 NUM_SAMPLE_COUNTS spec points that some formats will be
always zero. But on ES 3.1 can be different to zero.
The current code is correctly checking exactly against version 3.0,
but the comment only mentions 3.0 spec. It is clearer mentioning both.
v2: better wording on the comment (Ian Romanick)
Acked-by: Eduardo Lima <elima@igalia.com>
Acked-by: Antia Puentes <apuentes@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Dave Airlie [Fri, 3 Jun 2016 02:26:05 +0000 (12:26 +1000)]
mesa/get: return correct value for layer provoking vertex.
This fixes:
GL45-CTS.geometry_shader.layered_rendering.layered_rendering
on Skylake.
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Plamena Manolova [Wed, 1 Jun 2016 16:31:29 +0000 (17:31 +0100)]
egl: Account for default values of texture target and format
When validating attributes during surface creation we should account
for the default values of texture target and format (EGL_NO_TEXTURE)
since the user is not obligated to explicitly set both via the
attribute list passed to eglCreatePbufferSurface.
Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Samuel Pitoiset [Thu, 2 Jun 2016 22:00:27 +0000 (00:00 +0200)]
nvc0: mark buffer texture range valid for shader images
Loosely based on radeonsi (Thanks to Nicolai).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Mauro Rossi [Thu, 2 Jun 2016 19:15:35 +0000 (21:15 +0200)]
isl: add support for Android libmesa_isl static library
isl library is needed to build i965, libmesa_isl static library is added
to fix related Android building errors.
Any attempt to build libmesa_genxml as phony package module failed to deliver
gen{7,75,8,9}_pack.h generated headers, needed for libmesa_isl_gen{7,75,8,9}
Due to constraints in Android Build System, libmesa_genxml is built as static,
at least one source is needed, so dummy.c is autogenerated for this scope,
libmesa_genxml dependency is declared using LOCAL_WHOLE_STATIC_LIBRARIES,
to avoid building errors due to missing genxml/gen{7,75,8,9}_pack.h headers.
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Mon, 30 May 2016 22:20:28 +0000 (00:20 +0200)]
android: libmesa_glsl: add a dependency on libmesa_nir static
Fixes the following building error:
target C++: libmesa_glsl <= external/mesa/src/compiler/glsl/glsl_to_nir.cpp
In file included from external/mesa/src/compiler/glsl/glsl_to_nir.h:28:0,
from external/mesa/src/compiler/glsl/glsl_to_nir.cpp:28:
external/mesa/src/compiler/nir/nir.h:42:25: fatal error: nir_opcodes.h: No such file or directory
compilation terminated.
build/core/binary.mk:432: recipe for target 'out/target/product/x86/obj/STATIC_LIBRARIES/libmesa_glsl_intermediates/glsl/glsl_to_nir.o' failed
make: *** [out/target/product/x86/obj/STATIC_LIBRARIES/libmesa_glsl_intermediates/glsl/glsl_to_nir.o] Error 1
make: *** Waiting for unfinished jobs....
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 31 May 2016 15:59:39 +0000 (16:59 +0100)]
isl: automake: don't include isl_format_layout.c in two lists.
Including the file in both ISL_FILES and ISL_GENERATED_FILES makes
the actual dependency list less obvious.
v2: Drop unrelated vulkan hunk (Jason).
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Emil Velikov [Tue, 31 May 2016 13:46:19 +0000 (14:46 +0100)]
automake: bring back the .PHONY git_sha1.h.tmp rule
With earlier commit
3689ef32afd ("automake: rework the git_sha1.h rule,
include in tarball") we/I erroneously removed the PHONY rule and the
temporary file.
The former is used to ensure that the header is regenerated when on each
make invocation, while the latter helps us avoid the unneeded rebuild(s)
when the SHA1 hasn't changed.
Reported-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Kenneth Graunke [Thu, 2 Jun 2016 00:32:55 +0000 (17:32 -0700)]
i965: Add _NEW_POINT to a couple of comments.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Charmaine Lee [Tue, 31 May 2016 23:33:52 +0000 (16:33 -0700)]
svga: allow copy box in svga_transfer_dma_band()
Instead of just allow copy of a rectangle in svga_transfer_dma_band(),
this patch allows it to copy a box, hence allows copy a 3d texture
in one transfer.
Fixes black screen in running Heaven after commit
fb9fe35. (Bug
1663282)
Tested with Heaven, glretrace, piglit.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Rob Clark [Thu, 2 Jun 2016 20:23:36 +0000 (16:23 -0400)]
freedreno: fix bad bitshift warnings
Coverity doesn't realize idx will never be negative. Throw in some
assert()s to help it out.
(Hopefully assert() isn't getting compiled out for coverity build.. but
there seems to be just one way to find out. We might have to change
these to assume())
Fixes CID
1362442,
1362443
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jun 2016 20:17:16 +0000 (16:17 -0400)]
freedreno: assume builtin shaders do compile
Maybe we should switch to ureg to build the builtin shaders. But at any
rate, if they fail to compile it is because someone messed them up (or
changed TGSI syntax?).
CID
1362444
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Francisco Jerez [Fri, 27 May 2016 08:02:19 +0000 (01:02 -0700)]
i965/fs: Reindent emit_zip().
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Fri, 27 May 2016 07:45:04 +0000 (00:45 -0700)]
i965/fs: Skip SIMD lowering destination zipping if possible.
Skipping the temporary allocation and copy instructions is easy (just
return dst), but the conditions used to find out whether the copy can
be optimized out safely without breaking the program are rather
complex: The destination must be exactly one component of at most the
execution width of the lowered instruction, and all source regions of
the instruction must be either fully disjoint from the destination or
be aligned with it group by group.
v2: Don't handle partial source-destination overlap for simplicity
(Jason). No instruction count regressions with respect to v1 in
either shader-db or the few FP64 shader_runner test-cases with
partial overlap I've checked manually.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Thu, 2 Jun 2016 18:05:44 +0000 (11:05 -0700)]
blorp: Fix 16x multisample scaled blits
Piglit test ext_framebuffer_multisample_blit_scaled-blit-scaled
(with added 16x sample support) now passes with this patch.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Tue, 31 May 2016 17:57:03 +0000 (10:57 -0700)]
meta: Fix indentation in shader code
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dave Airlie [Thu, 2 Jun 2016 04:13:18 +0000 (14:13 +1000)]
mesa/copyimage: report INVALID_VALUE for missing cube face
The specs says INVALID_VALUE for exceeding dimensions,
which is really what is happening here.
This fixes:
GL45-CTS.copy_image.non_existent_mipmap
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Antia Puentes <apuentes@igalia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 2 Jun 2016 03:41:28 +0000 (13:41 +1000)]
mesa/copyimage: fix num samples check to handle renderbuffers.
This test was only happening for textures, but there is
nothing in the spec to say this, so test it for all cases.
This fixes:
GL45-CTS.copy_image.invalid_target
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Rob Clark [Thu, 2 Jun 2016 15:47:11 +0000 (11:47 -0400)]
freedreno/a4xx: silence coverity warning
CID
1362451
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jun 2016 15:42:25 +0000 (11:42 -0400)]
freedreno/a3xx+a4xx: fix potential null ptr deref
Coverity spotted the a3xx case (not sure why not the a4xx).
CID
1362452
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jun 2016 15:19:43 +0000 (11:19 -0400)]
freedreno/ir3: fix coverity warning
CID
1362453
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jun 2016 15:13:26 +0000 (11:13 -0400)]
freedreno/ir3: use nir_shader_get_entrypoint() helper
Should also fix coverity warning: CID
1362454
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jun 2016 14:49:18 +0000 (10:49 -0400)]
freedreno/a4xx: fix incorrect enum type
a4xx has it's own enum, different from a2xx/a3xx.
Spotted by coverity: CID
1362458,
1362459
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jun 2016 14:36:23 +0000 (10:36 -0400)]
freedreno: fix coverity negative array index warning
Never can happen, since query would not have been created in the first
place if pidx(query_type) return negative. Lets let coverity realize
this.
CID
1362460
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jun 2016 14:33:08 +0000 (10:33 -0400)]
freedreno: fix dereference before null check
ptr can actually never be null so just drop the check.
CID
1362464 (#1 of 1): Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking ptr suggests that it may be null,
but it has already been dereferenced on all paths leading to the check.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 29 May 2016 16:25:32 +0000 (12:25 -0400)]
gallium/util: remove u_staging
Unused, and fixes a couple of coverity warnings: CID
1362171,
1362170
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Rob Clark [Wed, 1 Jun 2016 17:40:53 +0000 (13:40 -0400)]
freedreno/a3xx: only update/emit bordercolor state when needed
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 1 Jun 2016 16:23:58 +0000 (12:23 -0400)]
freedreno/a4xx: only update/emit bordercolor state when needed
I noticed in stk that it was contributing to a lot of overhead.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Matt Turner [Tue, 24 May 2016 22:10:25 +0000 (15:10 -0700)]
i965: Add missing types to type_sz().
Coverity warns in multiple places about the potential for division by
zero, caused by this function's default case.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Nanley Chery [Tue, 24 May 2016 21:27:26 +0000 (14:27 -0700)]
mesa/extensions: Fix ES1 extension reporting
Commit
eda15abd84af575d3bde432e2163e30d743a7c87 , unintentionally
advertised these extensions in ES1 contexts. Undo this error.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Plamena Manolova [Tue, 31 May 2016 16:32:38 +0000 (17:32 +0100)]
egl: Check if API is supported when using eglBindAPI.
According to the EGL specifications before binding an API
we must check whether it's supported first. If not eglBindAPI
should return EGL_FALSE and generate a EGL_BAD_PARAMETER error.
Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Engestrom [Tue, 31 May 2016 01:26:00 +0000 (19:26 -0600)]
st/osmesa: remove double-write (overwriting)
These two lines have been here since the file was created.
I'm guessing the second one was just for testing during dev, so it's the
one that's going away.
CoverityID:
1296205
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Nayan Deshmukh [Thu, 2 Jun 2016 06:41:58 +0000 (12:11 +0530)]
st/vdpau: check for null pointer in get/put bits.
Check for null pointer before accessing arrays in get/put bits
native/YCbCr/Indexed in VdpOutputSurface and VdpVideoSurface.
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Christian König [Wed, 25 May 2016 14:55:48 +0000 (16:55 +0200)]
radeon/uvd: fix the H264 level for Tonga v2
We support 5.2 for a while now.
v2: we even support 5.2 for H264, 5.1 is for HEVC.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: <mesa-stable@lists.freedesktop.org>
Alejandro Piñeiro [Thu, 5 May 2016 09:27:05 +0000 (11:27 +0200)]
mesa/formatquery: add a comment to clarify INTERNALFORMAT_PREFERRED
The comment clarifies that the driver is called only to try to get
a preferred internalformat, and that it was already checked if the
format is supported or not.
Acked-by: Eduardo Lima <elima@igalia.com>
Acked-by: Antia Puentes <apuentes@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Alejandro Piñeiro [Thu, 5 May 2016 09:28:37 +0000 (11:28 +0200)]
i965/formatquery: remove INTERNALFORMAT_PREFERRED implementation
Right now the implementation only checks if the internalformat is
supported or not. But that implementation is wrong, returning
unsupported for some internalformats. Additionally, checking if
the internalformat is supported or not is already done at mesa/main
before calling the driver hook, so this new check is not needed.
Acked-by: Eduardo Lima <elima@igalia.com>
Acked-by: Antia Puentes <apuentes@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Alejandro Piñeiro [Wed, 1 Jun 2016 16:49:29 +0000 (18:49 +0200)]
i965/eu: use simd8 when exec_size != EXECUTE_16
Among other thigs, fix a gpu hang when using INTEL_DEBUG=shader_time
for any shader.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Jordan Justen [Mon, 23 May 2016 05:31:06 +0000 (22:31 -0700)]
i965: Remove old CS local ID handling
The old method pushed data for each channels uvec3 data of
gl_LocalInvocationID.
The new method pushes 1 dword of data that is a 'thread local ID'
value. Based on that value, we can generate gl_LocalInvocationIndex
and gl_LocalInvocationID with some calculations.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Tue, 31 May 2016 22:45:24 +0000 (15:45 -0700)]
i965: Enable cross-thread constants and compact local IDs for hsw+
The cross thread constant support appears on Haswell. It allows us to
upload a set of uniform data for all threads without duplicating it
per thread.
One complication is that cross-thread constants are loaded into
registers before per-thread constants. Previously, our local IDs were
loaded before the uniform data and treated as 'payload' data, even
though they were actually pushed into the registers like the other
uniform data.
Therefore, in this patch we simultaneously enable a newer layout where
each thread now uses a single uniform slot for a unique local ID for
the thread. This uniform is handled specially to make sure it is added
last into the uniform push constant registers. This minimizes our
usage of push constant registers, and maximizes our ability to use
cross-thread constants for registers.
To swap from the old to the new layout, we also need to flip some
lowering pass switches to let our driver handle the lowering instead.
We also no longer force thread_local_id_index to -1.
v4:
* Minimize size of patch that switches from the old local ID layout
to the new layout (Jason)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Fri, 27 May 2016 07:53:27 +0000 (00:53 -0700)]
anv: Support new local ID generation & cross-thread constants
The cross thread constant support appears on Haswell. It allows us to
upload a set of uniform data for all threads without duplicating it
per thread.
We also support per-thread data which allows us to store a per-thread
ID in one of the uniforms that can be used to calculate the
gl_LocalInvocationIndex and gl_LocalInvocationID variables.
v4:
* Support the old local ID push constant layout as well (Jason)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Mon, 23 May 2016 04:55:43 +0000 (21:55 -0700)]
i965: Support new local ID push constant & cross-thread constants
The cross thread constant support appears on Haswell. It allows us to
upload a set of uniform data for all threads without duplicating it
per thread.
We also support per-thread data which allows us to store a per-thread
ID in one of the uniforms that can be used to calculate the
gl_LocalInvocationIndex and gl_LocalInvocationID variables.
v4:
* Support the old local ID push constant layout as well (Jason)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Mon, 23 May 2016 04:46:28 +0000 (21:46 -0700)]
i965: Add CS push constant info to brw_cs_prog_data
We need information about push constants in a few places for the GL
driver, and another couple places for the vulkan driver.
When we add support for uploading both a common (cross-thread) set of
push constants, combined with the previous per-thread push constant
data, things are going to get even more complicated. To simplify
things, we add push constant info into the cs prog_data struct.
The cross-thread constant support is added as of Haswell. To support
it we need to make sure all push constants with uniform values are
added to earlier registers. The register that varies per thread and
holds the thread invocation's unique local ID needs to be added last.
For now we add the code that would calculate cross-thread constatn
information for hsw+, but we force it (cross_thread_supported) off
until the other parts of the driver support it.
v4:
* Support older local ID push constant layout as well. (Jason)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Thu, 26 May 2016 20:49:07 +0000 (13:49 -0700)]
i965: Store number of threads in brw_cs_prog_data
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sun, 22 May 2016 07:08:06 +0000 (00:08 -0700)]
i965: Add nir based intrinsic lowering and thread ID uniform
We add a lowering pass for nir intrinsics. This pass can replace nir
intrinsics with driver specific nir lower code.
We lower the gl_LocalInvocationIndex intrinsic based on a uniform
which is loaded with a thread specific ID.
We also lower the gl_LocalInvocationID based on
gl_LocalInvocationIndex.
v2:
* Create variable during lowering pass. (Ken)
v3:
* Don't create a variable, but instead just insert an intrisic call
to load a uniform from the allocated location. (Jason)
v4:
* Don't run this pass if thread_local_id_index < 0
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Mon, 23 May 2016 04:29:53 +0000 (21:29 -0700)]
i965: Put CS local thread ID uniform in last push register
This thread ID uniform will be used to compute the
gl_LocalInvocationIndex and gl_LocalInvocationID values.
It is important for this uniform to be added in the last push constant
register. fs_visitor::assign_constant_locations is updated to make
sure this happens.
The reason this is important is that the cross-thread push constant
registers are loaded first, and the per-thread push constant registers
are loaded after that. (Broadwell adds another push constant upload
mechanism which reverses this order, but we are ignoring this for
now.)
v2:
* Add variable in intrinsics lowering pass
* Make sure the ID is pushed last in assign_constant_locations, and
that we save a spot for the ID in the push constants
v3:
* Simplify code based with Jason's suggestions.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sun, 29 May 2016 06:45:21 +0000 (23:45 -0700)]
i965: Add uniform for a CS thread local base ID
v4:
* Force thread_local_id_index to -1 for now, and have
fs_visitor::setup_cs_payload look at thread_local_id_index. This
enables us to more easily cut over from the old local ID layout to
the new layout, as suggested by Jason.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sun, 22 May 2016 23:33:44 +0000 (16:33 -0700)]
i965: Add nir channel_num system value
v2:
* simd16/32 fixes (curro)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sun, 22 May 2016 22:54:48 +0000 (15:54 -0700)]
nir: Make lowering gl_LocalInvocationIndex optional
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sat, 21 May 2016 21:21:32 +0000 (14:21 -0700)]
glsl: Add glsl LowerCsDerivedVariables option
v2:
* Move lower flag to context constants. (Ken)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Wed, 1 Jun 2016 22:01:04 +0000 (15:01 -0700)]
i965/fs: Copy the offset when lowering logical pull constant sends
This fixes 64 Vulkan CTS tests per gen
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96299
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Dave Airlie [Tue, 24 May 2016 20:03:24 +0000 (06:03 +1000)]
glsl/distance: make sure we use clip dist varying slot for lowered var.
When lowering, we always want to use the clip dist varying.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Nicolai Hähnle [Sun, 8 May 2016 17:53:23 +0000 (12:53 -0500)]
winsys/amdgpu: decay max_ib_size over time
So that memory use will eventually decrease again after a temporary peak.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 7 May 2016 02:33:17 +0000 (21:33 -0500)]
winsys/amdgpu: implement IB chaining on the gfx ring
As a consequence, CE IB size never triggers a flush anymore.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 9 May 2016 22:21:25 +0000 (17:21 -0500)]
winsys/amdgpu: consolidate IB size management in amdgpu_ib_finalize
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 6 May 2016 22:14:29 +0000 (17:14 -0500)]
radeon/winsys: introduce radeon_winsys_cs_chunk
We will chain multiple chunks together and will keep pointers to the older
chunks to support IB dumping.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 7 May 2016 03:04:31 +0000 (22:04 -0500)]
radeonsi/sid: add packet definitions for IB chaining
While we're at it, add packet printing in si_debug.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 7 May 2016 15:58:13 +0000 (10:58 -0500)]
winsys/amdgpu: start with smaller IBs, growing as necessary
This avoids allocating giant IBs from the outset, especially for CE and DMA.
Since we now limit max_dw only by the size that the buffer happens to be
(which, due to the buffer cache, can be even larger than the rounded-up size
we request), the new function amdgpu_ib_max_submit_dwords controls when we
submit an IB.
With this change, we effectively never flush prematurely due to the CE IB,
after an initial warm-up phase.
v2:
- clean up buffer_size calculation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 7 May 2016 02:16:05 +0000 (21:16 -0500)]
winsys/amdgpu: add amdgpu_ib and amdgpu_cs_from_ib helper functions
The latter function allows getting the containing amdgpu_cs from any IB
(including non-main ones).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 7 May 2016 02:37:52 +0000 (21:37 -0500)]
winsys/amdgpu: extract IB big buffer allocation for re-use
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 7 May 2016 02:29:56 +0000 (21:29 -0500)]
winsys/amdgpu: add IB buffer in amdgpu_get_new_ib
Adding the buffer when we start using it for the IB makes the logic for
chaining a bit simpler.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 6 May 2016 17:42:05 +0000 (12:42 -0500)]
gallium/radeon: use cs_check_space throughout
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 6 May 2016 17:34:25 +0000 (12:34 -0500)]
radeon/winsys: add cs_check_space
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 7 May 2016 02:24:51 +0000 (21:24 -0500)]
winsys/amdgpu: simplify interface of amdgpu_get_new_ib
We'll want to have an amdgpu_cs pointer for future changes.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 6 May 2016 02:09:13 +0000 (21:09 -0500)]
winsys/amdgpu: add amdgpu_cs_has_user_fence
v2: style change
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Wed, 1 Jun 2016 04:00:43 +0000 (21:00 -0700)]
i965: Fix isoline reads in scalar TES.
Isolines aren't reversed. commit
5b2d8c2273c6f fixed this for the vec4
TES backend, but not the scalar one.
Found while debugging GL45-CTS.tessellation_shader.
tessellation_control_to_tessellation_evaluation.gl_tessLevel.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
Nicolai Hähnle [Tue, 26 Apr 2016 18:19:28 +0000 (13:19 -0500)]
st/mesa: implement PBO downloads for ReadPixels
v2: require PIPE_CAP_SAMPLER_VIEW_TARGET; technically only needed for some of
the texture targets, but all hardware that has shader images should also
have this cap.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 16:33:33 +0000 (11:33 -0500)]
st/mesa: hook up a no-op try_pbo_readpixels
For better bisectability given that the order of some of the fallback tests
in the blit path are rearranged.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 18 May 2016 04:45:24 +0000 (23:45 -0500)]
st/mesa: add layer_offset to PBO fragment shader
This will be used to select a slice of a 3D texture.
v2: fix a comment (Marek)
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 20:59:17 +0000 (15:59 -0500)]
st/mesa: create PBO download fragment shaders
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 02:56:47 +0000 (21:56 -0500)]
st/mesa: add PBO download enable bit and fragment shaders
For downloads, the fragment shader must know the source texture target, hence
we may cache multiple fragment shaders.
v2: break long line (Marek)
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 20:52:53 +0000 (15:52 -0500)]
st/mesa: move shareable parts of PBO upload state and draw to st_pbo.c
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 17:59:29 +0000 (12:59 -0500)]
st/mesa: move PBO buffer address calculation to st_pbo.c
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 02:56:01 +0000 (21:56 -0500)]
st/mesa: move PBO upload fs creation to st_pbo.c
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 02:49:27 +0000 (21:49 -0500)]
st/mesa: rename pbo_upload to pbo
At the same time, rename members that are upload-specific to say so.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 02:40:53 +0000 (21:40 -0500)]
st/mesa: move PBO vertex and geometry shader creation to st_pbo.c
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 26 Apr 2016 02:35:10 +0000 (21:35 -0500)]
st/mesa: begin moving PBO functions into their own file
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 27 Apr 2016 00:54:41 +0000 (19:54 -0500)]
gallium/cso: allow saving the first fragment shader image slot
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 29 Apr 2016 21:06:13 +0000 (16:06 -0500)]
gallium/u_inlines: allow NULL src in util_copy_image_view
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>