mesa.git
4 years agopan/decode: Add missing wrap modes
Icecream95 [Sat, 20 Jun 2020 06:20:03 +0000 (18:20 +1200)]
pan/decode: Add missing wrap modes

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>

4 years agopan/decode: Fix helper invocations when tracing
Icecream95 [Sat, 20 Jun 2020 05:54:19 +0000 (17:54 +1200)]
pan/decode: Fix helper invocations when tracing

midgard1.flags_lo was being changed when tracing, causing helper
invocations to be disabled.

This was found by using mprotect to make BOs read only in
pandecode_fetch_gpu_mem.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5573>

4 years agor600/sfn: Don't set num_components on TESS sysvalue intrinsics
Gert Wollny [Sat, 20 Jun 2020 15:01:15 +0000 (17:01 +0200)]
r600/sfn: Don't set num_components on TESS sysvalue intrinsics

These instructions are not vectorized, and validation rules added for
this with 167fa2887f09
    nir/validate: validate intr->num_components

Fixes: 46a3033b43b9b51cae5c60eea39e7e5af325c4db
    r600/sfn: Emit some LDS instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5575>

4 years agor600/sfn: Add support for shared atomics
Gert Wollny [Sat, 16 May 2020 13:54:11 +0000 (15:54 +0200)]
r600/sfn: Add support for shared atomics

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5575>

4 years agor600/sfn: Add lowering pass for shared IO
Gert Wollny [Mon, 18 May 2020 18:36:16 +0000 (20:36 +0200)]
r600/sfn: Add lowering pass for shared IO

Lower shared load and store to use the r600 specific intrinsics.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5575>

4 years agonv50/ir/nir: rework CFG handling
Karol Herbst [Tue, 16 Jun 2020 12:58:28 +0000 (14:58 +0200)]
nv50/ir/nir: rework CFG handling

Remove all convergency handling as it was broken and get the code to be a
bit closer to TGSI. Also removes pointless asserts.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonv50/ir/nir: rework input output handling
Karol Herbst [Mon, 15 Jun 2020 21:50:43 +0000 (23:50 +0200)]
nv50/ir/nir: rework input output handling

New code is a bit more structurized and fixes a bunch of int64 and double
fails. Also disables lower_to_scalar which gives us nice vectorized inputs
and outputs.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonv50/ir/nir: handle clip vertex for tess eval shaders
Karol Herbst [Wed, 17 Jun 2020 01:05:54 +0000 (03:05 +0200)]
nv50/ir/nir: handle clip vertex for tess eval shaders

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonv50/ir/nir: don't emit a restart with set a stream_id
Karol Herbst [Tue, 16 Jun 2020 15:02:06 +0000 (17:02 +0200)]
nv50/ir/nir: don't emit a restart with set a stream_id

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonvc0: enable spirv caps with nir
Karol Herbst [Tue, 16 Jun 2020 09:31:13 +0000 (11:31 +0200)]
nvc0: enable spirv caps with nir

This enables the SPIR-V GL extensions moving us a step closer to GL 4.6.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonv50/ir/nir: fix nv_viewport_array2
Karol Herbst [Mon, 15 Jun 2020 00:52:47 +0000 (02:52 +0200)]
nv50/ir/nir: fix nv_viewport_array2

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonv50/ir/nir: fix ext_demote_to_helper_invocation
Karol Herbst [Mon, 15 Jun 2020 00:35:42 +0000 (02:35 +0200)]
nv50/ir/nir: fix ext_demote_to_helper_invocation

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonv50/ir/print: add missing VIEWPORT_MASK handling
Karol Herbst [Mon, 15 Jun 2020 00:35:20 +0000 (02:35 +0200)]
nv50/ir/print: add missing VIEWPORT_MASK handling

Also add an STATIC_ASSERT so we catch those issues automatically.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agonv50/ir/nir: add workaround for double vertex attribs
Karol Herbst [Sun, 14 Jun 2020 09:46:46 +0000 (11:46 +0200)]
nv50/ir/nir: add workaround for double vertex attribs

Gallium adjusts the vertrix attrib types for doubles, but can run out of
bounds this way. As the slot is counted from 0 anyway, just fix it.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5512>

4 years agoaco: improve validation checks for readlane/writelane
Samuel Pitoiset [Mon, 22 Jun 2020 07:17:02 +0000 (09:17 +0200)]
aco: improve validation checks for readlane/writelane

This allows literals for the lane select on GFX10+. The doc says
that is should be a SGPR or a constant but VOP3 on GFX10+ allows
literals.

Some later validation code checks if literals are allowed anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5010>

4 years agoradv/aco: implement logic64 instead of lowering
Daniel Schürmann [Wed, 17 Jun 2020 15:24:53 +0000 (16:24 +0100)]
radv/aco: implement logic64 instead of lowering

to make use of the scalar ALU

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5527>

4 years agonir: slight correction to cube_face_coord constant folding
Rhys Perry [Thu, 18 Jun 2020 15:41:00 +0000 (16:41 +0100)]
nir: slight correction to cube_face_coord constant folding

ACO does the division with a rcp and then a multiplication.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5547>

4 years agoaco: fix printing ASM on GFX6-7 if clrxdisasm is not found
Samuel Pitoiset [Fri, 19 Jun 2020 14:11:07 +0000 (16:11 +0200)]
aco: fix printing ASM on GFX6-7 if clrxdisasm is not found

Fixes some dEQP-VK.pipeline.executable_properties.* which expect
a valid string to be returned.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5560>

4 years agov3d: Let scheduler know GS doesn’t have shared I/O memory
Neil Roberts [Wed, 17 Jun 2020 13:22:32 +0000 (15:22 +0200)]
v3d: Let scheduler know GS doesn’t have shared I/O memory

Unlike the vertex shaders, the memory for inputs and outputs is stored
in separate segments so the scheduler doesn’t need to serialise them.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>

4 years agonir/scheduler: Add an option to specify what stages share memory for I/O
Neil Roberts [Wed, 17 Jun 2020 13:18:06 +0000 (15:18 +0200)]
nir/scheduler: Add an option to specify what stages share memory for I/O

The scheduler has code to handle hardware that shares the same memory
for inputs and outputs. Seeing as the specific stages that need this is
probably hardware-dependent, this patch makes it a configurable option
instead of hard-coding it to everything but fragment shaders.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>

4 years agonir/schedule: Store a pointer to the scoreboard in nir_deps_state
Neil Roberts [Wed, 17 Jun 2020 13:11:44 +0000 (15:11 +0200)]
nir/schedule: Store a pointer to the scoreboard in nir_deps_state

nir_deps_state is a struct used as a closure for calculating the
dependencies. Previously it had two fields copied out of the scoreboard.
The closure is initialised in two seperate places. In order to make it
easier to access other members of the scoreboard in the callbacks in
later patches, the closure now just contains a pointer to the scoreboard
and the two bits of copied information are removed.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>

4 years agov3d: Remove unused member of v3d_compile
Neil Roberts [Wed, 17 Jun 2020 08:13:44 +0000 (10:13 +0200)]
v3d: Remove unused member of v3d_compile

It looks like gs_input_sizes was added when GS shaders were implemented
but it was never used anywhere.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>

4 years agonir/scheduler: Handle nir_intrinsic_load_per_vertex_input
Neil Roberts [Tue, 16 Jun 2020 17:22:47 +0000 (19:22 +0200)]
nir/scheduler: Handle nir_intrinsic_load_per_vertex_input

load_per_vertex_input should probably be handled in the same way as a
regular load_input. I think the nir_schedule pass was written before V3D
had geometry shader support, so that is probably why it hasn’t taken
this into account until now.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5561>

4 years agogv100/ir: fix OP_TXG for shadow textures
Karol Herbst [Sat, 20 Jun 2020 20:53:56 +0000 (22:53 +0200)]
gv100/ir: fix OP_TXG for shadow textures

doesn't seem to fix any tests now, but the previous code was obviously
incorrect and I still see fails in those CTS tests:

KHR-GL46.texture_gather.*depth*

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>

4 years agogv100/ir: fix shift lowering
Karol Herbst [Sat, 20 Jun 2020 14:52:44 +0000 (16:52 +0200)]
gv100/ir: fix shift lowering

Wrap was ignored. Also merge functions to share code.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>

4 years agogv100/ir: fix atom cas
Karol Herbst [Sat, 20 Jun 2020 11:50:57 +0000 (13:50 +0200)]
gv100/ir: fix atom cas

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5576>

4 years agofreedreno/a4xx: simplify setup_slices
Jonathan Marek [Tue, 21 Jan 2020 22:07:52 +0000 (17:07 -0500)]
freedreno/a4xx: simplify setup_slices

Note: untested

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5132>

4 years agofreedreno/a4xx: restore pitch to bytes change to layout code
Jonathan Marek [Fri, 22 May 2020 14:12:02 +0000 (10:12 -0400)]
freedreno/a4xx: restore pitch to bytes change to layout code

I lost this change when rebasing the commit moving this.

Fixes: aa2186db0 ("freedreno: move a4xx specific layout code to a4xx code")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5132>

4 years agovulkan/wsi: Really terminate DRM lease in wsi_release_display().
Mario Kleiner [Mon, 8 Jun 2020 10:51:08 +0000 (12:51 +0200)]
vulkan/wsi: Really terminate DRM lease in wsi_release_display().

wsi_release_display() implements vkReleaseDisplayEXT() which
is supposed to return control to the lessor of an output
upon call.

We need to terminate the wsi->wait_thread when close()'ing
the wsi->fd, otherwise the wait_thread holds another reference
to the wsi->fd, keeping the lease active, and thereby the
leased output blocked, until vkDestroyInstance() is called.

This gives users their GUI back, instead of extended darkness.

Fixes: 352d320a0745 ("vulkan: Add EXT_direct_mode_display [v2]")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5396>

4 years agofreedreno/ir3: split ubo analysis/lowering passes
Rob Clark [Wed, 17 Jun 2020 17:07:09 +0000 (10:07 -0700)]
freedreno/ir3: split ubo analysis/lowering passes

Since binning pass variants share the same const_state with their
draw-pass counterpart, we should re-use the draw-pass variant's ubo
range analysis.  So split the two functions of the existing pass
into two parts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5526>

4 years agofreedreno/ir3: splitup get_existing_range()
Rob Clark [Wed, 17 Jun 2020 16:59:19 +0000 (09:59 -0700)]
freedreno/ir3: splitup get_existing_range()

This serves two purposes, one during ubo range analysis, where we want
to create new ranges, and another during the actual ubo lowering.  Split
these in two, with read-only ubo analysis state in the second case, to
prepare to split this pass in two.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5526>

4 years agofreedreno/ir3: split out ubo info from range
Rob Clark [Wed, 17 Jun 2020 16:22:42 +0000 (09:22 -0700)]
freedreno/ir3: split out ubo info from range

Split out the description of the ubo from the ubo-range.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5526>

4 years agoturnip: remove unnecessary OVERFLOW_FLAG_REG check
Jonathan Marek [Fri, 19 Jun 2020 17:35:11 +0000 (13:35 -0400)]
turnip: remove unnecessary OVERFLOW_FLAG_REG check

The HW deals with overflow automatically, and presumably does it better
(only disabling for pipes that had overflow, and using the visiblity data
available before the overflow)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5565>

4 years agofreedreno/a6xx: remove unnecessary OVERFLOW_FLAG_REG check
Jonathan Marek [Fri, 19 Jun 2020 17:33:34 +0000 (13:33 -0400)]
freedreno/a6xx: remove unnecessary OVERFLOW_FLAG_REG check

The HW deals with overflow automatically, and presumably does it better
(only disabling for pipes that had overflow, and using the visiblity data
available before the overflow)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5565>

4 years agofreedreno/a6xx: VSC "STRM_ARRAY_PITCH" is "STRM_LIMIT"
Jonathan Marek [Fri, 19 Jun 2020 17:26:50 +0000 (13:26 -0400)]
freedreno/a6xx: VSC "STRM_ARRAY_PITCH" is "STRM_LIMIT"

This was being set wrong in both freedreno and turnip, and setting it
correctly should avoid hangs when there is overflow.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5565>

4 years agoradv: enable radv_no_dynamic_bounds for more Path of Exile executables
Rhys Perry [Sat, 20 Jun 2020 10:17:14 +0000 (11:17 +0100)]
radv: enable radv_no_dynamic_bounds for more Path of Exile executables

It looks like there's also a standalone version and a 32-bit version.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5574>

4 years agogallium/util: add missing include
Erik Faye-Lund [Tue, 16 Jun 2020 09:18:34 +0000 (11:18 +0200)]
gallium/util: add missing include

This source-file uses PIPE_OS_WINDOWS to enable the Windows
functionality. But witout including p_config.h, this pre-processor
symbol won't be defined at all.

Let's fix this by adding the missing include, enabling stack-traces on
Windows.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

4 years agogallium/util: limit STACK_LEN on Windows
Erik Faye-Lund [Tue, 16 Jun 2020 09:15:39 +0000 (11:15 +0200)]
gallium/util: limit STACK_LEN on Windows

The Windows implementation of debug_backtrace_capture has a limiation
of max 62 frames in total. Subtract a start-frame of 1 and the wrapping
functions frame, and we land at 60.

So let's lower this number on Windows to avoid triggering an assert.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

4 years agograw/gdi: do not depend on UNICODE macro
Erik Faye-Lund [Mon, 1 Jun 2020 15:45:23 +0000 (17:45 +0200)]
graw/gdi: do not depend on UNICODE macro

Similar to the previous patch, we currently depend on the UNICODE macro
not being set, but it sometimes ends up getting set after all.

Unlike the previous patch, the easier thing to do here, is to lean into
the Unicode wrappers, and use the TEXT()-macro to define a Unicode
or ASCII literal, depending on the setting of the UNICODE macro.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

4 years agogallium/os: call "ANSI" version of GetCommandLine
Erik Faye-Lund [Mon, 1 Jun 2020 15:23:46 +0000 (17:23 +0200)]
gallium/os: call "ANSI" version of GetCommandLine

The GetCommandLine API comes in two versions, GetCommandLineA (which
returns "ANSI" results), and GetCommandLineW which returns UTF-16
("WIDE") results. Then finally, windows.h provides a wrapper-macro that
defines GetCommandLine to either of the two, based on the setting of
the UNICODE macro.

More information about this mechanism can be found here:
https://docs.microsoft.com/en-us/windows/win32/intl/unicode-in-the-windows-api

For some reason, the UNICODE macro is set during build, even if we're
not explicitly setting it. This leads to us trying to cast a UTF-16
result to a char-pointer, which is obviously not going to do the right
thing.

So let's be defensive, and just call GetCommandLineA directly instead.
This avoids us depending on the setting of the UNICODE-macro in the
first place.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

4 years agointel/compiler: Always apply sample mask on Vulkan.
Arcady Goldmints-Orlov [Fri, 8 May 2020 00:34:56 +0000 (19:34 -0500)]
intel/compiler: Always apply sample mask on Vulkan.

With OpenGL, shader writes to the sample mask are ignored when not
rendering to a multisample render target. However, on Vulkan, writes to
the sample mask have still have their effect in that case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3016
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5156>

4 years agoradv: enable radv_no_dynamic_bounds for Path of Exile
Rhys Perry [Fri, 19 Jun 2020 23:00:05 +0000 (00:00 +0100)]
radv: enable radv_no_dynamic_bounds for Path of Exile

To workaround game bugs. This also enables it for the D3D11 renderer but
that shouldn't be an issue.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3081
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3084
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3080
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5569>

4 years agoradv: add new drirc option radv_no_dynamic_bounds
Rhys Perry [Fri, 19 Jun 2020 22:59:49 +0000 (23:59 +0100)]
radv: add new drirc option radv_no_dynamic_bounds

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5569>

4 years agoiris: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Nanley Chery [Thu, 5 Sep 2019 23:51:26 +0000 (16:51 -0700)]
iris: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

4 years agoiris: Refactor modifier_is_supported for gen12
Nanley Chery [Tue, 9 Jun 2020 23:27:14 +0000 (16:27 -0700)]
iris: Refactor modifier_is_supported for gen12

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

4 years agoiris: Handle importing aux-enabled surfaces on TGL
Nanley Chery [Thu, 5 Dec 2019 20:19:33 +0000 (12:19 -0800)]
iris: Handle importing aux-enabled surfaces on TGL

Ensure main surfaces are properly 64KB-aligned (as suggested by Jordan)
and map the main surface addresses to aux surface addresses on import.

v2. Add a Bspec quote. (Sagar)
v3. Add a bit more to the Bspec comment. (Ken)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v2)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

4 years agogallium/dri2: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Nanley Chery [Wed, 11 Sep 2019 22:34:46 +0000 (15:34 -0700)]
gallium/dri2: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS

Add a case for this modifier in dri2_get_modifier_num_planes.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

4 years agoisl/drm: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Nanley Chery [Tue, 19 Mar 2019 21:11:34 +0000 (14:11 -0700)]
isl/drm: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS

Add an entry for this modifier in the modifier_info array.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

4 years agoiris: Use ISL_AUX_USAGE_GEN12_CCS_E on gen12
Nanley Chery [Thu, 4 Jun 2020 23:42:20 +0000 (16:42 -0700)]
iris: Use ISL_AUX_USAGE_GEN12_CCS_E on gen12

Makes iris pass a subtest of the fcc-write-after-clear piglit test
(fast-clear tracking across layers 1 -> 0 -> 1) on gen12.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>

4 years agoiris: Don't support sRGB + Y_TILED_CCS on gen9
Nanley Chery [Tue, 9 Jun 2020 18:10:44 +0000 (11:10 -0700)]
iris: Don't support sRGB + Y_TILED_CCS on gen9

Delete some code that would otherwise need updating for
ISL_AUX_USAGE_GEN12_CCS_E.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>

4 years agointel: Add ISL_AUX_USAGE_GEN12_CCS_E
Nanley Chery [Sat, 28 Mar 2020 00:15:51 +0000 (17:15 -0700)]
intel: Add ISL_AUX_USAGE_GEN12_CCS_E

Add a new aux usage which more accurately describes the behavior of
CCS_E on gen12. On this platform, writes using the 3D engine are either
compressed or substituted with fast-cleared blocks.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>

4 years agoci: Enable NIR validation on a630 GLES2 and VK tests.
Eric Anholt [Thu, 18 Jun 2020 19:55:41 +0000 (12:55 -0700)]
ci: Enable NIR validation on a630 GLES2 and VK tests.

We get through GLES2 in 5.5 minutes and the vk subset in 8 minutes, so we
can spare the CPU time on these tests.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5554>

4 years agoci: Bump vulkan CTS to 1.2.3.0.
Eric Anholt [Thu, 18 Jun 2020 19:21:44 +0000 (12:21 -0700)]
ci: Bump vulkan CTS to 1.2.3.0.

Looks like it fixes some potentially important VK test bugs.  But also, it
fixes the GLES31 SSBO layout tests to not be so excessively large, so we
can run them in a reasonable time now.  Note that a630 fail list is reset,
since the test list has changed and so we end up with a different subset
of tests being run.  Interestingly, in the process the semaphore tests are
now reporting "NotSupported (Exporting and importing semaphore type not
supported at vktSynchronizationSignalOrderTests.cpp:513)" where they
weren't before.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5554>

4 years agoiris: Disable sRGB fast-clears for non-0/1 values
Nanley Chery [Thu, 14 May 2020 15:48:30 +0000 (08:48 -0700)]
iris: Disable sRGB fast-clears for non-0/1 values

For texturing and draw calls, HW expects the clear color to be in two
different color spaces after sRGB fast-clears - sRGB in the former and
linear in the latter. Up until now, iris has stored the clear color in
the sRGB color space. Limit the allowable clear colors for sRGB
fast-clears to 0/1 so that both color space requirements are satisfied.

Makes iris pass the sRGB -> sRGB subtest of the fcc-write-after-clear
piglit test on gen9+.

v2:
* Drop iris_context::blend_enables. (Ken)
* Drop some more resolve-related blend-state-tracking code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

4 years agoiris: Avoid fast-clear with incompatible view
Nanley Chery [Tue, 5 May 2020 22:33:29 +0000 (15:33 -0700)]
iris: Avoid fast-clear with incompatible view

For rendering operations, avoid adding or using fast-cleared blocks if
the render format is incompatible with the clear color interpretation.
Note that the clear color is currently interpreted through the
resource's surface format.

Makes iris pass subtests of the fcc-write-after-clear piglit test:

* UNORM -> SNORM, partial block on gen8+.
* linear -> sRGB, partial block on gen9+.
* UNORM -> SNORM, full block on gen12.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

4 years agoiris: Remove the CCS_D fallback
Nanley Chery [Mon, 1 Jun 2020 15:48:56 +0000 (08:48 -0700)]
iris: Remove the CCS_D fallback

Remove the CCS_D fallback logic so that iris doesn't attempt to use a
non-existent surface state for some renders. Also, add an assertion to
catch the issue.

The fallback in iris_resource_render_aux_usage can lead to this problem
because it doesn't account for the fact that surface states created from
resources with the Y_TILED_CCS modifier may only have CCS_E or NONE as
aux usages (due to iris_resource_create_with_modifiers).

Without this change, the next commit would have triggered the fallback
and regressed the following tests on gen9:

* dEQP-EGL.functional.wide_color.window_888_colorspace_srgb
* dEQP-EGL.functional.wide_color.window_8888_colorspace_srgb
* dEQP-EGL.functional.wide_color.pbuffer_888_colorspace_srgb
* dEQP-EGL.functional.wide_color.pbuffer_8888_colorspace_srgb

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

4 years agoiris: Drop can_fast_clear_color's format parameter
Nanley Chery [Wed, 20 May 2020 18:46:46 +0000 (11:46 -0700)]
iris: Drop can_fast_clear_color's format parameter

Pull the resource's format from the pipe_resource instead. Makes the
changes in later commits more obvious.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

4 years agodocs: move "stable" tag explanation next to `Fixes:`
Eric Engestrom [Sun, 7 Jun 2020 17:18:31 +0000 (19:18 +0200)]
docs: move "stable" tag explanation next to `Fixes:`

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: move `Fixes:` tag explanation to its own section
Eric Engestrom [Sun, 7 Jun 2020 17:14:51 +0000 (19:14 +0200)]
docs: move `Fixes:` tag explanation to its own section

This also adds the ability to link directly to it:
https://mesa3d.org/submittingpatches.html#fixes

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: make it clear that the tags needs to be in the commit message
Eric Engestrom [Sun, 7 Jun 2020 15:57:52 +0000 (17:57 +0200)]
docs: make it clear that the tags needs to be in the commit message

Some people have been putting them only in the MR description, which
isn't picked up by our tools. (Note that doing both doesn't hurt.)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: reword a sentence a bit
Eric Engestrom [Sun, 7 Jun 2020 15:53:07 +0000 (17:53 +0200)]
docs: reword a sentence a bit

The "that you know ahead of time" bit just sounded weird as everything on this
page except the backport MR only applies if you know it "ahead of time".

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: add some formatting to the "backport merge request" option
Eric Engestrom [Sun, 7 Jun 2020 15:52:45 +0000 (17:52 +0200)]
docs: add some formatting to the "backport merge request" option

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: prefer `Fixes:` over `Cc: mesa-stable`
Eric Engestrom [Sun, 7 Jun 2020 15:39:56 +0000 (17:39 +0200)]
docs: prefer `Fixes:` over `Cc: mesa-stable`

`Fixes:` targets a specific commit and as such is much more precise and
useful than `Cc: mesa-stable`, so let's prefer it when applicable.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: drop `git sendemail` instructions
Eric Engestrom [Sun, 7 Jun 2020 15:37:59 +0000 (17:37 +0200)]
docs: drop `git sendemail` instructions

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: reword "sending a patch revision" to "updating a merge request"
Eric Engestrom [Sun, 7 Jun 2020 15:36:55 +0000 (17:36 +0200)]
docs: reword "sending a patch revision" to "updating a merge request"

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agodocs: stop considering `Cc: mesa-stable` as an email address
Eric Engestrom [Sun, 7 Jun 2020 15:31:01 +0000 (17:31 +0200)]
docs: stop considering `Cc: mesa-stable` as an email address

Our tools haven't needed more than this ^ for a while, and the historical
reasons this used to be an email address don't matter anymore.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

4 years agofreedreno/a6xx: Set index buffer size to bo size
Kristian H. Kristensen [Tue, 16 Jun 2020 18:39:07 +0000 (11:39 -0700)]
freedreno/a6xx: Set index buffer size to bo size

The number of vertices may be out of bound and if we use it for
computing index buffer size we may get too big a size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5552>

4 years agofreedreno/a6xx: Don't write REG_A6XX_RB_SRGB_CNTL in restore
Kristian H. Kristensen [Tue, 16 Jun 2020 18:38:06 +0000 (11:38 -0700)]
freedreno/a6xx: Don't write REG_A6XX_RB_SRGB_CNTL in restore

We configure this as part of MRT set up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5552>

4 years agoanv: Use resolve_device_entrypoint for dispatch init
Jason Ekstrand [Wed, 17 Jun 2020 18:42:15 +0000 (13:42 -0500)]
anv: Use resolve_device_entrypoint for dispatch init

There's no good reason to have the "which table do I use?" code
duplicated twice.  The only advantage to the way we were doing it before
was that we could move the switch statement outside the loop.  If this
is ever an actual device initialization perf problem that someone cares
about, we can optimize that when the time comes.  For now, the
duplicated cases are simply a platform-enabling pit-fall.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5530>

4 years agodocs: suggest alternative installation methods for meson
Eric Engestrom [Thu, 5 Dec 2019 20:39:17 +0000 (20:39 +0000)]
docs: suggest alternative installation methods for meson

A couple of popular distros have a habit of never updating anything.
Point their users towards ways of using current versions of meson anyway.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2988>

4 years agoturnip: Fill out VkPhysicalDeviceSubgroupProperties
Brian Ho [Fri, 19 Jun 2020 16:47:08 +0000 (12:47 -0400)]
turnip: Fill out VkPhysicalDeviceSubgroupProperties

This commit fills out VkPhysicalDeviceSubgroupProperties if present
in a VkPhysicalDeviceProperties2. The values here are simply pulled
from the blob.

Fixes some flakes in dEQP-VK.subgroups.* since dEQP was reading
uninitialized values of VkPhysicalDeviceSubgroupProperties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5564>

4 years agozink: use int assignment for vk int type
Mike Blumenkrantz [Thu, 18 Jun 2020 15:54:21 +0000 (11:54 -0400)]
zink: use int assignment for vk int type

this breaks 32bit builds that use -Werror=int-conversion

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5545>

4 years agofreedreno/ir3: move output_loc to variant
Rob Clark [Mon, 15 Jun 2020 21:12:58 +0000 (14:12 -0700)]
freedreno/ir3: move output_loc to variant

This moves the last bit of important state to be serialized from
ir3_shader to ir3_shader_variant.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: move const_state back to variant
Rob Clark [Mon, 15 Jun 2020 19:14:04 +0000 (12:14 -0700)]
freedreno/ir3: move const_state back to variant

For shader-cache, we want to not have anything important in `ir3_shader`.
And to have shader variants with lower const size limits (to properly
handle cross-stage limits), we also want variants to be able to have
their own const_state.

But we still need binning pass shaders to align with their draw pass
counterpart so that the same const emit can be used for both passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: un-embed const_state
Rob Clark [Mon, 15 Jun 2020 18:43:36 +0000 (11:43 -0700)]
freedreno/ir3: un-embed const_state

Make it an rzalloc'd ptr instead of embedded struct, so it can serve as
the mem ctx for immediates.  This gets rid of needing to explicitly free
the immediates, so one less thing to deal with when moving const_state.
(Also, after we move const_state to the shader variant, we won't need
one for binning pass variants)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: move num_reserved_user_consts out of const_state
Rob Clark [Tue, 16 Jun 2020 21:09:34 +0000 (14:09 -0700)]
freedreno/ir3: move num_reserved_user_consts out of const_state

When we move const_state to the variant, this will need to stay in the
shader, as it applies to all variants (and we need to store it somewhere
before we have any variants)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: convert over to ralloc
Rob Clark [Mon, 15 Jun 2020 18:15:52 +0000 (11:15 -0700)]
freedreno/ir3: convert over to ralloc

The `ir3_shader` is the root mem ctx, with `ir3_shader_variant` hanging
off that, and various variant specific allocations hanging off the
variant.

This lets us delete a bunch of cleanup code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: pass variant to ir3_create()
Rob Clark [Mon, 15 Jun 2020 18:14:46 +0000 (11:14 -0700)]
freedreno/ir3: pass variant to ir3_create()

Prep to convert over to ralloc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agoir3: Split out variant-specific lowering and optimizations
Connor Abbott [Wed, 10 Jun 2020 09:11:27 +0000 (11:11 +0200)]
ir3: Split out variant-specific lowering and optimizations

It seems a lot of the lowerings being run the second time were
unnecessary. In addition, when const_state is moved to the variant,
then it will become impossible to know ahead of time whether a variant
needs additional optimizing, which means that ir3_key_lowers_nir() needs
to go away. The new approach should have the same effect, since it skips
running lowerings that are unnecessary and then skips the opt loop if no
optimizations made progress, but it will work better when we move
ir3_nir_analyze_ubo_ranges() to be after variant creation.

The one maybe controversial thing I did is to make
nir_opt_algebraic_late() always happen during variant lowering. I wanted
to avoid code duplication, and it seems to me that we should push the
_late variants as far back as possible so that later opt_algebraic runs
don't miss out on optimization opportunities.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: constify shader key
Rob Clark [Mon, 15 Jun 2020 16:37:13 +0000 (09:37 -0700)]
freedreno/ir3: constify shader key

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: drop shader->num_ubos
Rob Clark [Sun, 14 Jun 2020 19:54:05 +0000 (12:54 -0700)]
freedreno/ir3: drop shader->num_ubos

The only difference between this and `const_state->num_ubos` was that
the latter is counting # of ubos loaded via `ldg` (based on UBO addrs
in push-consts).  But turns out there isn't really any reason to care.
Instead just add an early return in the one code-path that cares about
the number of `ldg` UBOs.

This gets rid of one more thing we need to move from `ir3_shader` to
`ir3_shader_variant`.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: move ubo_state into const_state
Rob Clark [Sun, 14 Jun 2020 19:44:17 +0000 (12:44 -0700)]
freedreno/ir3: move ubo_state into const_state

As with const_state, this will also need to move into the variant.  To
simplify that, just move it into the const_state itself, since after all
it is related.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/a6xx: defer userconst cmdstream size calculation
Rob Clark [Sun, 14 Jun 2020 19:33:54 +0000 (12:33 -0700)]
freedreno/a6xx: defer userconst cmdstream size calculation

The `ubo_state` will also need to move to `ir3_shader_variant`.  But we
can prepare for that and simplify things a bit if we calculate the
cmdstream on first emit, once we already have the appropriate variant.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: add accessor for const_state
Rob Clark [Sun, 14 Jun 2020 18:36:05 +0000 (11:36 -0700)]
freedreno/ir3: add accessor for const_state

We are going to want to move this back to the variant, and come up with
a different strategy for binning/nonbinning to share the same constant
layout, in order to implement shader-cache support.  (Since then we
can have a mix of dynamically compiled variants and cache hits, so there
is no good place to serialize the const-state.)

To reduce the churn as we re-arrange things, move direct access to the
const-state to a helper fxn.  This patch is the boring churny part.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agofreedreno/ir3: refactor out helper to compile shader from asm
Rob Clark [Wed, 17 Jun 2020 15:13:12 +0000 (08:13 -0700)]
freedreno/ir3: refactor out helper to compile shader from asm

Deduplicate a bit of hand-building of ir3_shader/_variant from
computerator and delay test.  This also removes the need for
external things to depend on generated ir3_parser header.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

4 years agost/mesa: make texture views inherit compressed_data storage
Pierre-Eric Pelloux-Prayer [Fri, 5 Jun 2020 09:20:55 +0000 (11:20 +0200)]
st/mesa: make texture views inherit compressed_data storage

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2775
Fixes: c3fafa127a0 ("st/mesa: generalize code for the compressed texture map/unmap fallback")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5492>

4 years agoac/llvm: load 1 byte at a time if unaligned on gfx10
Pierre-Eric Pelloux-Prayer [Tue, 16 Jun 2020 12:46:08 +0000 (14:46 +0200)]
ac/llvm: load 1 byte at a time if unaligned on gfx10

If buffer or stride is unaligned we use the same trick as on gfx6:
load 1 byte at a time and recompose the output if needed.
This change fixes lots of deqp/glcts tests:
  - dEQP-GLES2.functional.draw.random.1, 10, ...
  - dEQP-GLES2.functional.vertex_arrays.multiple_attributes.stride.3_float2_0_float2_0_float2_17, ...
  - dEQP-GLES2.functional.vertex_arrays.single_attribute.first.byte_first24_offset1_stride2_quads256, ...
  - dEQP-GLES2.functional.vertex_arrays.single_attribute.strides.buffer_0_17_byte2_vec4_dynamic_draw_quads_1, ...
  - dEQP-GLES31.functional.draw_indirect.random.14, ...

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5502>

4 years agor600/sfn: Handle memory_barrier
Gert Wollny [Sat, 9 May 2020 09:15:04 +0000 (11:15 +0200)]
r600/sfn: Handle memory_barrier

I'm not sure whether this should actually be a barrier accross all
shader processing units, the TGSI code path seems to handle this
only by using GROUP_BARRIER, so let's do the same here.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

4 years agor600/sfn: Take SSBO buffer ID offset into account
Gert Wollny [Sun, 10 May 2020 11:38:17 +0000 (13:38 +0200)]
r600/sfn: Take SSBO buffer ID offset into account

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

4 years agor600/sfn: Add support for reading cube image array dim.
Gert Wollny [Sat, 9 May 2020 13:09:36 +0000 (15:09 +0200)]
r600/sfn: Add support for reading cube image array dim.

The cube array size can't be queried directly, the number of array
elements must be passed via a constant buffer.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

4 years agor600/sfn: Add support for image_size
Gert Wollny [Sat, 9 May 2020 09:30:19 +0000 (11:30 +0200)]
r600/sfn: Add support for image_size

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

4 years agor600/sfn: Add imageio support
Gert Wollny [Wed, 6 May 2020 22:08:15 +0000 (00:08 +0200)]
r600/sfn: Add imageio support

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

4 years agor600/sfn: lower image derefs
Gert Wollny [Wed, 6 May 2020 22:11:33 +0000 (00:11 +0200)]
r600/sfn: lower image derefs

v2: Signal lowering image derefs by using the CAP

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

4 years agoradv: require LLVM 11+ for GFX 10.3 if not using ACO
Samuel Pitoiset [Tue, 9 Jun 2020 06:10:56 +0000 (08:10 +0200)]
radv: require LLVM 11+ for GFX 10.3 if not using ACO

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

4 years agoradv: add support for Sienna Cichlid
Samuel Pitoiset [Mon, 8 Jun 2020 16:16:13 +0000 (18:16 +0200)]
radv: add support for Sienna Cichlid

Bits copied from RadeonSI. Totally untested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

4 years agoaco: replace == GFX10 with >= GFX10 where it's needed
Samuel Pitoiset [Mon, 8 Jun 2020 16:45:35 +0000 (18:45 +0200)]
aco: replace == GFX10 with >= GFX10 where it's needed

Assume the GFX10.3 ISA is similar to GFX10 which is likely (except
possible minor changes and new instructions for raytracing).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

4 years agoradv: replace == GFX10 with >= GFX10 where it's needed
Samuel Pitoiset [Mon, 8 Jun 2020 16:38:57 +0000 (18:38 +0200)]
radv: replace == GFX10 with >= GFX10 where it's needed

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

4 years agointel/tools: Add assembler tests for the cr0 register
Matt Turner [Wed, 17 Jun 2020 00:10:38 +0000 (17:10 -0700)]
intel/tools: Add assembler tests for the cr0 register

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>

4 years agointel/tools: Disallow control subregisters > 3
Matt Turner [Wed, 17 Jun 2020 00:07:15 +0000 (17:07 -0700)]
intel/tools: Disallow control subregisters > 3

> 4 was probably a typo, since the documentation says that there are 4
subregisters (0-3).

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>

4 years agointel/tools: Require explicit regions/types for special regs
Matt Turner [Tue, 16 Jun 2020 23:54:07 +0000 (16:54 -0700)]
intel/tools: Require explicit regions/types for special regs

The docs say that these registers should  only be read with a certain
type, and I'm inclined to believe that the hardware behaves that way,
but it makes the assembler a little more confusing and also confuses the
user of the assembler that some operands don't take types or regions.

Just always requiring regions and types seems like the sensible thing.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>