Jiong Wang [Wed, 29 Mar 2017 10:33:04 +0000 (10:33 +0000)]
[g++, testsuite] XFAIL thread_local-order2.C on newlib
testsuite/
* g++.dg/tls/thread_local-order2.C: XFAIL on newlib.
As commented by Mike, it's better that newlib support this feature, tracked by
https://sourceware.org/bugzilla/show_bug.cgi?id=21325
From-SVN: r246563
GCC Administrator [Wed, 29 Mar 2017 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r246560
Joseph Myers [Tue, 28 Mar 2017 23:27:18 +0000 (00:27 +0100)]
* es.po: Update.
From-SVN: r246557
Ville Voutilainen [Tue, 28 Mar 2017 23:05:21 +0000 (02:05 +0300)]
Implement LWG 2900, The copy and move constructors of optional are not constexpr.
Implement LWG 2900, The copy and move constructors
of optional are not constexpr.
* include/std/optional (_Optional_payload): New.
(_Optional_base): Remove the bool parameter.
(_Optional_base<_Tp, false>): Remove.
(_Optional_base()): Adjust.
(_Optional_base(nullopt_t)): Likewise.
(_Optional_base(in_place_t, _Args&&...)): Likewise.
(_Optional_base(in_place_t, initializer_list<_Up>, _Args&&...)):
Likewise.
(_Optional_base(const _Optional_base&)): Likewise.
(_Optional_base(_Optional_base&&)): Likewise.
(operator=(const _Optional_base&)): Likewise.
(operator=(_Optional_base&&)): Likewise.
(~_Optional_base()): Remove.
(_M_is_engaged()): Adjust.
(_M_get()): Likewise.
(_M_construct(_Args&&...)): Likewise.
(_M_destruct()): Likewise.
(_M_reset()): Likewise.
(_Optional_base::_Empty_byte): Remove.
(_Optional_base::_M_empty): Remove.
(_Optional_base::_M_payload): Adjust.
* testsuite/20_util/optional/cons/value_neg.cc: Adjust.
* testsuite/20_util/optional/constexpr/cons/value.cc: Add tests.
From-SVN: r246556
Segher Boessenkool [Tue, 28 Mar 2017 22:26:17 +0000 (00:26 +0200)]
rs6000: Fix gcc.target/powerpc/gcse-1.c for PIC (PR43496)
With PIC a @ha relocation isn't generated, so skip that test then.
PR testsuite/43496
* gcc.target/powerpc/gcse-1.c: Skip scan-assembler-times "@ha" if
generating PIC code.
From-SVN: r246555
Vladimir Makarov [Tue, 28 Mar 2017 20:55:38 +0000 (20:55 +0000)]
re PR rtl-optimization/80193 (ICE on valid (but hairy) C code at -O3 on x86_64-linux-gnu: in check_allocation, at ira.c:2563)
2017-03-28 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/80193
* ira.c (ira): Do not check allocation for LRA.
2017-03-28 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/80193
* gcc.target/i386/pr80193.c: New.
From-SVN: r246554
Than McIntosh [Tue, 28 Mar 2017 20:08:31 +0000 (20:08 +0000)]
re PR go/80226 (ICE gimple-expr.c:474 on Go function returning multiple empty struct/array values)
PR go/80226
* go-gcc.cc (Gcc_backend::return_statement): Check for
void_type_node when checking result size.
From-SVN: r246553
Alexander Monakov [Tue, 28 Mar 2017 17:24:57 +0000 (20:24 +0300)]
OpenMP/PTX privatization in SIMD regions
* config/nvptx/nvptx-protos.h (nvptx_output_simt_enter): Declare.
(nvptx_output_simt_exit): Declare.
* config/nvptx/nvptx.c (nvptx_init_unisimt_predicate): Use
cfun->machine->unisimt_location. Handle NULL unisimt_predicate.
(init_softstack_frame): Move initialization of crtl->is_leaf to...
(nvptx_declare_function_name): ...here. Emit declaration of local
memory space buffer for omp_simt_enter insn.
(nvptx_output_unisimt_switch): New.
(nvptx_output_softstack_switch): New.
(nvptx_output_simt_enter): New.
(nvptx_output_simt_exit): New.
* config/nvptx/nvptx.h (struct machine_function): New fields
has_simtreg, unisimt_location, simt_stack_size, simt_stack_align.
* config/nvptx/nvptx.md (UNSPECV_SIMT_ENTER): New unspec.
(UNSPECV_SIMT_EXIT): Ditto.
(omp_simt_enter_insn): New insn.
(omp_simt_enter): New expansion.
(omp_simt_exit): New insn.
* config/nvptx/nvptx.opt (msoft-stack-reserve-local): New option.
* internal-fn.c (expand_GOMP_SIMT_ENTER): New.
(expand_GOMP_SIMT_ENTER_ALLOC): New.
(expand_GOMP_SIMT_EXIT): New.
* internal-fn.def (GOMP_SIMT_ENTER): New internal function.
(GOMP_SIMT_ENTER_ALLOC): Ditto.
(GOMP_SIMT_EXIT): Ditto.
* target-insns.def (omp_simt_enter): New insn.
(omp_simt_exit): Ditto.
* omp-low.c (struct omplow_simd_context): New fields simt_eargs,
simt_dlist.
(lower_rec_simd_input_clauses): Implement SIMT privatization.
(lower_rec_input_clauses): Likewise.
(lower_lastprivate_clauses): Handle SIMT privatization.
* omp-offload.c: Include langhooks.h, tree-nested.h, stor-layout.h.
(ompdevlow_adjust_simt_enter): New.
(find_simtpriv_var_op): New.
(execute_omp_device_lower): Handle IFN_GOMP_SIMT_ENTER,
IFN_GOMP_SIMT_ENTER_ALLOC, IFN_GOMP_SIMT_EXIT.
* tree-inline.h (struct copy_body_data): New field dst_simt_vars.
* tree-inline.c (expand_call_inline): Handle SIMT privatization.
(copy_decl_for_dup_finish): Ditto.
* tree-ssa.c (execute_update_addresses_taken): Handle GOMP_SIMT_ENTER.
From-SVN: r246550
Janus Weil [Tue, 28 Mar 2017 17:01:05 +0000 (19:01 +0200)]
re PR fortran/78661 ([OOP] Namelist output missing object designator under DTIO)
2017-03-28 Janus Weil <janus@gcc.gnu.org>
PR fortran/78661
* trans-io.c (transfer_namelist_element): Perform a polymorphic call
to a DTIO procedure if necessary.
2017-03-28 Janus Weil <janus@gcc.gnu.org>
PR fortran/78661
* gfortran.dg/dtio_25.f90: Modified test case.
* gfortran.dg/dtio_27.f90: New test case.
2017-03-28 Janus Weil <janus@gcc.gnu.org>
PR fortran/78661
* io/write.c (nml_write_obj): Build a class container only if necessary.
From-SVN: r246546
Uros Bizjak [Tue, 28 Mar 2017 16:53:50 +0000 (18:53 +0200)]
* ChangeLog: Fix my ChangeLog entry.
From-SVN: r246545
Uros Bizjak [Tue, 28 Mar 2017 16:51:00 +0000 (18:51 +0200)]
re PR target/53383 (Allow -mpreferred-stack-boundary=3 on x86-64)
PR target/53383
* config/i386/i386.c (ix86_option_override_internal): Always
allow -mincoming-stack-boundary=3 for 64-bit targets.
testsuite/ChangeLog:
PR target/53383
* gcc.target/i386/pr53383-1.c (dg-options): Remove -mno-sse.
* gcc.target/i386/pr53383-2.c (dg-options): Ditto.
* gcc.target/i386/pr53383-3.c (dg-options): Ditto.
From-SVN: r246543
Jonathan Wakely [Tue, 28 Mar 2017 16:09:49 +0000 (17:09 +0100)]
PR libstdc++/80137 use std::nextafter instead of looping
PR libstdc++/80137
* include/bits/random.tcc (generate_canonical): Use std::nextafter
or numeric_limits::epsilon() to reduce out-of-range values.
* testsuite/26_numerics/random/uniform_real_distribution/operators/
64351.cc: Verify complexity requirement is met.
From-SVN: r246542
Bin Cheng [Tue, 28 Mar 2017 15:35:56 +0000 (15:35 +0000)]
tree-vect-loop.c (optimize_mask_stores): Add bb to the right loop.
* tree-vect-loop.c (optimize_mask_stores): Add bb to the right
loop.
From-SVN: r246541
Bin Cheng [Tue, 28 Mar 2017 15:32:29 +0000 (15:32 +0000)]
tree-vect-loop-manip.c (slpeel_add_loop_guard): New param and mark new edge's irreducible flag accordign to it.
* tree-vect-loop-manip.c (slpeel_add_loop_guard): New param and
mark new edge's irreducible flag accordign to it.
(vect_do_peeling): Check loop preheader edge's irreducible flag
and pass it to function slpeel_add_loop_guard.
gcc/testsuite
* gcc.c-torture/compile/irreducible-loop.c: New.
From-SVN: r246540
Richard Sandiford [Tue, 28 Mar 2017 15:14:36 +0000 (15:14 +0000)]
re PR tree-optimization/80218 (tree-call-cdce does not update block frequencies)
gcc/
PR tree-optimization/80218
* tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
Update block frequencies and counts.
gcc/testsuite/
PR tree-optimization/80218
* gcc.dg/pr80218.c: New test.
From-SVN: r246538
Richard Biener [Tue, 28 Mar 2017 13:57:43 +0000 (13:57 +0000)]
re PR ipa/78644 (ICE: SIGSEGV in is_gimple_reg_type with -Og -fipa-cp)
2017-03-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/78644
* tree-ssa-ccp.c (evaluate_stmt): When we may not use the value
of a simplification result we may not use it at all.
* gcc.dg/pr78644-1.c: New testcase.
* gcc.dg/pr78644-2.c: Likewise.
From-SVN: r246534
Toma Tabacu [Tue, 28 Mar 2017 12:43:33 +0000 (12:43 +0000)]
Skip pic-3,4.c and pie-3,4.c for mips*-*-linux-*.
gcc/testsuite/
* gcc.dg/pic-3.c: Skip for mips*-*-linux-*.
* gcc.dg/pic-4.c: Likewise.
* gcc.dg/pie-3.c: Likewise.
* gcc.dg/pie-4.c: Likewise.
From-SVN: r246533
Jonathan Wakely [Tue, 28 Mar 2017 12:43:06 +0000 (13:43 +0100)]
Add _GLIBCXX_RELEASE macro to "Using" section of manual
* doc/xml/manual/abi.xml: Add xml:id anchor.
* doc/xml/manual/using.xml (manual.intro.using.macros): Document
_GLIBCXX_RELEASE. Link to new anchor for __GLIBCXX__ notes.
(concurrency.io.structure): Add markup.
* doc/html/*: Regenerate.
From-SVN: r246532
Martin Liska [Tue, 28 Mar 2017 11:37:22 +0000 (11:37 +0000)]
Handle PHI nodes w/o a argument (PR ipa/80205).
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80205
* g++.dg/ipa/pr80205.C: New test.
2017-03-28 Richard Biener <rguenther@suse.de>
PR ipa/80205
* tree-inline.c (copy_phis_for_bb): Do not create PHI node
without arguments, generate default definition of a SSA name.
From-SVN: r246530
Senthil Kumar Selvaraj [Tue, 28 Mar 2017 10:55:18 +0000 (10:55 +0000)]
Fix broken tests for avr target
These tests assume {unsigned,} ints are 32 bits or wider. Explicitly
specify __{U}INT32_TYPE__ for targets with __SIZEOF_INT__ < 4.
gcc/testsuite/
2017-03-28 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* gcc.c-torture/execute/pr79121.c:Use __{U}INT32_TYPE__ for targets
with sizeof(int) < 4.
* gcc.c-torture/execute/pr79737-1.c (struct S): Likewise.
* gcc.c-torture/execute/pr79737-2.c: Likewise.
* gcc.dg/torture/pr79777.c: Likewise.
* gcc.dg/torture/pr79910.c: Likewise.
From-SVN: r246529
Andreas Schwab [Tue, 28 Mar 2017 10:29:34 +0000 (10:29 +0000)]
Support for Ada on aarch64 with -mabi=ilp32
PR ada/80117
* system-linux-aarch64-ilp32.ads: New file.
* gcc-interface/Makefile.in (LIBGNAT_TARGET_PAIRS_COMMON): Rename
from LIBGNAT_TARGET_PAIRS.
(LIBGNAT_TARGET_PAIRS_32, LIBGNAT_TARGET_PAIRS_64): Define.
(LIBGNAT_TARGET_PAIRS): Use LIBGNAT_TARGET_PAIRS_COMMON, and
LIBGNAT_TARGET_PAIRS_64 or LIBGNAT_TARGET_PAIRS_32 for -mabi=lp64
or -mabi=ilp32, resp.
From-SVN: r246528
Richard Biener [Tue, 28 Mar 2017 10:10:01 +0000 (10:10 +0000)]
re PR middle-end/80222 (may_alias folded away)
2017-03-28 Richard Biener <rguenther@suse.de>
PR middle-end/80222
* gimple-fold.c (gimple_fold_indirect_ref): Do not touch
TYPE_REF_CAN_ALIAS_ALL references.
* fold-const.c (fold_indirect_ref_1): Likewise.
* g++.dg/pr80222.C: New testcase.
From-SVN: r246527
Martin Liska [Tue, 28 Mar 2017 09:01:57 +0000 (11:01 +0200)]
Fix calls.c for a _complex type (PR ipa/80104).
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80104
* cgraphunit.c (cgraph_node::expand_thunk): Mark argument of a
thunk call as DECL_GIMPLE_REG_P when vector or complex type.
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80104
* gcc.dg/ipa/pr80104.c: New test.
From-SVN: r246525
Claudiu Zissulescu [Tue, 28 Mar 2017 08:56:44 +0000 (10:56 +0200)]
[ARC] Define _REENTRANT when -pthread is passed.
The compiler is supposed to have the builtin defined _REENTRANT defined
when -pthread is passed, which wasn't done on the ARC architecture.
When _REENTRANT is not passed, the C library will not use reentrant
functions, and the latest version of ax_pthread.m4 from the
autoconf-archive will no longer detect that thread support is
available (see https://savannah.gnu.org/patch/?8186).
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* config/arc/arc.h (CPP_SPEC): Add subtarget_cpp_spec.
(EXTRA_SPECS): Define.
(SUBTARGET_EXTRA_SPECS): Likewise.
(SUBTARGET_CPP_SPEC): Likewise.
* config/arc/elf.h (EXTRA_SPECS): Renamed to
SUBTARGET_EXTRA_SPECS.
* config/arc/linux.h (SUBTARGET_CPP_SPEC): Define.
Co-Authored-By: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
From-SVN: r246524
Claudiu Zissulescu [Tue, 28 Mar 2017 08:56:33 +0000 (10:56 +0200)]
[ARC] Update ARC SIMD patterns.
vec_select expects in selection a list of subparts. The old ARC SIMD
extension instructions were not up-to-date.
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/simdext.md (vst64_insn): Update pattern.
(vld32wh_insn): Likewise.
(vld32wl_insn): Likewise.
(vld64_insn): Likewise.
(vld32_insn): Likewise.
From-SVN: r246523
Marek Polacek [Tue, 28 Mar 2017 08:13:04 +0000 (08:13 +0000)]
re PR sanitizer/80067 (ICE in fold_comparison with -fsanitize=undefined)
PR sanitizer/80067
* fold-const.c (fold_comparison): Use protected_set_expr_location
instead of SET_EXPR_LOCATION.
* c-c++-common/ubsan/shift-10.c: New test.
From-SVN: r246521
Jonathan Wakely [Tue, 28 Mar 2017 07:35:04 +0000 (08:35 +0100)]
PR libstdc++/80229 restore support for shared_ptr<function type>
PR libstdc++/80229
* include/bits/shared_ptr_base.h
(__shared_ptr::_M_enable_shared_from_this_with): Change parameters to
non-const and then use remove_cv to get unqualified type.
* testsuite/20_util/enable_shared_from_this/members/const.cc: Don't
cast away constness on object created const.
* testsuite/20_util/shared_ptr/cons/80229.cc: New test.
From-SVN: r246520
Markus Trippelsdorf [Tue, 28 Mar 2017 05:47:13 +0000 (05:47 +0000)]
Avoid name lookup warning
/home/markus/gcc/gcc/tree.c: In function ‘void inchash::add_expr(const_tree, inchash::hash&, unsigned int)’:
/home/markus/gcc/gcc/tree.c:8013:11: warning: name lookup of ‘i’ changed
for (i = TREE_OPERAND_LENGTH (t) - 1; i >= 0; --i)
^
/home/markus/gcc/gcc/tree.c:7773:7: warning: matches this ‘i’ under ISO standard rules
int i;
^
/home/markus/gcc/gcc/tree.c:7869:16: warning: matches this ‘i’ under old rules
for (int i = 0; i < TREE_VEC_LENGTH (t); ++i)
^
From-SVN: r246519
Jeff Law [Tue, 28 Mar 2017 03:30:35 +0000 (21:30 -0600)]
Fix PR# in last commit
From-SVN: r246518
Jeff Law [Tue, 28 Mar 2017 03:22:25 +0000 (21:22 -0600)]
re PR target/80162 (ICE on invalid code (address of register variable))
PR tree-optimization/80162
* tree-ssa-dom.c (derive_equivalences_from_bit_ior): Fix typo in
function name. Limit recursion depth.
(record_temporary_equivalences): Corresponding changes.
PR tree-optimization/80162
* gcc.c-torture/compile/pr80216.c: New test.
From-SVN: r246517
GCC Administrator [Tue, 28 Mar 2017 00:16:19 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r246516
Jonathan Wakely [Mon, 27 Mar 2017 22:00:45 +0000 (23:00 +0100)]
Restructure -Wno-narrowing documentation
* doc/invoke.texi (-Wno-narrowing): Reorder so default behavior is
covered first.
From-SVN: r246513
Jakub Jelinek [Mon, 27 Mar 2017 21:07:21 +0000 (23:07 +0200)]
re PR target/80162 (ICE on invalid code (address of register variable))
PR middle-end/80162
c-family/
* c-common.c (c_common_mark_addressable_vec): Don't set
TREE_ADDRESSABLE on DECL_HARD_REGISTER.
c/
* c-tree.h (c_mark_addressable): Add array_ref_p argument.
* c-typeck.c (c_mark_addressable): Likewise. Look through
VIEW_CONVERT_EXPR unless array_ref_p and VCE is from VECTOR_TYPE
to ARRAY_TYPE.
(build_array_ref): Pass true as array_ref_p to c_mark_addressable.
cp/
* cp-tree.h (cxx_mark_addressable): Add array_ref_p argument.
* typeck.c (cxx_mark_addressable): Likewise. Look through
VIEW_CONVERT_EXPR unless array_ref_p and VCE is from VECTOR_TYPE
to ARRAY_TYPE.
(cp_build_array_ref): Pass true as array_ref_p to cxx_mark_addressable.
testsuite/
* c-c++-common/pr80162-1.c: New test.
* c-c++-common/pr80162-2.c: New test.
* c-c++-common/pr80162-3.c: New test.
From-SVN: r246512
Jakub Jelinek [Mon, 27 Mar 2017 21:00:35 +0000 (23:00 +0200)]
re PR target/80102 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2330)
PR target/80102
* reg-notes.def (REG_CFA_NOTE): Define. Use it for CFA related
notes.
* cfgcleanup.c (reg_note_cfa_p): New array.
(insns_have_identical_cfa_notes): New function.
(old_insns_match_p): Don't cross-jump in between /f
and non-/f instructions. If both i1 and i2 are frame related,
verify all CFA notes, their order and content.
* g++.dg/opt/pr80102.C: New test.
From-SVN: r246511
Joseph Myers [Mon, 27 Mar 2017 20:31:49 +0000 (21:31 +0100)]
* de.po, fr.po: Update.
From-SVN: r246510
Michael Meissner [Mon, 27 Mar 2017 19:19:00 +0000 (19:19 +0000)]
re PR target/78543 (ICE in push_reload, at reload.c:1349 on powerpc64le-linux-gnu)
[gcc]
2017-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78543
* config/rs6000/rs6000.md (bswaphi2_extenddi): Combine bswap
HImode and SImode with zero extend to DImode to one insn.
(bswap<mode>2_extenddi): Likewise.
(bswapsi2_extenddi): Likewise.
(bswaphi2_extendsi): Likewise.
(bswaphi2): Combine bswap HImode and SImode into one insn.
Separate memory insns from swapping register.
(bswapsi2): Likewise.
(bswap<mode>2): Likewise.
(bswaphi2_internal): Delete, no longer used.
(bswapsi2_internal): Likewise.
(bswap<mode>2_load): Split bswap HImode/SImode into separate load,
store, and gpr<-gpr swap insns.
(bswap<mode>2_store): Likewise.
(bswaphi2_reg): Register only splitter, combine with the splitter.
(bswaphi2 splitter): Likewise.
(bswapsi2_reg): Likewise.
(bswapsi2 splitter): Likewise.
(bswapdi2): If we have the LDBRX and STDBRX instructions, split
the insns into load, store, and register/register insns.
(bswapdi2_ldbrx): Likewise.
(bswapdi2_load): Likewise.
(bswapdi2_store): Likewise.
(bswapdi2_reg): Likewise.
[gcc/testsuite]
2017-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78543
* gcc.target/powerpc/pr78543.c: New test.
From-SVN: r246508
Dominique d'Humieres [Mon, 27 Mar 2017 18:51:58 +0000 (20:51 +0200)]
list_read.c: Insert /* Fall through.
2017-03-27 Dominique d'Humieres <dominiq@lps.ens.fr>
* io/list_read.c: Insert /* Fall through. */ in the macro
CASE_SEPARATORS in order to silence warnings.
From-SVN: r246507
Gunther Nikl [Mon, 27 Mar 2017 17:53:35 +0000 (17:53 +0000)]
system.h (HAVE_DESIGNATED_INITIALIZERS): Fix non C++ case.
* system.h (HAVE_DESIGNATED_INITIALIZERS): Fix non C++ case.
(HAVE_DESIGNATED_UNION_INITIALIZERS): Likewise.
From-SVN: r246506
Kelvin Nilsen [Mon, 27 Mar 2017 17:04:07 +0000 (17:04 +0000)]
re PR target/80103 (ICE in output_1144, at config/rs6000/vsx.md:2298)
gcc/testsuite/ChangeLog:
2017-03-27 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/80103
* gcc.target/powerpc/pr80103-1.c: New test.
gcc/ChangeLog:
2017-03-27 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/80103
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Edit and
add comments.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
special handling for target option conflicts between dform
options (-mpower9-dform, -mpower9-dform-vector,
-mpower9-dform-scalar) and -mno-direct-move.
From-SVN: r246505
Pedro Alves [Mon, 27 Mar 2017 14:23:49 +0000 (14:23 +0000)]
cplus_demangle_fill_component: Handle DEMANGLE_COMPONENT_RVALUE_REFERENCE
This patch almost a decade ago:
...
2007-08-31 Douglas Gregor <doug.gregor@gmail.com>
* cp-demangle.c (d_dump): Handle
DEMANGLE_COMPONENT_RVALUE_REFERENCE.
(d_make_comp): Ditto.
...
... missed doing the same change to cplus_demangle_fill_component that
was done to d_make_comp. I.e., teach it to only validate that we're
not passing in a "right" subtree. GDB has recently (finally) learned
about rvalue references, and a change to make it use
cplus_demangle_fill_component more ran into an assertion because of
this.
(GDB is the only user of cplus_demangle_fill_component in both the gcc
and binutils-gdb trees.)
libiberty/ChangeLog:
2017-03-27 Pedro Alves <palves@redhat.com>
* cp-demint.c (cplus_demangle_fill_component): Handle
DEMANGLE_COMPONENT_RVALUE_REFERENCE.
From-SVN: r246502
Richard Biener [Mon, 27 Mar 2017 12:52:13 +0000 (12:52 +0000)]
re PR tree-optimization/80181 (ICE in set_lattice_value, at tree-ssa-ccp.c:505)
2017-03-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/80181
* tree-ssa-ccp.c (likely_value): UNDEFINED ^ X is UNDEFINED.
* gcc.dg/torture/pr80181.c: New testcase.
From-SVN: r246500
Claudiu Zissulescu [Mon, 27 Mar 2017 10:56:46 +0000 (12:56 +0200)]
[ARC] Fix move_double_src_operand predicate.
Durring compilation process, (subreg (mem ...) ...) can occur. Hence,
we need to check if the address of mem is a valid one. This patch is
fixing this check by directly calling the address_operand, instead of
calling move_double_src_operand, as the latter is always checking
against the original mode, thus, returning false when the inner and
outer modes are different.
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/predicates.md (move_double_src_operand): Replace the
call to move_double_src_operand with a call to address_operand.
From-SVN: r246499
Claudiu Zissulescu [Mon, 27 Mar 2017 10:56:35 +0000 (12:56 +0200)]
[ARC] Fix divdf3 emulation for arcem.
libgcc/
2017-02-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/ieee-754/divdf3.S (__divdf3): Use __ARCEM__.
From-SVN: r246498
Claudiu Zissulescu [Mon, 27 Mar 2017 10:56:24 +0000 (12:56 +0200)]
[ARC] Disable TP register when building for bare metal.
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/elf.h (ARGET_ARC_TP_REGNO_DEFAULT): Define.
* config/arc/linux.h (ARGET_ARC_TP_REGNO_DEFAULT): Likewise.
* config/arc/arc.opt (mtp-regno): Use ARGET_ARC_TP_REGNO_DEFAULT.
From-SVN: r246497
Claudiu Zissulescu [Mon, 27 Mar 2017 10:56:14 +0000 (12:56 +0200)]
[ARC] Fix detection of long immediate for load/store operands.
ARC can use scaled offsets when loading (i.e. ld.as rA,[base,
offset]). Where base and offset can be a register or an immediate
operand. The scaling only applies on the offset part of the
instruction. The compiler can accept an address like this:
(plus:SI (mult:SI (reg:SI 2 r2 [orig:596 _2129 ] [596])
(const_int 4 [0x4]))
(const_int 60 [0x3c]))
Hence, to emit this instruction we place the (const_int 60) into base
and the register into offset to take advantage of the scaled offset
facility of the load instruction. As a result the length of the load
instruction is 8 bytes. However, the long_immediate_loadstore_operand
predicate used for calculating the length attribute doesn't recognize
this address and returns a wrong decision leading to a wrong length
computation for a load instruction using the above address.
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/predicates.md (long_immediate_loadstore_operand):
Consider scaled addresses cases.
From-SVN: r246496
Claudiu Zissulescu [Mon, 27 Mar 2017 10:56:04 +0000 (12:56 +0200)]
[ARC] Save/restore blink when in ISR.
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_epilogue_uses): BLINK should be also
restored when in interrupt.
* config/arc/arc.md (simple_return): ARCv2 rtie instruction
doesn't have delay slot.
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gcc.target/arc/interrupt-4.c: New file.
From-SVN: r246495
Richard Biener [Mon, 27 Mar 2017 10:50:55 +0000 (10:50 +0000)]
re PR ipa/79776 (ICE on valid code in insert_vi_for_tree, at tree-ssa-structalias.c:2807)
2017-03-27 Richard Biener <rguenther@suse.de>
PR ipa/79776
* tree-ssa-structalias.c (associate_varinfo_to_alias): Skip
inlined thunk clones.
* g++.dg/ipa/pr79776.C: New testcase.
From-SVN: r246494
Jakub Jelinek [Mon, 27 Mar 2017 08:25:01 +0000 (10:25 +0200)]
re PR sanitizer/80168 (ICE in make_decl_rtl, at varasm.c:1311 w/ VLA and -fsanitize=address)
PR sanitizer/80168
* asan.c (instrument_derefs): Copy over last operand from
original COMPONENT_REF to the new COMPONENT_REF with
DECL_BIT_FIELD_REPRESENTATIVE.
* ubsan.c (instrument_object_size): Likewise.
* gcc.dg/asan/pr80168.c: New test.
From-SVN: r246492
Richard Biener [Mon, 27 Mar 2017 08:07:49 +0000 (08:07 +0000)]
re PR tree-optimization/80170 (SLP vectorization creates aligned access)
2017-03-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/80170
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Make
sure DR/SCEV didnt fold in constants we do not see when looking
at the reference base alignment.
* gcc.dg/pr80170.c: New testcase.
From-SVN: r246491
Richard Biener [Mon, 27 Mar 2017 07:35:44 +0000 (07:35 +0000)]
re PR tree-optimization/80171 (ICE (Segmentation fault) with optimization)
2017-03-27 Richard Biener <rguenther@suse.de>
PR middle-end/80171
* gimple-fold.c (fold_ctor_reference): Properly guard against
NULL return value from canonicalize_constructor_val.
* g++.dg/torture/pr80171.C: New testcase.
From-SVN: r246490
GCC Administrator [Mon, 27 Mar 2017 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r246489
John David Anglin [Sun, 26 Mar 2017 15:40:29 +0000 (15:40 +0000)]
pr79732.c: Require alias support.
* gcc.dg/torture/pr79732.c: Require alias support.
* gcc.dg/tree-ssa/pr56727.c: Move dg-require-alias after dg-do compile.
From-SVN: r246485
John David Anglin [Sun, 26 Mar 2017 15:19:40 +0000 (15:19 +0000)]
coarray_failed_images_1.f08: Add "-latomic" option if libatomic_available.
* gfortran.dg/coarray_failed_images_1.f08: Add "-latomic" option if
libatomic_available.
* gfortran.dg/coarray_image_status_1.f08: Likewise.
* gfortran.dg/coarray_stopped_images_1.f08: Likewise.
From-SVN: r246484
Markus Trippelsdorf [Sun, 26 Mar 2017 12:33:35 +0000 (12:33 +0000)]
Fix PR80183 : _M_color not moved
PR libstdc++/80183
* include/bits/stl_tree.h:
(_Rb_tree_header::_M_move_data(_Rb_tree_header&)): Also save _M_color.
From-SVN: r246483
GCC Administrator [Sun, 26 Mar 2017 00:16:11 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r246482
Jerry DeLisle [Sat, 25 Mar 2017 18:48:01 +0000 (18:48 +0000)]
re PR fortran/78881 ([F03] reading from string with DTIO procedure does not work properly)
2017-03-25 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR libgfortran/78881
* io/io.h (st_parameter_dt): Rename unused component last_char to
child_saved_iostat. Move comment to gfc_unit.
* io/list_read.c (list_formatted_read_scalar): After call to
child READ procedure, save the returned iostat value for later
check. (finish_list_read): Only finish READ if child_saved_iostat
was OK.
* io/transfer.c (read_sf_internal): If there is a saved character
in last character, seek back one. Add a new check for EOR
condition. (read_sf): If there is a saved character
in last character, seek back one. (formatted_transfer_scalar_read):
Initialize last character before invoking child procedure.
(data_transfer_init): If child dtio, set advance
status to nonadvancing. Move update of size and check for EOR
condition to before child dtio return.
* gfortran.dg/dtio_26.f90: New test.
From-SVN: r246478
Paul Thomas [Sat, 25 Mar 2017 17:38:17 +0000 (17:38 +0000)]
re PR fortran/80156 (Generic DTIO interface reported missing if public statement preceeds the interface block)
2017-03-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/80156
PR fortran/79382
* decl.c (access_attr_decl): Remove the error for an absent
generic DTIO interface and ensure that symbol has the flavor
FL_PROCEDURE.
2017-03-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/80156
PR fortran/79382
* gfortran.dg/dtio_23.f90 : Remove the dg-error and add the
testcase for PR80156. Add a main programme that tests that
the typebound generic is accessible.
From-SVN: r246476
Uros Bizjak [Sat, 25 Mar 2017 16:34:09 +0000 (17:34 +0100)]
re PR target/80180 (Incorrect codegen from rdseed intrinsic use (CVE-2017-11671))
PR target/80180
* config/i386/i386.c (ix86_expand_builtin)
<IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Do not expand arg0 between
flags reg setting and flags reg using instructions.
<IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Ditto. Use non-flags reg
clobbering instructions to zero extend op2.
From-SVN: r246475
Gerald Pfeifer [Sat, 25 Mar 2017 14:17:55 +0000 (14:17 +0000)]
install.texi (Configuration): Update link to AIX ld.
* doc/install.texi (Configuration) <--with-aix-soname>:
Update link to AIX ld.
From-SVN: r246474
Bernd Schmidt [Sat, 25 Mar 2017 01:12:04 +0000 (01:12 +0000)]
re PR target/80160 (operand has impossible constraints)
PR rtl-optimization/80160
PR rtl-optimization/80159
* lra-assigns.c (must_not_spill_p): Tighten new test to also take
reg_alternate_class into account.
* gcc.target/i386/pr80160.c: New test.
From-SVN: r246473
GCC Administrator [Sat, 25 Mar 2017 00:16:16 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r246472
Jakub Jelinek [Fri, 24 Mar 2017 21:43:08 +0000 (22:43 +0100)]
re PR target/79904 (ICE in annotate_constant_pool_refs, at config/s390/s390.c:7909)
PR sanitizer/79904
* gcc.dg/ubsan/pr79904-2.c: Add -Wno-psabi to dg-options.
From-SVN: r246468
Vladimir Makarov [Fri, 24 Mar 2017 18:47:38 +0000 (18:47 +0000)]
re PR target/80148 (operand has impossible constraints)
2017-03-24 Vladimir Makarov <vmakarov@redhat.com>
PR target/80148
* lra-assigns.c (assign_by_spills): Add spilled non-reload pseudos
to consider in curr_insn_transform.
From-SVN: r246467
Jason Merrill [Fri, 24 Mar 2017 14:40:13 +0000 (10:40 -0400)]
PR c++/77339 - ICE with invalid use of alias template.
* pt.c (lookup_template_class_1): Don't try to enter the scope of an
alias template.
From-SVN: r246462
Marek Polacek [Fri, 24 Mar 2017 14:22:01 +0000 (14:22 +0000)]
re PR c++/80119 (-Wmaybe-uninitialized wrongly flags the body of a short-circuited if-clause)
PR c++/80119
* cp-gimplify.c (cp_fold): Strip CLEANUP_POINT_EXPR if the expression
doesn't have side effects.
* g++.dg/warn/Wuninitialized-9.C: New test.
From-SVN: r246461
Jakub Jelinek [Fri, 24 Mar 2017 14:09:33 +0000 (15:09 +0100)]
genrecog.c (validate_pattern): Add VEC_SELECT validation.
* genrecog.c (validate_pattern): Add VEC_SELECT validation.
* genmodes.c (emit_min_insn_modes_c): Call emit_mode_nunits
and emit_mode_inner.
From-SVN: r246460
Andreas Krebbel [Fri, 24 Mar 2017 14:04:12 +0000 (14:04 +0000)]
S/390: arch12: New builtins.
This patch implements a set of low-level builtins for instruction
which would otherwise not be emitted by the compiler plus a set of
high-level builtins as defined by the IBM XL compiler. The high-level
builtins will be described in a future revision of the z/OS XL C/C++
Programming Guide.
I'll try to come up with a documentation appropriate for the GCC
manual as well (sometimes in the future).
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390-builtins.def: Add VXE builtins. Add a flags
argument to the overloaded builtin variants. Use the new flag to
deprecate certain builtin variants.
* config/s390/s390-builtin-types.def: Add new builtin types.
* config/s390/s390-builtins.h: Support new flags field for
overloaded builtins.
* config/s390/s390-c.c (OB_DEF_VAR): New flags field.
(s390_macro_to_expand): Enable vector float data type.
(s390_cpu_cpp_builtins_internal): Indicate support of the new
builtins by incrementing the __VEC__ version number.
(s390_expand_overloaded_builtin): Support expansion of vec_xl and
vec_xst.
(s390_resolve_overloaded_builtin): Emit error messages depending
on the builtin flags.
* config/s390/s390.c (s390_expand_builtin): Support additional
flags argument. Change error message to match the messages
emitted in s390-c.c.
* config/s390/s390.md: New UNSPEC_* constants.
(op_type): Add new instruction types.
* config/s390/vecintrin.h: Add new builtins and test data class
constants.
* config/s390/vx-builtins.md (V_HW_32_64): Add V4SF.
(V_HW_4, VEC_HW, VECF_HW): New mode iterators.
(VEC_INEXACT, VEC_NOINEXACT): New constants.
("vec_splats<mode>", "vec_insert<mode>", "vec_promote<mode>")
("vec_insert_and_zero<mode>", "vec_mergeh<mode>")
("vec_mergel<mode>"): V_HW -> VEC_HW.
("vlrlrv16qi", "vstrlrv16qi", "vbpermv16qi", "vec_msumv2di")
("vmslg", "*vftci<mode>_cconly", "vftci<mode>_intcconly")
("*vftci<mode>", "vftci<mode>_intcc", "vec_double_s64")
("vec_double_u64", "vfmin<mode>", "vfmax<mode>"): New definition.
("and_av2df3", "and_cv2df3", "vec_andc_av2df3")
("vec_andc_cv2df3", "xor_av2df3", "xor_cv2df3", "vec_nor_av2df3")
("vec_nor_cv2df3", "ior_av2df3", "ior_cv2df3", "vec_nabs")
("*vftcidb", "*vftcidb_cconly", "vftcidb"): Remove definition.
("vec_all_<fpcmpcc:code>v2df", "vec_any_<fpcmpcc:code>v2df")
("vec_scatter_elementv4si_DI", "vec_cmp<fpcmp:code>v2df")
("vec_di_to_df_s64", "vec_di_to_df_u64", "vec_df_to_di_u64")
("vfidb", "*vldeb", "*vledb", "*vec_cmp<insn_cmp>v2df_cconly")
("vec_cmpeqv2df_cc", "vec_cmpeqv2df_cc", "vec_cmphv2df_cc")
("vec_cmphev2df_cc", "*vec_cmpeqv2df_cc")
("*vec_cmphv2df_cc", "*vec_cmphev2df_cc"): Enable new modes as ...
("vec_all_<fpcmpcc:code><mode>", "vec_any_<fpcmpcc:code><mode>")
("vec_scatter_element<V_HW_4:mode>_DI")
("vec_cmp<fpcmp:code><mode>", "vcdgb", "vcdlgb", "vclgdb")
("vec_fpint<mode>", "vflls")
("vflrd", "*vec_cmp<insn_cmp><mode>_cconly", "vec_cmpeq<mode>_cc")
("vec_cmpeq<mode>_cc", "vec_cmph<mode>_cc", "vec_cmphe<mode>_cc")
("*vec_cmpeq<mode>_cc", "*vec_cmph<mode>_cc")
("*vec_cmphe<mode>_cc"): ... these.
("vec_ctd_s64", "vec_ctsl", "vec_ctul", "vec_st2f"): Use rounding
mode constant instead of magic value.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/target-attribute/tattr-3.c: Adjust error message
and remove the high-level builtin. The error message for the
would prevent compilation from reaching the second.
* gcc.target/s390/target-attribute/tattr-4.c: Likewise.
From-SVN: r246459
Andreas Krebbel [Fri, 24 Mar 2017 14:03:24 +0000 (14:03 +0000)]
S/390: arch12: Support new vector floating point modes.
This patch adds support for the new floating point vector elements (SF
and TF) introduced with arch12.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_compare): Support other
vector floating point modes than just V2DF.
(s390_expand_vcond): Likewise.
(s390_hard_regno_mode_ok): Allow SFmode values in VRs.
(s390_cannot_change_mode_class): Prevent mode changes between TF
and V1TF in vector registers.
* config/s390/s390.md (DF, SF): New mode attributes.
("*cmp<mode>_ccs", "add<mode>3", "sub<mode>3", "mul<mode>3")
("fma<mode>4", "fms<mode>4", "div<mode>3", "*neg<mode>2"): Add
SFmode support for VRs.
* config/s390/vector.md (V_HW, V_HW2, VT_HW, ti*, nonvec): Add new
vector fp modes.
(VFT, VF_HW): New mode iterators.
(vw, sdx): New mode attributes.
("addv2df3", "subv2df3", "mulv2df3", "divv2df3", "sqrtv2df2")
("fmav2df4","fmsv2df4", "negv2df2", "absv2df2", "*negabsv2df2")
("smaxv2df3", "sminv2df3", "*vec_cmp<VFCMP_HW_OP:code>v2df_nocc")
("vec_cmpuneqv2df", "vec_cmpltgtv2df", "vec_orderedv2df")
("vec_unorderedv2df"): Adjust the v2df only patterns to support
also the new vector floating point modes. Renaming to ...
("add<mode>3", "sub<mode>3", "mul<mode>3", "div<mode>3")
("sqrt<mode>2", "fma<mode>4", "fms<mode>4", "neg<mode>2")
("abs<mode>2", "negabs<mode>2", "smax<mode>3")
("smin<mode>3", "*vec_cmp<VFCMP_HW_OP:code><mode>_nocc")
("vec_cmpuneq<mode>", "vec_cmpltgt<mode>", "vec_ordered<mode>")
("vec_unordered<mode>"): ... these.
("neg_fma<mode>4", "neg_fms<mode>4", "*smax<mode>3_vxe")
("*smin<mode>3_vxe", "*sminv2df3_vx", "*vec_extendv4sf")
("*vec_extendv2df"): New insn definitions.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/negfma-1.c: New test.
From-SVN: r246458
Andreas Krebbel [Fri, 24 Mar 2017 14:02:51 +0000 (14:02 +0000)]
S/390: arch12: Support the mul/add/subtract
instructions.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("*adddi3_sign", "*subdi3_sign", "mulditi3")
("mulditi3_2", "*muldi3_sign"): New patterns.
("muldi3", "*muldi3", "mulsi3", "*mulsi3"): Add an expander and
rename the pattern definition.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/arch12/aghsghmgh-1.c: New test.
* gcc.target/s390/arch12/mul-1.c: New test.
* gcc.target/s390/arch12/mul-2.c: New test.
From-SVN: r246457
Andreas Krebbel [Fri, 24 Mar 2017 14:02:17 +0000 (14:02 +0000)]
S/390: arch12: Add indirect branch pattern
This adds support for the branch indirect instruction.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("indirect_jump"): Turn insn definition into
expander.
("*indirect_jump", "*indirect2_jump"): New pattern definitions.
From-SVN: r246456
Andreas Krebbel [Fri, 24 Mar 2017 14:01:54 +0000 (14:01 +0000)]
S/390: arch12: Add vllezlf instruction.
This adds support for the vector load element and zero instruction and
makes sure it is used when initializing vectors with elements while
setting the rest to 0.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Use vllezl
instruction if possible.
* config/s390/vector.md (vec_halfnumelts): New mode
attribute.
("*vec_vllezlf<mode>"): New pattern.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/vllezlf-1.c: New test.
From-SVN: r246455
Andreas Krebbel [Fri, 24 Mar 2017 14:01:18 +0000 (14:01 +0000)]
S/390: arch12: New vector popcount variants
arch12 provides pop count vector instructions for bigger elements than
just chars.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/popcount-1.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vector.md ("popcountv16qi2", "popcountv8hi2")
("popcountv4si2", "popcountv2di2"): Rename to ...
("popcount<mode>2", "popcountv8hi2_vx", "popcountv4si2_vx")
("popcountv2di2_vx"): ... these and add !TARGET_VXE to the
condition.
("popcount<mode>2_vxe"): New pattern.
From-SVN: r246454
Andreas Krebbel [Fri, 24 Mar 2017 14:00:43 +0000 (14:00 +0000)]
S/390: arch12: Add support for new vector bit
operations.
This patch adds support for the new bit operations introduced with
arch12.
The patch also renames the one complement pattern to the proper RTL
standard name.
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_rtx_costs): Return low costs for the
canonical form of ~AND to make sure the new instruction will be
used.
* config/s390/vector.md ("notand<mode>3", "ior_not<mode>3")
("notxor<mode>3"): Add new pattern definitions.
("*not<mode>"): Rename to ...
("one_cmpl<mode>2"): ... this.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/bitops-1.c: New test.
From-SVN: r246453
Andreas Krebbel [Fri, 24 Mar 2017 13:59:51 +0000 (13:59 +0000)]
S/390: arch12: Add arch12 option.
This patch covers the mechanical work of making the new architecture
option arch12 available wherever it will be needed later.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/s390.exp: Run tests in arch12 and vxe dirs.
* lib/target-supports.exp: Add effective target check s390_vxe.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* common/config/s390/s390-common.c (processor_flags_table): Add
arch12.
* config.gcc: Add arch12.
* config/s390/driver-native.c (s390_host_detect_local_cpu):
Default to arch12 for unknown CPU model numbers.
* config/s390/s390-builtins.def: Add B_VXE builtin flag.
* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Adjust
PROCESSOR_max sanity check.
* config/s390/s390-opts.h (enum processor_type): Add
PROCESSOR_ARCH12.
* config/s390/s390.c (processor_table): Add arch12.
(s390_expand_builtin): Add check for B_VXE flag.
(s390_issue_rate): Add PROCESSOR_ARCH12.
(s390_get_sched_attrmask): Likewise.
(s390_get_unit_mask): Likewise.
(s390_sched_score): Enable z13 scheduling for arch12.
(s390_sched_reorder): Likewise.
(s390_sched_variable_issue): Likewise.
* config/s390/s390.h (enum processor_flags): Add PF_ARCH12 and
PF_VXE.
(s390_tune_attr): Use z13 scheduling also for arch12.
(TARGET_CPU_ARCH12, TARGET_CPU_ARCH12_P, TARGET_CPU_VXE)
(TARGET_CPU_VXE_P, TARGET_ARCH12, TARGET_ARCH12_P, TARGET_VXE)
(TARGET_VXE_P): New macros.
* config/s390/s390.md: Add arch12 to cpu attribute. Add arch12
and vxe to cpu_facility. Add arch12 and vxe to enabled attribute.
* config/s390/s390.opt: Add arch12 as processor_type.
From-SVN: r246452
Andreas Krebbel [Fri, 24 Mar 2017 13:59:13 +0000 (13:59 +0000)]
S/390: Rearrange fixuns_trunc pattern definitions.
This reworks the fixuns_trunc* patterns a bit which got quite confusing
after adding z13 support. Now we just have a single RTL standard name
expander definition ("fixuns_trunc<FP:mode><GPR:mode>2") which then
multiplexes to either the emulation variants *_emu or the hardware
implementations.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md
("fixuns_truncdddi2", "fixuns_trunctddi2")
("fixuns_trunc<BFP:mode><GPR:mode>2"): Merge into ...
("fixuns_trunc<FP:mode><GPR:mode>2"): New expander.
("fixuns_trunc<BFP:mode><GPR:mode>2", "fixuns_trunc<mode>si2"):
Rename expanders to ...
("fixuns_trunc<BFP:mode><GPR:mode>2_emu")
("fixuns_truncdddi2_emu"): ... these.
("fixuns_trunc<mode>si2_emu"): New expander.
("*fixuns_truncdfdi2_z13"): Rename to ...
("*fixuns_truncdfdi2_vx"): ... this.
From-SVN: r246451
Andreas Krebbel [Fri, 24 Mar 2017 13:58:41 +0000 (13:58 +0000)]
S/390: Use wfc for scalar vector compares
The z13 vector support used the vector style comparison instructions
also for the scalar compares in vector registers. However, it is much
more convenient to just use the compare scalar instruction for that
purpose. The advantage is that this instruction generates a CC result
as our compares usually do. So this results in quite some code to be
removed from the backend.
Regression tested on s390x.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/2964.md: Remove the single element vector compare
instructions which are no longer used.
* config/s390/s390.c (s390_select_ccmode): Remove handling of
vector CCmodes.
(s390_canonicalize_comparison): Remove handling of DFmode
compares.
(s390_expand_vec_compare_scalar): Remove function.
(s390_emit_compare): Don't call s390_expand_vec_compare_scalar.
* config/s390/s390.md ("*vec_cmp<insn_cmp>df_cconly"): Remove
pattern.
("*cmp<mode>_ccs"): Add wfcdb instruction.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-scalar-cmp-1.c: Adjust for the
comparison instructions used from now on.
From-SVN: r246450
Andreas Krebbel [Fri, 24 Mar 2017 13:57:58 +0000 (13:57 +0000)]
S/390: Move and rename vector check.
Move the target support routine for the vector facility to the common
code file. This is required to enable the generic vectorization tests
on S/390. While doing this the too generic name for the check (vector)
is changed to s390_vx. The renaming required to modify all the
testcases currently using that check.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/s390.exp (check_effective_target_vector):
Include target-supports.exp and move target_vector check routine
...
* lib/target-supports.exp (check_effective_target_s390_vx): ... to
here and rename it.
* gcc.target/s390/htm-builtins-z13-1.c: Rename effective target
check from vector to s390_vx.
* gcc.target/s390/target-attribute/tpragma-struct-vx-1.c: Likewise.
* gcc.target/s390/target-attribute/tpragma-struct-vx-2.c: Likewise.
* gcc.target/s390/vector/stpcpy-1.c: Likewise.
* gcc.target/s390/vector/vec-abi-vararg-1.c: Likewise.
* gcc.target/s390/vector/vec-clobber-1.c: Likewise.
* gcc.target/s390/vector/vec-genbytemask-1.c: Likewise.
* gcc.target/s390/vector/vec-genmask-1.c: Likewise.
* gcc.target/s390/vector/vec-nopeel-1.c: Likewise.
* gcc.target/s390/vector/vec-vrepi-1.c: Likewise.
From-SVN: r246449
Andreas Krebbel [Fri, 24 Mar 2017 13:57:19 +0000 (13:57 +0000)]
S/390: movdf improvements
This patch add the vector load element from immediate instruction to the
movdf/dd pattern for loading a FP zero and it removes the vector
instructions from the mov<mode>_64 pattern. These were pointless in
there because z13 support implies DFP support so these instructions will
always be matched in the mov<mode>_64dfp pattern instead.
Regression tested on s390x
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("mov<mode>_64dfp" DD_DF): Use vleig for loading a
FP zero.
("*mov<mode>_64" DD_DF): Remove the vector instructions. These
will anyway by matched by mov<mode>_64dfp.
From-SVN: r246448
Andreas Krebbel [Fri, 24 Mar 2017 13:55:41 +0000 (13:55 +0000)]
S/390: movsf/sd pattern fixes.
The SD/SFmode move pattern used a wrong mnemonic for vector load
element.
On the vector load element instruction was an operand missing.
Regression tested on s390x.
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("mov<mode>" SD_SF): Change vleg/vsteg to
vlef/vstef. Add missing operand to vleif.
From-SVN: r246447
Andreas Krebbel [Fri, 24 Mar 2017 13:54:23 +0000 (13:54 +0000)]
S/390: vec_init improvements
This enables the vec_init pattern also for V4SF, V1TI, and V1TF.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-init-2.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Enable vector load
pair for all vector types with 64 bit elements.
* config/s390/vx-builtins.md (V_HW_64): Move mode iterator to ...
* config/s390/vector.md (V_HW_64): ... here.
(V_128_NOSINGLE): New mode iterator.
("vec_init<V_HW:mode>"): Use V_128 as mode iterator.
("*vec_splat<mode>"): Use V_128_NOSINGLE mode iterator.
("*vec_tf_to_v1tf", "*vec_ti_to_v1ti"): New pattern definitions.
("*vec_load_pairv2di"): Change to ...
("*vec_load_pair<mode>"): ... this one.
From-SVN: r246446
Andreas Krebbel [Fri, 24 Mar 2017 13:53:43 +0000 (13:53 +0000)]
S/390: Improve support of 128 bit vectors in GPRs
This patch improves the handling of 128 bit vectors residing in GPRs
by adding more alternatives to the move pattern.
Regression tested on s390x.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/constraints.md: Add comments.
(jKK): Reject element sizes > 8 bytes.
* config/s390/s390.c (s390_split_ok_p): Enable splitting also for
s_operands.
* config/s390/s390.md: Add the s_operand checks formerly in
s390_split_ok_p to various splitters where they are still
required.
* config/s390/vector.md ("mov<mode>" V_128): Add GPR alternatives
for 128 bit vectors. Plus two splitters.
From-SVN: r246445
Andreas Krebbel [Fri, 24 Mar 2017 13:53:08 +0000 (13:53 +0000)]
S/390: Rename cpu facility vec to vx.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md: Rename the cpu facilty vec to vx throughout
the file.
From-SVN: r246444
Andreas Krebbel [Fri, 24 Mar 2017 13:52:30 +0000 (13:52 +0000)]
S/390: PR79904: Disallow reg + sym_ref literal pool addresses.
We accept reg + sym_ref as valid address if sym_ref is a literal pool
reference knowing that it will be rewritten as r13 + reg + offset.
However, annotate_constant_pool_refs was never able to handle that.
With the patch only single sym_refs are accepted.
Regression tested on s390x.
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79904
* config/s390/s390.c (s390_decompose_address): Reject reg +
sym_ref literal pool references.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.dg/ubsan/pr79904-2.c: New test.
From-SVN: r246443
Andreas Krebbel [Fri, 24 Mar 2017 13:51:32 +0000 (13:51 +0000)]
S/390: PR79893: Add diagnostics vec_load_bndry builtin.
The boundary argument of the vec_load_bndry builtin needs to be
rewritten. At that point it must be constant already. The current
diagnostics in s390_expand_builtins is too late for this. The patch
adds an additional check for that builtin which will be triggered
already during preprocessing.
Regression tested on s390x.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79893
* gcc.target/s390/zvector/pr79893.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79893
* config/s390/s390-c.c (s390_adjust_builtin_arglist): Issue an
error if the boundary argument is not constant.
From-SVN: r246442
Jakub Jelinek [Fri, 24 Mar 2017 13:37:01 +0000 (14:37 +0100)]
re PR rtl-optimization/80112 (ICE in doloop_condition_get at loop-doloop.c:158)
PR rtl-optimization/80112
* loop-doloop.c (doloop_condition_get): Don't check condition
if cmp isn't SET with IF_THEN_ELSE src.
* gcc.dg/pr80112.c: New test.
From-SVN: r246441
Rainer Orth [Fri, 24 Mar 2017 12:57:14 +0000 (12:57 +0000)]
Adjust c-c++-common/Wimplicit-fallthrough-7.c etc. line numbers
* c-c++-common/Wimplicit-fallthrough-7.c: Adjust dg-warning
etc. line numbers.
* gcc.dg/Walloca-1.c: Likewise.
* gcc.dg/Walloca-2.c: Likewise.
* gcc.dg/Wvla-larger-than-2.c: Likewise.
From-SVN: r246440
Bill Schmidt [Fri, 24 Mar 2017 12:34:19 +0000 (12:34 +0000)]
re PR tree-optimization/80158 (ICE in all_phi_incrs_profitable)
2017-03-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR tree-optimization/80158
* gimple-ssa-strength-reduction.c (replace_mult_candidate): When
replacing a candidate statement, also replace it for the
candidate's alternate interpretation.
(replace_rhs_if_not_dup): Likewise.
(replace_one_candidate): Likewise.
* gfortran.fortran-torture/compile/pr80158.f: New file.
From-SVN: r246439
Richard Biener [Fri, 24 Mar 2017 12:16:43 +0000 (12:16 +0000)]
re PR tree-optimization/80167 (ICE in translate_isl_ast_to_gimple::is_valid_rename at gcc/graphite-isl-ast-to-gimple.c:1139)
2017-03-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/80167
* graphite-isl-ast-to-gimple.c
(translate_isl_ast_to_gimple::is_valid_rename): Handle default-defs
properly.
(translate_isl_ast_to_gimple::get_rename): Likewise.
* gcc.dg/graphite/pr80167.c: New testcase.
From-SVN: r246438
Tom de Vries [Fri, 24 Mar 2017 06:29:06 +0000 (06:29 +0000)]
Require effective target global_constructor for two testcases
2017-03-24 Tom de Vries <tom@codesourcery.com>
PR testsuite/80092
* gcc.dg/no_profile_instrument_function-attr-1.c: Add
dg-require-effective-target global_constructor.
* gcc.dg/tls/emutls-2.c: Same.
From-SVN: r246436
Tom de Vries [Fri, 24 Mar 2017 06:28:53 +0000 (06:28 +0000)]
Require effective target indirect_jump in Wimplicit-fallthrough-34.c
2017-03-24 Tom de Vries <tom@codesourcery.com>
PR testsuite/80092
* c-c++-common/Wimplicit-fallthrough-34.c: Add
dg-require-effective-target indirect_jumps.
From-SVN: r246435
Tom de Vries [Fri, 24 Mar 2017 06:28:42 +0000 (06:28 +0000)]
Require effective target nonlocal_goto in pr79244.c
2017-03-24 Tom de Vries <tom@codesourcery.com>
PR testsuite/80092
* gcc.dg/torture/pr79244.c: Add dg-require-effective-target
nonlocal_goto.
From-SVN: r246434
Tom de Vries [Fri, 24 Mar 2017 06:28:12 +0000 (06:28 +0000)]
Add missing dg-require-effective-target alloca in gcc testsuite
2017-03-24 Tom de Vries <tom@codesourcery.com>
PR testsuite/80092
* gcc.dg/Walloca-7.c: Add dg-require-effective-target alloca.
* gcc.dg/Walloca-12.c: Same.
* gcc.dg/attr-alloc_size-8.c: Same.
* gcc.dg/Walloca-4.c: Same.
* gcc.dg/Walloca-8.c: Same.
* gcc.dg/Walloca-13.c: Same.
* gcc.dg/Walloca-14.c: Same.
* gcc.dg/attr-alloc_size-9.c: Same.
* gcc.dg/Walloca-1.c: Same.
* gcc.dg/tree-ssa/builtin-sprintf-warn-3.c: Same.
* gcc.dg/Walloca-5.c: Same.
* gcc.dg/Walloca-10.c: Same.
* gcc.dg/Walloca-9.c: Same.
* gcc.dg/attr-alloc_size-6.c: Same.
* gcc.dg/Wvla-larger-than-1.c: Same.
* gcc.dg/torture/pr71881.c: Same.
* gcc.dg/torture/pr71901.c: Same.
* gcc.dg/torture/pr78742.c: Same.
* gcc.dg/builtin-alloc-size.c: Same.
* gcc.dg/Walloca-2.c: Same.
* gcc.dg/Walloca-6.c: Same.
* gcc.dg/Walloca-11.c: Same.
* gcc.dg/attr-alloc_size-7.c: Same.
* gcc.dg/Wvla-larger-than-2.c: Same.
* gcc.dg/Walloca-3.c: Same.
* c-c++-common/Wimplicit-fallthrough-7.c: Same.
* gcc.c-torture/compile/pr79413.c: Same.
* gcc.c-torture/compile/pr78439.c: Same.
From-SVN: r246433
GCC Administrator [Fri, 24 Mar 2017 00:16:24 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r246431
Kelvin Nilsen [Thu, 23 Mar 2017 22:12:06 +0000 (22:12 +0000)]
p9-options-1.c: New test.
gcc/testsuite/ChangeLog:
2017-03-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/p9-options-1.c: New test.
gcc/ChangeLog:
2017-03-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/rs6000.c (rs6000_option_override_internal): Change
handling of certain combinations of target options, including the
combinations -mpower8-vector vs. -mno-vsx, -mpower9-vector vs.
-mno-power8-vector, and -mpower9_dform vs. -mno-power9-vector.
From-SVN: r246428
Jonathan Wakely [Thu, 23 Mar 2017 19:40:41 +0000 (19:40 +0000)]
Fix Debug Mode test failures
* testsuite/23_containers/array/tuple_interface/
tuple_element_debug_neg.cc: Adjust dg-error.
* testsuite/23_containers/list/operations/78389.cc: Fix less-than to
define a valid strict weak ordering.
* testsuite/23_containers/priority_queue/67085.cc: Disable test for
Debug Mode, due to debug checks making extra copies of predicate.
* testsuite/ext/pb_ds/regression/priority_queue_binary_heap-62045.cc:
Likewise.
From-SVN: r246426
Jonathan Wakely [Thu, 23 Mar 2017 19:40:21 +0000 (19:40 +0000)]
Fix broken links in manual and remove outdated info
* doc/xml/faq.xml: Add link.
* doc/xml/manual/backwards_compatibility.xml: Remove outdated
information on pre-ISO headers. Replace broken link to C++ FAQ Lite.
* doc/xml/manual/io.xml: Update broken link.
* doc/html/*: Regenerate.
From-SVN: r246425
Daniel Kruegler [Thu, 23 Mar 2017 19:40:16 +0000 (19:40 +0000)]
Implement LWG 2686, std::hash<error_condition>, for C++17
2017-03-23 Daniel Kruegler <daniel.kruegler@gmail.com>
Implement LWG 2686, Why is std::hash specialized for error_code,
but not error_condition?
* include/std/system_error (hash<error_condition>): Define for C++17.
* testsuite/20_util/hash/operators/size_t.cc (hash<error_condition>):
Instantiate test for error_condition.
* testsuite/20_util/hash/requirements/explicit_instantiation.cc
(hash<error_condition>): Instantiate hash<error_condition>.
From-SVN: r246424
Daniel Kruegler [Thu, 23 Mar 2017 19:40:07 +0000 (19:40 +0000)]
Implement P0607R0 "Inline Variables for Standard Library" for C++17
2017-03-23 Daniel Kruegler <daniel.kruegler@gmail.com>
* include/bits/c++config (_GLIBCXX17_INLINE): Define.
* include/bits/regex_constants.h (All std::regex_constants constants):
Add _GLIBCXX17_INLINE as per P0607R0.
* include/bits/std_mutex.h (defer_lock, try_to_lock, adopt_lock):
Likewise.
* include/bits/stl_pair.h (piecewise_construct): Likewise.
* include/bits/uses_allocator.h (allocator_arg, uses_allocator_v)
(__is_uses_allocator_constructible_v)
(__is_nothrow_uses_allocator_constructible_v): Likewise.
* include/std/chrono (treat_as_floating_point_v): Likewise.
* include/std/functional (is_bind_expression_v, is_placeholder_v):
Likewise.
* include/std/optional (nullopt): Likewise.
* include/std/ratio (ratio_equal_v, ratio_not_equal_v, ratio_less_v)
ratio_less_equal_v, ratio_greater_v, ratio_greater_equal_v): Likewise.
* include/std/system_error (is_error_code_enum_v)
(is_error_condition_enum_v): Likewise.
* include/std/tuple (tuple_size_v, ignore): Likewise.
(ignore): Declare ignore constexpr as per LWG 2773, declare assignment
constexpr as per LWG 2933.
* include/std/type_traits (All variable templates): Add
_GLIBCXX17_INLINE as per P0607R0.
* include/std/variant (variant_size_v, variant_npos, __index_of_v)
(__tuple_count_v, __exactly_once): Likewise.
* testsuite/18_support/headers/new/synopsis.cc
(hardware_destructive_interference_size)
(hardware_constructive_interference_size): Likewise for commented-out
variables.
* testsuite/20_util/tuple/creation_functions/constexpr.cc: Add new
test function for constexpr std::ignore (LWG 2773).
* testsuite/20_util/tuple/creation_functions/constexpr_cpp14.cc: New
test for LWG 2933.
From-SVN: r246423
Jason Merrill [Thu, 23 Mar 2017 18:23:25 +0000 (14:23 -0400)]
PR c++/80150 - ICE with overloaded variadic deduction.
* pt.c (try_one_overload): Remove asserts.
From-SVN: r246422
Kyrylo Tkachov [Thu, 23 Mar 2017 14:55:48 +0000 (14:55 +0000)]
[ARM] PR target/71436: Restrict *load_multiple pattern till after LRA
PR target/71436
* config/arm/arm.md (*load_multiple): Add reload_completed to
matching condition.
* gcc.c-torture/compile/pr71436.c: New test.
From-SVN: r246419
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