Sergei Trofimovich [Sat, 24 Jun 2017 17:40:41 +0000 (18:40 +0100)]
fix out-of-bounds access in elf.c:find_link
The out-of-bounds access is reproducible on 'ia64-strip' command
(see sample from https://bugs.gentoo.org/show_bug.cgi?id=622500)
The output file contains less section than original one.
This tricks 'hint' access to go out-of-bounds:
* elf.c (find_link): Bounds check "hint".
GDB Administrator [Sun, 25 Jun 2017 00:00:40 +0000 (00:00 +0000)]
Automatic date update in version.in
Thomas Preud'homme [Sat, 24 Jun 2017 09:56:32 +0000 (10:56 +0100)]
[ARM] Add support for ARM Cortex-R52 processor
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to add support for ARM Cortex-R52
processor.
=== Patch description ===
This patch adds support for Cortex-R52 as an ARMv8-R processor with CRC
extensions.
2017-06-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* NEWS: Mention support of ARM Cortex-R52 processor.
* config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-R52 processor.
* doc/c-arm.texi: Mention support for -mcpu=cortex-r52.
Thomas Preud'homme [Sat, 24 Jun 2017 09:48:08 +0000 (10:48 +0100)]
[ARM] Add linker support for ARMv8-R
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to add support for ARMv8-R in the linker.
=== Patch description ===
This patch is composed of 3 changes:
1) The main change is the addition of the logic for merging a file whose
Tag_CPU_arch build attribute is 15 (ARMv8-R). Namely, all pre-ARMv8 are
merged into ARMv8-R as well as ARMv8-R itself. ARMv8-A (14) merges into
ARMv8-A. ARMv8-M Baseline (16) and Mainline (17) are not allowed to
merge merge with ARMv8-R. Note that merging only occurs if the two
profiles are identical or one is S (Application or Realtime) and the
other is R.
2) using_thumb_only, using_thumb2_bl, using_thumb2 and arch_has_arm_nop
are updated according to capabilities of ARMv8-R and their BFD_ASSERT
updated to reflect that the logic is valid for ARMv8-R.
3) 2 build attribute merging tests are added to test the first change.
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Update list of architectures in
BFD_ASSERT for which the logic is valid.
(using_thumb2_bl): Likewise.
(using_thumb2): Likewise and return true for ARMv8-R.
(arch_has_arm_nop): Likewise.
(tag_cpu_arch_combine): New v8r table for ARMv8-R Tag_CPU_arch
merging logic. Update commentis for value 15 of v8m_baseline,
v8m_mainline and v4t_plus_v6_m arrays. Use v8r array to decide
merging of value 15 of Tag_CPU_arch.
ld/
* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 11): New test.
(EABI attribute merging 12): Likewise.
* testsuite/ld-arm/attr-merge-11a.s: New file.
* testsuite/ld-arm/attr-merge-11b.s: New file.
* testsuite/ld-arm/attr-merge-11.attr: New file.
* testsuite/ld-arm/attr-merge-12a.s: New file.
* testsuite/ld-arm/attr-merge-12b.s: New file.
* testsuite/ld-arm/attr-merge-12.attr: New file.
Thomas Preud'homme [Sat, 24 Jun 2017 09:37:47 +0000 (10:37 +0100)]
[ARM] Add support for ARMv8-R in assembler and readelf
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to add support for ARMv8-R in GAS:
instructions, build attributes and readelf.
=== Patch description ===
Although some differences exist for system registers, from GAS point of
view ARMv8-R supports the same instructions as ARMv8-A Aarch32 state
and a subset of its extensions. This patch therefore introduce a new
feature bit to distinguish the availability of the pan, ras and rdma
extensions between ARMv8-A and ARMv8-R and allow crypto, fp and simd
extensions to be used by ARMv8-R.
Most of the changes are then in the testsuite to (i) rename source files
and error output to be shared between ARMv8-A and ARMv8-R, (ii) rename
files with expected output for ARMv8-A build attributes and (iii) add
new files with expected output for ARMv8-R build attributes.
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Fill value for ARMv8-R.
gas/
* NEWS: Mention support for ARMv8-R architecture.
* config/tc-arm.c (arm_archs): Add entry for ARMv8-R.
(arm_extensions): Restrict pan, ras and rdma extension to
ARMv8-A and make crypto, fp and simd extensions available to
ARMv8-R.
(cpu_arch_ver): Add entry for ARMv8-R.
(aeabi_set_public_attributes): Update gas_assert for Tag_DIV_use
logic.
* testsuite/gas/arm/armv8-a+fp.s: Rename into ...
* testsuite/gas/arm/armv8-ar+fp.s: This. Remove .arch directive.
* testsuite/gas/arm/armv8-a+fp.d: Specify source to assemble and
architecture to assemble for.
* testsuite/gas/arm/armv8-r+fp.d: New.
* testsuite/gas/arm/armv8-a+simd.s: Rename into ...
* testsuite/gas/arm/armv8-ar+simd.s: This. Remove .arch directive.
* testsuite/gas/arm/armv8-a+simd.d: Specify source to assemble and
architecture to assemble for.
* testsuite/gas/arm/armv8-r+simd.d: New.
* testsuite/gas/arm/armv8-a-bad.s: Rename into ...
* testsuite/gas/arm/armv8-ar-bad.s: This. Remove .arch directive.
* testsuite/gas/arm/armv8-a-bad.l: Rename into ...
* testsuite/gas/arm/armv8-ar-bad.l: This. Decrement line number by 1.
* testsuite/gas/arm/armv8-a-bad.d: Specify source to assemble,
architecture to assemble for and adjust error output file.
* testsuite/gas/arm/armv8-r-bad.d: New.
* testsuite/gas/arm/armv8-a-barrier.s: Rename into ...
* testsuite/gas/arm/armv8-ar-barrier.s: This.
* testsuite/gas/arm/armv8-a-barrier-arm.d: Adjust source.
* testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
* testsuite/gas/arm/armv8-r-barrier-arm.d: New.
* testsuite/gas/arm/armv8-r-barrier-thumb.d: New.
* testsuite/gas/arm/armv8-a-it-bad.s: Rename into ...
* testsuite/gas/arm/armv8-ar-it-bad.s: This. Remove .arch directive.
* testsuite/gas/arm/armv8-a-it-bad.l: Rename into ...
* testsuite/gas/arm/armv8-ar-it-bad.l: This. Decrement line number
by 1.
* testsuite/gas/arm/armv8-a-it-bad.d: Specify source to assemble,
architecture to assemble for and adjust error output file.
* testsuite/gas/arm/armv8-r-it-bad.d: New.
* testsuite/gas/arm/armv8-a.s: Rename into ...
* testsuite/gas/arm/armv8-ar.s: This. Remove .arch directive.
* testsuite/gas/arm/armv8-a.d: Specify source to assemble and
architecture to assemble for.
* testsuite/gas/arm/armv8-r.d: New.
* testsuite/gas/arm/attr-march-armv8-r+crypto.d: New.
* testsuite/gas/arm/attr-march-armv8-r+fp.d: New.
* testsuite/gas/arm/attr-march-armv8-r+simd.d: New.
* testsuite/gas/arm/attr-march-armv8-r.d: New.
* testsuite/gas/arm/crc32.s: Rename into ...
* testsuite/gas/arm/crc32-armv8-ar.s: This.
* testsuite/gas/arm/crc32.d: Rename into ...
* testsuite/gas/arm/crc32-armv8-a.d: This. Specify source to assemble.
* testsuite/gas/arm/crc32-armv8-r.d: New.
* testsuite/gas/arm/crc32-bad.s: Rename into ...
* testsuite/gas/arm/crc32-armv8-ar-bad.s: This.
* testsuite/gas/arm/crc32-bad.d: Rename into ...
* testsuite/gas/arm/crc32-armv8-a-bad.d: This. Specify source to
assemble.
* testsuite/gas/arm/crc32-armv8-r-bad.d: New.
* testsuite/gas/arm/mask_1.s: Rename into ...
* testsuite/gas/arm/mask_1-armv8-ar.s: This.
* testsuite/gas/arm/mask_1.d: Rename into ...
* testsuite/gas/arm/mask_1-armv8-a.d: This. Specify source to
assemble.
* testsuite/gas/arm/mask_1-armv8-r.d: new.
include/
* elf/arm.h (TAG_CPU_ARCH_V8R): New macro.
* opcode/arm.h (ARM_EXT2_V8A): New macro.
(ARM_AEXT2_V8A): Rename into ...
(ARM_AEXT2_V8AR): This.
(ARM_AEXT2_V8A): New macro.
(ARM_AEXT_V8R): New macro.
(ARM_AEXT2_V8R): New macro.
(ARM_ARCH_V8R): New macro.
Thomas Preud'homme [Sat, 24 Jun 2017 09:26:41 +0000 (10:26 +0100)]
[ARM] Remove ARMv6S-M special casing
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to remove special casing for ARMv6S-M
autodetection.
=== Motivation ===
Currently, SWI and SVC mnemonics are enabled for ARMv4T and successor
architectures with extra checks in the handler function (do_t_swi) to
give an error message when ARMv6-M is targeted and some more special
casing in aeabi_set_public_attributes. This was made to exclude these
mnemonics for ARMv6-M unless the OS extension is in use.
However this logic is superfluous: there is already code to check
whether an instruction is available based on the feature bit it is part
of and whether the targeted architecture has that feature bit. This
patch aims at removing that unneeded complexity.
=== Patch description ===
The OS extension is already limited to the ARMv6-M architecture so all
this patch does is redefined availability of the ARM_EXT_OS feature bit
to not be present for ARM_ARCH_V6M. ARM_ARCH_V6SM does not need any
change either because it already includes ARM_EXT_OS.
The patch also make sure that the error message that was given by
do_t_swi when SWI/SVC is unavailable is still the same by detecting the
situation in md_assemble.
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (arm_ext_v6m): Delete.
(arm_ext_v7m): Delete.
(arm_ext_m): Remove ARM_EXT_OS from the set of feature defined M
profile.
(arm_arch_v6m_only): Delete.
(do_t_swi): Remove special case for ARMv6S-M.
(md_assemble): Display error message previously in do_t_swi when
SVC is not available.
(insns): Guard swi and svc by arm_ext_os for Thumb mode.
(aeabi_set_public_attributes): Remove special case for ARMv6S-M.
include/
* opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set.
(ARM_AEXT_V4T): Likewise.
(ARM_AEXT_V5TxM): Likewise.
(ARM_AEXT_V5T): Likewise.
(ARM_AEXT_V6M): Mask off ARM_EXT_OS bit.
GDB Administrator [Sat, 24 Jun 2017 00:00:42 +0000 (00:00 +0000)]
Automatic date update in version.in
Andrew Waterman [Mon, 15 May 2017 15:50:57 +0000 (08:50 -0700)]
RISC-V: Fix SLTI disassembly
2017-06-23 Andrew Waterman <andrew@sifive.com>
* riscv-opc.c (riscv_opcodes): Mark I-type SLT instruction as an
alias; do not mark SLTI instruction as an alias.
Andrew Waterman [Thu, 11 May 2017 06:59:50 +0000 (23:59 -0700)]
RISC-V: Error, don't warn, for shfit amounts/CSRs
gas/ChangeLog
2017-05-11 Andrew Waterman <andrew@sifive.com>
* config/tc-riscv.c (riscv_ip): Changes as_warn to as_bad for improper
shift amounts.
Jiong Wang [Thu, 22 Jun 2017 11:04:42 +0000 (12:04 +0100)]
[AArch64] Fix typo in comments on relocation name
BFD_RELOC_AARCH64_ADR_GOTPAGE should be BFD_RELOC_AARCH64_ADR_GOT_PAGE.
bfd/
* reloc.c (BFD_RELOC_AARCH64_ADR_GOTPAGE): Rename to
BFD_RELOC_AARCH64_ADR_GOT_PAGE
* bfd-in2.h: Regenerated.
Alan Modra [Fri, 23 Jun 2017 11:09:43 +0000 (20:39 +0930)]
[GOLD] PowerPC64 localentry:0 plt call optimization
elfcpp/
* elfcpp.h (DT_PPC64_OPT): Define.
* powerpc.h (PPC64_OPT_TLS, PPC64_OPT_MULTI_TOC,
PPC64_OPT_LOCALENTRY): Define.
gold/
* options.h (General_options): Add plt_localentry.
* powerpc.cc (Target_powerpc::st_other): New function.
(Target_powerpc::plt_localentry0_, plt_localentry0_init_,
has_localentry0_): New vars.
(Target_powerpc::plt_localentry0, set_has_localentry0,
is_elfv2_localentry0): New functions.
(Target_powerpc::Branch_info::mark_pltcall): Don't set tocsave or
return true for localentry:0 calls.
(Stub_table::Plt_stub_ent::localentry0_): New var.
(Stub_table::add_plt_call_entry): Set localentry0_ and has_localentry0_.
Don't set r2save_ for localentry:0 calls.
(Output_data_glink::do_write): Save r2 in __glink_PLTresolve for elfv2.
(Target_powerpc::scan_relocs): Default plt_localentry0_.
(Target_powerpc::do_finalize_sections): Set DT_PPC64_OPT.
(Target_powerpc::Relocate::relocate): Don't require nop following
calls for localentry:0 plt calls, and don't change nop.
Alan Modra [Fri, 23 Jun 2017 11:07:34 +0000 (20:37 +0930)]
[GOLD] PowerPC64 tocsave
This adds support to gold for the tocsave relocs already supported by
ld.bfd. R_PPC64_TOCSAVE relocs are part of a scheme to move r2 saves
to the prologue of a function rather than in each plt call stub. We
don't want a compiler to always emit the r2 save, as this would be
wasted if the calls turned out to be local. See the tocsave*.s in
ld/testsuite/ld-powerpc/.
* powerpc.cc (Target_powerpc::tocsave_loc_): New var.
(Target_powerpc::mark_pltcall, add_tocsave, tocsave_loc): New functions.
(Target_powerpc::Branch_info::tocsave_): New var.
(Target_powerpc::Branch_info::mark_pltcall): New function.
(Target_powerpc::Branch_info::make_stub): Pass tocsave_ to
add_plt_call_entry.
(Stub_table::Plt_stub_ent): Make public. Add r2save_.
(Stub_table::add_plt_call_entry): Add bool tocsave_ param. Set
r2save_.
(Stub_table::find_plt_call_entry): Return Plt_stub_ent*. Adjust
use throughout.
(Stub_table::do_write): Conditionally output r2 save in plt stubs.
(Target_powerpc::Scan::local): Handle R_PPC64_TOCSAVE.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Skip r2 save in plt call stub
with tocsave reloc. Replace header tocsave nop with r2 save.
* symtab.h (struct Symbol_location_hash): Make public.
Nick Clifton [Fri, 23 Jun 2017 09:22:36 +0000 (10:22 +0100)]
Make the strings utility reject directories.
PR binutils/21659
* strings.c (strings_file): Warn about attempts to run strings on
a directory.
Alan Hayward [Fri, 23 Jun 2017 09:21:39 +0000 (10:21 +0100)]
Add XTENSA_MAX_REGISTER_SIZE
gdb/
* xtensa-tdep.c (XTENSA_MAX_REGISTER_SIZE): Add.
(xtensa_register_write_masked): Use XTENSA_MAX_REGISTER_SIZE.
(xtensa_register_read_masked): Likewise.
Andreas Krebbel [Thu, 8 Jun 2017 15:24:50 +0000 (17:24 +0200)]
S/390: Add support for pgste marker
This patch adds a new S/390 specific segment type: PT_S390_PGSTE. For
binaries marked with that segment the kernel will allocate 4k page
tables. The only user so far will be qemu.
ld/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* Makefile.in: Add s390.em as build dependency.
* emulparams/elf64_s390.sh (EXTRA_EM_FILE): Add s390.em.
* emultempl/s390.em: New file.
* gen-doc.texi: Add documentation for --s390-pgste option.
* ld.texinfo: Likewise.
include/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elf/s390.h (PT_S390_PGSTE): Define macro.
binutils/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* readelf.c (get_s390_segment_type): Add support for the new
segment type PT_S390_PGSTE.
(get_segment_type): Call get_s390_segment_type.
elfcpp/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elfcpp.h (enum PT): Add PT_S390_PGSTE to enum.
bfd/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elf-s390.h: New file.
* elf64-s390.c (struct elf_s390_link_hash_table): Add params
field.
(elf_s390_additional_program_headers): New function.
(elf_s390_modify_segment_map): New function.
(bfd_elf_s390_set_options): New function.
(elf_backend_additional_program_headers)
(elf_backend_modify_segment_map): Add macro definitions.
GDB Administrator [Fri, 23 Jun 2017 00:00:39 +0000 (00:00 +0000)]
Automatic date update in version.in
H.J. Lu [Thu, 22 Jun 2017 22:13:15 +0000 (15:13 -0700)]
i386: Add hidden weak undefined tests
* testsuite/ld-i386/i386.exp: Run weakundef1 tests.
* testsuite/ld-i386/weakundef1.c: New file.
H.J. Lu [Thu, 22 Jun 2017 21:26:09 +0000 (14:26 -0700)]
x86-64: Move the error_alignment label forward
Move the error_alignment label forward to avoid clang warning on
if (!bfd_set_section_alignment (ebfd, sec, 2))
goto error_alignment;
htab = elf_x86_64_hash_table (info);
error_alignment:
info->callbacks->einfo (_("%F%A: failed to align section\n"), sec);
"%F" causes a fatal linker error and
immediate exit.
sec = htab->elf.sgotplt;
Also fix alignment on program property note section.
* elf64-x86-64.c (elf_x86_64_link_setup_gnu_properties): Move
the error_alignment label forward. Properly align program
property note section.
H.J. Lu [Thu, 22 Jun 2017 19:53:39 +0000 (12:53 -0700)]
Pass $NOPIE_CFLAGS to ELF visibility tests
PR ld/21090
* testsuite/ld-elfvsb/elfvsb.exp (visibility_run): Pass
$NOPIE_CFLAGS if non-PIE is required.
H.J. Lu [Thu, 22 Jun 2017 19:53:39 +0000 (12:53 -0700)]
x86: Resolve local undefined weak symbol to 0
Local undefined weak symbol should always be resolved to 0.
* elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Resolve
local undefined weak symbol to 0.
* elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Likewise.
Sergio Durigan Junior [Thu, 22 Jun 2017 18:50:24 +0000 (14:50 -0400)]
Update comment on gdb_environ::unset
gdb_environ::unset iterates using '.end () - 1' now, instead of '.cend
() - 1'. This obvious patch updates the comment.
gdb/ChangeLog:
2017-06-22 Sergio Durigan Junior <sergiodj@redhat.com>
* common/environ.c (gdb_environ::unset): Update comment.
Eric Christopher [Thu, 22 Jun 2017 17:57:52 +0000 (10:57 -0700)]
2017-06-22 Eric Christopher <echristo@gmail.com>
* elf32-arm.c (elf32_arm_final_link_relocate): Use labs rather than
abs to fix a truncation warning.
H.J. Lu [Thu, 22 Jun 2017 17:07:53 +0000 (10:07 -0700)]
Pass $NOPIE_CFLAGS/$NOPIE_LDFLAGS to "Run pr19031"
PR ld/21090
* testsuite/ld-i386/i386.exp: Pass $NOPIE_CFLAGS and
$NOPIE_LDFLAGS to "Run pr19031".
H.J. Lu [Thu, 22 Jun 2017 16:53:33 +0000 (09:53 -0700)]
Pass $NOPIE_CFLAGS and $NOPIE_LDFLAGS to more ELF tests
PR ld/21090
* testsuite/ld-gc/gc.ex: Compile tmpdir/pr14265.o with
$NOPIE_CFLAGS.
* testsuite/ld-i386/i386.exp: Pass $NOPIE_CFLAGS and
$NOPIE_LDFLAGS if non-PIE is required.
* testsuite/ld-i386/no-plt.exp (NOPIE_CFLAGS): New.
(NOPIE_LDFLAGS): Likewise.
Pass $NOPIE_LDFLAGS if non-PIE is required.
* testsuite/ld-shared/shared.exp: Compile tmpdir/sh1np.o with
$NOPIE_CFLAGS.
Alan Hayward [Thu, 22 Jun 2017 15:30:15 +0000 (16:30 +0100)]
Fix cached_frame allocation in py-unwind
gdb/
* python/py-unwind.c (pyuw_sniffer): Allocate space for
registers.
Alan Hayward [Thu, 22 Jun 2017 14:33:18 +0000 (15:33 +0100)]
Remove an instance of MAX_REGISTER_SIZE from record-full.c
gdb/
* record-full.c (record_full_exec_insn): Use byte_vector.
Yao Qi [Thu, 22 Jun 2017 12:41:27 +0000 (13:41 +0100)]
Regenerate two regformats/i386/.dat files
The self tests which compare pre-generated target descriptions and
dynamically created target descriptions fail, and it turns out that two
pre-generated target descriptions are wrong, so regenerate them.
gdb:
2017-06-22 Yao Qi <yao.qi@linaro.org>
* regformats/i386/amd64-avx-mpx-avx512-pku-linux.dat: Regenerated.
* regformats/i386/amd64-avx-mpx-avx512-pku.dat: Regenerated.
Alan Hayward [Thu, 22 Jun 2017 13:09:52 +0000 (14:09 +0100)]
Remove MAX_REGISTER_SIZE from py-unwind.c
gdb/
* remote.c (cached_reg): Move from here...
* regcache.h (cached_reg): ...to here.
* python/py-unwind.c (struct reg_info): Remove.
(cached_frame_info): Use cached_reg_t.
(pyuw_prev_register): Likewise.
(pyuw_sniffer): Use cached_reg_t and allocate registers.
(pyuw_dealloc_cache): Free all registers.
H.J. Lu [Thu, 22 Jun 2017 12:50:20 +0000 (05:50 -0700)]
x86: Support Intel Shadow Stack with SHSTK property
To support Intel Shadow Stack (SHSTK) in Intel Control-flow Enforcement
Technology (CET) instructions:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
#define GNU_PROPERTY_X86_FEATURE_1_SHSTK (1U << 1)
is added to GNU program properties to indicate that all executable sections
are compatible with SHSTK where return address popped from shadow stack
always matches return address popped from normal stack.
GNU_PROPERTY_X86_FEATURE_1_SHSTK is set on output only if it is set on all
relocatable inputs.
bfd/
* elf32-i386.c (elf_i386_merge_gnu_properties): If info->shstk
is set, turn on GNU_PROPERTY_X86_FEATURE_1_SHSTK.
(elf_i386_link_setup_gnu_properties): If info->shstk is set,
turn on GNU_PROPERTY_X86_FEATURE_1_IBT.
* elf64-x86-64.c (elf_x86_64_merge_gnu_properties): If
info->shstk is set, turn on GNU_PROPERTY_X86_FEATURE_1_SHSTK.
(elf_x86_64_link_setup_gnu_properties): If info->shstk is set,
turn on GNU_PROPERTY_X86_FEATURE_1_IBT.
binutils/
* readelf.c (decode_x86_feature): Decode
GNU_PROPERTY_X86_FEATURE_1_SHSTK.
* testsuite/binutils-all/i386/shstk.d: New file.
* testsuite/binutils-all/i386/shstk.s: Likewise.
* testsuite/binutils-all/x86-64/shstk-x32.d: Likewise.
* testsuite/binutils-all/x86-64/shstk.d: Likewise.
* testsuite/binutils-all/x86-64/shstk.s: Likewise.
include/
* bfdlink.h (bfd_link_info): Add shstk.
* elf/common.h (GNU_PROPERTY_X86_FEATURE_1_SHSTK): New.
ld/
* NEWS: Mention -z shstk and GNU_PROPERTY_X86_FEATURE_1_SHSTK.
* emulparams/cet.sh (PARSE_AND_LIST_OPTIONS_CET): Add "-z shstk".
(PARSE_AND_LIST_ARGS_CASE_Z_CET): Support "-z shstk".
* ld.texinfo: Document -z shstk.
* testsuite/ld-i386/i386.exp: Run SHSTK tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/property-x86-shstk.s: New file.
* testsuite/ld-i386/property-x86-shstk1a.d: Likewise.
* testsuite/ld-i386/property-x86-shstk1b.d: Likewise.
* testsuite/ld-i386/property-x86-shstk2.d: Likewise.
* testsuite/ld-i386/property-x86-shstk3a.d: Likewise.
* testsuite/ld-i386/property-x86-shstk3b.d: Likewise.
* testsuite/ld-i386/property-x86-shstk4.d: Likewise.
* testsuite/ld-i386/property-x86-shstk5.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk.s: Likewise.
* testsuite/ld-x86-64/property-x86-shstk1a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk1a.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk1b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk1b.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk2-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk2.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3a.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3b.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk4-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk4.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk5-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk5.d: Likewise.
H.J. Lu [Thu, 22 Jun 2017 12:44:37 +0000 (05:44 -0700)]
x86: Support Intel IBT with IBT property and IBT-enable PLT
To support IBT in Intel Control-flow Enforcement Technology (CET)
instructions:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
#define GNU_PROPERTY_X86_FEATURE_1_IBT (1U << 0)
are added to GNU program properties to indicate that all executable
sections are compatible with IBT when ENDBR instruction starts each
valid target where an indirect branch instruction can land.
GNU_PROPERTY_X86_FEATURE_1_IBT is set on output only if it is set on
all relocatable inputs.
The followings changes are made to the Procedure Linkage Table (PLT):
1. For 64-bit x86-64, PLT is changed to
PLT0: push GOT[1]
bnd jmp *GOT[2]
nop
...
PLTn: endbr64
push namen_reloc_index
bnd jmp PLT0
together with the second PLT section:
PLTn: endbr64
bnd jmp *GOT[namen_index]
nop
BND prefix is also added so that IBT-enabled PLT is compatible with MPX.
2. For 32-bit x86-64 (x32) and i386, PLT is changed to
PLT0: push GOT[1]
jmp *GOT[2]
nop
...
PLTn: endbr64 # endbr32 for i386.
push namen_reloc_index
jmp PLT0
together with the second PLT section:
PLTn: endbr64 # endbr32 for i386.
jmp *GOT[namen_index]
nop
BND prefix isn't used since MPX isn't supported on x32 and BND registers
aren't used in parameter passing on i386.
GOT is an array of addresses. Initially, GOT[namen_index] is filled
with the address of the ENDBR instruction of the corresponding entry
in the first PLT section. The function, namen, is called via the
ENDBR instruction in the second PLT entry. GOT[namen_index] is updated
to the actual address of the function, namen, at run-time.
2 linker command line options are added:
1. -z ibtplt: Generate IBT-enabled PLT.
2. -z ibt: Generate GNU_PROPERTY_X86_FEATURE_1_IBT in GNU program
properties as well as IBT-enabled PLT.
bfd/
* elf32-i386.c (elf_i386_lazy_ibt_plt0_entry): New.
(elf_i386_lazy_ibt_plt_entry): Likewise.
(elf_i386_pic_lazy_ibt_plt0_entry): Likewise.
(elf_i386_non_lazy_ibt_plt_entry): Likewise.
(elf_i386_pic_non_lazy_ibt_plt_entry): Likewise.
(elf_i386_eh_frame_lazy_ibt_plt): Likewise.
(elf_i386_lazy_plt_layout): Likewise.
(elf_i386_non_lazy_plt_layout): Likewise.
(elf_i386_link_hash_entry): Add plt_second.
(elf_i386_link_hash_table): Add plt_second and
plt_second_eh_frame.
(elf_i386_allocate_dynrelocs): Use the second PLT if needed.
(elf_i386_size_dynamic_sections): Use .plt.got unwind info for
the second PLT. Check the second PLT.
(elf_i386_relocate_section): Use the second PLT to resolve
PLT reference if needed.
(elf_i386_finish_dynamic_symbol): Fill and use the second PLT if
needed.
(elf_i386_finish_dynamic_sections): Set sh_entsize on the
second PLT. Generate unwind info for the second PLT.
(elf_i386_plt_type): Add plt_second.
(elf_i386_get_synthetic_symtab): Support the second PLT.
(elf_i386_parse_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND.
(elf_i386_merge_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND. If info->ibt is set, turn
on GNU_PROPERTY_X86_FEATURE_1_IBT
(elf_i386_link_setup_gnu_properties): If info->ibt is set,
turn on GNU_PROPERTY_X86_FEATURE_1_IBT. Use IBT-enabled PLT
for info->ibtplt, info->ibt or GNU_PROPERTY_X86_FEATURE_1_IBT
is set on all relocatable inputs.
* elf64-x86-64.c (elf_x86_64_lazy_ibt_plt_entry): New.
(elf_x32_lazy_ibt_plt_entry): Likewise.
(elf_x86_64_non_lazy_ibt_plt_entry): Likewise.
(elf_x32_non_lazy_ibt_plt_entry): Likewise.
(elf_x86_64_eh_frame_lazy_ibt_plt): Likewise.
(elf_x32_eh_frame_lazy_ibt_plt): Likewise.
(elf_x86_64_lazy_ibt_plt): Likewise.
(elf_x32_lazy_ibt_plt): Likewise.
(elf_x86_64_non_lazy_ibt_plt): Likewise.
(elf_x32_non_lazy_ibt_plt): Likewise.
(elf_x86_64_get_synthetic_symtab): Support the second PLT.
(elf_x86_64_parse_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND.
(elf_x86_64_merge_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND. If info->ibt is set, turn
on GNU_PROPERTY_X86_FEATURE_1_IBT
(elf_x86_64_link_setup_gnu_properties): If info->ibt is set,
turn on GNU_PROPERTY_X86_FEATURE_1_IBT. Use IBT-enabled PLT
for info->ibtplt, info->ibt or GNU_PROPERTY_X86_FEATURE_1_IBT
is set on all relocatable inputs.
binutils/
* readelf.c (decode_x86_feature): New.
(print_gnu_property_note): Call decode_x86_feature on
GNU_PROPERTY_X86_FEATURE_1_AND.
* testsuite/binutils-all/i386/empty.d: New file.
* testsuite/binutils-all/i386/empty.s: Likewise.
* testsuite/binutils-all/i386/ibt.d: Likewise.
* testsuite/binutils-all/i386/ibt.s: Likewise.
* testsuite/binutils-all/x86-64/empty-x32.d: Likewise.
* testsuite/binutils-all/x86-64/empty.d: Likewise.
* testsuite/binutils-all/x86-64/empty.s: Likewise.
* testsuite/binutils-all/x86-64/ibt-x32.d: Likewise.
* testsuite/binutils-all/x86-64/ibt.d: Likewise.
* testsuite/binutils-all/x86-64/ibt.s: Likewise.
include/
* bfdlink.h (bfd_link_info): Add ibtplt and ibt.
* elf/common.h (GNU_PROPERTY_X86_FEATURE_1_AND): New.
(GNU_PROPERTY_X86_FEATURE_1_IBT): Likewise.
ld/
* Makefile.am (ELF_X86_DEPS): Add $(srcdir)/emulparams/cet.sh.
* Makefile.in: Regenerated.
* NEWS: Mention GNU_PROPERTY_X86_FEATURE_1_IBT, -z ibtplt
and -z ibt.
* emulparams/cet.sh: New file.
* testsuite/ld-i386/ibt-plt-1.d: Likewise.
* testsuite/ld-i386/ibt-plt-1.s: Likewise.
* testsuite/ld-i386/ibt-plt-2.s: Likewise.
* testsuite/ld-i386/ibt-plt-2a.d: Likewise.
* testsuite/ld-i386/ibt-plt-2b.d: Likewise.
* testsuite/ld-i386/ibt-plt-2c.d: Likewise.
* testsuite/ld-i386/ibt-plt-2d.d: Likewise.
* testsuite/ld-i386/ibt-plt-3.s: Likewise.
* testsuite/ld-i386/ibt-plt-3a.d: Likewise.
* testsuite/ld-i386/ibt-plt-3b.d: Likewise.
* testsuite/ld-i386/ibt-plt-3c.d: Likewise.
* testsuite/ld-i386/ibt-plt-3d.d: Likewise.
* testsuite/ld-i386/plt-main-ibt.dd: Likewise.
* testsuite/ld-i386/plt-pie-ibt.dd: Likewise.
* testsuite/ld-i386/property-x86-empty.s: Likewise.
* testsuite/ld-i386/property-x86-ibt.s: Likewise.
* testsuite/ld-i386/property-x86-ibt1a.d: Likewise.
* testsuite/ld-i386/property-x86-ibt1b.d: Likewise.
* testsuite/ld-i386/property-x86-ibt2.d: Likewise.
* testsuite/ld-i386/property-x86-ibt3a.d: Likewise.
* testsuite/ld-i386/property-x86-ibt3b.d: Likewise.
* testsuite/ld-i386/property-x86-ibt4.d: Likewise.
* testsuite/ld-i386/property-x86-ibt5.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1.s: Likewise.
* testsuite/ld-x86-64/ibt-plt-2.s: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2d-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2d.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3.s: Likewise.
* testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3b-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3b.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3d-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3d.d: Likewise.
* testsuite/ld-x86-64/plt-main-ibt-now.rd: Likewise.
* testsuite/ld-x86-64/plt-main-ibt-x32.dd: Likewise.
* testsuite/ld-x86-64/plt-main-ibt.dd: Likewise.
* testsuite/ld-x86-64/property-x86-empty.s: Likewise.
* testsuite/ld-x86-64/property-x86-ibt.s: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1a.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1b.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt2-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt2.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3a.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3b.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt4-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt4.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt5-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt5.d: Likewise.
* emulparams/elf32_x86_64.sh: Source emulparams/cet.sh.
(TINY_READONLY_SECTION): Add .plt.sec.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_x86_64.sh: Source emulparams/cet.sh.
* ld.texinfo: Document -z ibtplt and -z ibt.
* testsuite/ld-i386/i386.exp: Run IBT and IBT PLT tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-x86-64/pr21481b.S (check): Updated for x32.
Pedro Alves [Thu, 22 Jun 2017 08:31:20 +0000 (10:31 +0200)]
environ-selftests: Ignore -Wself-move warning
clang gives this warning:
..../gdb/unittests/environ-selftests.c:139:7: error: explicitly moving variable of type 'gdb_environ' to itself [-Werror,-Wself-move]
env = std::move (env);
~~~ ^ ~~~
Ignoring the warning locally is the right thing to do, since it warns
about behavior we want to unit test, while an explicit self-move in
real code would likely be a mistake that we'd want to catch.
To avoid cluttering the code with preprocessor conditionals, this
commit adds the file common/diagnostics.h, in which we can put macros
used to control compiler diagnostics.
GCC enhancement request here:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81159
gdb/ChangeLog:
2017-06-22 Pedro Alves <palves@redhat.com>
Simon Marchi <simon.marchi@ericsson.com>
* unittests/environ-selftests.c (run_tests): Ignore -Wself-move
warning.
* common/diagnostics.h: New file.
Pedro Alves [Thu, 22 Jun 2017 09:23:30 +0000 (10:23 +0100)]
Add STRINGIFY to gdb/common/preprocessor.h
We have several copies of this common idiom under gdb/ currently.
This commit moves them / factors them out to gdb/common/preprocessor.h.
gdb/ChangeLog:
2017-06-22 Pedro Alves <palves@redhat.com>
* common/agent.h: Include "common/preprocessor.h".
(STRINGIZE_1, STRINGIZE): Delete.
(IPA_SYM): Use STRINGIFY instead.
* common/preprocessor.h (STRINGIFY_1, STRINGIFY): New.
* compile/compile-c-support.c: Include "common/preprocessor.h".
(STR, STRINGIFY): Delete.
* ia64-libunwind-tdep.c: Include "common/preprocessor.h".
(STRINGIFY2, STRINGIFY): Delete.
Pedro Alves [Thu, 22 Jun 2017 09:57:13 +0000 (10:57 +0100)]
common/agent.h: Add missing include guards
gdb/ChangeLog:
2017-06-22 Pedro Alves <palves@redhat.com>
* common/agent.h: Add include guards.
Nick Clifton [Thu, 22 Jun 2017 09:33:56 +0000 (10:33 +0100)]
Fix address violation parsing a corrupt SOM binary.
PR binutils/21649
* som.c (setup_sections): NUL terminate the space_strings buffer.
Check that the space.name field does not index beyond the end of
the space_strings buffer.
Nick Clifton [Thu, 22 Jun 2017 08:34:12 +0000 (09:34 +0100)]
Fix compile time warning about unused static variable.
* config/tc-arm.c (arm_ext_v7m): Add ATTRIBUTE_UNUSED.
GDB Administrator [Thu, 22 Jun 2017 00:01:05 +0000 (00:01 +0000)]
Automatic date update in version.in
H.J. Lu [Wed, 21 Jun 2017 22:29:38 +0000 (15:29 -0700)]
Use DWARF_VMA_FMT to report error
Use DWARF_VMA_FMT to report error to work for both 32-bit and 64-bit
builds.
* dwarf.c (READ_ULEB): Use DWARF_VMA_FMT to report error.
(READ_SLEB): Likewise.
H.J. Lu [Wed, 21 Jun 2017 22:22:05 +0000 (15:22 -0700)]
Pass $NOPIE_CFLAGS and $NOPIE_LDFLAGS to some ELF tests
Some ELF tests will fail when PIE is used.
PR ld/21090
* testsuite/ld-elf/shared.exp: Pass $NOPIE_CFLAGS and
$NOPIE_LDFLAGS if non-PIE is required.
H.J. Lu [Wed, 21 Jun 2017 21:57:53 +0000 (14:57 -0700)]
Pass $NOPIE_CFLAGS to NOCROSSREFS tests
PR ld/21090
* testsuite/ld-scripts/crossref.exp: Also pass $NOPIE_CFLAGS
to CC.
H.J. Lu [Wed, 21 Jun 2017 21:49:30 +0000 (14:49 -0700)]
Add missing ChangeLog entries
H.J. Lu [Wed, 21 Jun 2017 21:45:16 +0000 (14:45 -0700)]
Pass $NOPIE_LDFLAGS size tests
PR ld/21090
* testsuite/ld-size/size.exp: Pass $NOPIE_LDFLAGS to size-4a,
size-4b, size-5a, size-5b, size-6 and size-8 tests.
Kevin Buettner [Sat, 3 Jun 2017 00:58:12 +0000 (17:58 -0700)]
Use noncapturing subpattern/parens in gdb_test implementation
This is the portion of gdb_test which performs the match against
the RE (regular expression) passed to it:
return [gdb_test_multiple $command $message {
-re "\[\r\n\]*($pattern)\[\r\n\]+$gdb_prompt $" {
if ![string match "" $message] then {
pass "$message"
}
}
In a test that I've been working on recently, I wanted to use
a backreference - that's the \1 in the the RE below:
gdb_test "info threads" \
{.*[\r\n]+\* +([0-9]+) +Thread[^\r\n]* do_something \(n=\1\) at.*}
Put into English, I wanted to make sure that the value of n passed to
do_something() is the same as the thread number shown in the "info
threads" Id column. (I've structured the test case so that this
*should* be the case.)
It didn't work though. It turned out that ($pattern) in the RE
noted above is capturing the attempted backreference. So, in this
case, the backreference does not refer to ([0-9]+) as intended, but
instead refers to ($pattern). This is wrong because it's not what I
intended, but is also wrong because, if allowed, it could only match a
string of infinite length.
This problem can be fixed by using parens for a "noncapturing
subpattern". The way that this is done, syntactically, is to use
(?:$pattern) instead of ($pattern).
My research shows that this feature has been present since tcl8.1 which
was released in 1999.
The current tcl version is 8.6 - at least that's what I have on my
machine. It appears to me that mingw uses some subversion of tcl8.4
which will also have this feature (since 8.4 > 8.1).
So it seems to me that any platform upon which we might wish to test
GDB will have a version of tcl which has this feature. That being the
case, my hope is that there won't be any objections to its use.
When I looked at the implementation of gdb_test, I wondered whether
the parens were needed at all. I've concluded that they are. In the
event that $pattern is an RE which uses alternation at the top level,
e.g. a|b, we need to make $pattern a subpattern (via parens) to limit
the extend of the alternation. I.e, we don't want the alternation to
extend to the other portions of the RE which gdb_test uses to match
potential blank lines at the beginning of the pattern or the gdb
prompt at the end.
gdb/testsuite/ChangeLog:
* gdb.exp (gdb_test): Using noncapturing parens for the $pattern
subpattern.
Nick Clifton [Wed, 21 Jun 2017 17:05:44 +0000 (18:05 +0100)]
Fix address violation when reading corrupt DWARF data.
PR binutils/21648
* dwarf.c (LEB): Rename to SKIP_ULEB and READ_ULEB. Add check for
reading a value that is too big for the containing variable.
(SLEB): Rename to SKIP_SLEB and READ_SLEB. Add similar check.
Replace uses of LEB and SLEB with appropriate new macro.
(display_debug_frames): Use an unsigned int for the 'reg'
variable. Use a signed long for the 'l' variable.
Thomas Preud'homme [Wed, 21 Jun 2017 15:32:40 +0000 (16:32 +0100)]
[ARM] Rework Tag_CPU_arch build attribute value selection
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to rework the Tag_CPU_arch build attribute
value selection to (i) match architecture or CPU if specified by user
without any need for hack and (ii) match an architecture with all the
features used if in autodetection mode or return an error.
=== Motivation ===
Currently, Tag_CPU_arch build attribute value selection assumes that an
architecture is always a superset of architectures released earlier. As
such, the logic is to browse architectures in chronological order of
release and selecting the Tag_CPU_arch value of the last one to
contribute a feature used[1]/requested[2] not contributed by earlier
architectures.
[1] in case of autodetection mode
[2] otherwise, ie. in case of -mcpu/-march or associated directives
This logic fails the two objectives mentionned in the Context section.
First, due to the assumption it does an architecture can be selected
while not having all the features used/requested which fails the second
objective. Second, not doing an exact match when an architecture or CPU
is selected by the user means the wrong value is chosen when a later
architecture provides a subset of the feature bits of an earlier
architecture. This is the case for the implementation of ARMv8-R (see
later patch).
An added benefit of this patch is that it is possible to easily generate
more consistent build attribute by setting the feature bits from the
architecture matched in aeabi_set_public_attributes in autodetection
mode. This is better done as a separate patch because lots of testcase'
expected results must then be updated accordingly.
=== Patch description ===
The patch changes the main logic for Tag_CPU_arch and
Tag_CPU_arch_profile
values selection to:
- look for an exact match in case an architecture or CPU was specified
on the command line or in a directive
- select the first released architecture that provides a superset of the
feature used in the autodetection case
- select the most featureful architecture in case of -march=all
The array cpu_arch_ver is updated to include all architectures in order
to make the first point work.
Note that when looking for an exact match, the architecture with
selected extension is tried first and then only the architecture. This
is because some architectures are exactly equivalent to an earlier
architecture with its extensions selected. ARMv6S-M (= ARMv6-M + OS
extension) and ARMv6KZ (ARMv6K + security extension) are two such
examples.
Other adjustments are also necessary in aeabi_set_public_attributes to
make this change work.
1) The logic to set Tag_ARM_ISA_use and Tag_THUMB_ISA_use must check the
absence of feature bit used/requested to decide whether to give the
default value for empty files (see EABI attribute defaults test). It was
previously checking that arch == 0 which would only happen if no feature
bit could be matched by any architecture, ie there is no feature bit to
match.
2) A fallback to a superset match must exist when no_cpu_selected ()
returns true. This is because aeabi_set_public_attributes is called
again after relaxation and at this point selected_cpu is set from the
previous execution of that function. There is therefore no way to check
whether the user specified an architecture or CPU.
3) Tag_CPU_arch lines are removed from expected output when the
detected architecture should be pre-ARMv4, since 0 is the Tag_CPU_arch
value for pre-ARMv4 architectures and default value for an absent entry
is 0.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (fpu_any): Defined from FPU_ANY.
(cpu_arch_ver): Add all architectures and sort by release date.
(have_ext_for_needed_feat_p): New.
(get_aeabi_cpu_arch_from_fset): New.
(aeabi_set_public_attributes): Call above function to determine
Tag_CPU_arch and Tag_CPU_arch_profile values. Adapt Tag_ARM_ISA_use
and Tag_THUMB_ISA_use selection logic to check absence of feature bit
accordingly.
* testsuite/gas/arm/attr-march-armv1.d: Fix expected Tag_CPU_arch build
attribute value.
* testsuite/gas/arm/attr-march-armv2.d: Likewise.
* testsuite/gas/arm/attr-march-armv2a.d: Likewise.
* testsuite/gas/arm/attr-march-armv2s.d: Likewise.
* testsuite/gas/arm/attr-march-armv3.d: Likewise.
* testsuite/gas/arm/attr-march-armv3m.d: Likewise.
* testsuite/gas/arm/pr12198-2.d: Likewise.
include/
* opcode/arm.h (FPU_ANY): New macro.
Nick Clifton [Wed, 21 Jun 2017 15:36:44 +0000 (16:36 +0100)]
Fix addrss violation when processing a corrupt SH COFF binary.
PR binutils/21646
* coff-sh.c (sh_reloc): Check for an out of range reloc.
H.J. Lu [Wed, 21 Jun 2017 15:32:38 +0000 (08:32 -0700)]
x86: CET v2.0: Update incssp and setssbsy
Update x86 assembler and disassembler for CET v2.0:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
1. incsspd and incsspq are changed to take a register opeand with a
different opcode.
2. setssbsy is changed to take no opeand with a different opcode.
gas/
* testsuite/gas/i386/cet-intel.d: Updated.
* testsuite/gas/i386/cet.d: Likewise.
* testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
* testsuite/gas/i386/x86-64-cet.d: Likewise.
* testsuite/gas/i386/cet.s: Update incsspd and setssbsy tests.
* testsuite/gas/i386/x86-64-cet.s: Likewise.
opcodes/
* i386-dis.c (RM_0FAE_REG_5): Removed.
(PREFIX_MOD_3_0F01_REG_5_RM_1): Likewise.
(PREFIX_MOD_3_0F01_REG_5_RM_0): New.
(PREFIX_MOD_3_0FAE_REG_5): Likewise.
(prefix_table): Remove PREFIX_MOD_3_0F01_REG_5_RM_1. Add
PREFIX_MOD_3_0F01_REG_5_RM_0.
(prefix_table): Update PREFIX_MOD_0_0FAE_REG_5. Add
PREFIX_MOD_3_0FAE_REG_5.
(mod_table): Update MOD_0FAE_REG_5.
(rm_table): Update RM_0F01_REG_5. Remove RM_0FAE_REG_5.
* i386-opc.tbl: Update incsspd, incsspq and setssbsy.
* i386-tbl.h: Regenerated.
H.J. Lu [Wed, 21 Jun 2017 15:30:01 +0000 (08:30 -0700)]
x86: CET v2.0: Rename savessp to saveprevssp
Replace savessp with saveprevssp for CET v2.0:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
gas/
* testsuite/gas/i386/cet-intel.d: Updated.
* testsuite/gas/i386/cet.d: Likewise.
* testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
* testsuite/gas/i386/x86-64-cet.d: Likewise.
* testsuite/gas/i386/cet.s: Replace savessp with saveprevssp.
* testsuite/gas/i386/x86-64-cet.s: Likewise.
opcodes/
* i386-dis.c (prefix_table): Replace savessp with saveprevssp.
* i386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
H.J. Lu [Wed, 21 Jun 2017 15:28:30 +0000 (08:28 -0700)]
x86: CET v2.0: Update NOTRACK prefix
Update NOTRACK prefix handling to support memory indirect branch for
CET v2.0:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
gas/
* config/tc-i386.c (md_assemble): Update NOTRACK prefix check.
* testsuite/gas/i386/notrack-intel.d: Updated.
* testsuite/gas/i386/notrack.d: Likewise.
* testsuite/gas/i386/notrackbad.l: Likewise.
* testsuite/gas/i386/x86-64-notrack-intel.d: Likewise.
* testsuite/gas/i386/x86-64-notrack.d: Likewise.
* testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
* testsuite/gas/i386/notrack.s: Add NOTRACK prefix tests with
memory indirect branch.
* testsuite/gas/i386/x86-64-notrack.s: Likewise.
* testsuite/gas/i386/notrackbad.s: Remove memory indirect branch
with NOTRACK prefix.
* testsuite/gas/i386/x86-64-notrackbad.s: Likewise.
opcodes/
* i386-dis.c (reg_table): Swap indirEv with NOTRACK on "call{&|}"
and "jmp{&|}".
(NOTRACK_Fixup): Support memory indirect branch with NOTRACK
prefix.
Nick Clifton [Wed, 21 Jun 2017 14:21:11 +0000 (15:21 +0100)]
Fix address violation parsing a corrupt Alpha VMS binary file.
PR binutils/21639
* vms-misc.c (_bfd_vms_save_sized_string): Use unsigned int as
type of the size parameter.
(_bfd_vms_save_counted_string): Add second parameter - the maximum
length of the counted string.
* vms.h (_bfd_vms_save_sized_string): Update prototype.
(_bfd_vms_save_counted_string): Likewise.
* vms-alpha.c (_bfd_vms_slurp_eisd): Update calls to
_bfd_vms_save_counted_string.
(_bfd_vms_slurp_ehdr): Likewise.
(_bfd_vms_slurp_egsd): Likewise.
(Parse_module): Likewise.
Thomas Preud'homme [Wed, 21 Jun 2017 14:06:51 +0000 (15:06 +0100)]
[ARM] Allow Thumb division as an extension for ARMv7
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to allow ARMv7 to be selected in automatic
architecture selection in presence of Thumb division instructions.
=== Motivation ===
any-idiv.d and automatic-sdiv.d testcases in GAS testsuite expect
autodetection code to select ARMv7 in presence of Thumb integer
division. However, the definition of ARM_AEXT_V7 and thus ARM_ARCH_V7 do
not contain these instructions and the idiv extension is only available
for ARMv7-A and ARMv7-R. Therefore, under the stricter automatic
detection code proposed in the subsequent patch of the series ARMv7 is
refused if a Thumb division instruction is present.
=== Patch description ===
This patch adds a new "idiv" extension after the existing one that is
available to all ARMv7 targets. This new entry is ignored by all current
code parsing arm_extensions such that it would be unavailable on the
command-line and remain a purely internal hack, easily removed in favor
of a better solution later. This is considered though by the subsequent
patch reworking automatic detection of build attributes such that ARMv7
is allowed to match in present of Thumb division instructions. For good
measure, comments are added in all instances of code browsing
arm_extensions to mention the expected behavior in case of duplicate
entries as well as a new testcase.
2017-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (arm_extensions): New duplicate idiv entry to enable
Thumb division for ARMv7 architecture.
(arm_parse_extension): Document expected behavior for duplicate
entries.
(s_arm_arch_extension): Likewise.
* testsuite/gas/arm/forbid-armv7-idiv-ext.d: New test.
* testsuite/gas/arm/forbid-armv7-idiv-ext.l: New expected output for
above test.
Thomas Preud'homme [Wed, 21 Jun 2017 13:57:53 +0000 (14:57 +0100)]
[ARM] Rework selection of feature bits to base build attributes on
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to set the feature bits on which to decide
what the build attributes should be according to the mode
(autodetection, user specified architecture or CPU, or
-march/-mcpu=all).
=== Motivation ===
Currently, the flags variable which is used to determine the build
attribute is constructed from the instruction used (arm_arch_used and
thumb_arch_used) as well as the user specified architecture or CPU
(selected_cpu). This means when several .arch are specified the
resulting feature bits can be such that no architecture provide them
all and can thus result in incorrect Tag_CPU_arch. See for instance
what having both .arch armv8-a and .arch armv8-m.base would result in.
This is not caught by the testsuite because of further bugs in the
Tag_CPU_arch build attribute value selection logic (see next patch in
the series).
=== Patch description ===
As one would expect, this patch solves the problem by setting flags
from feature bits used if in autodetection mode [1] and from
selected_cpu otherwise. The logic to set arm_ext_v1, arm_ext_v4t and
arm_ext_os feature bits is also moved to only run in autodetection mode
since otherwise the architecture or CPU would have a consistent set of
feature bits already.
[1] No architecture or CPU was specified by the user
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Populate flags from
feature bits used or selected_cpu depending on whether a CPU was
selected by the user.
Alan Modra [Wed, 21 Jun 2017 00:40:00 +0000 (10:10 +0930)]
[GOLD] PowerPC move plt indx_ out of unordered map key
I was lazy when adding indx_ to Plt_stub_ent. The field isn't part of
the key, so ought to be part of the mapped type. Make it so.
* powerpc.cc (Plt_stub_key): Rename from Plt_stub_ent. Remove indx_.
(Plt_stub_key_hash): Rename from Plt_stub_ent_hash.
(struct Plt_stub_ent): New.
(Plt_stub_entries): Map from Plt_stub_key to Plt_stub_ent. Adjust
use throughout file.
Alan Modra [Wed, 21 Jun 2017 05:33:25 +0000 (15:03 +0930)]
PowerPC64 localentry:0 plt calls
These don't need a following nop. Also, a localentry:0 plt call
marked with an R_PPC64_TOCSAVE reloc should ignore the tocsave.
There's no need to save r2 in the prologue for such calls.
* elf64-ppc.c (ppc64_elf_size_stubs): Test for localentry:0 plt
calls before tocsave calls.
(ppc64_elf_relocate_section): Allow localentry:0 plt calls without
following nop.
Alan Modra [Tue, 20 Jun 2017 00:00:23 +0000 (09:30 +0930)]
PowerPC64 tocsave testcases
* testsuite/ld-powerpc/powerpc.exp: Run TOCSAVE tests.
* testsuite/ld-powerpc/tocsave1.s,
* testsuite/ld-powerpc/tocsave1a.d,
* testsuite/ld-powerpc/tocsave1s.d,
* testsuite/ld-powerpc/tocsave2.s,
* testsuite/ld-powerpc/tocsave2a.d,
* testsuite/ld-powerpc/tocsave2s.d,
* testsuite/ld-powerpc/tocsavelib.s: New files.
Thomas Preud'homme [Wed, 21 Jun 2017 13:09:38 +0000 (14:09 +0100)]
[ARM] Simplify Tag_DSP_extension selection logic
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to simplify the logic to decide whether to
set Tag_DSP_extension.
=== Motivation ===
To decide whether to set Tag_DSP_extension, the current code was
checking whether the flags had DSP instruction but the architecture
selected for Tag_CPU_arch did not have any. This was necessary because
extension feature bit were not available separately. This is no longer
necessary and can be simplified.
=== Patch description ===
The patch change the logic to set Tag_DSP_extension to check whether any
DSP feature bit is set in the extension feature bit, as per the
definition of that build attribute. The patch also removes all
definitions of arm_arch which is now unneeded.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Test *mcpu_ext_opt to
decide whether to set Tag_DSP_extension build attribute value. Remove
now useless arm_arch variable.
Thomas Preud'homme [Wed, 21 Jun 2017 13:08:08 +0000 (14:08 +0100)]
[ARM] Keep separation between extensions and architecture bits throughout execution
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to keep the distinction between
architecture feature bits and extension ones after parsing has occured.
=== Motivation ===
This distinction is necessary to allow the Tag_CPU_arch build attribute
value to be exactly as per the architecture of the selected CPU. With
mixed architecture and extension feature bit, it is impossible to find
an architecture with an exact match of feature bit and the build
attribute value logic must then select the closest match which might not
be the right architecture. The previous patch in the patch series makes
the distinction possible when parsing -mcpu and .cpu directives but the
distinction gets lost after. Similarly feature bits contributed by
extensions in -march or .arch_extensions directive are mixed together
with architecture extensions.
=== Patch description ===
The patch adds new feature bit pointer for extension feature bits.
Information from the parsing regarding extensions can then be kept
separate in those. This requires adapting arm_parse_extension to deal
with two feature bits, allowing the architecture bits to be marked as
const. It also requires extra care when setting cpu_variant and
selected_cpu because the extension bits are optional since there might
not be any extension in use.
Note that contrary to cpu feature bits, the extension feature bits are
made read/write and are always dynamically allocated. This allows to
unconditionally free them in arm_md_post_relax added for this occasion,
thereby fixing a longstanding memory leak when arm_parse_extension was
invoked (XNEW of ext_fset without corresponding XDELETE).
Introduction of arm_md_post_relax is necessary to only free the
extension feature bits after aeabi_set_attribute_string has been called
for the last time.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (dyn_mcpu_ext_opt): New static variable.
(dyn_march_ext_opt): Likewise.
(md_begin): Copy extension feature bits alongside architecture ones.
Merge extensions feature bits in selected_cpu and cpu_variant if there
is some.
(arm_parse_extension): Pass architecture and extension feature bits in
separate parameters, with architecture bits being read only. Update
**opt_p directly rather than *ext_set and initialize it if needed.
(arm_parse_cpu): Stop merging architecture and extension feature bits
and instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
respectively. Adapt to change in parameters of arm_parse_extension.
(arm_parse_arch): Adapt to change in parameters of arm_parse_extension.
(aeabi_set_attribute_string): Make function static.
(arm_md_post_relax): New function.
(s_arm_cpu): Stop merging architecture and extension feature bits and
instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
respectively. Merge extension feature bits in cpu_variant
if there is any.
(s_arm_arch): Reset extension feature bit. Set selected_cpu from
*mcpu_cpu_opt and cpu_variant from selected_cpu and *mfpu_opt for
consistency with s_arm_cpu.
(s_arm_arch_extension): Update *dyn_mcpu_ext_opt rather than
selected_cpu, allocating it before hand if needed. Set selected_cpu
from it and then cpu_variant.
(s_arm_fpu): Merge *mcpu_ext_opt feature bits if any in cpu_variant.
* config/tc-arm.h (md_post_relax_hook): Set to arm_md_post_relax.
(aeabi_set_public_attributes): Delete external declaration.
(arm_md_post_relax): Declare externally.
Thomas Preud'homme [Wed, 21 Jun 2017 12:16:56 +0000 (13:16 +0100)]
[ARM] Separate extensions from architectures in arm_cpus
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to distinguish for a CPU the feature bits
coming from its architecture from the feature bits coming from
extension(s) available in this CPU.
=== Motivation ===
This distinction is necessary to allow the Tag_CPU_arch build attribute
value to be exactly as per the architecture of the selected CPU. With
mixed architecture and extension feature bit, it is impossible to find
an architecture with an exact match of feature bit and the build
attribute value logic must then select the closest match which might not
be the right architecture.
=== Patch description ===
The patch creates a new field in the arm_cpus table to hold the feature
set for the extensions available in each CPU. The existing architecture
feature set is then updated to remove those feature bit. The patch also
takes advantage of all the lines being changed to reindent the whole
table.
Note: This patch *adds* a memory leak due to mcpu_cpu_opt sometimes
pointing to dynamically allocated feature bits which is never freeed.
The subsequent patch in the series solves this issue as well as a
preexisting identical issue in arm_parse_extension. The patches are kept
separate for ease of review since they are both big enough already.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (struct arm_cpu_option_table): New ext field.
(ARM_CPU_OPT): Add parameter to set new ext field and reorder canonical
name field just after the name field.
(arm_cpus): Move extension feature bit from value field to ext field,
reorder parameter according to changes in ARM_CPU_OPT and reindent.
(arm_parse_cpu): Point mcpu_cpu_opt to a bitfield merging the value and
ext field from the selected arm_cpus entry.
(s_arm_cpu): Likewise.
Nick Clifton [Wed, 21 Jun 2017 12:18:46 +0000 (13:18 +0100)]
Fix seg-fault in the BFD parsing a corrupt input binary.
PR binutils/21645
* reloc.c (bfd_generic_get_relocated_section_contents): Fail if
bfd_get_full_section_contents returns no contents.
Simon Marchi [Wed, 21 Jun 2017 10:28:03 +0000 (12:28 +0200)]
Change to_xfer_partial doc to use addressable memory units
The commit
d309493 target: consider addressable unit size when reading/writing memory
introduced the possibility of reading memory of targets with
non-8-bit-bytes (e.g. memories that store 16 bits at each address).
The documentation of target_read and target_write was updated
accordingly, but to_xfer_partial, which is very related, wasn't updated.
This commit fixes that.
gdb/ChangeLog:
* target.h (struct target_ops) <to_xfer_partial>: Update doc to
talk about addressable units instead of bytes.
Nick Clifton [Wed, 21 Jun 2017 11:04:07 +0000 (12:04 +0100)]
Fix potential address violation parsing a corrupt Alpha VMS file.
PR binutils/21638
* vms-alpha.c (_bfd_vms_slurp_egsd): Check for an undersized
record.
Nick Clifton [Wed, 21 Jun 2017 10:13:49 +0000 (11:13 +0100)]
Fix address violation parsing a corrupt IEEE Alpha binary.
PR binutils/21637
* vms-alpha.c (_bfd_vms_slurp_egsd): Check for an empty section
list.
(image_set_ptr): Likewise.
(alpha_vms_fix_sec_rel): Likewise.
(alpha_vms_slurp_relocs): Likewise.
Nick Clifton [Wed, 21 Jun 2017 09:54:04 +0000 (10:54 +0100)]
Fix address violation when parsing a corrupt IEEE binary.
PR binutils/21633
* ieee.c (ieee_slurp_sections): Check for a NULL return from
read_id.
(ieee_archive_p): Likewise.
(ieee_object_p): Likewise.
Nick Clifton [Wed, 21 Jun 2017 09:36:58 +0000 (10:36 +0100)]
Fix seg-fault reading a corrupt ELF binary.
PR binutils/21640
* elf.c (setup_group): Zero the group section pointer list after
allocation so that loops can be caught. Check for NULL pointers
when processing a group list.
James Greenhalgh [Wed, 21 Jun 2017 08:13:25 +0000 (09:13 +0100)]
Add support for the Cortex-A55 and Cortex-A75 versions of the AArch64 architecture.
* config/tc-aarch64.c (aarch64_cpus): Add cortex-a55 and cortex-a75.
* doc/c-aarch64.texi (-mcpu): Document cortex-a55 and cortex-a75.
Sergio Durigan Junior [Wed, 21 Jun 2017 01:30:11 +0000 (21:30 -0400)]
Fix PR gdb/21606: SYMBOL_FUNCTIONS_DOMAIN misspelled in documentation
Both Python and Guile documentations misspelled
SYMBOL_FUNCTIONS_DOMAIN, writing SYMBOL_FUNCTION_DOMAIN instead. This
obvious commit fixes it.
gdb/doc/ChangeLog:
2017-06-20 Sergio Durigan Junior <sergiodj@redhat.com>
PR gdb/21606
* python.texi (Python representation of Symbols.): Replace
SYMBOL_FUNCTION_DOMAIN by SYMBOL_FUNCTIONS_DOMAIN, fixing typo.
* guile.texi (Guile representation of Symbols.): Likewise.
GDB Administrator [Wed, 21 Jun 2017 00:00:36 +0000 (00:00 +0000)]
Automatic date update in version.in
Eric Christopher [Tue, 20 Jun 2017 23:18:58 +0000 (16:18 -0700)]
2017-06-20 Eric Christopher <echristo@gmail.com>
* aarch64.cc (scan_reloc_for_stub): Use plt_address_for_global to
calculate the symbol value.
(scan_reloc_section_for_stubs): Allow stubs to be created for
section symbols.
(maybe_apply_stub): Handle creating stubs for weak symbols to
match the code in scan_reloc_for_stub.
Simon Marchi [Tue, 20 Jun 2017 14:59:03 +0000 (16:59 +0200)]
gdbserver/Makefile.in: Sort IPA_OBJS
gdb/gdbserver/ChangeLog:
* Makefile.in (IPA_OBJS): Sort and format one item per line.
Sergio Durigan Junior [Tue, 20 Jun 2017 13:33:53 +0000 (09:33 -0400)]
Use '::iterator' instead of '::const_iterator' on environ.c (and fix breakage on early versions of libstdc++)
Even though C++11 supports modifying containers using a const_iterator
(e.g., calling the 'erase' method of a std::vector), early versions of
libstdc++ did not implement that. Some of our buildslaves are using
these versions (e.g., the AArch64 buildslave uses gcc 4.8.8), and my
previous commit causes a breakage on them. The solution is simple:
just use a normal iterator, without const.
gdb/ChangeLog:
2017-06-20 Sergio Durigan Junior <sergiodj@redhat.com>
* common/environ.c (gdb_environ::unset): Use '::iterator' instead
of '::const_iterator'.
Sergio Durigan Junior [Sat, 11 Feb 2017 02:19:44 +0000 (21:19 -0500)]
C++ify gdb/common/environ.c
As part of the preparation necessary for my upcoming task, I'd like to
propose that we turn gdb_environ into a class. The approach taken
here is simple: the class gdb_environ contains everything that is
needed to manipulate the environment variables. These variables are
stored in an std::vector<char *>, which can be converted to a 'char
**' and passed as argument to functions that need it.
The usage has not changed much. As per Pedro's suggestion, this class
uses a static factory method initialization. This means that when an
instance is created, it is initially empty. When needed, it has to be
initialized using the static method 'from_host_environ'.
As mentioned before, this is a preparation for an upcoming work that I
will be posting in the next few weeks or so. For that work, I'll
probably create another data structure that will contain all the
environment variables that were set by the user using the 'set
environment' command, because I'll need access to them. This will be
much easier with the class-ification of gdb_environ.
As noted, this has been regression-tested with the new version of
environ.exp and no regressions were found.
gdb/ChangeLog:
2017-06-20 Sergio Durigan Junior <sergiodj@redhat.com>
* Makefile.in (SUBDIR_UNITTESTS_SRCS): Add
'unittests/environ-selftests.c'.
(SUBDIR_UNITTESTS_OBS): Add 'environ-selftests.o'.
* charset.c (find_charset_names): Declare object 'iconv_env'.
Update code to use 'iconv_env' object. Remove call to
'free_environ'.
* common/environ.c: Include <utility>.
(make_environ): Delete function.
(free_environ): Delete function.
(gdb_environ::clear): New function.
(gdb_environ::operator=): New function.
(gdb_environ::get): Likewise.
(environ_vector): Delete function.
(set_in_environ): Delete function.
(gdb_environ::set): New function.
(unset_in_environ): Delete function.
(gdb_environ::unset): New function.
(gdb_environ::envp): Likewise.
* common/environ.h: Include <vector>.
(struct gdb_environ): Delete; transform into...
(class gdb_environ): ... this class.
(free_environ): Delete prototype.
(init_environ, get_in_environ, set_in_environ, unset_in_environ,
environ_vector): Likewise.
* infcmd.c (run_command_1): Update code to call
'envp' from 'gdb_environ' class.
(environment_info): Update code to call methods from 'gdb_environ'
class.
(unset_environment_command): Likewise.
(path_info): Likewise.
(path_command): Likewise.
* inferior.c (inferior::~inferior): Delete call to 'free_environ'.
(inferior::inferior): Initialize 'environment' using the host's
information.
* inferior.h: Remove forward declaration of 'struct gdb_environ'.
Include "environ.h".
(class inferior) <environment>: Change type from 'struct
gdb_environ' to 'gdb_environ'.
* mi/mi-cmd-env.c (mi_cmd_env_path): Update code to call
methods from 'gdb_environ' class.
* solib.c (solib_find_1): Likewise
* unittests/environ-selftests.c: New file.
gdb/gdbserver/ChangeLog:
2017-06-20 Sergio Durigan Junior <sergiodj@redhat.com>
* linux-low.c (linux_create_inferior): Adjust code to access the
environment information via 'gdb_environ' class.
* lynx-low.c (lynx_create_inferior): Likewise.
* server.c (our_environ): Make it an instance of 'gdb_environ'.
(get_environ): Return a pointer to 'our_environ'.
(captured_main): Initialize 'our_environ'.
* server.h (get_environ): Adjust prototype.
* spu-low.c (spu_create_inferior): Adjust code to access the
environment information via 'gdb_environ' class.
Yao Qi [Tue, 20 Jun 2017 11:08:33 +0000 (12:08 +0100)]
Adjust the order of 32bit-linux.xml and 32bit-sse.xml in i386/i386-linux.xml
Exchange the order of 32bit-linux.xml and 32bit-sse.xml in
i386/i386-linux.xml, to align with other i386 linux .xml files.
gdb:
2017-06-20 Yao Qi <yao.qi@linaro.org>
* features/i386/i386-linux.xml: Exchange the order of including
32bit-linux.xml and 32bit-sse.xml.
* features/i386/i386-linux.c: Regenerated.
Yao Qi [Tue, 20 Jun 2017 10:29:17 +0000 (11:29 +0100)]
Class-fy tdesc_reg tdesc_type and tdesc_feature
This patch class-fies them, adding ctor, dtor, and deleting
copy ctor and assignment operator.
gdb:
2017-06-20 Yao Qi <yao.qi@linaro.org>
* target-descriptions.c (tdesc_reg): Add ctor, dtor.
Delete copy ctor and assignment operator.
(tdesc_type): Likewise.
(tdesc_feature): Likewise.
(tdesc_free_reg): Remove.
(tdesc_create_reg): Use new.
(tdesc_free_type): Remove.
(tdesc_create_vector): Use new.
(tdesc_create_union): Likewise.
(tdesc_create_flags): Likewise.
(tdesc_create_enum): Likewise.
(tdesc_free_feature): Delete.
(free_target_description): Use delete.
James Clarke [Tue, 20 Jun 2017 08:31:52 +0000 (18:01 +0930)]
[GOLD] Avoid duplicate PLT stub symbols on ppc32
If two objects are compiled with -fPIC or -fPIE and call the same
function, two different PLT entries are created, one for each object,
but the same stub symbol name is used for both.
* powerpc.cc (Stub_table::define_stub_syms): Always include object's
uniq_ value.
H.J. Lu [Tue, 20 Jun 2017 03:30:20 +0000 (20:30 -0700)]
Check the DYNAMIC bit for input shared objects
Since the BFD section count may not be cleared for shared objects during
linking, we should check the DYNAMIC bit for input shared objects.
bfd/
PR ld/21626
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Check
the DYNAMIC bit instead of bfd_count_sections.
ld/
PR ld/21626
* testsuite/ld-i386/i386.exp: Run ld/21626 tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
GDB Administrator [Tue, 20 Jun 2017 00:00:38 +0000 (00:00 +0000)]
Automatic date update in version.in
John Baldwin [Mon, 19 Jun 2017 21:30:24 +0000 (14:30 -0700)]
Don't throw an error in 'info registers' for unavailable MIPS registers.
'info registers' for MIPS throws an error and when it first encounters
an unavailable register. This does not match other architectures
which annotate unavailable registers and continue to print out the
values of subsequent registers. Replace the error by displaying an
aligned "<unavailable>". This string is truncated to "<unavl>" when
displaying a 32-bit register.
gdb/ChangeLog:
* mips-tdep.c (print_gp_register_row): Don't error for unavailable
registers.
Peter Bergner [Mon, 19 Jun 2017 18:04:13 +0000 (13:04 -0500)]
Update GDB test case for new lnia extended mnemonic.
When I added the new lnia extended mnemonic for addpcis, I updated the
assembler/disassembler test cases, but overlooked the GDB test cases.
This patch fixes that oversight and associated test case failure.
* gdb.arch/powerpc-power9.exp: Update test case for new lnia
extended mnemonic.
* gdb.arch/powerpc-power9.s: Likewise.
Nick Clifton [Mon, 19 Jun 2017 14:57:19 +0000 (15:57 +0100)]
Fix address violation when attempting to display disassembled data.
PR binutils/21619
* objdump.c (disassemble_bytes): Check that there is sufficient
data available before attempting to display it.
Nick Clifton [Mon, 19 Jun 2017 13:52:36 +0000 (14:52 +0100)]
Fix address violations when reading corrupt VMS records.
PR binutils/21618
* vms-alpha.c (evax_bfd_print_emh): Check for insufficient record
length.
(evax_bfd_print_eeom): Likewise.
(evax_bfd_print_egsd): Check for an overlarge record length.
(evax_bfd_print_etir): Likewise.
Nick Clifton [Mon, 19 Jun 2017 13:15:57 +0000 (14:15 +0100)]
Prevent address violation when attempting to disassemble a corrupt score binary.
PR binutils/21614
* score-dis.c (score_opcodes): Add sentinel.
Nick Clifton [Mon, 19 Jun 2017 13:06:53 +0000 (14:06 +0100)]
Fix access violation when parsing a corrupt IEEE binary.
PR binutils/21612
* libieee.h (struct common_header_type): Add end_p field.
* ieee.c (this_byte_and_next): Do not advance input_p beyond
end_p.
(read_id): Check for a length that exceeds the remaining bytes in
the input buffer.
(ieee_seek): Initialise end_p.
(ieee_archive_p): Likewise.
(ieee_object_p): Likewise.
Nick Clifton [Mon, 19 Jun 2017 12:01:57 +0000 (13:01 +0100)]
Fix access violation disassembling a corrupt VMS binary.
PR binutils/21611
* vms-alpha.c (_bfd_vms_slurp_eihs): Check for invalid offset
before reading the EIHS structure entries.
Pedro Alves [Mon, 19 Jun 2017 11:46:47 +0000 (12:46 +0100)]
.gdb_index writer: close the file before unlinking it
We should close the file before unlinking because on MS-Windows one
cannot delete a file that is still open.
I considered making 'gdb::unlinker::unlinker(const char *)'
'noexcept(true)' and then adding
static_assert (noexcept (gdb::unlinker (filename.c_str ())), "");
but that doesn't really work because gdb::unlinker has a gdb_assert,
which can throw a QUIT if/when the assertion fails. 'noexcept(true)'
would cause GDB to abruptly terminate if/when the assertion fails.
gdb/ChangeLog:
2017-06-19 Pedro Alves <palves@redhat.com>
* dwarf2read.c (write_psymtabs_to_index): Construct file_closer
after gdb::unlinker.
Nick Clifton [Mon, 19 Jun 2017 11:31:07 +0000 (12:31 +0100)]
Fix access violation when disassembling a corrupt VMS binary.
PR 21615
* vms-alpha.c (_bfd_vms_slurp_egsd): Use unsigned int for
gsd_size. Check that there are enough bytes remaining to read the
type and size of the next egsd. Check that the size of the egsd
does not exceed the size of the record.
Alan Modra [Mon, 19 Jun 2017 06:34:16 +0000 (16:04 +0930)]
Correct target_underscore for cris
* config.bfd: Correct targ_underscore for cris.
Sergio Durigan Junior [Fri, 16 Jun 2017 22:10:27 +0000 (18:10 -0400)]
Use getenv instead of gdb_environ on mi-cmd-env.c
This is a spinoff of
<https://sourceware.org/ml/gdb-patches/2017-06/msg00437.html>.
mi-cmd-env.c is using the whole gdb_environ machinery in order to
access just one variable, which can be easily replaced by a simple
call to getenv. This patch does that, and doesn't cause regressions.
gdb/ChangeLog:
2017-06-18 Sergio Durigan Junior <sergiodj@redhat.com>
* mi/mi-cm-env.c (_initialize_mi_cmd_env): Use getenv instead of
gdb_environ to access an environment variable.
GDB Administrator [Mon, 19 Jun 2017 00:00:23 +0000 (00:00 +0000)]
Automatic date update in version.in
Thomas Petazzoni [Sun, 18 Jun 2017 21:28:56 +0000 (23:28 +0200)]
nat/linux-ptrace.c: add missing gdb_byte* cast
On noMMU platforms, the following code gets compiled:
child_stack = xmalloc (STACK_SIZE * 4);
Where child_stack is a gdb_byte*, and xmalloc() returns a void*. While
the lack of cast is valid in C, it is not in C++, causing the
following build failure:
../nat/linux-ptrace.c: In function 'int linux_fork_to_function(gdb_byte*, int (*)(void*))':
../nat/linux-ptrace.c:273:29: error: invalid conversion from 'void*' to 'gdb_byte* {aka unsigned char*}' [-fpermissive]
child_stack = xmalloc (STACK_SIZE * 4);
Therefore, this commit adds the appropriate cast.
gdb/ChangeLog:
* nat/linux-ptrace.c (linux_fork_to_function): Add cast to
gdb_byte*.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Alan Modra [Sat, 17 Jun 2017 23:49:34 +0000 (09:19 +0930)]
is_underscore_target for ld-elf tests
and correct targ_underscore in config.bfd
bfd/
* config.bfd: Correct targ_underscore for epiphany, ip2k,
m32c, mn10200, pru, rl78, rx, crisv32 and v850.
ld/
* testsuite/lib/ld-lib.exp (is_underscore_target): New.
* testsuite/ld-elf/elf.exp (ASFLAGS): Define UNDERSCORE.
* testsuite/ld-elf/pr21562a.s: If UNDERSCORE defined,
reference sym with prefix.
* testsuite/ld-elf/pr21562b.s: Likewise.
* testsuite/ld-elf/sizeof.s: Likewise.
* testsuite/ld-elf/startof.s: Likewise.
* testsuite/ld-elf/pr14156a.d: Adjust for extra symbols.
* testsuite/ld-elf/pr21562a.d: Remove underscore target from
xfails, and match prefixed symbol.
* testsuite/ld-elf/pr21562b.d: Likewise.
* testsuite/ld-elf/pr21562c.d: Likewise.
* testsuite/ld-elf/pr21562d.d: Likewise.
* testsuite/ld-elf/pr21562e.d: Likewise.
* testsuite/ld-elf/pr21562f.d: Likewise.
* testsuite/ld-elf/pr21562g.d: Likewise.
* testsuite/ld-elf/pr21562h.d: Likewise.
* testsuite/ld-elf/pr21562i.d: Likewise.
* testsuite/ld-elf/pr21562j.d: Likewise.
* testsuite/ld-elf/pr21562k.d: Likewise.
* testsuite/ld-elf/pr21562l.d: Likewise.
* testsuite/ld-elf/pr21562m.d: Likewise.
* testsuite/ld-elf/pr21562n.d: Likewise.
* testsuite/ld-elf/sizeofa.d: Likewise.
* testsuite/ld-elf/sizeofb.d: Likewise.
* testsuite/ld-elf/sizeofc.d: Likewise.
* testsuite/ld-elf/startofa.d: Likewise.
* testsuite/ld-elf/startofb.d: Likewise.
* testsuite/ld-elf/startofc.d: Likewise.
GDB Administrator [Sun, 18 Jun 2017 00:00:37 +0000 (00:00 +0000)]
Automatic date update in version.in
Simon Marchi [Sat, 17 Jun 2017 21:19:25 +0000 (23:19 +0200)]
Add ATTRIBUTE_PRINTF to trace_start_error
clang complains that the fmt passed to vwarning in trace_start_error is
not a literal. This looks like a fair warning, which can be removed by
adding ATTRIBUTE_PRINTF to the declaration of trace_start_error.
gdb/ChangeLog:
* nat/fork-inferior.h (trace_start_error): Add ATTRIBUTE_PRINTF.
Simon Marchi [Sat, 17 Jun 2017 21:19:08 +0000 (23:19 +0200)]
linux-low: Remove usage of "register" keyword
AFAIK, the register keyword is not relevant today, and clang complains
about it:
/home/emaisin/src/binutils-gdb/gdb/gdbserver/linux-low.c:5873:3: error: 'register' storage class specifier is deprecated and incompatible with C++1z
[-Werror,-Wdeprecated-register]
register PTRACE_XFER_TYPE *buffer;
^~~~~~~~~
I think we can safely remove it.
gdb/gdbserver/ChangeLog:
* linux-low.c (linux_read_memory, linux_write_memory): Remove
usage of "register" keyword.
Simon Marchi [Sat, 17 Jun 2017 21:18:49 +0000 (23:18 +0200)]
gdb: Add -Wno-mismatched-tags
clang complains that for some types, we use both the class and struct
keywords in different places. It's not really a problem, so I think we
can safely turn this warning off.
gdb/ChangeLog:
* configure: Re-generate.
* warning.m4 (build_warnings): Add -Wno-mismatched-tags.
gdb/gdbserver/ChangeLog:
* configure: Re-generate.
Simon Marchi [Sat, 17 Jun 2017 21:18:20 +0000 (23:18 +0200)]
gdb: Use -Werror when checking for (un)supported warning flags
In warning.m4, we pass all the warning flags one by one to the compiler
to test if they are supported by this particular compiler. If the
compiler exits with an error, we conclude that this warning flag is not
supported and exclude it. This allows us to use warning flags without
having to worry about which versions of which compilers support each
flag.
clang, by default, only emits a warning if an unknown flag is passed:
warning: unknown warning option '-Wfoo' [-Wunknown-warning-option]
The result is that we think that all the warning flags we use are
supported by clang (they are not), and the compilation fails later when
building with -Werror, since the aforementioned warning becomes an
error. The fix is to also pass -Werror when probing for supported
flags, then we'll correctly get an error when using an unknown warning,
and we'll exclude it:
error: unknown warning option '-Wfoo' [-Werror,-Wunknown-warning-option]
I am not sure why there is a change in a random comment in
gdbserver/configure, but I suppose it's a leftfover from a previous
patch, so I included it.
gdb/ChangeLog:
* configure: Re-generate.
* warning.m4: Pass -Werror to compiler when checking for
supported warning flags.
gdb/gdbserver/ChangeLog:
* configure: Re-generate.
Simon Marchi [Sat, 17 Jun 2017 21:17:00 +0000 (23:17 +0200)]
gdb: Pass -x c++ to the compiler
Because we are compiling .c files containing C++ code, clang++ complains
with:
clang: error: treating 'c' input as 'c++' when in C++ mode, this behavior is deprecated
If renaming all the source files to .cpp is out of the question, an
alternative is to pass "-x c++" to convince the compiler that we are
really compiling C++. It works fine with GCC too.
gdb/ChangeLog:
* Makefile.in (COMPILE.pre): Add "-x c++".
gdb/gdbserver/ChangeLog:
* Makefile.in (COMPILE.pre): Add "-x c++".
GDB Administrator [Sat, 17 Jun 2017 00:00:41 +0000 (00:00 +0000)]
Automatic date update in version.in
Yao Qi [Fri, 16 Jun 2017 14:38:42 +0000 (15:38 +0100)]
extract/store integer function template
This patch converts functions extract_{unsigned,signed}_integer
to a function template extract_integer, which has two instantiations. It
also does the similar changes to store__{unsigned,signed}_integer,
regcache::raw_read_{unsigned,signed}, regcache::raw_write_{unsigned,signed},
regcache::cooked_read_{unsigned,signed},
regcache::cooked_write_{unsigned,signed}.
This patch was posted here
https://sourceware.org/ml/gdb-patches/2017-05/msg00492.html but the
problem was fixed in a different way. However, I think the patch is still
useful to shorten the code.
gdb:
2017-06-16 Alan Hayward <alan.hayward@arm.com>
Pedro Alves <palves@redhat.com>
Yao Qi <yao.qi@linaro.org>
* defs.h (RequireLongest): New.
(extract_integer): Declare function template.
(extract_signed_integer): Remove the declaration, but define it
static inline.
(extract_unsigned_integer): Likewise.
(store_integer): Declare function template.
(store_signed_integer): Remove the declaration, but define it
static inline.
(store_unsigned_integer): Likewise.
* findvar.c (extract_integer): New function template.
(extract_signed_integer): Remove.
(extract_unsigned_integer): Remove.
(extract_integer<LONGEST>, extract_integer<ULONGEST>): Explicit
instantiations.
(store_integer): New function template.
(store_signed_integer): Remove.
(store_unsigned_integer): Remove.
(store_integer): Explicit instantiations.
* regcache.c (regcache_raw_read_signed): Update.
(regcache::raw_read): New function.
(regcache::raw_read_signed): Remove.
(regcache::raw_read_unsigned): Remove.
(regcache_raw_read_unsigned): Update.
(regcache_raw_write_unsigned): Update.
(regcache::raw_write_signed): Remove.
(regcache::raw_write): New function.
(regcache_cooked_read_signed): Update.
(regcache::raw_write_unsigned): Remove.
(regcache::cooked_read_signed): Remove.
(regcache_cooked_read_unsigned): Update.
(regcache::cooked_read_unsigned): Remove.
(regcache_cooked_write_signed): Update.
(regcache_cooked_write_unsigned): Update.
* regcache.h (regcache) <raw_read_signed>: Remove.
<raw_write_signed, raw_read_unsigned, raw_write_unsigned>: Remove.
<raw_read, raw_write>: New.
<cooked_read_signed, cooked_write_signed>: Remove.
<cooked_write_unsigned, cooked_read_unsigned>: Remove.
<cooked_read, cooked_write>: New.
* sh64-tdep.c (sh64_pseudo_register_read): Update.
(sh64_pseudo_register_write): Update.
Alan Modra [Fri, 16 Jun 2017 12:20:43 +0000 (21:50 +0930)]
Regen rx-decode.c
opcodes/
* rx-decode.c: Regenerate.
Nick Clifton [Fri, 16 Jun 2017 14:16:19 +0000 (15:16 +0100)]
Fixing linking configure generated tests of ifunc support.
* elflink.c (bfd_elf_size_dynsym_hash_dynstr): Do not fail if the
bucketlist is empty because there are no symbols to add to the
list.
Alan Modra [Fri, 16 Jun 2017 10:11:41 +0000 (19:41 +0930)]
Rewrite __start and __stop symbol handling
This arranges for __start and __stop symbols to be defined before
garbage collection, for all target formats. That should allow the
COFF and PE --gc-sections to keep a singleton orphan input section,
a feature lost by 2017-06-13 commit
cbd0eecf26. The fancier ELF
treatment of keeping all input sections associated with a __start or
__stop symbol, from 2015-10-23 commit
1cce69b9dc, is retained.
.startof. and .sizeof. symbols are deliberately not defined before
garbage collection, so these won't affect garbage collection of
sections.
The patch also ensures __start, __stop, .startof. and .sizeof. symbols
are defined before target size_dynamic_sections is called, albeit
with a preliminary value, so that target code doesn't need to cope
with a symbol changing from undefined at size_dynamic_sections to
defined at relocate_section.
Also, a number of problems with the testcases have been fixed.
PR ld/20022
PR ld/21557
PR ld/21562
PR ld/21571
include/
* bfdlink.h (struct bfd_link_hash_entry): Delete undef.section.
bfd/
* targets.c (struct bfd_target): Add _bfd_define_start_stop.
(BFD_JUMP_TABLE_LINK): Likewise.
* elf-bfd.h (bfd_elf_define_start_stop): Declare.
* elflink.c (_bfd_elf_gc_mark_rsec): Update comment.
(bfd_elf_define_start_stop): New function.
* linker.c (bfd_generic_define_start_stop): New function.
* coff64-rs6000.c (rs6000_xcoff64_vec, rs6000_xcoff64_aix_vec): Init
new field.
* aout-adobe.c (aout_32_bfd_define_start_stop): Define.
* aout-target.h (MY_bfd_define_start_stop): Define.
* aout-tic30.c (MY_bfd_define_start_stop): Define.
* binary.c (binary_bfd_define_start_stop): Define.
* bout.c (b_out_bfd_define_start_stop): Define.
* coff-alpha.c (_bfd_ecoff_bfd_define_start_stop): Define.
* coff-mips.c (_bfd_ecoff_bfd_define_start_stop): Define.
* coff-rs6000.c (_bfd_xcoff_bfd_define_start_stop): Define.
* coffcode.h (coff_bfd_define_start_stop): Define.
* elfxx-target.h (bfd_elfNN_bfd_define_start_stop): Define.
* i386msdos.c (msdos_bfd_define_start_stop): Define.
* i386os9k.c (os9k_bfd_define_start_stop): Define.
* ieee.c (ieee_bfd_define_start_stop): Define.
* ihex.c (ihex_bfd_define_start_stop): Define.
* libbfd-in.h (_bfd_nolink_bfd_define_start_stop): Define.
* mach-o-target.c (bfd_mach_o_bfd_define_start_stop): Define.
* mmo.c (mmo_bfd_define_start_stop): Define.
* nlm-target.h (nlm_bfd_define_start_stop): Define.
* oasys.c (oasys_bfd_define_start_stop): Define.
* pef.c (bfd_pef_bfd_define_start_stop): Define.
* plugin.c (bfd_plugin_bfd_define_start_stop): Define.
* ppcboot.c (ppcboot_bfd_define_start_stop): Define.
* som.c (som_bfd_define_start_stop): Define.
* srec.c (srec_bfd_define_start_stop): Define.
* tekhex.c (tekhex_bfd_define_start_stop): Define.
* versados.c (versados_bfd_define_start_stop): Define.
* vms-alpha.c (vms_bfd_define_start_stop): Define.
(alpha_vms_bfd_define_start_stop): Define.
* xsym.c (bfd_sym_bfd_define_start_stop): Define.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Don't set
__start/__stop syms here.
* ldlang.c (lang_set_startof): Delete.
(start_stop_syms, start_stop_count, start_stop_alloc): New vars.
(lang_define_start_stop, lang_init_start_stop, foreach_start_stop,
undef_start_stop, lang_undef_start_stop, lang_init_startof_sizeof,
set_start_stop, lang_finalize_start_stop): New functions.
(lang_process): Call _start_stop functions.
* testsuite/ld-elf/pr21562a.d: Use xfail rather than notarget.
Correct typos and list of xfail targets.
* testsuite/ld-elf/pr21562b.d: Likewise.
* testsuite/ld-elf/pr21562c.d: Likewise.
* testsuite/ld-elf/pr21562d.d: Likewise.
* testsuite/ld-elf/pr21562e.d: Likewise.
* testsuite/ld-elf/pr21562f.d: Likewise.
* testsuite/ld-elf/pr21562g.d: Likewise.
* testsuite/ld-elf/pr21562h.d: Likewise.
* testsuite/ld-elf/pr21562i.d: Likewise.
* testsuite/ld-elf/pr21562j.d: Likewise.
* testsuite/ld-elf/pr21562k.d: Likewise.
* testsuite/ld-elf/pr21562l.d: Likewise.
* testsuite/ld-elf/pr21562m.d: Likewise.
* testsuite/ld-elf/pr21562n.d: Likewise.
* testsuite/ld-elf/sizeofa.d: Likewise. Adjust to pass for generic ELF.
* testsuite/ld-elf/sizeofb.d: Likewise.
* testsuite/ld-elf/startofa.d: Likewise.
* testsuite/ld-elf/startofb.d: Likewise.
projects / binutils-gdb.git / log