Brad Beckmann [Thu, 19 Nov 2009 00:34:33 +0000 (16:34 -0800)]
Resurrection of the CMP token protocol to GEM5
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
m5: improvements to the ruby_fs.py file
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: removed the chip pointer from MessageBuffer
The Chip object no longer exists and thus is removed from the MessageBuffer
constructor.
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: added error message to isinstance check
Added error message when a symbol is not an instance of a particular expected
type.
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: Added boolean to State Machine parameters
* * *
ruby: Removed primitive .hh includes
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
m5: Added the default m5out directory to the hg ignore list
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: The persistent table files from GEMS
These files are need by the MOESI_CMP_token protocol.
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: MOESI hammer support for DMA reads and writes
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: Added a memory controller feature to MOESI hammer
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: Hammer ruby configuration support
Brad Beckmann [Thu, 19 Nov 2009 00:34:32 +0000 (16:34 -0800)]
ruby: Changes necessary to get the hammer protocol to work in GEM5
Brad Beckmann [Thu, 19 Nov 2009 00:34:31 +0000 (16:34 -0800)]
ruby: added the original hammer protocols from old ruby
Brad Beckmann [Thu, 19 Nov 2009 00:34:31 +0000 (16:34 -0800)]
ruby: returns the number of LLC needed for broadcast
Added feature to CacheMemory to return the number of last level caches.
This count is need for broadcast protocols such as MOESI_hammer.
Brad Beckmann [Thu, 19 Nov 2009 00:34:31 +0000 (16:34 -0800)]
ruby: cache configuration fix to use bytes
Changed cache size to be in bytes instead of kb so that testers can use very
small caches and increase the chance of writeback races.
Brad Beckmann [Thu, 19 Nov 2009 00:33:35 +0000 (16:33 -0800)]
ruby: fix CacheMemory destructor
Brad Beckmann [Thu, 19 Nov 2009 00:33:35 +0000 (16:33 -0800)]
ruby: split CacheMemory.hh into a .hh and a .cc
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: Added default names to message buffers
Added default names to message buffers created by the simple network.
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: slicc method error fix
Added error message when a method call is not supported by an object.
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: slicc action error fix
Small fix to the State Machine error message when duplicate actions are defined.
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: slicc state machine error fixes
Added error messages when:
- a state does not exist in a machine's list of known states.
- an event does not exist in a machine
- the actions of a certain machine have not been declared
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: Removed unused action z_stall
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
m5: Added option to take a checkpoint at the end of simulation
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
m5: Fixed bug in atomic cpu destructor
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: fixed dma mi example to work with multiple dma ports
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
m5: removed master and slave deletions.
The unresolved destructor call caused a seg fault when called.
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
m5: fixed destructor to deschedule the tickEvent and event
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: getPort function fix
Fixed RubyMemory::getPort function to not pass in a -1 for the idx parameter
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: Fixed Directory memory destructor
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
m5: Moved profile option since Simulation depends on it.
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
m5: Added isValidSrc and isValidDest calls to packet.hh
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: included ruby config parameter ports per core
Slightly improved the major hack need to correctly assign the number of ports
per core. CPUs have two ports: icache + dcache. MemTester has one port.
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: Added error check for openning the ruby config file
Brad Beckmann [Wed, 18 Nov 2009 21:55:58 +0000 (13:55 -0800)]
ruby: Support for merging ALPHA_FS and ruby
Connects M5 cpu and dma ports directly to ruby sequencers and dma
sequencers. Rubymem also includes a pio port so that pio requests
and be forwarded to a special pio bus connecting to device pio
ports.
Brad Beckmann [Wed, 18 Nov 2009 21:55:57 +0000 (13:55 -0800)]
ruby: Added more info to bridge error message
Brad Beckmann [Wed, 18 Nov 2009 21:55:57 +0000 (13:55 -0800)]
ruby: Ruby 64-bit address output fixes.
Brad Beckmann [Wed, 18 Nov 2009 21:55:57 +0000 (13:55 -0800)]
ruby: Ruby destruction fix.
Brad Beckmann [Wed, 18 Nov 2009 21:55:57 +0000 (13:55 -0800)]
ruby: Ruby debug print fixes.
Brad Beckmann [Wed, 18 Nov 2009 21:55:57 +0000 (13:55 -0800)]
ruby: Ruby memtest python script.
Ali Saidi [Wed, 18 Nov 2009 00:02:09 +0000 (18:02 -0600)]
ARM: Begin implementing CP15
Ali Saidi [Wed, 18 Nov 2009 00:02:08 +0000 (18:02 -0600)]
ARM: Differentiate between LDM exception return and LDM user regs.
Ali Saidi [Wed, 18 Nov 2009 00:02:08 +0000 (18:02 -0600)]
ARM: Boilerplate full-system code.
--HG--
rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh
rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh
rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc
rename : src/arch/sparc/system.cc => src/arch/arm/system.cc
rename : src/arch/sparc/system.hh => src/arch/arm/system.hh
rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py
rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc
rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh
Ali Saidi [Mon, 16 Nov 2009 17:37:03 +0000 (11:37 -0600)]
imported patch isa_fixes2.diff
Gabe Black [Sun, 15 Nov 2009 08:23:14 +0000 (00:23 -0800)]
ARM: Make the exception return form of ldm restore CPSR.
Gabe Black [Sun, 15 Nov 2009 08:15:42 +0000 (00:15 -0800)]
ARM: Create a new type of load uop that restores spsr into cpsr.
Gabe Black [Sun, 15 Nov 2009 05:03:10 +0000 (21:03 -0800)]
ARM: Check in the actual change from the last commit.
The last commit was somehow empty. This was what was supposed to go in it.
Gabe Black [Sun, 15 Nov 2009 04:57:59 +0000 (20:57 -0800)]
ARM: Switch the immediate and register versions of msr.
These were accidently transposed. This change straightens them out.
Gabe Black [Sun, 15 Nov 2009 03:22:30 +0000 (19:22 -0800)]
ARM: Fix up the implmentation of the msr instruction.
Gabe Black [Sun, 15 Nov 2009 03:22:30 +0000 (19:22 -0800)]
ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.
Gabe Black [Sun, 15 Nov 2009 03:22:30 +0000 (19:22 -0800)]
ARM: Add a bitfield to indicate if an immediate should be used.
Gabe Black [Sun, 15 Nov 2009 03:22:30 +0000 (19:22 -0800)]
ARM: Write some functions to write to the CPSR and SPSR for instructions.
Gabe Black [Sun, 15 Nov 2009 03:22:29 +0000 (19:22 -0800)]
ARM: Fix up the implmentation of the mrs instruction.
Gabe Black [Sun, 15 Nov 2009 03:22:29 +0000 (19:22 -0800)]
ARM: More accurately describe the effects of using the control operands.
Gabe Black [Sun, 15 Nov 2009 03:22:29 +0000 (19:22 -0800)]
ARM: Hook up the moded versions of the SPSR.
These registers can be accessed directly, or through MISCREG_SPSR which will
act as whichever SPSR is appropriate for the current mode.
Ali Saidi [Sat, 14 Nov 2009 17:49:01 +0000 (11:49 -0600)]
SE: Fix SE mode OS X compilation.
Ali Saidi [Sat, 14 Nov 2009 17:25:00 +0000 (11:25 -0600)]
ARM: Move around decoder to properly decode CP15
Vince Weaver [Wed, 11 Nov 2009 22:49:09 +0000 (17:49 -0500)]
X86: add ULL to 1's being shifted in 64-bit values
Some of the micro-ops weren't casting 1 to ULL before shifting,
which can cause problems. On the perl makerand input this
caused some values to be negative that shouldn't have been.
The casts are done as ULL(1) instead of 1ULL to match others
in the m5 code base.
Gabe Black [Wed, 11 Nov 2009 07:44:05 +0000 (23:44 -0800)]
ARM: Fix some bugs in the ISA desc and fill out some instructions.
Gabe Black [Wed, 11 Nov 2009 05:12:53 +0000 (21:12 -0800)]
Merge with the head.
Gabe Black [Wed, 11 Nov 2009 05:10:18 +0000 (21:10 -0800)]
Mem: Eliminate the NO_FAULT request flag.
Gabe Black [Wed, 11 Nov 2009 04:34:38 +0000 (20:34 -0800)]
ARM: Implement fault classes.
Implement some fault classes using the curriously recurring template pattern,
similar to SPARCs.
Gabe Black [Wed, 11 Nov 2009 04:19:55 +0000 (20:19 -0800)]
ARM: Fix the integer register indexes.
The PC indexes in the various register sets was defined in the section for
unaliased registers which was throwing off the indexing. This moves those
where they belong. Also, to make detecting accesses to the PC easier and
because it's in the same place in all modes, the intRegForceUser function
now passes it through as index 15.
Vince Weaver [Tue, 10 Nov 2009 16:29:30 +0000 (11:29 -0500)]
X86: Fix bugs in movd implementation.
Unfortunately my implementation of the movd instruction had two bugs.
In one case, when moving a 32-bit value into an xmm register, the
lower half of the xmm register was not zero extended.
The other case is that xmm was used instead of xmmlm as the source
for a register move. My test case didn't notice this at first
as it moved xmm0 to eax, which both have the same register
number.
Vince Weaver [Tue, 10 Nov 2009 16:18:23 +0000 (11:18 -0500)]
X86: Remove double-cast in Cvtf2i micro-op
This double cast led to rounding errors which caused
some benchmarks to get the wrong values, most notably lucas
which failed spectacularly due to CVTTSD2SI returning an
off-by-one value. equake was also broken.
Vince Weaver [Mon, 9 Nov 2009 15:02:55 +0000 (10:02 -0500)]
syscall: missing initializer in getcwd call
This one case was missed during the update to stack-based arguments.
Without this fix, m5 will crash during a gwtcwd call, at least
with X86.
Gabe Black [Mon, 9 Nov 2009 06:49:58 +0000 (22:49 -0800)]
X86: Don't panic on faults on prefetches in SE mode.
Gabe Black [Mon, 9 Nov 2009 06:49:57 +0000 (22:49 -0800)]
X86: Explain what really didn't work with unmapped addresses in SE mode.
Gabe Black [Mon, 9 Nov 2009 06:49:57 +0000 (22:49 -0800)]
X86: Make x86 use PREFETCH instead of PF_EXCLUSIVE.
Nathan Binkert [Mon, 9 Nov 2009 04:15:54 +0000 (20:15 -0800)]
automerge
Nathan Binkert [Mon, 9 Nov 2009 04:15:23 +0000 (20:15 -0800)]
tests: update statistics for change caused by vsyscall support in x86
Caused by a slight change in memory layout.
Steve Reinhardt [Mon, 9 Nov 2009 01:35:49 +0000 (17:35 -0800)]
scons: deal with generated .py files properly
Gabe Black [Sun, 8 Nov 2009 23:49:03 +0000 (15:49 -0800)]
ARM: Support forcing load/store multiple to use user registers.
Gabe Black [Sun, 8 Nov 2009 23:16:59 +0000 (15:16 -0800)]
ARM: Simplify the load/store multiple generation code.
Specifically, get rid of the big switch statement so more cases can be
handled. Enumerating all the possible settings doesn't scale well. Also do
some minor style clean up.
Nathan Binkert [Sun, 8 Nov 2009 21:31:59 +0000 (13:31 -0800)]
compile: wrap 64bit numbers with ULL() so 32bit compiles work
In the isa_parser, we need to check case statements.
Gabe Black [Sun, 8 Nov 2009 10:08:40 +0000 (02:08 -0800)]
ARM: Split the condition codes out of the CPSR.
This allows those bits to be renamed while allowing the other fields to
control the behavior of the processor.
Gabe Black [Sun, 8 Nov 2009 10:01:02 +0000 (02:01 -0800)]
ARM: Add in more bits for the mon mode.
Gabe Black [Sun, 8 Nov 2009 10:00:55 +0000 (02:00 -0800)]
ARM: Get rid of NumInternalProcRegs.
That constant is a carry over from Alpha and doesn't do anything in ARM.
Gabe Black [Sun, 8 Nov 2009 09:59:20 +0000 (01:59 -0800)]
ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.
Gabe Black [Sun, 8 Nov 2009 09:57:34 +0000 (01:57 -0800)]
ARM: Get rid of the Raddr operand.
Gabe Black [Sun, 8 Nov 2009 08:54:32 +0000 (00:54 -0800)]
ARM: Initialize processes in user mode.
I accidentally left in a change to test using int registers in system mode.
This change reverts that.
Gabe Black [Sun, 8 Nov 2009 08:07:49 +0000 (00:07 -0800)]
ARM: Implement the shadow registers using register flattening.
Gabe Black [Sun, 8 Nov 2009 08:07:35 +0000 (00:07 -0800)]
ARM: Set up an intregs.hh for ARM.
Add constants for all the modes and registers, maps for aliasing, functions
that use the maps and range check, and use a named constant instead of a magic
number for the microcode register.
Gabe Black [Sun, 8 Nov 2009 06:34:33 +0000 (22:34 -0800)]
ARM: Get rid of some unneeded register indexes.
Vince Weaver [Wed, 4 Nov 2009 18:22:15 +0000 (13:22 -0500)]
X86: Fix problem with movhps instruction
This problem is like the one fixed with movhpd a few weeks ago.
A +8 displacement is used to access memory when there should
be none.
This fix is needed for the perlbmk spec2k benchmark to run.
Steve Reinhardt [Thu, 5 Nov 2009 19:11:06 +0000 (11:11 -0800)]
slicc: tweak file enumeration for scons
Right now .cc and .hh files are handled separately, but then
they're just munged together at the end by scons, so it
doesn't buy us anything. Might as well munge from the start
since we'll eventually be adding generated Python files
to the list too.
Steve Reinhardt [Thu, 5 Nov 2009 19:11:05 +0000 (11:11 -0800)]
slicc: whack some of Nate's leftover debug code
Nathan Binkert [Thu, 5 Nov 2009 00:57:01 +0000 (16:57 -0800)]
build: fix compile problems pointed out by gcc 4.4
Steve Reinhardt [Wed, 4 Nov 2009 22:23:25 +0000 (14:23 -0800)]
o3: get rid of unused physmem pointer
Steve Reinhardt [Wed, 4 Nov 2009 22:23:24 +0000 (14:23 -0800)]
stats: update memtest-ruby
I don't know if the new stats are right or not, but we've
been too long with a useless regression so I'm just going
to update them.
Vince Weaver [Wed, 4 Nov 2009 05:47:12 +0000 (00:47 -0500)]
X86: Enable x86_64 vsyscall support
64-bit vsyscall is different than 32-bit.
There are only two syscalls, time and gettimeofday.
On a real system, there is complicated code that implements these
without entering the kernel. That would be complicated to implement in m5.
Instead we just place code that calls the regular syscalls (this is how
tools such as valgrind handle this case).
This is needed for the perlbmk spec2k benchmark.
Vince Weaver [Wed, 4 Nov 2009 05:19:15 +0000 (00:19 -0500)]
X86: Hook up time syscall on X86
This has been tested and verified that it works.
Vince Weaver [Fri, 30 Oct 2009 16:49:37 +0000 (12:49 -0400)]
X86: Add support for x86 psrldq and pslldq instructions
These are complicated instructions and the micro-code might be suboptimal.
This has been tested with some small sample programs (attached)
The psrldq instruction is needed by various spec2k programs.
Vince Weaver [Fri, 30 Oct 2009 19:52:33 +0000 (15:52 -0400)]
X86: Implement movd_Vo_Edp on X86
This patch implements the movd_Vo_Edp series of instructions.
It addresses various concerns by Gabe Black about which file the
instruction belonged in, as well as supporting REX prefixed
instructions properly.
This instruction is needed for some of the spec2k benchmarks, most
notably bzip2.
Vince Weaver [Fri, 30 Oct 2009 18:19:06 +0000 (14:19 -0400)]
X86: Implement the X86 sse2 haddpd instruction
This patch implements the haddpd instruction.
It fixes the problem in the previous version (pointed out by Gabe Black)
where an incorrect result would happen if you issue the instruction
with the same argument twice, i.e. "haddpd %xmm0,%xmm0"
This instruction is used by many spec2k benchmarks.
Vince Weaver [Fri, 30 Oct 2009 16:51:13 +0000 (12:51 -0400)]
X86: Hookup truncate/ftruncate syscalls on X86
This patch hooks up the truncate, ftruncate, truncate64 and ftruncate64
system calls on 32-bit and 64-bit X86.
These have been tested on both architectures.
ftruncate/ftruncate64 is needed for the f90 spec2k benchmarks.
Vince Weaver [Fri, 30 Oct 2009 16:31:55 +0000 (12:31 -0400)]
SysCalls: Implement truncate64 system call
This uses the new stack-based argument infrastructure.
Tested on x86 and x86_64.
Gabe Black [Sat, 31 Oct 2009 20:20:22 +0000 (13:20 -0700)]
Syscalls: Fix a warning turned error about an unused variable in m5.fast.
Gabe Black [Fri, 30 Oct 2009 07:44:55 +0000 (00:44 -0700)]
Syscalls: Make system calls access arguments like a stack, not an array.
When accessing arguments for a syscall, the position of an argument depends on
the policies of the ISA, how much space preceding arguments took up, and the
"alignment" of the index for this particular argument into the number of
possible storate locations. This change adjusts getSyscallArg to take its
index parameter by reference instead of value and to adjust it to point to the
possible location of the next argument on the stack, basically just after the
current one. This way, the rules for the new argument can be applied locally
without knowing about other arguments since those have already been taken into
account implicitly.
All system calls have also been changed to reflect the new interface. In a
number of cases this made the implementation clearer since it encourages
arguments to be collected in one place in order and then used as necessary
later, as opposed to scattering them throughout the function or using them in
place in long expressions. It also discourages using getSyscallArg over and
over to retrieve the same value when a temporary would do the job.
Nathan Binkert [Wed, 28 Oct 2009 18:56:56 +0000 (11:56 -0700)]
license: Fix license on network model code
This mostly was a matter of changing the license owner to Princeton
which is as it should have been. The code was originally licensed
under the GPL but was relicensed as BSD by Li-Shiuan Peh on July 27,
2009. This relicensing was in an explicit e-mail to Nathan Binkert,
Brad Beckmann, Mark Hill, David Wood, and Steve Reinhardt.
Nathan Binkert [Wed, 28 Oct 2009 18:56:43 +0000 (11:56 -0700)]
regress: add POWER to regressions
Gabe Black [Wed, 28 Oct 2009 06:50:25 +0000 (23:50 -0700)]
X86: Replace "DISPLACEMENT" with disp in movhpd.