Ilia Mirkin [Sun, 24 May 2015 05:31:11 +0000 (01:31 -0400)]
nv30: don't leak fragprog consts
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sat, 23 May 2015 05:57:41 +0000 (01:57 -0400)]
nv50/ir: avoid messing up arg1 of PFETCH
There can be scenarios where the "indirect" arg of a PFETCH becomes
known, and so the code will attempt to propagate it. Use this
opportunity to just fold it into the first argument, and prevent the
load propagation pass from touching PFETCH further.
This fixes gs-input-array-vec4-index-rd.shader_test and
vs-output-array-vec4-index-wr-before-gs.shader_test on nvc0 at least.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Grigori Goronzy [Tue, 19 May 2015 07:28:30 +0000 (09:28 +0200)]
clover: try userptr for CL_MEM_USE_HOST_PTR
According to spec, CL_MEM_USE_HOST_PTR should directly use host memory,
if possible. This is just what userptr is for, so use it.
In case the memory cannot be mapped, a fallback similar to
CL_MEM_COPY_HOST_PTR is used.
v2: constify, drop unneeded cast
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Grigori Goronzy [Tue, 12 May 2015 00:22:12 +0000 (02:22 +0200)]
clover: implement CL_MEM_ALLOC_HOST_PTR
This flag is typically used to request pinned host memory, to avoid
any copies between GPU and CPU.
This improves throughput with an older OpenCL app which I unfortunately
can't publish due to its licensing.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Ilia Mirkin [Sat, 23 May 2015 23:07:48 +0000 (19:07 -0400)]
nv30: check nouveau_bo_map output of notify bo
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 23 May 2015 21:35:42 +0000 (17:35 -0400)]
nvc0: a geometry shader can have up to 1024 vertices output
The 1024 is already reported everywhere, not sure where this 0x1ff came
from.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 20 May 2015 00:35:29 +0000 (17:35 -0700)]
i965/fs: Fix implied_mrf_writes for scratch writes
We build the entire message in the generator so all the MRF writes are
implied.
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 19 May 2015 23:25:02 +0000 (16:25 -0700)]
prog_to_nir: Use a variable for uniform data
Previously, the prog_to_nir pass was directly generating uniform load/store
intrinsics. This converts it to use a single giant "parameters" variable
and we now depend on lowering to get the uniform load/store intrinsics.
One advantage of this is that we now have one code-path after we do the
initial conversion into NIR.
No shader-db changes.
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Samuel Pitoiset [Sat, 23 May 2015 16:50:25 +0000 (18:50 +0200)]
nv50: fix PIPE_QUERY_TIMESTAMP_DISJOINT, based on nvc0
PIPE_QUERY_TIMESTAMP_DISJOINT could not work because q->ready was always
set to FALSE. To fix this issue, add more different states for queries
according to nvc0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 22 May 2015 23:03:58 +0000 (19:03 -0400)]
nvc0/ir: LOAD's can't be used for shader inputs
We forgot to convert to VFETCH in case of indirect access. Fix that.
This avoids crashes on the new gs-input-array-vec4-index-rd and
vs-output-array-vec4-index-wr-before-gs but they still fail.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Fri, 22 May 2015 23:02:41 +0000 (19:02 -0400)]
nv50/ir: guess that the constant offset is the starting slot of array
When we get something like IN[ADDR[0].x+5], we will now guess that we
should look at IN[5] for the "base" information.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Fri, 22 May 2015 20:40:08 +0000 (16:40 -0400)]
nvc0/ir: set ftz when sources are floats, not just destinations
In the case of a compare, the destination might be a predicate, but we
still want to flush denorms.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sat, 9 May 2015 03:46:53 +0000 (23:46 -0400)]
nv50/ir: allow OP_SET to merge with OP_SET_AND/etc as well as a neg
This covers the pattern where a KILL_IF is used, which triggers a
comparison of -x to 0. This can usually be folded into the comparison whose
result is being compared to 0, however it may, itself, have already been
combined with another comparison. That shouldn't impact the logic of
this pass however. With this and the & 1.0 change, code like
00000020:
001c0001 80081df4 set b32 $r0 lt f32 $r0 0x3e800000
00000028:
001c0000 201fc000 and b32 $r0 $r0 0x3f800000
00000030:
7f9c001e dd885c00 set $p0 0x1 lt f32 neg $r0 0x0
00000038:
0000003c 19800000 $p0 discard
becomes
00000020:
001c001d b5881df4 set $p0 0x1 lt f32 $r0 0x3e800000
00000028:
0000003c 19800000 $p0 discard
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 4 May 2015 02:15:16 +0000 (22:15 -0400)]
nvc0/ir: optimize set & 1.0 to produce boolean-float sets
This has started to happen more now that the backend is producing
KILL_IF more often.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Ilia Mirkin [Sat, 9 May 2015 03:00:05 +0000 (23:00 -0400)]
nvc0/ir: allow iset to produce a boolean float
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 3 May 2015 22:38:52 +0000 (18:38 -0400)]
nvc0/ir: avoid jumping to a sched instruction
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Brian Paul [Fri, 22 May 2015 20:18:54 +0000 (13:18 -0700)]
glx: fix Scons build
Replace -h with --header-tag as was done for the Makefile build.
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Dylan Baker [Wed, 20 May 2015 22:51:40 +0000 (15:51 -0700)]
glapi: glX_proto_size.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 20 May 2015 22:49:11 +0000 (15:49 -0700)]
glapi: glX_proto_size.py: use argparse instead of getopt
This is roughly equivalent to the original getopt, except that it
removes the '-h' short option, which argparse reserves for
auto-generated help messages. It does retain the long option specified
by the getopt version, and changes the makefile to use that.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 20 May 2015 22:20:09 +0000 (15:20 -0700)]
glapi: glX_proto_recv.py: Use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 20 May 2015 22:19:28 +0000 (15:19 -0700)]
glapi: glX_proto_recv.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 20 May 2015 18:49:40 +0000 (11:49 -0700)]
glapy: gl_genexec.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 20 May 2015 18:49:10 +0000 (11:49 -0700)]
glapi: gl_genexec.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Tue, 10 Feb 2015 23:20:57 +0000 (15:20 -0800)]
glapi: glX_proto_send.py: use a main function.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Tue, 10 Feb 2015 23:20:18 +0000 (15:20 -0800)]
glapi: glX_proto_send.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Sat, 14 Feb 2015 00:41:03 +0000 (16:41 -0800)]
glapi: glX_server_table.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Fri, 13 Feb 2015 23:54:17 +0000 (15:54 -0800)]
glapi: gl_SPARC_asm.py: use main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Fri, 13 Feb 2015 23:49:16 +0000 (15:49 -0800)]
glapi: gl_SPARC_asm.py use argparse instead of getopt
Also drop -m switch, which only accepted a single value or raised an
error, and was unused in the makefile.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Thu, 12 Feb 2015 22:05:46 +0000 (14:05 -0800)]
glapi: gl_x86-64_asm.py: Use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Thu, 12 Feb 2015 22:04:03 +0000 (14:04 -0800)]
glapi: gl_x86_64_asm.py: Use argparse instead of getopt
Also removes the redundant -m argument, which could only be set to
'generic', or it would raise an exception. This option wasn't used in
the makefile.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Thu, 12 Feb 2015 02:05:35 +0000 (18:05 -0800)]
glapi: gl_x86_asm.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Thu, 12 Feb 2015 02:04:22 +0000 (18:04 -0800)]
glapi: gl_x86_asm.py: use argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Tue, 10 Feb 2015 22:33:12 +0000 (14:33 -0800)]
glapi: gl_gentable.py: use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Tue, 10 Feb 2015 22:32:40 +0000 (14:32 -0800)]
glapi: gl_gentable.py: Replace getopt with argparse
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Tue, 10 Feb 2015 18:57:08 +0000 (10:57 -0800)]
glapi: gl_apitemp.py: Use a main function
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Tue, 10 Feb 2015 18:55:45 +0000 (10:55 -0800)]
glapi: gl_apitemp.py: Convert to argparse instead of getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Mon, 9 Feb 2015 22:19:23 +0000 (14:19 -0800)]
glapi: gl_enums.py: use main() function for if __name__ == "__main__"
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Mon, 9 Feb 2015 22:18:30 +0000 (14:18 -0800)]
glapi: gl_enums.py: use argparse instead of getopt.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Mon, 24 Nov 2014 22:14:12 +0000 (14:14 -0800)]
glapi: gl_procs.py: Use argparse rather than getopt
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Fri, 21 Nov 2014 01:07:48 +0000 (17:07 -0800)]
glapi: gl_procs.py: Fix a few low hanging style things
Shuts up analysis tools to make them return actual problems.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Thu, 20 Nov 2014 22:07:15 +0000 (14:07 -0800)]
glapi: remap_helper.py: use argparse instead of optparse
Make the code simpler, cleaner, and easier to work with.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Thu, 20 Nov 2014 22:01:40 +0000 (14:01 -0800)]
glapi: remap_helper.py: Fix some low hanging style issues
This makes the tools shut up about a bunch of problems, making them more
useful for catching actual problems.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 19 Nov 2014 21:36:35 +0000 (13:36 -0800)]
glapi: gl_table.py: replace getopt with argparse.
This results in slightly less code, but code that is much more readable.
It has the advantage of putting everything together in one place, all of
the code is self documenting, help messages are auto-generated, choices
are automatically enforced, and the syntax is much less C like, taking
advantage of python features and idioms.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Dylan Baker [Wed, 19 Nov 2014 21:17:48 +0000 (13:17 -0800)]
glapi: gl_table.py: Fix some low hanging style issues
Making the tools shut up about worthless errors so you can see real ones
is very useful
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Mon, 18 May 2015 22:23:28 +0000 (15:23 -0700)]
i965/disasm: Skip swizzle disassembly when using 3-src repctrl.
... since it's always .x, and also always print the subreg offset when
using repctrl.
Matt Turner [Mon, 18 May 2015 21:59:13 +0000 (14:59 -0700)]
nir: Remove sRGB colorspace conversion round-trip.
Some shaders in Civilization V and Beyond Earth do
pow(pow(x, 2.2), 0.454545)
which is converting to and from sRGB colorspace.
A more general rule that replaces pow(pow(a, b), c) with pow(a, b * c)
actually regresses two shaders in Sun Temple in which the result of the
inner pow is used twice, once by another pow and once by another
instruction. Also, since 2.2 * 0.454545 isn't exactly one, the more
general pattern would have still left us with a pow, and I'm 2.2 *
0.454545 percent sure that's not what they want.
instructions in affected programs: 934 -> 886 (-5.14%)
helped: 16
Samuel Pitoiset [Thu, 21 May 2015 18:14:44 +0000 (20:14 +0200)]
nv50: fix PIPELINE_STATISTICS with HUD, based on nvc0
Tested on NVA8. No regression for ARB_pipeline_statistics piglit tests.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Thu, 21 May 2015 18:06:19 +0000 (20:06 +0200)]
nv50: fix 64-bit queries with HUD, based on nvc0
A sequence number is written for 32-bits queries to make sure they are
ready, but not for 64-bits queries. Instead, we have to use a fence in
order to fix the HUD because it doesn't wait until the result is ready.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Christian König [Thu, 26 Mar 2015 09:00:09 +0000 (10:00 +0100)]
radeon/vce: adapt new firmware interface changes
v2: make this also compatible with original released firmware
v3 (chk): switch to original idea of separate files for fw versions
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v2)
Christian König [Thu, 26 Mar 2015 08:52:37 +0000 (09:52 +0100)]
radeon/vce: move CPB handling function into common code
They are not firmware version dependent.
Signed-off-by: Christian König <christian.koenig@amd.com>
Dave Airlie [Thu, 21 May 2015 01:23:06 +0000 (11:23 +1000)]
u_math: uses assert, include assert.h
this fixes a build problem found on RHEL s390.
not sure what configure options caused it, I couldn't get it on
x86 here.
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.6" mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Thu, 30 Apr 2015 10:45:54 +0000 (20:45 +1000)]
glsl: remove element_type() helper
We now have is_array() and without_array() that make the
code much clearer and remove the need for this.
For all remaining calls to this we already knew that
the type was an array so returning a null wasn't adding any value.
v2: use without_array() in _mesa_ast_array_index_to_hir() and don't use
without_array() in lower_clip_distance_visitor() as we want to make sure the
array is 2D.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Tue, 19 May 2015 14:38:40 +0000 (07:38 -0700)]
glsl: Use AM_V_GEN/AM_V_at in NIR rules.
Ilia Mirkin [Wed, 20 May 2015 08:00:16 +0000 (04:00 -0400)]
freedreno/a3xx: set .zw of sprite coords to .01
Fixes non-determinism in bin/point-sprite rendering, and the stars on
the intro screen to neverball.
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 28 Apr 2015 03:47:40 +0000 (23:47 -0400)]
freedreno/ir3: fix immediate usage in tgsi tex fe
get_immediate will return a const reference, the requested immediate
isn't necessarily in the x slot. Make sure to use the swizzle.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Emil Velikov [Wed, 20 May 2015 20:51:52 +0000 (21:51 +0100)]
targets/osmesa: drop the -module tag from LDFLAGS
Gallium equivalent of commit
06ff751f97f(darwin: Fix install name of
libOSMesa)
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Jeremy Huddleston Sequoia [Wed, 11 Feb 2015 10:32:33 +0000 (02:32 -0800)]
darwin: Fix install name of libOSMesa
Passing -module to glibtool causes the resulting library to be called
libSomething.so rather than libSomething.dylib on darwin.
Regardless if libOSMesa is a library or a module, it has been used as
the former for quite some time. Update the build to reflect that and
resolve the naming issue.
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
[Emil Velikov: Tweak the commit message.]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Alan Coopersmith [Sat, 16 May 2015 02:05:45 +0000 (19:05 -0700)]
swrast: Build fix for Solaris
Fixes regression from commit
5b2d3480f57168d50ad24cf0b8c9244414bd3701
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Reviewed-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Jason Ekstrand [Tue, 19 May 2015 23:57:43 +0000 (16:57 -0700)]
nir: Get rid of the array elements parameter on load/store intrinsics
Previously, we used intrinsic->const_index[1] to represent "the number of
array elements to load" for load/store intrinsics. However, this set to 1
by every pass that ever creates a load/store intrinsic. Also, while it
might make some sense for registers, it makes no sense whatsoever in SSA.
On top of that, the i965 backend was the only backend to ever support it;
freedreno and vc4 just assert that it's always 1. Let's just delete it.
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Marek Olšák [Sun, 17 May 2015 14:35:14 +0000 (16:35 +0200)]
gallium: remove TGSI_SAT_MINUS_PLUS_ONE
It's a remnant of some old NV extension. Unused.
I also have a patch that removes predicates if anyone is interested.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Mon, 18 May 2015 09:26:10 +0000 (11:26 +0200)]
cso: add context cleanup code from st/mesa
This fixes a crash in nouveau which can't handle
set_constant_buffer(PIPE_SHADER_TESS_*).
Cc: 10.6 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Iglesias Gonsalvez [Wed, 13 May 2015 10:18:31 +0000 (12:18 +0200)]
mesa/main: validate name syntax for array variables only
From ARB_program_interface_query:
"Note that if an interface enumerates a single active resource list
entry for an array variable (e.g., "a[0]"), a <name> identifying
any array element other than the first (e.g., "a[1]") is not
considered to match."
It doesn't apply to arrays of interface blocks but just to array
variables.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Dave Airlie [Wed, 20 May 2015 02:36:14 +0000 (12:36 +1000)]
GL3.txt: update softpipe ARB_gpu_shader5 status
texture gather and it already supported the new instructions.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 19 May 2015 06:29:39 +0000 (16:29 +1000)]
softpipe: start adding gather support (v2)
This adds both ARB_texture_gather and the enhanced gather
for ARB_gpu_shader5.
This passes all the piglit tests, it relies on the GLSL
lowering pass to make textureGatherOffsets work.
v2: use inline to get gather component (Brian)
fix function name, add asserts (Brian)
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 19 May 2015 06:22:35 +0000 (16:22 +1000)]
softpipe: use arrays to make gather easier
This is a prep change for gather, and it makes more sense
to use an array in these cases.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 19 May 2015 06:16:07 +0000 (16:16 +1000)]
tgsi: handle TG4 opcode in tgsi exec
This just adds a new modifier interface for drivers to implement.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 19 May 2015 06:12:45 +0000 (16:12 +1000)]
softpipe: add textureOffset support.
This was an oversight when GLSL1.30 was enabled, I think my
misunderstanding.
This fixes a bunch of tex-miplevel-selection tests under softpipe,
and is required for textureGather support.
I'm not sure this won't make sampling slowering, but its softpipe,
correctness first and all that.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 19 May 2015 05:39:47 +0000 (15:39 +1000)]
softpipe: move control into a filter args struct
more stuff for offsets and gather will go in here later.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 19 May 2015 05:31:06 +0000 (15:31 +1000)]
softpipe: move some image filter parameters into a struct
This moves some of the image filter args into a struct,
and passes that instead, this is prep work for adding texture
gather support which needs new arguments.
review: make filter args const.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Emil Velikov [Tue, 19 May 2015 10:59:50 +0000 (11:59 +0100)]
Post-branch version bump to 10.7.0-devel, add release notes template
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 19 May 2015 11:51:19 +0000 (12:51 +0100)]
glapi: track GL_ARB_program_interface_query.xml
Add the file to the API_XML list, otherwise there will be no knowledge
by the build that it should be included in the tarball.
Thus the (scons) build will fail.
Fixes: b297fc27aa9(glapi: add GL_ARB_program_interface_query skeleton)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 19 May 2015 11:15:02 +0000 (12:15 +0100)]
i965: add brw_cs.h to the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Alexander von Gluck IV [Sun, 17 May 2015 13:50:43 +0000 (08:50 -0500)]
mesa/driver/haiku: Drop Mesa swrast renderer
This just created extra upkeep and the push to move extern
C's into mesa code would mean a large number of extern's
in core Mesa driver interfaces. The Haiku Gallium renderers
are mostly insulated via the C-based Haiku state tracker.
As any future hardware support in Haiku will be gallium
based, lets just drop swrast.
Haiku has a Mesa 7.12 fork for gcc2 that uses swrast.
This commit fixes the last of the Haiku build issues.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Jason Ekstrand [Thu, 7 May 2015 22:07:49 +0000 (15:07 -0700)]
i965: Use NIR by default for vertex shaders on GEN8+
GLSL IR vs. NIR shader-db results for SIMD8 vertex shaders on Broadwell:
total instructions in shared programs:
2742062 ->
2681339 (-2.21%)
instructions in affected programs:
1514770 ->
1454047 (-4.01%)
helped: 5813
HURT: 1120
The gained programs are ARB vertext programs that were previously going
through the vec4 backend. Now that we have prog_to_nir, ARB vertex
programs can go through the scalar backend so they show up as "gained" in
the shader-db results.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Rob Clark [Fri, 8 May 2015 19:56:23 +0000 (15:56 -0400)]
freedreno: fence fix
A fence can outlive the ctx, so we shouldn't deref the ctx to get at the
screen. We need some updates in libdrm_freedreno API to completely
handle fences properly, but this is at least an improvement.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Ben Widawsky [Fri, 17 Apr 2015 02:24:36 +0000 (19:24 -0700)]
i965: Add gen8 blend state
OLD:
0x00007340: 0x00800000: BLEND:
0x00007344: 0x84202100: BLEND:
NEW:
0x00007340: 0x00800000: BLEND: Alpha blend/test
0x00007344: 0x0000000b84202100: BLEND_ENTRY00:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
0x0000734c: 0x0000000b84202100: BLEND_ENTRY01:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
0x00007354: 0x0000000b84202100: BLEND_ENTRY02:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
0x0000735c: 0x0000000b84202100: BLEND_ENTRY03:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
0x00007364: 0x0000000b84202100: BLEND_ENTRY04:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
0x0000736c: 0x0000000b84202100: BLEND_ENTRY05:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
0x00007374: 0x0000000b84202100: BLEND_ENTRY06:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
0x0000737c: 0x0000000b84202100: BLEND_ENTRY07:
Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)
function ADD,ADD (color, alpha), Disables: ----
v2: Line length fixes, and const usage (Topi)
Safer initialization of name string (Topi)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Sat, 16 May 2015 04:18:12 +0000 (21:18 -0700)]
i965: Add renderbuffer surface indexes to debug
This patch is optional in the series. It does make the output much cleaner, but
there is some risk.
Sample output (v3):
0x00007e80: 0x231d7000: SURF000: 2D R8G8B8A8_UNORM VALIGN4 HALIGN4 Y-tiled
0x00007e84: 0x05000000: SURF000: MOCS: 0x5 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007e88: 0x009f009f: SURF000: 160x160 [AUX_NONE]
0x00007e8c: 0x0000027f: SURF000: 1 slices (depth), pitch: 640
0x00007e90: 0x00000000: SURF000: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007e94: 0x00000000: SURF000: x,y offset: 0,0, min LOD: 0
0x00007e98: 0x00000000: SURF000: AUX pitch: 0 qpitch: 0
0x00007e9c: 0x09770000: SURF000: Clear color: R(0)G(0)B(0)A(0)
0x00007ea0: 0x00001000: SURF000: 0x00001000
0x00007ea4: 0x00000000: SURF000: 0x00000000
0x00007ea8: 0x00000000: SURF000: 0x00000000
0x00007eac: 0x00000000: SURF000: 0x00000000
0x00007e40: 0x234df000: SURF001: 2D R11G11B10_FLOAT VALIGN4 HALIGN16 Y-tiled
0x00007e44: 0x09000000: SURF001: MOCS: 0x9 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007e48: 0x009f009f: SURF001: 160x160 [AUX_CCS_D (Uncompressed, MULTISAMPLE_COUNT=1)]
0x00007e4c: 0x0000027f: SURF001: 1 slices (depth), pitch: 640
0x00007e50: 0x00000000: SURF001: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007e54: 0x00000000: SURF001: x,y offset: 0,0, min LOD: 0
0x00007e58: 0x00000001: SURF001: AUX pitch: 0 qpitch: 0
0x00007e5c: 0x09770000: SURF001: Clear color: R(0)G(0)B(0)A(0)
0x00007e60: 0x0002b000: SURF001: 0x0002b000
0x00007e64: 0x00000000: SURF001: 0x00000000
0x00007e68: 0x0002a000: SURF001: 0x0002a000
0x00007e6c: 0x00000000: SURF001: 0x00000000
v2: Rebased on Topi's recent series which changed around some of the gen8
surface setup code.
v3: Use ralloc_asprintf instead of asprintf to be more friendly to non-GNU
platforms.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Sat, 16 May 2015 04:25:36 +0000 (21:25 -0700)]
i965: Add Gen9 surface state decoding
Gen9 surface state is very similar to the previous generation. The important
changes here are aux mode, and the way clear colors work.
NOTE: There are some things intentionally left out of this decoding.
v2: Redo the string for the aux buffer type to address compressed variants.
v3: Use the shift for compression enable (instead of compression mode) (Topi)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Thu, 16 Apr 2015 20:46:57 +0000 (13:46 -0700)]
i965: Add gen8 surface state debug info
AFAICT, none of the old data was wrong (the gen7 decoder), but it wa smissing a
bunch of stuff.
Adds a tick (') to denote the beginning of the surface state for easier reading.
This will be replaced later with some better, but more risky code.
OLD:
0x00007980: 0x23016000: SURF: 2D BRW_SURFACEFORMAT_B8G8R8A8_UNORM
0x00007984: 0x18000000: SURF: offset
0x00007988: 0x00ff00ff: SURF: 256x256 size, 0 mips, 1 slices
0x0000798c: 0x000003ff: SURF: pitch 1024, tiled
0x00007990: 0x00000000: SURF: min array element 0, array extent 1
0x00007994: 0x00000000: SURF: mip base 0
0x00007998: 0x00000000: SURF: x,y offset: 0,0
0x0000799c: 0x09770000: SURF:
0x00007940: 0x231d7000: SURF: 2D BRW_SURFACEFORMAT_R8G8B8A8_UNORM
0x00007944: 0x78000000: SURF: offset
0x00007948: 0x001f001f: SURF: 32x32 size, 0 mips, 1 slices
0x0000794c: 0x0000007f: SURF: pitch 128, tiled
0x00007950: 0x00000000: SURF: min array element 0, array extent 1
0x00007954: 0x00000000: SURF: mip base 0
0x00007958: 0x00000000: SURF: x,y offset: 0,0
0x0000795c: 0x09770000: SURF:
NEW (v1):
0x00007980: 0x23016000: SURF': 2D B8G8R8A8_UNORM VALIGN4 HALIGN4 X-tiled
0x00007984: 0x18000000: SURF: MOCS: 0x18 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007988: 0x00ff00ff: SURF: 256x256 [AUX_NONE]
0x0000798c: 0x000003ff: SURF: 1 slices (depth), pitch: 1024
0x00007990: 0x00000000: SURF: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007994: 0x00000000: SURF: x,y offset: 0,0, min LOD: 0
0x00007998: 0x00000000: SURF: AUX pitch: 0 qpitch: 0
0x0000799c: 0x09770000: SURF: Clear color: ----
0x00007940: 0x231d7000: SURF': 2D R8G8B8A8_UNORM VALIGN4 HALIGN4 Y-tiled
0x00007944: 0x78000000: SURF: MOCS: 0x78 Base MIP: 0 (0 mips) Surface QPitch: ff0000
0x00007948: 0x001f001f: SURF: 32x32 [AUX_NONE]
0x0000794c: 0x0000007f: SURF: 1 slices (depth), pitch: 128
0x00007950: 0x00000000: SURF: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007954: 0x00000000: SURF: x,y offset: 0,0, min LOD: 0
0x00007958: 0x00000000: SURF: AUX pitch: 0 qpitch: 0
0x0000795c: 0x09770000: SURF: Clear color: ----
0x00007920: 0x00007980: BIND0: surface state address
0x00007924: 0x00007940: BIND1: surface state address
v2: Style cleanups (Matt)
Fix aux mode dword 7->6 (Topi)
Use exp2 instead of pow (Matt)
Add dwords 8-12 to the dump
v3: Needed to update the surface format name getter for the change in the first
patch in the series
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Matt Turner <mattst88@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Fri, 17 Apr 2015 00:13:00 +0000 (17:13 -0700)]
i965: Add gen7+ sampler state to batch debug
OLD:
0x00007e00: 0x10000000: WM SAMP0: filtering
0x00007e04: 0x000d0000: WM SAMP0: wrapping, lod
0x00007e08: 0x00000000: WM SAMP0: default color pointer
0x00007e0c: 0x00000090: WM SAMP0: chroma key, aniso
NEW:
0x00007e00: 0x10000000: SAMPLER_STATE 0: Disabled = no, Base Mip: 0.0, Mip/Mag/Min Filter: NONE/NEAREST/NEAREST, LOD Bias: 0.0
0x00007e04: 0x000d0000: SAMPLER_STATE 0: Min LOD: 0.0, Max LOD: 13.0
0x00007e08: 0x00000000: SAMPLER_STATE 0: Border Color
0x00007e0c: 0x00000090: SAMPLER_STATE 0: Max aniso: RATIO 2:1, TC[XYZ] Address Control: CLAMP|CLAMP|WRAP
v2: Move GET_BITS macro to here (with paren protection) Ben/Topi
Add const to the sampler pointer (Topi)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Thu, 16 Apr 2015 21:50:33 +0000 (14:50 -0700)]
i965: Add viewport extents (gen8) to batch decode
0x00007da0: 0xc1da740e: SF_CLIP VP: guardband xmin = -27.306667
0x00007da4: 0x41da740e: SF_CLIP VP: guardband xmax = 27.306667
0x00007da4: 0x41da740e: SF_CLIP VP: guardband ymin = -23.405714
0x00007da8: 0xc1bb3ee7: SF_CLIP VP: guardband ymax = 23.405714
0x00007db0: 0x00000000: SF_CLIP VP: Min extents: 0.00x0.00
0x00007db8: 0x00000000: SF_CLIP VP: Max extents: 299.00x349.00
While here, fix the wrong offsets for the guardband (I didn't check if it used
to be valid on GEN4).
v2: Remove leftover GET_BITS which belongs later in the series. (Topi)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ben Widawsky [Thu, 16 Apr 2015 16:16:19 +0000 (09:16 -0700)]
i965: Add all surface types to the batch decode
It's true that not all surfaces apply for every gen, but for the most part this
is what we want. (The unfortunate case is when we use a valid surface, but not
for the specific GEN).
This was automated with a vim macro.
v2: Shortened common forms such as R8G8B8A8->RGBA8. Note that this makes some of
the sample output in subsequent commits slightly incorrect.
v3: Use the name from the table (Ken). This requires declaring the surface
format array as extern, and declaring the struct in the .h file.
v4: Move the struct back and create a helper function to obtain the name (Ken)
Get rid of the now useless helper in the state_dump.c
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (v3)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ben Widawsky [Thu, 30 Apr 2015 02:20:35 +0000 (22:20 -0400)]
i965: Add string for surface format to table
Recommended-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Thu, 14 May 2015 01:34:03 +0000 (18:34 -0700)]
i965/fs: Implement integer multiply without mul/mach.
Ivybridge and Baytrail can't use mach with 2Q quarter control, so just
do it without the accumulator. Stupid accumulator.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Thu, 14 May 2015 22:58:20 +0000 (15:58 -0700)]
i965/fs: Rework compression control selection.
The next commit uses an add(16) with a UW destination with a stride of
2, which needs compression control since it's writing two registers. The
old code would have failed to set compression control correctly.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Tue, 12 May 2015 22:51:44 +0000 (15:51 -0700)]
i965/fs: Support integer multiplication in SIMD16 on Haswell.
Ivybridge (and presumably Baytrail) have a bug that prevents this from
working.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Tue, 12 May 2015 22:51:05 +0000 (15:51 -0700)]
i965/fs: Add set_sechalf() method.
Used in the next commit.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Fri, 15 May 2015 05:23:22 +0000 (22:23 -0700)]
i965/fs: Unrestrict constant propagation into integer multiply.
Gen8+'s MUL instruction doesn't ignore the high 16-bits of one source
like on earlier platforms, so we can constant propagate into it without
worry. Integer multiplies (not into the accumulator, which is done for
imul_high) are lowered in lower_integer_multiplication(), so it's safe
there as well.
On Broadwell, fragment shaders only:
total instructions in shared programs:
4377769 ->
4377451 (-0.01%)
instructions in affected programs: 48064 -> 47746 (-0.66%)
helped: 156
On Broadwell, vertex shaders only:
total instructions in shared programs:
2858885 ->
2856313 (-0.09%)
instructions in affected programs: 26380 -> 23808 (-9.75%)
helped: 134
On Broadwell, vertex shaders only (with INTEL_USE_NIR=1):
total instructions in shared programs:
2911688 ->
2865984 (-1.57%)
instructions in affected programs:
1421715 ->
1376011 (-3.21%)
helped: 6186
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Mon, 11 May 2015 16:29:56 +0000 (09:29 -0700)]
i965/fs: Lower integer multiplication after optimizations.
32-bit x 32-bit integer multiplication requires multiple instructions
until Broadwell. This patch just lets us treat the MUL instruction in
the FS backend like it operates on Broadwell, and after optimizations
we lower it into a sequence of instructions on older platforms.
Doing this will allow us to some extra optimization on integer
multiplies.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Ilia Mirkin [Mon, 18 May 2015 16:57:31 +0000 (12:57 -0400)]
gk110/ir: switch to gk104-style sched codes rather than all-in-one
Matches change to envydis/envyas tools.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tapani Pälli [Mon, 11 May 2015 10:24:20 +0000 (13:24 +0300)]
glsl: add stage references for UBO uniforms
Patch marks uniforms inside UBO properly referenced by stages.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90397
Iago Toral Quiroga [Tue, 10 Feb 2015 15:40:48 +0000 (16:40 +0100)]
i965: Fix textureSize for Lod > 0 with non-mipmap filters
Currently, when the MinFilter is GL_LINEAR or GL_NEAREST we hide the
actual miplevel count from the hardware (and we avoid re-creating
the miptree structure with all the levels), since we don't expect
levels other than the base level to be needed. Unfortunately,
GLSL's textureSize() function is an exception to this rule. This
function takes a lod parameter that we need to use to return the
size of the appropriate miplevel (if it exists). The spec only
requires that the miplevel exists, so even if the sampler is
configured with a linear or nearest MinFilter, as far as the user
has uploaded miplevels for the texture, textureSize() should return
the appropriate sizes.
This patch fixes this by exposing the actual miplevel count for all
sampling engine textures while keeping the original implementation
for render targets (for render targets textures we do not provide
the miplevel count but the actual LOD we are wrting to, so we
want to make sure that we make this the base level).
Fixes 28 dEQP tests in the following category:
dEQP-GLES3.functional.shaders.texture_functions.texturesize.*
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Fredrik Höglund [Sat, 16 May 2015 17:43:39 +0000 (19:43 +0200)]
mesa: Check the lookup_framebuffer return value in NamedFramebufferRenderbuffer
Found by Coverity.
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 13 Jul 2014 18:26:05 +0000 (14:26 -0400)]
tgsi/dump: fix declaration printing of tessellation inputs/outputs
mareko: only output second dimension for non-patch semantics
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Tue, 22 Jul 2014 01:18:14 +0000 (21:18 -0400)]
tgsi/ureg: allow ureg_dst to have dimension indices
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Thu, 19 Mar 2015 22:31:41 +0000 (23:31 +0100)]
tgsi/ureg: use correct limit for max input count
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Sun, 13 Jul 2014 00:06:03 +0000 (20:06 -0400)]
tgsi/sanity: set implicit in/out array sizes based on patch sizes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Sun, 13 Jul 2014 01:37:45 +0000 (21:37 -0400)]
tgsi/scan: allow scanning tessellation shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Tue, 14 Oct 2014 09:06:48 +0000 (11:06 +0200)]
gallium: disable tessellation shaders for meta ops
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Tue, 23 Sep 2014 13:54:02 +0000 (15:54 +0200)]
gallium/cso: set NULL shaders at context destruction
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>