Richard Sandiford [Fri, 4 Aug 2017 10:42:53 +0000 (10:42 +0000)]
Pool alignment information for common bases
This patch is a follow-on to the fix for PR81136. The testcase for that
PR shows that we can (correctly) calculate different base alignments
for two data_references but still tell that their misalignments wrt the
vector size are equal. This is because we calculate the base alignments
for each dr individually, without looking at the other drs, and in
general the alignment we calculate is only guaranteed if the dr's DR_REF
actually occurs.
This is working as designed, but it does expose a missed opportunity.
We know that if a vectorised loop is reached, all statements in that
loop execute at least once, so it should be safe to pool the alignment
information for all the statements we're vectorising. The only catch is
that DR_REFs for masked loads and stores only occur if the mask value is
nonzero. For example, in:
struct s __attribute__((aligned(32))) {
int misaligner;
int array[N];
};
int *ptr;
for (int i = 0; i < n; ++i)
ptr[i] = c[i] ? ((struct s *) (ptr - 1))->array[i] : 0;
we can only guarantee that ptr points to a "struct s" if at least
one c[i] is true.
This patch adds a DR_IS_CONDITIONAL_IN_STMT flag to record whether
the DR_REF is guaranteed to occur every time that the statement
executes to completion. It then pools the alignment information
for references that aren't conditional in this sense.
2017-08-04 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR tree-optimization/81136
* tree-vectorizer.h: Include tree-hash-traits.h.
(vec_base_alignments): New typedef.
(vec_info): Add a base_alignments field.
(vect_record_base_alignments): Declare.
* tree-data-ref.h (data_reference): Add an is_conditional_in_stmt
field.
(DR_IS_CONDITIONAL_IN_STMT): New macro.
(create_data_ref): Add an is_conditional_in_stmt argument.
* tree-data-ref.c (create_data_ref): Likewise. Use it to initialize
the is_conditional_in_stmt field.
(data_ref_loc): Add an is_conditional_in_stmt field.
(get_references_in_stmt): Set the is_conditional_in_stmt field.
(find_data_references_in_stmt): Update call to create_data_ref.
(graphite_find_data_references_in_stmt): Likewise.
* tree-ssa-loop-prefetch.c (determine_loop_nest_reuse): Likewise.
* tree-vect-data-refs.c (vect_analyze_data_refs): Likewise.
(vect_record_base_alignment): New function.
(vect_record_base_alignments): Likewise.
(vect_compute_data_ref_alignment): Adjust base_addr and aligned_to
for nested statements even if we fail to compute a misalignment.
Use pooled base alignments for unconditional references.
(vect_find_same_alignment_drs): Compare base addresses instead
of base objects.
(vect_analyze_data_refs_alignment): Call vect_record_base_alignments.
* tree-vect-slp.c (vect_slp_analyze_bb_1): Likewise.
gcc/testsuite/
PR tree-optimization/81136
* gcc.dg/vect/pr81136.c: Add scan test.
From-SVN: r250870
Richard Sandiford [Fri, 4 Aug 2017 10:41:12 +0000 (10:41 +0000)]
C++-ify vec_info structures
This patch uses new, delete, constructors and desctructors to manage
vec_info. This includes making ~vec_info free all the data shared
by bb_vec_info and loop_vec_info, whereas previously the code was
duplicated in destroy_bb_vec_info and destroy_loop_vec_info. This
in turn meant changing the order of:
FOR_EACH_VEC_ELT (slp_instances, i, instance)
vect_free_slp_instance (instance);
and:
gimple_set_uid (stmt, -1);
in destroy_bb_vec_info/~_bb_vec_info, so that now vect_free_slp_instance
could see a uid of -1 as well as 0. The patch updates vinfo_for_stmt
so that it returns NULL for a uid of -1.
2017-08-04 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vectorizer.h (vec_info): Add a constructor and destructor.
Add an explicit name for the enum. Use auto_vec for slp_instances
and grouped_stores.
(_loop_vec_info): Add a constructor and destructor. Use auto_vec
for all vectors.
(_bb_vec_info): Add a constructor and destructor.
(vinfo_for_stmt): Return NULL for uids of -1 as well.
(destroy_loop_vec_info): Delete.
(vect_destroy_datarefs): Likewise.
* tree-vectorizer.c (vect_destroy_datarefs): Delete.
(vec_info::vec_info): New function.
(vec_info::~vec_info): Likewise.
(vectorize_loops): Use delete instead of destroy_loop_vec_info.
* tree-parloops.c (gather_scalar_reductions): Use delete instead of
destroy_loop_vec_info.
* tree-vect-loop.c (new_loop_vec_info): Replace with...
(_loop_vec_info::_loop_vec_info): ...this.
(destroy_loop_vec_info): Replace with...
(_loop_vec_info::~_loop_vec_info): ...this. Unconditionally delete
the stmt_vec_infos. Leave handling of vec_info information to its
destructor. Remove explicit vector releases.
(vect_analyze_loop_form): Use new instead of new_loop_vec_info.
(vect_analyze_loop): Use delete instead of destroy_loop_vec_info.
* tree-vect-slp.c (new_bb_vec_info): Replace with...
(_bb_vec_info::_bb_vec_info): ...this. Don't reserve space in
BB_VINFO_GROUPED_STORES or BB_VINFO_SLP_INSTANCES.
(destroy_bb_vec_info): Replace with...
(_bb_vec_info::~_bb_vec_info): ...this. Leave handling of vec_info
information to its destructor.
(vect_slp_analyze_bb_1): Use new and delete instead of
new_bb_vec_info and destroy_bb_vec_info.
(vect_slp_bb): Replace 2 calls to destroy_bb_vec_info with a
single delete.
From-SVN: r250869
Richard Sandiford [Fri, 4 Aug 2017 10:40:35 +0000 (10:40 +0000)]
Use base inequality for some vector alias checks
This patch checks whether two data references x and y cannot
partially overlap and so are independent whenever &x != &y.
We can then use this in the vectoriser to optimise alias checks.
gcc/
2016-08-04 Richard Sandiford <richard.sandiford@linaro.org>
* hash-traits.h (pair_hash): New struct.
* tree-data-ref.h (data_dependence_relation): Add object_a and
object_b fields.
(DDR_OBJECT_A, DDR_OBJECT_B): New macros.
* tree-data-ref.c (initialize_data_dependence_relation): Initialize
DDR_OBJECT_A and DDR_OBJECT_B.
* tree-vectorizer.h (vec_object_pair): New type.
(_loop_vec_info): Add a check_unequal_addrs field.
(LOOP_VINFO_CHECK_UNEQUAL_ADDRS): New macro.
(LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Return true if there is an
entry in check_unequal_addrs. Check comp_alias_ddrs instead of
may_alias_ddrs.
* tree-vect-loop.c (destroy_loop_vec_info): Release
LOOP_VINFO_CHECK_UNEQUAL_ADDRS.
(vect_analyze_loop_2): Likewise, when restarting.
(vect_estimate_min_profitable_iters): Estimate the cost of
LOOP_VINFO_CHECK_UNEQUAL_ADDRS.
* tree-vect-data-refs.c: Include tree-hash-traits.h.
(vect_prune_runtime_alias_test_list): Try to handle conflicts
using LOOP_VINFO_CHECK_UNEQUAL_ADDRS, if the data dependence allows.
Count such tests in the final summary.
* tree-vect-loop-manip.c (chain_cond_expr): New function.
(vect_create_cond_for_align_checks): Use it.
(vect_create_cond_for_unequal_addrs): New function.
(vect_loop_versioning): Call it.
gcc/testsuite/
* gcc.dg/vect/vect-alias-check-6.c: New test.
From-SVN: r250868
Richard Sandiford [Fri, 4 Aug 2017 10:39:44 +0000 (10:39 +0000)]
Handle data dependence relations with different bases
This patch tries to calculate conservatively-correct distance
vectors for two references whose base addresses are not the same.
It sets a new flag DDR_COULD_BE_INDEPENDENT_P if the dependence
isn't guaranteed to occur.
The motivating example is:
struct s { int x[8]; };
void
f (struct s *a, struct s *b)
{
for (int i = 0; i < 8; ++i)
a->x[i] += b->x[i];
}
in which the "a" and "b" accesses are either independent or have a
dependence distance of 0 (assuming -fstrict-aliasing). Neither case
prevents vectorisation, so we can vectorise without an alias check.
I'd originally wanted to do the same thing for arrays as well, e.g.:
void
f (int a[][8], struct b[][8])
{
for (int i = 0; i < 8; ++i)
a[0][i] += b[0][i];
}
I think this is valid because C11 6.7.6.2/6 says:
For two array types to be compatible, both shall have compatible
element types, and if both size specifiers are present, and are
integer constant expressions, then both size specifiers shall have
the same constant value.
So if we access an array through an int (*)[8], it must have type X[8]
or X[], where X is compatible with int. It doesn't seem possible in
either case for "a[0]" and "b[0]" to overlap when "a != b".
However, as the comment above "if (same_base_p)" explains, GCC is more
forgiving: it supports arbitrary overlap of arrays and allows arrays to
be accessed with different dimensionality. There are examples of this
in PR50067. The patch therefore only handles references that end in a
structure field access.
There are two ways of handling these dependences in the vectoriser:
use them to limit VF, or check at runtime as before. I've gone for
the approach of checking at runtime if we can, to avoid limiting VF
unnecessarily, but falling back to a VF cap when runtime checks aren't
allowed.
The patch tests whether we queued an alias check with a dependence
distance of X and then picked a VF <= X, in which case it's safe to
drop the alias check. Since vect_prune_runtime_alias_check_list
can be called twice with different VF for the same loop, it's no
longer safe to clear may_alias_ddrs on exit. Instead we should use
comp_alias_ddrs to check whether versioning is necessary.
2017-08-04 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-data-ref.h (subscript): Add access_fn field.
(data_dependence_relation): Add could_be_independent_p.
(SUB_ACCESS_FN, DDR_COULD_BE_INDEPENDENT_P): New macros.
(same_access_functions): Move to tree-data-ref.c.
* tree-data-ref.c (ref_contains_union_access_p): New function.
(access_fn_component_p): Likewise.
(access_fn_components_comparable_p): Likewise.
(dr_analyze_indices): Add a reference to access_fn_component_p.
(dump_data_dependence_relation): Use SUB_ACCESS_FN instead of
DR_ACCESS_FN.
(constant_access_functions): Likewise.
(add_other_self_distances): Likewise.
(same_access_functions): Likewise. (Moved from tree-data-ref.h.)
(initialize_data_dependence_relation): Use XCNEW and remove
explicit zeroing of DDR_REVERSED_P. Look for a subsequence
of access functions that have the same type. Allow the
subsequence to end with different bases in some circumstances.
Record the chosen access functions in SUB_ACCESS_FN.
(build_classic_dist_vector_1): Replace ddr_a and ddr_b with
a_index and b_index. Use SUB_ACCESS_FN instead of DR_ACCESS_FN.
(subscript_dependence_tester_1): Likewise dra and drb.
(build_classic_dist_vector): Update calls accordingly.
(subscript_dependence_tester): Likewise.
* tree-ssa-loop-prefetch.c (determine_loop_nest_reuse): Check
DDR_COULD_BE_INDEPENDENT_P.
* tree-vectorizer.h (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Test
comp_alias_ddrs instead of may_alias_ddrs.
* tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr):
New function.
(vect_analyze_data_ref_dependence): Use it if
DDR_COULD_BE_INDEPENDENT_P, but fall back to using the recorded
distance vectors if that fails.
(dependence_distance_ge_vf): New function.
(vect_prune_runtime_alias_test_list): Use it. Don't clear
LOOP_VINFO_MAY_ALIAS_DDRS.
gcc/testsuite/
* gcc.dg/vect/vect-alias-check-3.c: New test.
* gcc.dg/vect/vect-alias-check-4.c: Likewise.
* gcc.dg/vect/vect-alias-check-5.c: Likewise.
From-SVN: r250867
Richard Biener [Fri, 4 Aug 2017 10:33:39 +0000 (10:33 +0000)]
re PR middle-end/81705 (UBSAN: yet another false positive)
2017-08-04 Richard Biener <rguenther@suse.de>
PR middle-end/81705
* fold-const.c (fold_binary_loc): Properly restrict
minus_var0 && minus_var1 case when associating undefined overflow
entities.
* c-c++-common/ubsan/pr81705.c: New testcase.
From-SVN: r250866
Tom de Vries [Fri, 4 Aug 2017 07:27:05 +0000 (07:27 +0000)]
Add missing edge probability in simd_clone_adjust
Currently we generate an if with probability set on only one of the two edges:
<bb 5> [0.00%] [count: INV]:
_5 = mask.3[iter.6_3];
if (_5 == 0)
goto <bb 6>; [INV] [count: INV]
else
goto <bb 2>; [100.00%] [count: INV]
Add the missing edge probability, and set the split to unlikely/likely:
if (_5 == 0)
goto <bb 6>; [19.99%] [count: INV]
else
goto <bb 2>; [80.01%] [count: INV]
2017-08-04 Tom de Vries <tom@codesourcery.com>
* omp-simd-clone.c (simd_clone_adjust): Add missing edge probability.
From-SVN: r250865
GCC Administrator [Fri, 4 Aug 2017 00:16:34 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r250864
Bill Schmidt [Thu, 3 Aug 2017 21:22:03 +0000 (21:22 +0000)]
rs6000-c.c (altivec_resolve_overloaded_builtin): Don't start diagnostic messages with a capital letter.
[gcc]
2017-08-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Don't start diagnostic messages with a capital letter.
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Likewise.
(rs6000_invalid_builtin): Likewise.
(rs6000_trampoline_init): Likewise.
[gcc/testsuite]
2017-08-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/bfp/scalar-cmp-exp-eq-2.c: Adjust for error
messages that used to start with a capital letter.
* gcc.target/powerpc/bfp/scalar-cmp-exp-gt-2.c: Likewise.
* gcc.target/powerpc/bfp/scalar-cmp-exp-lt-2.c: Likewise.
* gcc.target/powerpc/bfp/scalar-cmp-unordered-2.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-exp-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-sig-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-4.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-7.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-data-class-11.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-data-class-6.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-data-class-7.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-neg-2.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-neg-3.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-neg-5.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-exp-2.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-exp-3.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-sig-2.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-sig-3.c: Likewise.
* gcc.target/powerpc/bfp/vec-insert-exp-2.c: Likewise.
* gcc.target/powerpc/bfp/vec-insert-exp-3.c: Likewise.
* gcc.target/powerpc/bfp/vec-insert-exp-6.c: Likewise.
* gcc.target/powerpc/bfp/vec-insert-exp-7.c: Likewise.
* gcc.target/powerpc/bfp/vec-test-data-class-2.c: Likewise.
* gcc.target/powerpc/bfp/vec-test-data-class-3.c: Likewise.
* gcc.target/powerpc/byte-in-either-range-1.c: Likewise.
* gcc.target/powerpc/byte-in-range-1.c: Likewise.
* gcc.target/powerpc/byte-in-set-1.c: Likewise.
* gcc.target/powerpc/crypto-builtin-2.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-1.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-11.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-16.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-21.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-26.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-31.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-36.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-41.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-46.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-51.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-56.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-6.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-61.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-66.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-71.c: Likewise.
* gcc.target/powerpc/dfp/dtstsfi-76.c: Likewise.
* gcc.target/powerpc/vsu/vec-all-nez-7.c: Likewise.
* gcc.target/powerpc/vsu/vec-any-eqz-7.c: Likewise.
* gcc.target/powerpc/vsu/vec-cmpnez-7.c: Likewise.
* gcc.target/powerpc/vsu/vec-cntlz-lsbb-2.c: Likewise.
* gcc.target/powerpc/vsu/vec-cnttz-lsbb-2.c: Likewise.
* gcc.target/powerpc/vsu/vec-xl-len-12.c: Likewise.
* gcc.target/powerpc/vsu/vec-xlx-7.c: Likewise.
* gcc.target/powerpc/vsu/vec-xrx-7.c: Likewise.
* gcc.target/powerpc/vsu/vec-xst-len-12.c: Likewise.
From-SVN: r250860
Ian Lance Taylor [Thu, 3 Aug 2017 18:09:12 +0000 (18:09 +0000)]
re PR go/81617 (mksigtab.sh fails to resolve NSIG with glibc 2.26)
PR go/81617
libgo: change mksigtab to recognize glibc 2.26 NSIG expression
Fixes golang/go#21147
Fixes GCC PR 81617
Reviewed-on: https://go-review.googlesource.com/52611
From-SVN: r250858
Jakub Jelinek [Thu, 3 Aug 2017 14:41:08 +0000 (16:41 +0200)]
re PR target/81621 (ICE in delete_insn, at cfgrtl.c:167 with s390x cross compiler)
PR target/81621
* bb-reorder.c (pass_partition_blocks::execute): Return TODO_df_finish
after setting changeable df flags.
* gcc.dg/pr81621.c: New test.
From-SVN: r250857
Richard Biener [Thu, 3 Aug 2017 14:08:56 +0000 (14:08 +0000)]
lto-symtab.h (lto_symtab_prevail_decl): Do not use DECL_ABSTRACT_ORIGIN as flag we can end up using that.
2017-08-03 Richard Biener <rguenther@suse.de>
* lto-symtab.h (lto_symtab_prevail_decl): Do not use
DECL_ABSTRACT_ORIGIN as flag we can end up using that. Instead
use DECL_LANG_FLAG_0.
(lto_symtab_prevail_decl): Likewise.
From-SVN: r250856
Richard Biener [Thu, 3 Aug 2017 14:08:15 +0000 (14:08 +0000)]
tree-ssa-reassoc.c (should_break_up_subtract): Also break up if the use is in USE - X.
2017-08-03 Richard Biener <rguenther@suse.de>
* tree-ssa-reassoc.c (should_break_up_subtract): Also break
up if the use is in USE - X.
* gcc.dg/tree-ssa/reassoc-23.c: Adjust to fool early folding
and CSE.
From-SVN: r250855
Alexander Monakov [Thu, 3 Aug 2017 13:39:47 +0000 (16:39 +0300)]
toplev: avoid recursive emergency_dump_function
* toplev.c (dumpfile.h): New include.
(internal_error_reentered): New static function. Use it...
(internal_error_function): ...here to handle reentered internal_error.
From-SVN: r250854
Richard Biener [Thu, 3 Aug 2017 11:52:00 +0000 (11:52 +0000)]
re PR sanitizer/81148 (UBSAN: two more false positives)
2017-08-03 Richard Biener <rguenther@suse.de>
PR middle-end/81148
* fold-const.c (split_tree): Add minus_var and minus_con
arguments, remove unused loc arg. Never generate NEGATE_EXPRs
here but always use minus_*.
(associate_trees): Assert we never associate with MINUS_EXPR
and NULL first operand. Do not recurse for PLUS_EXPR operands
when associating as MINUS_EXPR either.
(fold_binary_loc): Track minus_var and minus_con.
* c-c++-common/ubsan/pr81148.c: New testcase.
From-SVN: r250853
Tom de Vries [Thu, 3 Aug 2017 11:37:55 +0000 (11:37 +0000)]
Apply finish_options on DECL_FUNCTION_SPECIFIC_OPTIMIZATION for ACCEL_COMPILER
2017-08-03 Tom de Vries <tom@codesourcery.com>
PR lto/81430
* tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers): If
ACCEL_COMPILER, apply finish_options on
DECL_FUNCTION_SPECIFIC_OPTIMIZATION.
From-SVN: r250852
Tom de Vries [Thu, 3 Aug 2017 11:18:09 +0000 (11:18 +0000)]
Error out on nvptx for fpatchable-function-entry
2017-08-03 Tom de Vries <tom@codesourcery.com>
PR target/81662
* config/nvptx/nvptx.c (nvptx_option_override): Emit sorry if
function_entry_patch_area_size > 0.
* gcc.target/nvptx/patchable_function_entry-default.c: New test.
From-SVN: r250851
Jakub Jelinek [Thu, 3 Aug 2017 09:43:11 +0000 (11:43 +0200)]
re PR driver/81650 (gcc -m32 mishandles -Walloc-size-larger-than=
9223372036854775807)
PR driver/81650
* calls.c (alloc_max_size): Use HOST_WIDE_INT_UC (10??)
instead of 10??LU, perform unit multiplication in wide_int,
don't change alloc_object_size_limit if the limit is larger
than SSIZE_MAX.
* gcc.dg/pr81650.c: New test.
From-SVN: r250850
Jakub Jelinek [Thu, 3 Aug 2017 09:41:55 +0000 (11:41 +0200)]
re PR tree-optimization/81655 (new test case gcc.dg/tree-ssa/pr81588.c fails on powerpc64)
PR tree-optimization/81655
PR tree-optimization/81588
* tree-ssa-reassoc.c (optimize_range_tests_var_bound): Handle also
the case when ranges[i].low and high are 1 for unsigned type with
precision 1.
From-SVN: r250849
Paolo Carlini [Thu, 3 Aug 2017 09:26:17 +0000 (09:26 +0000)]
re PR c++/71440 (ICE on invalid C++ code in instantiate_type, at cp/class.c:8247)
/cp
2017-08-03 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71440
* typeck.c (build_x_unary_op): Avoid pretty-printing constructor /
destructor as expressions.
/testsuite
2017-08-03 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71440
* g++.dg/template/crash127.C: New.
From-SVN: r250848
Jakub Jelinek [Thu, 3 Aug 2017 08:34:16 +0000 (10:34 +0200)]
re PR middle-end/81052 (ICE in verify_dominators, at dominance.c:1184)
PR middle-end/81052
* omp-low.c (diagnose_sb_0): Handle flag_openmp_simd like flag_openmp.
(pass_diagnose_omp_blocks::gate): Enable also for flag_openmp_simd.
* c-c++-common/pr81052.c: New test.
From-SVN: r250847
Prathamesh Kulkarni [Thu, 3 Aug 2017 07:42:36 +0000 (07:42 +0000)]
tree-vrp.h: Add include guard.
2017-08-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* tree-vrp.h: Add include guard.
From-SVN: r250846
Tom de Vries [Thu, 3 Aug 2017 07:08:30 +0000 (07:08 +0000)]
Require alias for gcc.dg/pr56727-2.c
2017-08-03 Tom de Vries <tom@codesourcery.com>
* gcc.dg/pr56727-2.c: Require alias.
From-SVN: r250845
Tom de Vries [Thu, 3 Aug 2017 07:08:19 +0000 (07:08 +0000)]
Require alloca for gcc.dg/attr-noipa.c
2017-08-03 Tom de Vries <tom@codesourcery.com>
* gcc.dg/attr-noipa.c: Require alloca.
From-SVN: r250844
Tom de Vries [Thu, 3 Aug 2017 07:08:01 +0000 (07:08 +0000)]
Require label_values for gcc.dg/torture/pr80163.c
2017-08-03 Tom de Vries <tom@codesourcery.com>
* gcc.dg/torture/pr80163.c: Require label_values.
From-SVN: r250843
Tom de Vries [Thu, 3 Aug 2017 07:07:38 +0000 (07:07 +0000)]
Skip fpatchable-function-entry tests for nvptx
2017-08-03 Tom de Vries <tom@codesourcery.com>
PR target/81662
* c-c++-common/patchable_function_entry-decl.c: Skip for nvptx.
* c-c++-common/patchable_function_entry-default.c: Same.
* c-c++-common/patchable_function_entry-definition.c: Same.
From-SVN: r250842
GCC Administrator [Thu, 3 Aug 2017 00:16:27 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r250841
Yury Gribov [Wed, 2 Aug 2017 21:01:08 +0000 (21:01 +0000)]
Added Python implementation of mklog.
From-SVN: r250836
Yury Gribov [Wed, 2 Aug 2017 20:58:23 +0000 (20:58 +0000)]
Renamed original mklog to mklog.pl.
From-SVN: r250835
Ian Lance Taylor [Wed, 2 Aug 2017 16:27:17 +0000 (16:27 +0000)]
compiler: only finalize embedded fields before finalizing methods
When finalizing the methods of a named struct type, we used to
finalize all the field types first. That can fail if the field types
refer indirectly to the named type. Change it to just finalize the
embedded field types first, and the rest of the fields later.
Fixes golang/go#21253
Reviewed-on: https://go-review.googlesource.com/52570
From-SVN: r250832
Uros Bizjak [Wed, 2 Aug 2017 14:04:48 +0000 (16:04 +0200)]
* ChangeLog: Fix my last entry.
From-SVN: r250831
Uros Bizjak [Wed, 2 Aug 2017 13:58:08 +0000 (15:58 +0200)]
re PR target/81644 (ICE in rtl_verify_bb_insn, BBRO pass duplicates BB that ends with flow control insn)
PR target/81644
* config/i386/i386.md (unspecv): Add UNSPECV_UD2.
(ud2): New insn pattern.
* config/i386/i386.c (ix86_expand_epilogue):
Generate ud2 instead of trap insn.
testsuite/ChangeLog:
PR target/81644
* gcc.target/i386/pr81644.c: New test.
From-SVN: r250830
Marek Polacek [Wed, 2 Aug 2017 13:25:12 +0000 (13:25 +0000)]
re PR other/81667 (trunk/gcc/alloc-pool.h:239: possible missing initialiser ?)
PR other/81667
* alloc-pool.h (base_pool_allocator): Initialize m_elt_size.
From-SVN: r250829
Tom de Vries [Wed, 2 Aug 2017 13:19:30 +0000 (13:19 +0000)]
Use relative line number in gcc.dg/Walloca-14.c
2017-08-02 Tom de Vries <tom@codesourcery.com>
* gcc.dg/Walloca-14.c: Use relative line number.
From-SVN: r250828
Uros Bizjak [Wed, 2 Aug 2017 12:59:52 +0000 (14:59 +0200)]
funcspec-56.inc (no_3dnowa): Properly test "no-3dnowa" target attribute.
* gcc.target/i386/funcspec-56.inc (no_3dnowa): Properly
test "no-3dnowa" target attribute.
From-SVN: r250826
David Edelsohn [Wed, 2 Aug 2017 12:45:55 +0000 (08:45 -0400)]
Add PR number.
From-SVN: r250825
David Edelsohn [Wed, 2 Aug 2017 12:44:54 +0000 (12:44 +0000)]
* xcoff.c (xcoff_process_linenos): Initialize incl to NULL.
From-SVN: r250824
Tom de Vries [Wed, 2 Aug 2017 12:11:50 +0000 (12:11 +0000)]
Add missing probabilities in nvptx_lock{less,full}_update
2017-08-02 Tom de Vries <tom@codesourcery.com>
Cesar Philippidis <cesar@codesourcery.com>
* config/nvptx/nvptx.c (nvptx_lockless_update, nvptx_lockfull_update):
Add missing edge probabilities.
Co-Authored-By: Cesar Philippidis <cesar@codesourcery.com>
From-SVN: r250823
Marek Polacek [Wed, 2 Aug 2017 11:56:54 +0000 (11:56 +0000)]
re PR c/81448 (False positive -Werror=multistatement-macros in openssl)
PR c/81448
PR c/81306
* c-warn.c (warn_for_multistatement_macros): Prevent bogus
warnings. Avoid walking MACRO_MAP_LOCATIONS.
* c-c++-common/Wmultistatement-macros-13.c: New test.
From-SVN: r250822
Marek Polacek [Wed, 2 Aug 2017 11:50:16 +0000 (11:50 +0000)]
re PR c/81289 (ICE in libcpp/line-map.c)
PR c/81289
* c-parser.c (c_parser_unary_expression): Use set_error.
* gcc.dg/noncompile/pr81289.c: New test.
From-SVN: r250821
Uros Bizjak [Wed, 2 Aug 2017 11:19:58 +0000 (13:19 +0200)]
pr25967-1.c: Delete
* gcc.dg/guality/pr25967-1.c: Delete
* gcc.dg/guality/pr25967-2.c: Delete
* gcc.dg/guality/pr25967-3.c: Rename to pr25967-1.c.
* gcc.dg/guality/pr25967-4.c: Rename to pr25967-2.c.
* gcc.dg/torture/pr25967-1.c: Delete
* gcc.dg/torture/pr25967-2.c: Delete
* gcc.dg/torture/pr25967-3.c: Rename to pr25967-1.c.
* gcc.dg/torture/pr25967-4.c: Rename to pr25967-2.c.
From-SVN: r250820
Tamar Christina [Wed, 2 Aug 2017 08:55:59 +0000 (08:55 +0000)]
aarch64.c (aarch64_reinterpret_float_as_int): Correct endianness.
2017-08-02 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
Correct endianness.
From-SVN: r250818
Jakub Jelinek [Wed, 2 Aug 2017 07:28:21 +0000 (09:28 +0200)]
re PR c++/81640 (ICE in lookup_fnfields_slot_nolazy w/ -Wshadow=compatible-local)
PR c++/81640
* call.c (build_user_type_conversion_1): Only call
lookup_fnfields_slot if totype is CLASS_TYPE_P.
* g++.dg/warn/Wshadow-compatible-local-2.C: New test.
From-SVN: r250816
Jakub Jelinek [Wed, 2 Aug 2017 07:13:25 +0000 (09:13 +0200)]
re PR middle-end/79499 (ICE in rtl_verify_bb_insns, at cfgrtl.c:2661)
PR middle-end/79499
* function.c (thread_prologue_and_epilogue_insns): Determine blocks
for find_many_sub_basic_blocks bitmap by looking up BLOCK_FOR_INSN
of first NONDEBUG_INSN_P in each of the split_prologue_seq and
prologue_seq sequences - if any.
* gcc.dg/pr79499.c: New test.
From-SVN: r250814
Richard Biener [Wed, 2 Aug 2017 06:57:12 +0000 (06:57 +0000)]
tree-vect-stmts.c (vectorizable_store): Perform vector extracts via vectors if supported...
2017-08-02 Richard Biener <rguenther@suse.de>
* tree-vect-stmts.c (vectorizable_store): Perform vector extracts
via vectors if supported, integer extracts via punning if supported
or otherwise vector extracts.
From-SVN: r250813
Richard Biener [Wed, 2 Aug 2017 06:52:26 +0000 (06:52 +0000)]
tree-ssa-pre.c (bitmap_insert_into_set_1): Remove and inline into ...
2017-08-02 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c (bitmap_insert_into_set_1): Remove and inline
into ...
(bitmap_insert_into_set): ... this.
From-SVN: r250812
Richard Biener [Wed, 2 Aug 2017 06:38:36 +0000 (06:38 +0000)]
re PR tree-optimization/81633 (Incorrect floating point result with tree vectoriser)
2017-08-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/81633
Revert
2015-08-17 Alan Hayward <alan.hayward@arm.com>
PR tree-optimization/71752
* tree-vect-slp.c (vect_get_slp_defs): Handle null operands.
* gcc.dg/vect/pr81633.c: New testcase.
From-SVN: r250811
GCC Administrator [Wed, 2 Aug 2017 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r250810
Joseph Myers [Tue, 1 Aug 2017 23:44:12 +0000 (00:44 +0100)]
* fr.po: Update.
From-SVN: r250805
Daniel Santos [Tue, 1 Aug 2017 22:33:16 +0000 (22:33 +0000)]
[i386] Remove ix86_frame::outlined_save_offset and machine_function::call_ms2sysv_pad_out
ix86_frame::outlined_save_offset isn't used and
machine_function::call_ms2sysv_pad_out is an ineffective strategy.
2017-08-01 Daniel Santos <daniel.santos@pobox.com>
* config/i386/i386.h (ix86_frame::outlined_save_offset): Remove field.
(machine_function::call_ms2sysv_pad_out): Remove field.
* config/i386/i386.c (xlogue_layout::get_stack_space_used): Modify.
(ix86_compute_frame_layout): Likewise.
From-SVN: r250803
Eric Botcazou [Tue, 1 Aug 2017 22:15:32 +0000 (22:15 +0000)]
c-ada-spec.c (has_static_fields): Look only into fields.
* c-ada-spec.c (has_static_fields): Look only into fields.
(dump_generic_ada_node): Small tweak.
(dump_nested_types): Look only into fields.
(print_ada_declaration): Look only into methods. Small tweak.
(print_ada_struct_decl): Look only into fields. Use DECL_VIRTUAL_P.
From-SVN: r250802
H.J. Lu [Tue, 1 Aug 2017 21:39:51 +0000 (21:39 +0000)]
i386: Add more naked attribute tests
Add some tests for implementing interrupt handlers with naked attribute
and without asm statements.
* gcc.dg/guality/pr25967-3.c: New test.
* gcc.dg/guality/pr25967-4.c: Likewise.
* gcc.dg/torture/pr25967-3.c: Likewise.
* gcc.dg/torture/pr25967-4.c: Likewise.
From-SVN: r250800
H.J. Lu [Tue, 1 Aug 2017 21:07:04 +0000 (21:07 +0000)]
i386: Add some naked attribute tests
Add some tests for implementing interrupt handlers with naked attribute.
* gcc.dg/guality/pr25967-1.c: New test.
* gcc.dg/guality/pr25967-2.c: Likewise.
* gcc.dg/torture/pr25967-1.c: Likewise.
* gcc.dg/torture/pr25967-2.c: Likewise.
From-SVN: r250799
Eric Botcazou [Tue, 1 Aug 2017 20:50:00 +0000 (20:50 +0000)]
c-ada-spec.c (print_generic_ada_decl): Pass correctly-typed constant.
* c-ada-spec.c (print_generic_ada_decl): Pass correctly-typed constant.
(dump_ada_function_declaration): Likewise.
(dump_generic_ada_node): Likewise.
(print_ada_declaration): Add support for const-qualified variables.
From-SVN: r250797
H.J. Lu [Tue, 1 Aug 2017 20:25:41 +0000 (20:25 +0000)]
386: Disallow naked attribute with interrupt attribute
gcc/
PR target/81654
* config/i386/i386.c (ix86_set_func_type): Disallow naked
attribute with interrupt attribute.
gcc/testsuite/
PR target/81654
* gcc.target/i386/pr81654.c: New test.
From-SVN: r250793
Thomas Koenig [Tue, 1 Aug 2017 19:09:02 +0000 (19:09 +0000)]
re PR fortran/79312 (Empty array in assignment not correctly type-checked)
2017-08-01 Thomas König <tkoenig@gcc.gnu.org>
PR fortran/79312
* intrisic.c (gfc_convert_type_warn): Only set typespec for
empty array constructors which don't have it already.
2017-08-01 Thomas König <tkoenig@gcc.gnu.org>
PR fortran/79312
* gfortran.dg/logical_assignment_1.f90: New test.
From-SVN: r250792
Thomas Koenig [Tue, 1 Aug 2017 17:59:11 +0000 (17:59 +0000)]
re PR fortran/45435 (Automatically generate C interop interface blocks from C code)
2017-08-01 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/45435
* lang.opt (fc-prototypes): Add option.
* gfortran.h (gfc_typespec): Add interop_kind to struct.
(gfc_dump_c_prototypes): Add prototype.
* decl.c (gfc_match_kind_spec): Copy symbol used for kind to typespec.
* parse.c (gfc_parse_file): Call gfc_dump_prototypes.
* dump-parse-tree.c (gfc_dump_c_prototypes): New function.
(type_return): New enum.
(get_c_type_name): New function.
(write_decl): New function.
(write_type): New function.
(write_variable): New function.
(write_proc): New function.
(write_interop_decl): New function.
* invoke.texi: Document -fc-prototypes.
From-SVN: r250791
Andrew Pinski [Tue, 1 Aug 2017 17:58:17 +0000 (17:58 +0000)]
tree-ssa-scopedtables.c (hashable_expr_equal_p): Check BIT_INSERT_EXPR's operand 1 to see if the types precision matches.
2017-08-01 Andrew Pinski <apinski@cavium.com>
* tree-ssa-scopedtables.c (hashable_expr_equal_p): Check
BIT_INSERT_EXPR's operand 1
to see if the types precision matches.
From-SVN: r250790
Martin Liska [Tue, 1 Aug 2017 17:21:29 +0000 (19:21 +0200)]
Make mempcpy more optimal (PR middle-end/70140).
2017-08-01 Martin Liska <mliska@suse.cz>
PR middle-end/70140
* gcc.dg/string-opt-1.c: Adjust test-case to scan for memcpy.
2017-08-01 Martin Liska <mliska@suse.cz>
PR middle-end/70140
* builtins.c (expand_builtin_memcpy_args): Remove.
(expand_builtin_memcpy): Call newly added function
expand_builtin_memory_copy_args.
(expand_builtin_memcpy_with_bounds): Likewise.
(expand_builtin_mempcpy): Remove last argument.
(expand_builtin_mempcpy_with_bounds): Likewise.
(expand_builtin_memory_copy_args): New function created from
expand_builtin_mempcpy_args with small modifications.
(expand_builtin_mempcpy_args): Remove.
(expand_builtin_stpcpy): Remove unused argument.
(expand_builtin): Likewise.
(expand_builtin_with_bounds): Likewise.
From-SVN: r250789
Martin Liska [Tue, 1 Aug 2017 17:10:38 +0000 (19:10 +0200)]
Revert r250771
2017-08-01 Martin Liska <mliska@suse.cz>
Revert r250771
Make mempcpy more optimal (PR middle-end/70140).
2017-08-01 Martin Liska <mliska@suse.cz>
Revert r250771
Make mempcpy more optimal (PR middle-end/70140).
From-SVN: r250788
Jason Merrill [Tue, 1 Aug 2017 16:38:11 +0000 (12:38 -0400)]
* decl.c (declare_global_var): Set DECL_CONTEXT.
From-SVN: r250786
Jakub Jelinek [Tue, 1 Aug 2017 16:34:31 +0000 (18:34 +0200)]
re PR target/81622 (ICE on invalid altivec code with ppc64{,le})
PR target/81622
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): For
__builtin_vec_cmpne verify both arguments are compatible vectors
before looking at TYPE_MODE on the element type. For __builtin_vec_ld
verify arg1_type is a pointer or array type. For __builtin_vec_st,
move computation of aligned to after checking the argument types.
Formatting fixes.
* gcc.target/powerpc/pr81622.c: New test.
From-SVN: r250785
Jakub Jelinek [Tue, 1 Aug 2017 16:12:31 +0000 (18:12 +0200)]
re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b right away, to be more efficient for Ryzen and Intel)
PR target/80846
* config/rs6000/vsx.md (vextract_fp_from_shorth,
vextract_fp_from_shortl): Add element mode after mode in gen_vec_init*
calls.
From-SVN: r250784
Steve Ellcey [Tue, 1 Aug 2017 15:37:22 +0000 (15:37 +0000)]
re PR tree-optimization/80925 (vect peeling failures)
2017-08-01 Steve Ellcey <sellcey@cavium.com>
PR tree-optimization/80925
* gcc.dg/vect/vect-28.c: Add
--param vect-max-peeling-for-alignment=0 option.
Remove unaligned access and peeling checks.
* gcc.dg/vect/vect-33-big-array.c: Ditto.
* gcc.dg/vect/vect-70.c: Ditto.
* gcc.dg/vect/vect-87.c: Ditto.
* gcc.dg/vect/vect-88.c: Ditto.
* gcc.dg/vect/vect-91.c: Ditto.
* gcc.dg/vect/vect-93.c: Ditto.
From-SVN: r250783
Jerome Lambourg [Tue, 1 Aug 2017 14:14:21 +0000 (14:14 +0000)]
config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as well as arm-wrs-vxworks.
2017-08-01 Jerome Lambourg <lambourg@adacore.com>
Doug Rupp <rupp@adacore.com>
Olivier Hainque <hainque@adacore.com>
gcc/
* config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as
well as arm-wrs-vxworks. Update target_cpu_name from arm6 (arch v3) to
arm8 (arch v4).
* config/arm/vxworks.h (MAYBE_TARGET_BPABI_CPP_BUILTINS): New, helper
for TARGET_OS_CPP_BUILTIN.
(TARGET_OS_CPP_BUILTIN): Invoke MAYBE_TARGET_BPABI_CPP_BUILTINS(),
refine CPU definitions for arm_arch5 and add those for arm_arch6 and
arm_arch7.
(MAYBE_ASM_ABI_SPEC): New, helper for SUBTARGET_EXTRA_ASM_SPEC,
passing required abi options to the assembler for EABI configurations.
(EXTRA_CC1_SPEC): New macro, to help prevent the implicit production
of .text.hot and .text.unlikely sections for kernel modules when
using ARM style exceptions.
(CC1_SPEC): Remove obsolete attempt at mimicking Diab toolchain
options. Add EXTRA_CC1_SPEC.
(VXWORKS_ENDIAN_SPEC): Adjust comment and remove handling of Diab
toolchain options.
(DWARF2_UNWIND_INFO): Redefine to handle the pre/post VxWorks 7
transition.
(ARM_TARGET2_DWARF_FORMAT): Define.
* config/arm/t-vxworks: Adjust multilib control to removal of the
Diab command line options.
libgcc/
* config.host (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7
as well as arm-wrs-vxworks.
* config/arm/t-vxworks7: New file. Add unwind-arm-vxworks.c to
LIB2ADDEH.
* config/arm/unwind-arm-vxworks.c: New file. Provide dummy
__exidx_start and __exidx_end for downloadable modules.
Co-Authored-By: Doug Rupp <rupp@adacore.com>
Co-Authored-By: Olivier Hainque <hainque@adacore.com>
From-SVN: r250781
Martin Liska [Tue, 1 Aug 2017 14:06:13 +0000 (16:06 +0200)]
Fix segfault in gcov.c (PR gcov-profile/81561).
2017-08-01 Martin Liska <mliska@suse.cz>
PR gcov-profile/81561
* gcov.c (unblock): Make unblocking safe as we need to preserve
index correspondence of blocks and block_lists.
From-SVN: r250780
Tom de Vries [Tue, 1 Aug 2017 13:52:14 +0000 (13:52 +0000)]
Simplify nvptx/slp* test-cases
Use signed loop iteration variable in nvtpx/slp* test-cases to work around
PR tree-optimizaion/81635.
2017-08-01 Tom de Vries <tom@codesourcery.com>
* gcc.target/nvptx/slp-2.c (foo): Use signed loop iteration variable.
* gcc.target/nvptx/slp.c (foo): Same.
From-SVN: r250778
Richard Biener [Tue, 1 Aug 2017 13:36:50 +0000 (13:36 +0000)]
re PR tree-optimization/81181 (ICE in compute_antic, at tree-ssa-pre.c:2410)
2017-08-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/81181
* tree-ssa-pre.c (compute_antic_aux): Defer clean() to ...
(compute_antic): ... end of iteration here.
* gcc.dg/torture/pr81181.c: New testcase.
From-SVN: r250777
Olivier Hainque [Tue, 1 Aug 2017 13:23:06 +0000 (13:23 +0000)]
t-vxworks (LIBGCC2_INCLUDES): Start with -I.
2017-08-01 Olivier Hainque <hainque@adacore.com>
* config/t-vxworks (LIBGCC2_INCLUDES): Start with -I. after -nostdinc.
* config/t-vxworks7: Likewise.
From-SVN: r250776
Olivier Hainque [Tue, 1 Aug 2017 12:59:44 +0000 (12:59 +0000)]
t-vxworks: Instead of redefining LIB2ADD, augment LIB2ADDEH with vxlib.c and vxlib-tls.c.
2017-08-01 Olivier Hainque <hainque@adacore.com>
* config/t-vxworks: Instead of redefining LIB2ADD,
augment LIB2ADDEH with vxlib.c and vxlib-tls.c.
From-SVN: r250775
James Greenhalgh [Tue, 1 Aug 2017 12:59:05 +0000 (12:59 +0000)]
Remove flag_tree_vectorize
gcc/
* common.opt (ftree-vectorize): No longer set flag_tree_vectorize.
(ftree-loop-vectorize): Set as EnabledBy ftree-vectorize.
(ftree-slp-vectorize): Likewise.
* omp-expand (expand_omp_simd): Remove flag_tree_vectorize, as it
can no longer be set independent of flag_tree_loop_vectorize.
* omp-general.c (emp_max_vf): Likewise.
* opts.c (enable_fdo_optimizations): Remove references to
flag_tree_vectorize, these are now implicit.
(common_handle_option): Remove handling for OPT_ftree_vectorize,
and leave it for the options machinery.
From-SVN: r250774
Tamar Christina [Tue, 1 Aug 2017 12:23:59 +0000 (12:23 +0000)]
Reverted 250770
From-SVN: r250773
Martin Liska [Tue, 1 Aug 2017 11:59:27 +0000 (13:59 +0200)]
Make mempcpy more optimal (PR middle-end/70140).
2017-08-01 Martin Liska <mliska@suse.cz>
PR middle-end/70140
* gcc.dg/string-opt-1.c: Adjust test-case to scan for memcpy.
2017-08-01 Martin Liska <mliska@suse.cz>
PR middle-end/70140
* builtins.c (expand_builtin_memcpy_args): Remove.
(expand_builtin_memcpy): Call newly added function
expand_builtin_memory_copy_args.
(expand_builtin_memcpy_with_bounds): Likewise.
(expand_builtin_mempcpy): Remove last argument.
(expand_builtin_mempcpy_with_bounds): Likewise.
(expand_builtin_memory_copy_args): New function created from
expand_builtin_mempcpy_args with small modifications.
(expand_builtin_mempcpy_args): Remove.
(expand_builtin_stpcpy): Remove unused argument.
(expand_builtin): Likewise.
(expand_builtin_with_bounds): Likewise.
From-SVN: r250771
Tamar Christina [Tue, 1 Aug 2017 11:41:03 +0000 (11:41 +0000)]
dbl_mov_immediate_1.c: Use conditional assembler scans.
2017-08-01 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/dbl_mov_immediate_1.c:
Use conditional assembler scans.
From-SVN: r250770
Uros Bizjak [Tue, 1 Aug 2017 11:15:52 +0000 (13:15 +0200)]
re PR target/81641 (Assemble failure with named address spaces and -masm=intel)
PR target/81641
* config/i386/i386.c (ix86_print_operand_address_as): For -masm=intel
print "ds:" only for immediates in generic address space.
testsuite/ChangeLog:
PR target/81641
* gcc.target/i386/pr81641.c: New test.
From-SVN: r250769
Uros Bizjak [Tue, 1 Aug 2017 10:57:55 +0000 (12:57 +0200)]
re PR target/81639 (ICE in rtl_verify_bb_insns, at cfgrtl.c:2669 with a naked function)
PR target/81639
* config/i386/i386.c (ix86_funciton_naked): New prototype.
(ix86_function_ok_for_sibcall): Return false for naked functions.
testsuite/ChangeLog:
PR target/81639
* gcc.target/i386/pr81639.c: New test.
From-SVN: r250768
Richard Biener [Tue, 1 Aug 2017 10:47:14 +0000 (10:47 +0000)]
tree-ssa-pre.c (print_pre_expr): Handle NULL expr.
2017-08-01 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c (print_pre_expr): Handle NULL expr.
(compute_antic): Seed worklist with exit block predecessors.
* cfganal.c (dfs_find_deadend): For a cycle return the source
of the edge closing it.
* gcc.dg/tree-ssa/ssa-dce-3.c: Adjust.
* gcc.dg/tree-ssa/split-path-5.c: Remove case with just dead
endless loop.
* gcc.dg/uninit-23.c: Adjust.
From-SVN: r250767
Tamar Christina [Tue, 1 Aug 2017 09:56:31 +0000 (09:56 +0000)]
2017-08-01 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64.c
(aarch64_can_const_movi_rtx_p): Move 0 check.
From-SVN: r250766
Bin Cheng [Tue, 1 Aug 2017 09:28:18 +0000 (09:28 +0000)]
tree.h (POINTER_TYPE_OVERFLOW_UNDEFINED): Delete.
* tree.h (POINTER_TYPE_OVERFLOW_UNDEFINED): Delete.
* fold-const.c (fold_comparison, fold_binary_loc): Delete use of
above macro.
* match.pd: Ditto in address comparison pattern.
gcc/testsuite
* gcc.dg/no-strict-overflow-7.c: Revise comment and test string.
* gcc.dg/tree-ssa/pr81388-1.c: Ditto.
From-SVN: r250765
Bin Cheng [Tue, 1 Aug 2017 09:20:08 +0000 (09:20 +0000)]
re PR tree-optimization/81627 (ICE on valid code at -O3: in check_loop_closed_ssa_use, at tree-ssa-loop-manip.c:707)
PR tree-optimization/81627
* tree-predcom.c (prepare_finalizers): Always rewrite into loop
closed ssa form for store-store chain.
gcc/testsuite
* gcc.dg/tree-ssa/pr81627.c: New.
From-SVN: r250764
Bin Cheng [Tue, 1 Aug 2017 09:17:29 +0000 (09:17 +0000)]
re PR tree-optimization/81620 (ICE in is_inv_store_elimination_chain, at tree-predcom.c:1651 with -O3)
PR tree-optimization/81620
* tree-predcom.c (add_ref_to_chain): Don't set has_max_use_after
for store-store chain.
gcc/testsuite
* gcc.dg/tree-ssa/pr81620-1.c: New.
* gcc.dg/tree-ssa/pr81620-2.c: New.
From-SVN: r250763
Dominique d'Humieres [Tue, 1 Aug 2017 09:02:58 +0000 (11:02 +0200)]
re PR fortran/53542 (Diagnostic of USE-associated variables shows original instead of renamed symbol name)
2017-08-01 Dominique d'Humieres <dominiq@lps.ens.fr>
PR fortran/53542
* expr.c (gfc_check_init_expr): Use the renamed name.
PR testsuite/53542
* gfortran.dg/use_30.f90: New test.
From-SVN: r250762
Jakub Jelinek [Tue, 1 Aug 2017 08:32:37 +0000 (10:32 +0200)]
re PR tree-optimization/81588 (Wrong code at -O2)
PR tree-optimization/81588
* tree-ssa-reassoc.c (optimize_range_tests_var_bound): If
ranges[i].in_p, invert comparison code ccode. For >/>=,
swap rhs1 and rhs2 and comparison code unconditionally,
for </<= don't do that. Don't swap rhs1/rhs2 again if
ranges[i].in_p, instead invert comparison code ccode if
opcode or oe->rank is BIT_IOR_EXPR.
* gcc.dg/tree-ssa/pr81588.c: New test.
* gcc.dg/pr81588.c: New test.
* gcc.c-torture/execute/pr81588.c: New test.
From-SVN: r250760
Jakub Jelinek [Tue, 1 Aug 2017 08:26:14 +0000 (10:26 +0200)]
re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b right away, to be more efficient for Ryzen and Intel)
PR target/80846
* optabs.def (vec_extract_optab, vec_init_optab): Change from
a direct optab to conversion optab.
* optabs.c (expand_vector_broadcast): Use convert_optab_handler
with GET_MODE_INNER as last argument instead of optab_handler.
* expmed.c (extract_bit_field_1): Likewise. Use vector from
vector extraction if possible and optab is available.
* expr.c (store_constructor): Use convert_optab_handler instead
of optab_handler. Use vector initialization from smaller
vectors if possible and optab is available.
* tree-vect-stmts.c (vectorizable_load): Likewise.
* doc/md.texi (vec_extract, vec_init): Document that the optabs
now have two modes.
* config/i386/i386.c (ix86_expand_vector_init): Handle expansion
of vec_init from half-sized vectors with the same element mode.
* config/i386/sse.md (ssehalfvecmode): Add V4TI case.
(ssehalfvecmodelower, ssescalarmodelower): New mode attributes.
(reduc_plus_scal_v8df, reduc_plus_scal_v4df, reduc_plus_scal_v2df,
reduc_plus_scal_v16sf, reduc_plus_scal_v8sf, reduc_plus_scal_v4sf,
reduc_<code>_scal_<mode>, reduc_umin_scal_v8hi): Add element mode
after mode in gen_vec_extract* calls.
(vec_extract<mode>): Renamed to ...
(vec_extract<mode><ssescalarmodelower>): ... this.
(vec_extract<mode><ssehalfvecmodelower>): New expander.
(rotl<mode>3, rotr<mode>3, <shift_insn><mode>3, ashrv2di3): Add
element mode after mode in gen_vec_init* calls.
(VEC_INIT_HALF_MODE): New mode iterator.
(vec_init<mode>): Renamed to ...
(vec_init<mode><ssescalarmodelower>): ... this.
(vec_init<mode><ssehalfvecmodelower>): New expander.
* config/i386/mmx.md (vec_extractv2sf): Renamed to ...
(vec_extractv2sfsf): ... this.
(vec_initv2sf): Renamed to ...
(vec_initv2sfsf): ... this.
(vec_extractv2si): Renamed to ...
(vec_extractv2sisi): ... this.
(vec_initv2si): Renamed to ...
(vec_initv2sisi): ... this.
(vec_extractv4hi): Renamed to ...
(vec_extractv4hihi): ... this.
(vec_initv4hi): Renamed to ...
(vec_initv4hihi): ... this.
(vec_extractv8qi): Renamed to ...
(vec_extractv8qiqi): ... this.
(vec_initv8qi): Renamed to ...
(vec_initv8qiqi): ... this.
* config/rs6000/vector.md (VEC_base_l): New mode attribute.
(vec_init<mode>): Renamed to ...
(vec_init<mode><VEC_base_l>): ... this.
(vec_extract<mode>): Renamed to ...
(vec_extract<mode><VEC_base_l>): ... this.
* config/rs6000/paired.md (vec_initv2sf): Renamed to ...
(vec_initv2sfsf): ... this.
* config/rs6000/altivec.md (splitter, altivec_copysign_v4sf3,
vec_unpacku_hi_v16qi, vec_unpacku_hi_v8hi, vec_unpacku_lo_v16qi,
vec_unpacku_lo_v8hi, mulv16qi3, altivec_vreve<mode>2): Add
element mode after mode in gen_vec_init* calls.
* config/aarch64/aarch64-simd.md (vec_init<mode>): Renamed to ...
(vec_init<mode><Vel>): ... this.
(vec_extract<mode>): Renamed to ...
(vec_extract<mode><Vel>): ... this.
* config/aarch64/iterators.md (Vel): New mode attribute.
* config/s390/s390.c (s390_expand_vec_strlen, s390_expand_vec_movstr):
Add element mode after mode in gen_vec_extract* calls.
* config/s390/vector.md (non_vec_l): New mode attribute.
(vec_extract<mode>): Renamed to ...
(vec_extract<mode><non_vec_l>): ... this.
(vec_init<mode>): Renamed to ...
(vec_init<mode><non_vec_l>): ... this.
* config/s390/s390-builtins.def (s390_vlgvb, s390_vlgvh, s390_vlgvf,
s390_vlgvf_flt, s390_vlgvg, s390_vlgvg_dbl): Add element mode after
vec_extract mode.
* config/arm/iterators.md (V_elem_l): New mode attribute.
* config/arm/neon.md (vec_extract<mode>): Renamed to ...
(vec_extract<mode><V_elem_l>): ... this.
(vec_extractv2di): Renamed to ...
(vec_extractv2didi): ... this.
(vec_init<mode>): Renamed to ...
(vec_init<mode><V_elem_l>): ... this.
(reduc_plus_scal_<mode>, reduc_plus_scal_v2di, reduc_smin_scal_<mode>,
reduc_smax_scal_<mode>, reduc_umin_scal_<mode>,
reduc_umax_scal_<mode>, neon_vget_lane<mode>, neon_vget_laneu<mode>):
Add element mode after gen_vec_extract* calls.
* config/mips/mips-msa.md (vec_init<mode>): Renamed to ...
(vec_init<mode><unitmode>): ... this.
(vec_extract<mode>): Renamed to ...
(vec_extract<mode><unitmode>): ... this.
* config/mips/loongson.md (vec_init<mode>): Renamed to ...
(vec_init<mode><unitmode>): ... this.
* config/mips/mips-ps-3d.md (vec_initv2sf): Renamed to ...
(vec_initv2sfsf): ... this.
(vec_extractv2sf): Renamed to ...
(vec_extractv2sfsf): ... this.
(reduc_plus_scal_v2sf, reduc_smin_scal_v2sf, reduc_smax_scal_v2sf):
Add element mode after gen_vec_extract* calls.
* config/mips/mips.md (unitmode): New mode iterator.
* config/spu/spu.c (spu_expand_prologue, spu_allocate_stack,
spu_builtin_extract): Add element mode after gen_vec_extract* calls.
* config/spu/spu.md (inner_l): New mode attribute.
(vec_init<mode>): Renamed to ...
(vec_init<mode><inner_l>): ... this.
(vec_extract<mode>): Renamed to ...
(vec_extract<mode><inner_l>): ... this.
* config/sparc/sparc.md (veltmode): New mode iterator.
(vec_init<VMALL:mode>): Renamed to ...
(vec_init<VMALL:mode><VMALL:veltmode>): ... this.
* config/ia64/vect.md (vec_initv2si): Renamed to ...
(vec_initv2sisi): ... this.
(vec_initv2sf): Renamed to ...
(vec_initv2sfsf): ... this.
(vec_extractv2sf): Renamed to ...
(vec_extractv2sfsf): ... this.
* config/powerpcspe/vector.md (VEC_base_l): New mode attribute.
(vec_init<mode>): Renamed to ...
(vec_init<mode><VEC_base_l>): ... this.
(vec_extract<mode>): Renamed to ...
(vec_extract<mode><VEC_base_l>): ... this.
* config/powerpcspe/paired.md (vec_initv2sf): Renamed to ...
(vec_initv2sfsf): ... this.
* config/powerpcspe/altivec.md (splitter, altivec_copysign_v4sf3,
vec_unpacku_hi_v16qi, vec_unpacku_hi_v8hi, vec_unpacku_lo_v16qi,
vec_unpacku_lo_v8hi, mulv16qi3): Add element mode after mode in
gen_vec_init* calls.
From-SVN: r250759
Richard Biener [Tue, 1 Aug 2017 07:04:10 +0000 (07:04 +0000)]
re PR tree-optimization/81297 (ICE in get_single_symbol)
2017-08-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/81297
* tree-vrp.c (get_single_symbol): Remove assert, instead drop
TREE_OVERFLOW from INTEGER_CSTs.
* gcc.dg/torture/pr81297.c: New testcase.
From-SVN: r250758
Uros Bizjak [Tue, 1 Aug 2017 05:56:28 +0000 (07:56 +0200)]
naked-1.c (dg-options): Add -fno-pic.
* gcc.target/i386/naked-1.c (dg-options): Add -fno-pic.
From-SVN: r250757
GCC Administrator [Tue, 1 Aug 2017 00:16:34 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r250756
Steve Ellcey [Mon, 31 Jul 2017 21:44:34 +0000 (21:44 +0000)]
re PR tree-optimization/80925 (vect peeling failures)
2017-07-31 Steve Ellcey <sellcey@cavium.com>
PR tree-optimization/80925
* gcc.dg/vect/no-section-anchors-vect-69.c: Add
--param vect-max-peeling-for-alignment=0 option.
Remove unaligned access and peeling checks.
* gcc.dg/vect/section-anchors-vect-69.c: Ditto.
From-SVN: r250752
Carl Love [Mon, 31 Jul 2017 21:01:39 +0000 (21:01 +0000)]
builtins-4-runnable.c: Fix dg argument that got missed in commit 250746.
gcc/testsuite/ChangeLog:
2017-07-31 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-4-runnable.c: Fix dg argument that got
missed in commit 250746.
From-SVN: r250751
Richard Henderson [Mon, 31 Jul 2017 18:37:27 +0000 (11:37 -0700)]
Update myself in MAINTAINERS
From-SVN: r250750
Segher Boessenkool [Mon, 31 Jul 2017 17:00:57 +0000 (19:00 +0200)]
rs6000: Trailing comma warning in enum
* config/rs6000/rs6000.c (enum rs6000_reg_type): Delete trailing comma.
From-SVN: r250749
Joseph Myers [Mon, 31 Jul 2017 15:50:40 +0000 (16:50 +0100)]
* es.po, uk.po: Update.
From-SVN: r250747
Carl Love [Mon, 31 Jul 2017 15:42:01 +0000 (15:42 +0000)]
rs6000-c: Add support for built-in functions vector signed char vec_xl_be (signed long...
gcc/ChangeLog:
2017-07-31 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c: Add support for built-in functions
vector signed char vec_xl_be (signed long long, signed char *);
vector unsigned char vec_xl_be (signed long long, unsigned char *);
vector signed int vec_xl_be (signed long long, signed int *);
vector unsigned int vec_xl_be (signed long long, unsigned int *);
vector signed long long vec_xl_be (signed long long, signed long long *);
vector unsigned long long vec_xl_be (signed long long, unsigned long long *);
vector signed short vec_xl_be (signed long long, signed short *);
vector unsigned short vec_xl_be (signed long long, unsigned short *);
vector double vec_xl_be (signed long long, double *);
vector float vec_xl_be (signed long long, float *);
* config/rs6000/altivec.h (vec_xl_be): Add #define.
* config/rs6000/rs6000-builtin.def (XL_BE_V16QI, XL_BE_V8HI, XL_BE_V4SI,
XL_BE_V2DI, XL_BE_V4SF, XL_BE_V2DF, XL_BE): Add definitions for the builtins.
* config/rs6000/rs6000.c (altivec_expand_xl_be_builtin): Add function.
(altivec_expand_builtin): Add switch statement to call altivec_expand_xl_be
for each builtin.
(altivec_init_builtins): Add def_builtin for _builtin_vsx_le_be_v8hi,
__builtin_vsx_le_be_v4si, __builtin_vsx_le_be_v2di, __builtin_vsx_le_be_v4sf,
__builtin_vsx_le_be_v2df, __builtin_vsx_le_be_v16qi.
* doc/extend.texi: Update the built-in documentation file for the
new built-in functions.
gcc/testsuite/ChangeLog:
2017-07-31 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-4-runnable.c: Add test cases for the
new builtins.
From-SVN: r250746
H.J. Lu [Mon, 31 Jul 2017 14:59:24 +0000 (14:59 +0000)]
Compile pr79793-[12].c with -mtune=generic
pr79793-1.c and pr79793-2.c are failed when GCC is configured with
--with-cpu=slm since lea is used to adjust stack, instead of sub/add.
This patch uses -mtune=generic to always generate sub and add.
* gcc.target/i386/pr79793-1.c: Compile with -mtune=generic.
* gcc.target/i386/pr79793-2.c: Likewise.
From-SVN: r250745
Marek Polacek [Mon, 31 Jul 2017 13:44:16 +0000 (13:44 +0000)]
re PR libstdc++/81599 (Error in documentation of std::stack)
PR libstdc++/81599
* include/bits/stl_stack.h: Fix typo.
From-SVN: r250743
Uros Bizjak [Mon, 31 Jul 2017 13:11:59 +0000 (15:11 +0200)]
re PR target/25967 (Add attribute naked for x86)
PR target/25967
* config/i386/i386.c (ix86_allocate_stack_slots_for_args):
New function.
(TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): Define.
testsuite/ChangeLog:
PR target/25967
* gcc.target/i386/naked-3.c (dg-options): Use -O0.
(naked): Add attribute regparm(1) for x86_32 targets.
Add integer argument. Remove global "data" variable.
(main): Pass integer argument to naked function.
* gcc.target/i386/naked-4.c: New test.
From-SVN: r250742
Robin Dapp [Mon, 31 Jul 2017 12:02:33 +0000 (12:02 +0000)]
Add myself to MAINTAINERS.
From-SVN: r250741
Andreas Krebbel [Mon, 31 Jul 2017 11:31:09 +0000 (11:31 +0000)]
[Committed] S/390: Support z14 as CPU name.
With IBM z14 officially announced we can add support for z14 as
preferred CPU name. We still pass arch12 to Binutils in order to keep
older Binutils versions supported.
gcc/ChangeLog:
2017-07-31 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config.gcc: Add z14.
* config/s390/driver-native.c (s390_host_detect_local_cpu): Add
CPU model numbers for z13s and z14.
* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Replace
arch12 with z14.
* config/s390/s390-opts.h (enum processor_type): Rename
PROCESSOR_ARCH12 to PROCESSOR_3906_Z14.
* config/s390/s390.c (processor_table): Add field for CPU name to
be passed to Binutils.
(s390_asm_output_machine_for_arch): Use the new field in
processor_table for Binutils.
(s390_expand_builtin): Replace arch12 with z14.
(s390_issue_rate): Rename PROCESSOR_ARCH12 to PROCESSOR_3906_Z14.
(s390_get_sched_attrmask): Likewise.
(s390_get_unit_mask): Likewise.
* config/s390/s390.opt: Add z14 to processor_type enum.
From-SVN: r250739
Martin Jambor [Mon, 31 Jul 2017 11:18:31 +0000 (13:18 +0200)]
[PR 81477] Set versionable regardless of optimization level
2017-07-31 Martin Jambor <mjambor@suse.cz>
PR hsa/81477
* ipa-fnsummary.c (ipa_fn_summary_generate): Set versionable
regardless of optimization level.
From-SVN: r250738
Jan Hubicka [Mon, 31 Jul 2017 11:16:00 +0000 (13:16 +0200)]
Recover GOTO predictor.
2017-07-31 Jan Hubicka <hubicka@ucw.cz>
Martin Liska <mliska@suse.cz>
* c-typeck.c (c_finish_goto_label): Build gimple predict
stament.
2017-07-31 Jan Hubicka <hubicka@ucw.cz>
Martin Liska <mliska@suse.cz>
* predict.def: Remove old comment and adjust probability.
* gimplify.c (should_warn_for_implicit_fallthrough): Ignore
PREDICT statements.
2017-07-31 Jan Hubicka <hubicka@ucw.cz>
Martin Liska <mliska@suse.cz>
* gcc.dg/predict-15.c: New test.
* gcc.dg/tree-ssa/vrp24.c: Update scanned pattern.
2017-07-31 Jan Hubicka <hubicka@ucw.cz>
Martin Liska <mliska@suse.cz>
* pt.c (tsubst_copy): Copy PREDICT_EXPR.
* semantics.c (finish_goto_stmt): Build gimple predict
stament.
* constexpr.c (potential_constant_expression_1): Handle
PREDICT_EXPR.
Co-Authored-By: Martin Liska <mliska@suse.cz>
From-SVN: r250737
Uros Bizjak [Mon, 31 Jul 2017 10:22:41 +0000 (12:22 +0200)]
re PR target/25967 (Add attribute naked for x86)
PR target/25967
* config/i386/i386.c (ix86_function_naked): New function.
(ix86_can_use_return_insn_p): Return false for naked functions.
(ix86_expand_prologue): Skip prologue for naked functions.
(ix86_expand_epilogue): Skip epilogue for naked functions
and emit trap instruction.
(ix86_warn_func_return): New function.
(ix86_attribute_table): Add "naked" attribute specification.
(TARGET_WARN_FUNC_RETURN): Define.
* doc/extend.texi (x86 Function Attributes) <naked>: Document it.
testsuite/ChangeLog:
PR target/25967
* gcc.target/i386/naked-1.c: New test.
* gcc.target/i386/naked-2.c: Ditto.
* gcc.target/i386/naked-3.c: Ditto.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.c: Remove
do_test_body0 stub function, use attribute "naked" instead.
* gcc.dg/pr44290-1.c: Use naked_functions effective target.
* gcc.dg/pr44290-2.c: Ditto.
From-SVN: r250736