mesa.git
4 years agoradv: update VK_EXT_host_query_reset for Vulkan 1.2
Samuel Pitoiset [Tue, 15 Oct 2019 06:55:07 +0000 (08:55 +0200)]
radv: update VK_EXT_host_query_reset for Vulkan 1.2

Promoted to Vulkan 1.2 with the EXT suffix omitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: update VK_EXT_descriptor_indexing for Vulkan 1.2
Samuel Pitoiset [Tue, 26 Nov 2019 13:01:43 +0000 (14:01 +0100)]
radv: update VK_EXT_descriptor_indexing for Vulkan 1.2

Promoted to Vulkan 1.2 with the EXT suffix omitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoanv: Enable Vulkan 1.2 support
Iván Briano [Mon, 16 Sep 2019 22:41:45 +0000 (15:41 -0700)]
anv: Enable Vulkan 1.2 support

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: Implement the new core version property queries
Jason Ekstrand [Mon, 13 Jan 2020 19:44:16 +0000 (13:44 -0600)]
anv: Implement the new core version property queries

Vulkan 1.2 introduces some new structures to get the properties and
features of a device from extensions that were promoted to core in 1.1
and 1.2.  This commit implements the new property queries and makes all
of the corresponding extension queries map to them.

Reviewed-by: Iván Briano <ivan.briano@intel.com>
4 years agoanv: Implement the new core version feature queries
Jason Ekstrand [Mon, 13 Jan 2020 18:57:56 +0000 (12:57 -0600)]
anv: Implement the new core version feature queries

Vulkan 1.2 introduces some new structures to get the properties and
features of a device from extensions that were promoted to core in 1.1
and 1.2.  This commit implements the new feature queries and makes all
of the corresponding extension queries map to them.

Reviewed-by: Iván Briano <ivan.briano@intel.com>
4 years agoanv,nir: Lower quad_broadcast with dynamic index in NIR
Jason Ekstrand [Mon, 16 Dec 2019 16:43:18 +0000 (10:43 -0600)]
anv,nir: Lower quad_broadcast with dynamic index in NIR

This is required for the subgroupBroadcastDynamicId feature that was
added in Vulkan 1.2.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
4 years agoanv: Bump the patch version to 131
Jason Ekstrand [Wed, 15 Jan 2020 14:08:32 +0000 (08:08 -0600)]
anv: Bump the patch version to 131

4 years agovulkan/overlay: Fix for Vulkan 1.2
Samuel Pitoiset [Tue, 15 Oct 2019 07:22:30 +0000 (09:22 +0200)]
vulkan/overlay: Fix for Vulkan 1.2

v2 (Jason Ekstrand):
 - Add duplicate hooks for both the 1.2 and KHR versions of
   vkCmdDraw[Indexed]IndirectCount.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoturnip: Pretend to support Vulkan 1.2
Jason Ekstrand [Wed, 15 Jan 2020 14:34:06 +0000 (08:34 -0600)]
turnip: Pretend to support Vulkan 1.2

It doesn't really support any Vulkan properly yet so why not claim 1.2?
This was an easier way of fixing the build than trying to roll it
forward to a later version of ANV's entrypoint generator scripts.

4 years agovulkan: Update the XML and headers to 1.2.131
Jason Ekstrand [Wed, 15 Jan 2020 13:59:32 +0000 (07:59 -0600)]
vulkan: Update the XML and headers to 1.2.131

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
4 years agogitlab-ci: Stop using manual jobs for merge requests
Michel Dänzer [Mon, 13 Jan 2020 08:45:57 +0000 (09:45 +0100)]
gitlab-ci: Stop using manual jobs for merge requests

They were causing trouble with Marge Bot: The project settings require
that the pipeline succeeds before a merge request (MR) can be merged,
otherwise Marge doesn't wait for the pipeline to succeed before merging
an MR assigned to her. But Marge can't start manual jobs, so she would
always time out waiting for pipelines with manual jobs.

To avoid this, use these rules:
* Run the pipeline by default for MRs and main project branches changing
  any files affecting it.
* For other MRs, run a single dummy job which always succeeds.
* Don't run any jobs for main project branch changes (e.g. from an MR
  having been merged) not affecting the pipeline.
* Allow jobs to be started manually on branches of forked projects, as
  before.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3361>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3361>

4 years agoradeonsi: drop the negation from fmask_is_not_identity
Pierre-Eric Pelloux-Prayer [Fri, 20 Dec 2019 12:39:07 +0000 (13:39 +0100)]
radeonsi: drop the negation from fmask_is_not_identity

This change eases code reading ("fmask_is_identity = true" is clearer than
"fmask_is_not_identity = false").
Initialization is not changed so fmask_is_identity is false when a texture is
created.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>

4 years agoradeonsi: unbind image before compute clear
Pierre-Eric Pelloux-Prayer [Fri, 20 Dec 2019 12:33:42 +0000 (13:33 +0100)]
radeonsi: unbind image before compute clear

It's not used and avoid infinite recursion when used from si_compute_expand_fmask

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>

4 years agoradeonsi: make sure fmask expand is done if needed
Pierre-Eric Pelloux-Prayer [Thu, 19 Dec 2019 18:54:16 +0000 (19:54 +0100)]
radeonsi: make sure fmask expand is done if needed

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2248
Fixes: 095a58204d9 ("radeonsi: expand FMASK before MSAA image stores are used")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>

4 years agoradeonsi: fix fmask expand compute shader
Pierre-Eric Pelloux-Prayer [Thu, 19 Dec 2019 18:09:54 +0000 (19:09 +0100)]
radeonsi: fix fmask expand compute shader

'coord' variable was using TGSI_WRITEMASK_XYZ so subsequent uses of
TGSI_WRITEMASK_W were dropped.
The result for a 2 samples program was:

  0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy
  1: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA
  2: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA
  3: END

instead of the expected:

  0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy
  1: MOV TEMP[0].w, IMM[0].yyyy
  2: LOAD TEMP[1], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA
  3: MOV TEMP[0].w, IMM[0].zzzz
  4: LOAD TEMP[2], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA
  5: MOV TEMP[0].w, IMM[0].yyyy
  6: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA
  7: MOV TEMP[0].w, IMM[0].zzzz
  8: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA
  9: END

This fixes half of https://gitlab.freedesktop.org/mesa/mesa/issues/2248

Fixes: 095a58204d9 ("radeonsi: expand FMASK before MSAA image stores are used")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>

4 years agoegl/android: Restrict minimum triple buffering for android color_buffers
Nataraj Deshpande [Fri, 10 Jan 2020 16:58:00 +0000 (08:58 -0800)]
egl/android: Restrict minimum triple buffering for android color_buffers

The patch restricts triple buffering as minimum at driver for android
color_buffers in order to fix onscreen performance hit for T-Rex and
Manhattan.

v2: Update min_buffer check condition (Tapani Pälli)
v3: further code cleanup (Eric Engestrom)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2332
Fixes: 0661c357c60 ("egl/android: Update color_buffers querying for buffer age")
Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3384>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3384>

4 years agoanv: fix pipeline switch back for non pipelined states
Lionel Landwerlin [Tue, 14 Jan 2020 22:05:30 +0000 (00:05 +0200)]
anv: fix pipeline switch back for non pipelined states

Setting state base address can happen even before pipeline is
selected. Also we must ensure it is set to 3D for Gen12, we can't
switch back to an invalid pipeline value (UINT32_MAX).

v2: Reuse helpers (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b34422db5e66 ("anv: Implement Gen12 workaround for non pipelined state")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3396>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3396>

4 years agoradv/gfx10: simplify some duplicated NGG GS code
Samuel Pitoiset [Mon, 13 Jan 2020 08:17:47 +0000 (09:17 +0100)]
radv/gfx10: simplify some duplicated NGG GS code

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>

4 years agoradv/gfx10: enable all CUs if NGG is never used
Samuel Pitoiset [Mon, 13 Jan 2020 09:37:01 +0000 (10:37 +0100)]
radv/gfx10: enable all CUs if NGG is never used

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>

4 years agoradv: only use VkSamplerCreateInfo::compareOp if enabled
Samuel Pitoiset [Tue, 14 Jan 2020 17:03:29 +0000 (18:03 +0100)]
radv: only use VkSamplerCreateInfo::compareOp if enabled

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2350
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3392>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3392>

4 years agov3d: fix bug when checking result of syncobj fence import
Iago Toral Quiroga [Mon, 13 Jan 2020 14:42:46 +0000 (15:42 +0100)]
v3d: fix bug when checking result of syncobj fence import

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3383>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3383>

4 years agost/mesa: run st_nir_lower_tex_src_plane for lowered xyuv/ayuv
Jonathan Marek [Fri, 6 Sep 2019 13:30:25 +0000 (09:30 -0400)]
st/mesa: run st_nir_lower_tex_src_plane for lowered xyuv/ayuv

Has the effect of removing the nir_tex_src_plane for these formats too.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>

4 years agost/mesa: don't lower YUV when driver supports it natively
Jonathan Marek [Fri, 6 Sep 2019 13:26:08 +0000 (09:26 -0400)]
st/mesa: don't lower YUV when driver supports it natively

This fixes YUYV support on etnaviv.

Fixes: 7404833c "gallium: add handling for YUV planar surfaces"
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>

4 years agoradv: Disable VK_EXT_sample_locations on GFX10.
Bas Nieuwenhuizen [Mon, 30 Dec 2019 14:27:21 +0000 (15:27 +0100)]
radv: Disable VK_EXT_sample_locations on GFX10.

Workaround for https://gitlab.freedesktop.org/mesa/mesa/issues/2163

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3236>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3236>

4 years agost/mesa: implement EGLImageTargetTexStorage
Gurchetan Singh [Tue, 14 Jan 2020 02:03:23 +0000 (18:03 -0800)]
st/mesa: implement EGLImageTargetTexStorage

We can now support this extension.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>

4 years agost/mesa: refactor egl image binding a bit
Gurchetan Singh [Tue, 14 Jan 2020 01:56:41 +0000 (17:56 -0800)]
st/mesa: refactor egl image binding a bit

We'll need it for egl image tex storage.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>

4 years agost/dri: track if image is created by a dmabuf
Gurchetan Singh [Tue, 14 Jan 2020 00:07:38 +0000 (16:07 -0800)]
st/dri: track if image is created by a dmabuf

Will be used by EXT_EGL_image_storage later.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>

4 years agofreedreno/ir3: rename instructions
Rob Clark [Tue, 14 Jan 2020 22:46:11 +0000 (14:46 -0800)]
freedreno/ir3: rename instructions

Turns out this range of opcodes are more general purpose if/else/endif
instructions.

We should re-work tess to create a basic block and use normal flow
control.  And possibly (for a6xx+) optimize cases to use if/else/endif
when appropriate.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3398>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3398>

4 years agonir/algebraic: sqrt(x)*sqrt(x) -> fabs(x)
Elie Tournier [Fri, 24 May 2019 11:16:25 +0000 (12:16 +0100)]
nir/algebraic: sqrt(x)*sqrt(x) -> fabs(x)

total instructions in shared programs: 12840840 -> 12839341 (-0.01%)
instructions in affected programs: 122581 -> 121082 (-1.22%)
helped: 559
HURT: 0

total cycles in shared programs: 302505756 -> 302490031 (<.01%)
cycles in affected programs: 2022900 -> 2007175 (-0.78%)
helped: 1090
HURT: 130

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>

4 years agonir/algebraic: i2f(f2i()) -> trunc()
Elie Tournier [Thu, 23 May 2019 16:16:18 +0000 (17:16 +0100)]
nir/algebraic: i2f(f2i()) -> trunc()

total instructions in shared programs: 12840968 -> 12840784 (<.01%)
instructions in affected programs: 17886 -> 17702 (-1.03%)
helped: 77
HURT: 0

total cycles in shared programs: 302508917 -> 302505592 (<.01%)
cycles in affected programs: 249964 -> 246639 (-1.33%)
helped: 70
HURT: 7

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>

4 years agoi965: Reuse the new core glsl_count_dword_slots().
Eric Anholt [Mon, 6 Jan 2020 21:09:25 +0000 (13:09 -0800)]
i965: Reuse the new core glsl_count_dword_slots().

The only difference I could see was treating interfaces like structs.
Maintain that case.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>

4 years agomesa/st: Move the dword slot counting function to glsl_types as well.
Eric Anholt [Mon, 6 Jan 2020 20:00:57 +0000 (12:00 -0800)]
mesa/st: Move the dword slot counting function to glsl_types as well.

To implement NIR-to-TGSI, we need to be able to get the size of the
uniform variable for the TGSI declaration, not just the
.driver_location.  With its location in mesa/st, drivers couldn't link
to it from nir-to-tgsi.

This feels like a common enough function to want, so let's share it in
the core compiler.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>

4 years agomesa/prog: Reuse count_vec4_slots() from ir_to_mesa.
Eric Anholt [Mon, 6 Jan 2020 21:19:30 +0000 (13:19 -0800)]
mesa/prog: Reuse count_vec4_slots() from ir_to_mesa.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>

4 years agomesa/st: Move the vec4 type size function into core GLSL types.
Eric Anholt [Mon, 6 Jan 2020 19:37:38 +0000 (11:37 -0800)]
mesa/st: Move the vec4 type size function into core GLSL types.

The only bit that gallium varied on was handling of bindless.  We can
retain previous behavior for count_attribute_slots() by passing in
"true" (though I suspect this is just giving a silly answer to a silly
question), and delete our recursive function from mesa/st.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>

4 years agomesa/st: Deduplicate the NIR uniform lowering code.
Eric Anholt [Mon, 6 Jan 2020 19:47:03 +0000 (11:47 -0800)]
mesa/st: Deduplicate the NIR uniform lowering code.

Just a little refactor as I go looking at the type size functions.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>

4 years agoradeonsi: move PS LLVM code into si_shader_llvm_ps.c
Marek Olšák [Sat, 11 Jan 2020 02:19:46 +0000 (21:19 -0500)]
radeonsi: move PS LLVM code into si_shader_llvm_ps.c

This is an attempt to clean up si_shader.c.

v2: don't move code that is not specific to LLVM

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (v1)
4 years agoradeonsi: remove always constant ballot_mask_bits from si_llvm_context_init
Marek Olšák [Sat, 11 Jan 2020 01:25:28 +0000 (20:25 -0500)]
radeonsi: remove always constant ballot_mask_bits from si_llvm_context_init

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: fold si_create_function into si_llvm_create_func
Marek Olšák [Sat, 11 Jan 2020 01:22:47 +0000 (20:22 -0500)]
radeonsi: fold si_create_function into si_llvm_create_func

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: rename si_shader_create -> si_create_shader_variant for clarity
Marek Olšák [Sat, 11 Jan 2020 01:13:54 +0000 (20:13 -0500)]
radeonsi: rename si_shader_create -> si_create_shader_variant for clarity

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: rename si_compile_tgsi_main -> si_build_main_function
Marek Olšák [Fri, 10 Jan 2020 23:26:01 +0000 (18:26 -0500)]
radeonsi: rename si_compile_tgsi_main -> si_build_main_function

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: clean up si_shader_info
Marek Olšák [Fri, 10 Jan 2020 23:22:27 +0000 (18:22 -0500)]
radeonsi: clean up si_shader_info

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: merge si_tessctrl_info into si_shader_info
Marek Olšák [Fri, 10 Jan 2020 23:09:04 +0000 (18:09 -0500)]
radeonsi: merge si_tessctrl_info into si_shader_info

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: fork tgsi_shader_info and tgsi_tessctrl_info
Marek Olšák [Fri, 10 Jan 2020 23:06:56 +0000 (18:06 -0500)]
radeonsi: fork tgsi_shader_info and tgsi_tessctrl_info

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: rename si_shader_info -> si_shader_binary_info
Marek Olšák [Fri, 10 Jan 2020 22:04:33 +0000 (17:04 -0500)]
radeonsi: rename si_shader_info -> si_shader_binary_info

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: remove TGSI from comments
Marek Olšák [Fri, 10 Jan 2020 21:57:17 +0000 (16:57 -0500)]
radeonsi: remove TGSI from comments

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: rename DBG_NO_TGSI -> DBG_NO_NIR
Marek Olšák [Fri, 10 Jan 2020 21:50:41 +0000 (16:50 -0500)]
radeonsi: rename DBG_NO_TGSI -> DBG_NO_NIR

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoradeonsi: don't adjust depth and stencil PS output locations
Marek Olšák [Fri, 10 Jan 2020 21:47:04 +0000 (16:47 -0500)]
radeonsi: don't adjust depth and stencil PS output locations

this was for compatibility with TGSI

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agonir: Add missing nir_var_mem_global to various passes
Caio Marcelo de Oliveira Filho [Sat, 11 Jan 2020 07:52:30 +0000 (23:52 -0800)]
nir: Add missing nir_var_mem_global to various passes

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>

4 years agospirv: Handle PhysicalStorageBuffer in memory barriers
Caio Marcelo de Oliveira Filho [Wed, 8 Jan 2020 21:30:43 +0000 (13:30 -0800)]
spirv: Handle PhysicalStorageBuffer in memory barriers

PhysicalStorageBuffer is lowered to nir_var_mem_global, and
SPIR-V 1.5rev1 in section "3.25. Memory Semantics <id>" says

    UniformMemory

    Apply the memory-ordering constraints to StorageBuffer,
    PhysicalStorageBuffer, or Uniform Storage Class memory.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>

4 years agospirv: Drop EXT for PhysicalStorageBuffer symbols
Caio Marcelo de Oliveira Filho [Wed, 8 Jan 2020 21:25:59 +0000 (13:25 -0800)]
spirv: Drop EXT for PhysicalStorageBuffer symbols

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>

4 years agoaco: Flip s_cbranch / s_cselect to optimize out an s_not if possible.
Timur Kristóf [Tue, 19 Nov 2019 12:29:54 +0000 (13:29 +0100)]
aco: Flip s_cbranch / s_cselect to optimize out an s_not if possible.

When possible, get rid of an s_not when all it does is invert the SCC,
and its successor s_cbranch / s_cselect can be inverted instead.

Also modify some parts of instruction_selection to take advantage of
this feature.

Example:
s2: %3900,  s1: %3899:scc = s_andn2_b64 %0:exec, %406
s2: %3902 = s_cselect_b64 -1, 0, %3900:scc
s2: %407,  s1: %3903:scc = s_not_b64 %3902
s2: %3906,  s1: %3905:scc = s_and_b64 %407, %0:exec
p_cbranch_z %3905:scc
Can now be optimized to:
s2: %3900,  s1: %3899:scc = s_andn2_b64 %0:exec, %406
p_cbranch_nz %3900:scc

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
4 years agoaco: Optimize out s_and with exec, when used on uniform bitwise values.
Timur Kristóf [Fri, 3 Jan 2020 09:30:04 +0000 (10:30 +0100)]
aco: Optimize out s_and with exec, when used on uniform bitwise values.

Previously all booleans needed an s_and with exec when they were turned
into a scalar condition. However, this is not needed for uniform booleans.

v2 by Daniel Schürmann:
- Make the code more readable
v3 by Timur Kristóf:
- Fix regressions, make it work in wave32 mode

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
4 years agoaco: Don't skip combine_instruction when definitions[1] is used.
Timur Kristóf [Tue, 19 Nov 2019 12:38:34 +0000 (13:38 +0100)]
aco: Don't skip combine_instruction when definitions[1] is used.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
4 years agoaco: Allow optimizing vote_all and nir_op_iand.
Timur Kristóf [Mon, 18 Nov 2019 15:11:19 +0000 (16:11 +0100)]
aco: Allow optimizing vote_all and nir_op_iand.

By adding an extra instruction, we can replace the operands of
the s_cselect_b64, which allows it to get picked up by the
optimizer when it looks for uniform booleans.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
4 years agoaco: Implement 64-bit constant propagation.
Timur Kristóf [Wed, 13 Nov 2019 10:14:51 +0000 (11:14 +0100)]
aco: Implement 64-bit constant propagation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
4 years agopanfrost: Fix linear depth textures
Alyssa Rosenzweig [Fri, 10 Jan 2020 18:12:35 +0000 (13:12 -0500)]
panfrost: Fix linear depth textures

As pointed out by Boris, what we were calling PAN_LINEAR depth textures
was in fact u-interleaved tiled (!), but we never noticed since we
flipped the flag used for sampling, leading to all sorts of fun bugs
when attempting to directly acess depth textures from the CPU. Which
begs the question -- if what we called LINEAR was tiled, how do we
actually render linear depth textures? It turns out the flags for AFBC
form a mali_block_format 2-bit code just like their render-target
counterparts, so we can render to any of the above.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3393>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3393>

4 years agovulkan/wsi: Add a driconf option to force WSI to advertise BGRA8_UNORM first
Jason Ekstrand [Fri, 10 Jan 2020 19:16:25 +0000 (13:16 -0600)]
vulkan/wsi: Add a driconf option to force WSI to advertise BGRA8_UNORM first

The Aztec Ruins benchmark just grabs the first format in the list and
SRGB causes it to render washed out.  With this workaround, it renders
the same as OpenGL.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3350>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3350>

4 years agointel/fs: Only use SLM fence in compute shaders
Caio Marcelo de Oliveira Filho [Mon, 13 Jan 2020 23:48:12 +0000 (15:48 -0800)]
intel/fs: Only use SLM fence in compute shaders

Fixes: b390ff35170 ("intel/fs: Add support for SLM fence in Gen11")
Fixes: e142061399c ("intel/fs: Implement scoped_memory_barrier")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoradeonsi: actually enable VBOs in user SGPRs
Marek Olšák [Tue, 14 Jan 2020 02:10:09 +0000 (21:10 -0500)]
radeonsi: actually enable VBOs in user SGPRs

Fixes: 363b4027fcb - radeonsi: put up to 5 VBO descriptors into user SGPRs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
4 years agoradeonsi: fix assertion and other failures in si_emit_graphics_shader_pointers
Marek Olšák [Tue, 14 Jan 2020 02:09:35 +0000 (21:09 -0500)]
radeonsi: fix assertion and other failures in si_emit_graphics_shader_pointers

The assertion was failing.

Fixes: 363b4027fcb - radeonsi: put up to 5 VBO descriptors into user SGPRs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
4 years agonir/algebraic: a & ~(a >> 31) -> imax(a, 0)
Rhys Perry [Tue, 10 Dec 2019 16:20:56 +0000 (16:20 +0000)]
nir/algebraic: a & ~(a >> 31) -> imax(a, 0)

Found in some Doom shaders

Totals from affected shaders:
SGPRS: 30056 -> 30064 (0.03 %)
VGPRS: 28024 -> 28024 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 4278648 -> 4270852 (-0.18 %) bytes
Max Waves: 1476 -> 1476 (0.00 %)
Instructions: 835287 -> 833338 (-0.23 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3089>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3089>

4 years agoetnaviv: Fix assert when try to accumulate an invalid fd
Marco Felsch [Thu, 5 Dec 2019 16:04:11 +0000 (17:04 +0100)]
etnaviv: Fix assert when try to accumulate an invalid fd

Check if it is a valid fd before merging it to the context's fd.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3381>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3381>

4 years agopan/midgard: Fix midgard_compile.h includes
Afonso Bordado [Tue, 31 Dec 2019 15:08:49 +0000 (15:08 +0000)]
pan/midgard: Fix midgard_compile.h includes

We now use enum mali_format which is defined in panfrost-job.h

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3243>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3243>

4 years agoanv: only use VkSamplerCreateInfo::compareOp if enabled
Lionel Landwerlin [Tue, 14 Jan 2020 14:10:21 +0000 (16:10 +0200)]
anv: only use VkSamplerCreateInfo::compareOp if enabled

The spec says nothing about the validity of the compareOp field when
compareEnable is false.

v2: use vulkan enum to pick default value (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2350
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3387>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3387>

4 years agonir/sink,nir/move: move/sink nir_op_mov
Rhys Perry [Mon, 14 Oct 2019 16:15:04 +0000 (17:15 +0100)]
nir/sink,nir/move: move/sink nir_op_mov

Can uncover opportunities to move other instructions. This can increase
register usage, but that doesn't seem to actually happen.

This optimizes a pattern of a load_per_vertex_input followed by several
moves and then a store_output in a different block.

v2: add nir_move_copies to make it optional

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
Acked-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2420>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2420>

4 years agonir/sink,nir/move: move/sink load_per_vertex_input
Rhys Perry [Mon, 14 Oct 2019 16:15:37 +0000 (17:15 +0100)]
nir/sink,nir/move: move/sink load_per_vertex_input

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2420>

4 years agogitlab-ci: Consolidate container and build stages for LAVA
Tomeu Vizoso [Tue, 17 Dec 2019 10:50:14 +0000 (11:50 +0100)]
gitlab-ci: Consolidate container and build stages for LAVA

Use the normal build job to also prepare the artifacts for LAVA jobs.

For that, the build container needs to also build the test suites,
kernel, ramdisk, etc.

Then the build job will place the just-built Mesa in the ramdisk and the
test job can generate a LAVA job and point to those artifacts.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3295>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3295>

4 years agoaco: add integer min/max to can_swap_operands
Rhys Perry [Fri, 13 Dec 2019 16:17:21 +0000 (16:17 +0000)]
aco: add integer min/max to can_swap_operands

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: improve readfirstlane after uniform LDS loads
Rhys Perry [Wed, 11 Dec 2019 16:10:26 +0000 (16:10 +0000)]
aco: improve readfirstlane after uniform LDS loads

Totals from affected shaders:
SGPRS: 976 -> 968 (-0.82 %)
VGPRS: 580 -> 584 (0.69 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 106032 -> 103076 (-2.79 %) bytes
Max Waves: 237 -> 237 (0.00 %)
Instructions: 19452 -> 18740 (-3.66 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: replace extract_vector with copies
Rhys Perry [Mon, 9 Dec 2019 21:20:10 +0000 (21:20 +0000)]
aco: replace extract_vector with copies

Helps a small number of small shaders with situations like this:
a = p_create_vector ...
b = p_extract_vector a, 3
and copy propagation can't be done

Totals from affected shaders:
SGPRS: 14304 -> 14416 (0.78 %)
VGPRS: 8716 -> 6592 (-24.37 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 184664 -> 176888 (-4.21 %) bytes
Max Waves: 6260 -> 6260 (0.00 %)
Instructions: 35561 -> 33617 (-5.47 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: allow input modifiers on v_cndmask_b32
Rhys Perry [Tue, 10 Dec 2019 19:03:42 +0000 (19:03 +0000)]
aco: allow input modifiers on v_cndmask_b32

Totals from affected shaders:
SGPRS: 594099 -> 594019 (-0.01 %)
VGPRS: 441016 -> 441124 (0.02 %)
Spilled SGPRs: 101 -> 101 (0.00 %)
Spilled VGPRs: 18 -> 18 (0.00 %)
Code Size: 30266652 -> 30125256 (-0.47 %) bytes
Max Waves: 67044 -> 67057 (0.02 %)
Instructions: 5753097 -> 5726607 (-0.46 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: don't move literal to reg when making an instruction VOP3 on GFX10
Rhys Perry [Wed, 4 Dec 2019 19:28:43 +0000 (19:28 +0000)]
aco: don't move literal to reg when making an instruction VOP3 on GFX10

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 163398 -> 163398 (0.00 %)
VGPRS: 143820 -> 143820 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 13065744 -> 13044308 (-0.16 %) bytes
Max Waves: 18921 -> 18921 (0.00 %)
Instructions: 2514644 -> 2509285 (-0.21 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: add min(-max(), ) and max(-min(), ) optimization
Rhys Perry [Fri, 22 Nov 2019 20:32:11 +0000 (20:32 +0000)]
aco: add min(-max(), ) and max(-min(), ) optimization

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: improve clamp optimization
Rhys Perry [Fri, 22 Nov 2019 17:50:29 +0000 (17:50 +0000)]
aco: improve clamp optimization

Not sure why it checked the use count, it doesn't apply the constants.

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 269409 -> 269745 (0.12 %)
VGPRS: 238120 -> 238132 (0.01 %)
Spilled SGPRs: 305 -> 305 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 22908584 -> 22904672 (-0.02 %) bytes
Max Waves: 20217 -> 20217 (0.00 %)
Instructions: 4275312 -> 4263869 (-0.27 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 155409 -> 155233 (-0.11 %)
VGPRS: 153072 -> 153072 (0.00 %)
Spilled SGPRs: 269 -> 269 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 14650824 -> 14650396 (-0.00 %) bytes
Max Waves: 9609 -> 9609 (0.00 %)
Instructions: 2762802 -> 2755517 (-0.26 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: fix clamp optimization
Rhys Perry [Fri, 22 Nov 2019 20:58:59 +0000 (20:58 +0000)]
aco: fix clamp optimization

We can't do the optimization if there are neg/abs in-between.

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: improve creation of v_madmk_f32/v_madak_f32
Rhys Perry [Fri, 22 Nov 2019 15:18:38 +0000 (15:18 +0000)]
aco: improve creation of v_madmk_f32/v_madak_f32

Using needs_vop3 check was flawed because it would only combine the
literal if the first operand is the literal. If the second or third
operand is the literal, then needs_vop3 will be true and the literal will
not be combined.

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 782051 -> 782051 (0.00 %)
VGPRS: 630048 -> 630048 (0.00 %)
Spilled SGPRs: 195 -> 195 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 54743740 -> 54585548 (-0.29 %) bytes
Max Waves: 67340 -> 67340 (0.00 %)
Instructions: 10182030 -> 10182030 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 701990 -> 699590 (-0.34 %)
VGPRS: 566632 -> 566784 (0.03 %)
Spilled SGPRs: 218 -> 218 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 49173564 -> 49007856 (-0.34 %) bytes
Max Waves: 59650 -> 59612 (-0.06 %)
Instructions: 9315135 -> 9293330 (-0.23 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: take advantage of GFX10's constant bus limit and VOP3 literals
Rhys Perry [Wed, 20 Nov 2019 16:42:17 +0000 (16:42 +0000)]
aco: take advantage of GFX10's constant bus limit and VOP3 literals

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 2397159 -> 2392494 (-0.19 %)
VGPRS: 1756036 -> 1753920 (-0.12 %)
Spilled SGPRs: 461 -> 470 (1.95 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 110287304 -> 109946304 (-0.31 %) bytes
Max Waves: 318341 -> 318475 (0.04 %)
Instructions: 21019327 -> 20533618 (-2.31 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 0 -> 0 (0.00 %) bytes
Max Waves: 0 -> 0 (0.00 %)
Instructions: 0 -> 0 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: allow an extra SGPR with multiple uses to be applied to VOP3
Rhys Perry [Fri, 22 Nov 2019 13:47:54 +0000 (13:47 +0000)]
aco: allow an extra SGPR with multiple uses to be applied to VOP3

This is in a separate patch from the apply_sgprs() rewrite so that the
rewrite can be more easily tested.

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 3056 -> 3056 (0.00 %)
VGPRS: 1632 -> 1632 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 156468 -> 156304 (-0.10 %) bytes
Max Waves: 288 -> 288 (0.00 %)
Instructions: 29510 -> 29469 (-0.14 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 2984 -> 2984 (0.00 %)
VGPRS: 1616 -> 1616 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 156132 -> 155968 (-0.11 %) bytes
Max Waves: 289 -> 289 (0.00 %)
Instructions: 29426 -> 29385 (-0.14 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: allow applying two sgprs to an instruction
Rhys Perry [Fri, 22 Nov 2019 13:47:08 +0000 (13:47 +0000)]
aco: allow applying two sgprs to an instruction

We could create VALU instructions which read two sgprs, but only if isel
created an instruction which already read one of them.

This change is in a separate patch from the apply_sgprs() rewrite so that
it can be tested if the rewrite affected anything.

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 216 -> 216 (0.00 %)
VGPRS: 64 -> 64 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 1756 -> 1708 (-2.73 %) bytes
Max Waves: 120 -> 120 (0.00 %)
Instructions: 312 -> 300 (-3.85 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 216 -> 216 (0.00 %)
VGPRS: 64 -> 64 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 1784 -> 1736 (-2.69 %) bytes
Max Waves: 120 -> 120 (0.00 %)
Instructions: 319 -> 307 (-3.76 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: follow through temporary when merging tests into constant comparisons
Rhys Perry [Fri, 22 Nov 2019 14:17:27 +0000 (14:17 +0000)]
aco: follow through temporary when merging tests into constant comparisons

This can happen with v_mov_b32(s_mov_b32(literal))

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 632 -> 632 (0.00 %)
VGPRS: 492 -> 492 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 77488 -> 76928 (-0.72 %) bytes
Max Waves: 67 -> 67 (0.00 %)
Instructions: 14426 -> 14332 (-0.65 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 632 -> 632 (0.00 %)
VGPRS: 492 -> 492 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 77512 -> 76952 (-0.72 %) bytes
Max Waves: 67 -> 67 (0.00 %)
Instructions: 14432 -> 14338 (-0.65 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: be more careful with literals in combine_salu_{n2,lshl_add}
Rhys Perry [Fri, 22 Nov 2019 14:34:24 +0000 (14:34 +0000)]
aco: be more careful with literals in combine_salu_{n2,lshl_add}

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: add check_vop3_operands()
Rhys Perry [Fri, 22 Nov 2019 14:50:41 +0000 (14:50 +0000)]
aco: add check_vop3_operands()

This will be useful when taking advantage of GFX10 features.

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: rewrite apply_sgprs()
Rhys Perry [Fri, 22 Nov 2019 14:55:25 +0000 (14:55 +0000)]
aco: rewrite apply_sgprs()

This will make it easier to apply two different sgprs (for GFX10) or apply
the same sgpr twice (just remove the break).

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: rewrite literal combining
Rhys Perry [Fri, 22 Nov 2019 13:43:39 +0000 (13:43 +0000)]
aco: rewrite literal combining

Should make taking advantage of GFX10's increased constant bus limit and
VOP3 literals easier.

No pipeline-db changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: improve can_use_VOP3()
Rhys Perry [Fri, 22 Nov 2019 15:00:04 +0000 (15:00 +0000)]
aco: improve can_use_VOP3()

No pipeline-db changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: combine two sgprs into a VALU if they're the same
Rhys Perry [Wed, 20 Nov 2019 16:31:43 +0000 (16:31 +0000)]
aco: combine two sgprs into a VALU if they're the same

This was supposed to be done before but it wasn't done correctly and
everywhere.

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 784680 -> 786128 (0.18 %)
VGPRS: 574012 -> 573892 (-0.02 %)
Spilled SGPRs: 461 -> 461 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 45477088 -> 45478172 (0.00 %) bytes
Max Waves: 81294 -> 81277 (-0.02 %)
Instructions: 8657970 -> 8622483 (-0.41 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 780664 -> 782072 (0.18 %)
VGPRS: 573880 -> 573760 (-0.02 %)
Spilled SGPRs: 629 -> 629 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 45445244 -> 45448340 (0.01 %) bytes
Max Waves: 81178 -> 81161 (-0.02 %)
Instructions: 8649902 -> 8614918 (-0.40 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: apply literals to split mads
Rhys Perry [Wed, 20 Nov 2019 19:09:25 +0000 (19:09 +0000)]
aco: apply literals to split mads

Removing the return is also needed to apply literals to mads (which can be
done on GFX10).

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 368787 -> 367555 (-0.33 %)
VGPRS: 312436 -> 312448 (0.00 %)
Spilled SGPRs: 461 -> 461 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 26113388 -> 26098260 (-0.06 %) bytes
Max Waves: 35982 -> 35982 (0.00 %)
Instructions: 5038670 -> 5028941 (-0.19 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 369843 -> 368659 (-0.32 %)
VGPRS: 317224 -> 317196 (-0.01 %)
Spilled SGPRs: 629 -> 629 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 26310540 -> 26295156 (-0.06 %) bytes
Max Waves: 36324 -> 36326 (0.01 %)
Instructions: 5073957 -> 5064164 (-0.19 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agoaco: update IR validator
Rhys Perry [Mon, 25 Nov 2019 16:12:44 +0000 (16:12 +0000)]
aco: update IR validator

GFX10 increased the constant bus limit and allowed literals on VOP3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>

4 years agonir/lower_gs_intrinsics: add option for per-stream counts
Rhys Perry [Tue, 15 Oct 2019 15:46:02 +0000 (16:46 +0100)]
nir/lower_gs_intrinsics: add option for per-stream counts

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2422>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2422>

4 years agonir/divergence: handle load_primitive_id in GS
Rhys Perry [Mon, 14 Oct 2019 16:03:07 +0000 (17:03 +0100)]
nir/divergence: handle load_primitive_id in GS

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2323>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2323>

4 years agomesa/st: use float literals
Erik Faye-Lund [Tue, 24 Sep 2019 13:51:13 +0000 (15:51 +0200)]
mesa/st: use float literals

This removes a warning on MSVC.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
4 years agogallium: fix a warning
Erik Faye-Lund [Mon, 23 Sep 2019 11:36:45 +0000 (13:36 +0200)]
gallium: fix a warning

On some platforms (like Win64), unsigned long is 32-bit, so the first
cast doesn't do anything, and the compiler complains about an implicit
cast to a smaller type. So let's cast to an uintptr_t instead first,
as that's large enough on all platforms.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
4 years agost/wgl: eliminate implicit cast warning
Erik Faye-Lund [Fri, 20 Sep 2019 14:07:47 +0000 (16:07 +0200)]
st/wgl: eliminate implicit cast warning

I get warnings on MSVC for these implicit casts. Let's use explicit
casts instead.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
4 years agoutil: initialize float-array with float-literals
Erik Faye-Lund [Fri, 20 Sep 2019 14:04:06 +0000 (16:04 +0200)]
util: initialize float-array with float-literals

We currently initialize this float-array with double-literals. Some
compilers generate warnings for this, so let's switch these to
float-literals instead.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
4 years agoanv: Implement Gen12 workaround for non pipelined state
Lionel Landwerlin [Mon, 13 Jan 2020 15:50:36 +0000 (17:50 +0200)]
anv: Implement Gen12 workaround for non pipelined state

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3365>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3365>

4 years agoiris: Implement Gen12 workaround for non pipelined state
Lionel Landwerlin [Mon, 13 Jan 2020 15:50:06 +0000 (17:50 +0200)]
iris: Implement Gen12 workaround for non pipelined state

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3365>

4 years agolima: add new findings to texture descriptor
Vasily Khoruzhick [Sun, 12 Jan 2020 06:23:36 +0000 (22:23 -0800)]
lima: add new findings to texture descriptor

Lower 8 bits of unknown_1_3 seems to be min_lod,
rest of 4 bits + miplevels are max_lod and min_mipfilter seems to be
lod bias. All are in fixed format with 4 bit integer and 4 bit fraction,
lod_bias also has sign bit.

Blob also seems to do some magic with lod_bias if min filter is nearest --
it adds 0.5 to lod_bias in this case. Same story when all filters are
nearest and mipmapping is enabled, but in this case it subtracts 1/16
from lod_bias.

Fixes 134 dEQP tests in dEQP-GLES2.functional.texture.*

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3359>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3359>

4 years agointel: Use similar brand strings to the Windows drivers
Kenneth Graunke [Tue, 17 Dec 2019 08:51:20 +0000 (00:51 -0800)]
intel: Use similar brand strings to the Windows drivers

This updates our product name strings to match the ones reported
by the Windows driver, which is typically the marketing name.

We retain a platform abbreviation and GT level in parenthesis so that
we're able to distinguish similar parts more easily, helping us better
understand at a glance which GPU a bug reporter has.

Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371>

4 years agoiris: Simplify iris_get_renderer_string()
Kenneth Graunke [Tue, 17 Dec 2019 10:57:55 +0000 (02:57 -0800)]
iris: Simplify iris_get_renderer_string()

We use gen_get_device_name() instead of PCI ID list munging.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371>

4 years agoi965: Simplify brw_get_renderer_string()
Kenneth Graunke [Tue, 17 Dec 2019 09:00:14 +0000 (01:00 -0800)]
i965: Simplify brw_get_renderer_string()

This stops using driGetRendererString() in favor of a simple snprintf().
This should have the same functionality on 64-bit systems, but drops
a "x86/MMX/SSE2" suffix on 32-bit systems.  (People shouldn't be using
the GL_RENDERER string to check for CPU features...)

We also use gen_get_device_name() instead of PCI ID list munging.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371>