yosys.git
7 years agoMinor changes to opt_demorgan requested during code review
Andrew Zonenberg [Thu, 14 Sep 2017 17:34:45 +0000 (10:34 -0700)]
Minor changes to opt_demorgan requested during code review

7 years agoInitial version of opt_demorgan is functioning for AND/OR gates. Not the prettiest...
Andrew Zonenberg [Tue, 12 Sep 2017 00:18:26 +0000 (17:18 -0700)]
Initial version of opt_demorgan is functioning for AND/OR gates. Not the prettiest results for bus inputs, but this can be improved

7 years agoAdd src attribute to extra cells generated by proc_dlatch
Clifford Wolf [Sat, 9 Sep 2017 08:18:08 +0000 (10:18 +0200)]
Add src attribute to extra cells generated by proc_dlatch

7 years agoAdd src arguments to all cell creator helper functions
Clifford Wolf [Sat, 9 Sep 2017 08:16:48 +0000 (10:16 +0200)]
Add src arguments to all cell creator helper functions

7 years agoFurther improve extract_fa (but still buggy)
Clifford Wolf [Sat, 2 Sep 2017 14:37:42 +0000 (16:37 +0200)]
Further improve extract_fa (but still buggy)

7 years agoMerge pull request #406 from azonenberg/coolrunner-techmap
Clifford Wolf [Sat, 2 Sep 2017 11:43:51 +0000 (13:43 +0200)]
Merge pull request #406 from azonenberg/coolrunner-techmap

Coolrunner techmapping improvements

7 years agoMerge pull request #405 from azonenberg/gpak-refactoring
Clifford Wolf [Sat, 2 Sep 2017 11:43:36 +0000 (13:43 +0200)]
Merge pull request #405 from azonenberg/gpak-refactoring

Gpak refactoring

7 years agocoolrunner2: Finish fixing special-use p-terms
Robert Ou [Thu, 31 Aug 2017 00:02:28 +0000 (17:02 -0700)]
coolrunner2: Finish fixing special-use p-terms

7 years agocoolrunner2: Generate a feed-through AND term when necessary
Robert Ou [Wed, 30 Aug 2017 23:46:32 +0000 (16:46 -0700)]
coolrunner2: Generate a feed-through AND term when necessary

7 years agocoolrunner2: Initial fixes for special p-terms
Robert Ou [Wed, 30 Aug 2017 23:38:04 +0000 (16:38 -0700)]
coolrunner2: Initial fixes for special p-terms

Certain signals can only be controlled by a product term and not a
sum-of-products. Do the initial work for fixing this.

7 years agocoolrunner2: Fix mapping of flip-flops
Robert Ou [Tue, 29 Aug 2017 21:56:02 +0000 (14:56 -0700)]
coolrunner2: Fix mapping of flip-flops

7 years agocoolrunner2: Combine some for loops together
Robert Ou [Tue, 29 Aug 2017 21:55:45 +0000 (14:55 -0700)]
coolrunner2: Combine some for loops together

7 years agoFixed typo in error message
Andrew Zonenberg [Fri, 1 Sep 2017 13:41:39 +0000 (06:41 -0700)]
Fixed typo in error message

7 years agoAdded blackbox $__COUNT_ cell model
Andrew Zonenberg [Tue, 29 Aug 2017 21:17:29 +0000 (14:17 -0700)]
Added blackbox $__COUNT_ cell model

7 years agoRefactoring: moved modules still in cells_sim to cells_sim_wip
Andrew Zonenberg [Tue, 29 Aug 2017 20:23:23 +0000 (13:23 -0700)]
Refactoring: moved modules still in cells_sim to cells_sim_wip

7 years agoMerge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Fri, 1 Sep 2017 10:35:09 +0000 (12:35 +0200)]
Merge branch 'master' of github.com:cliffordwolf/yosys

7 years agoMerge branch 'ChipScan-master'
Clifford Wolf [Fri, 1 Sep 2017 10:33:47 +0000 (12:33 +0200)]
Merge branch 'ChipScan-master'

7 years agoUpdate more stuff to use get_src_attribute() and set_src_attribute()
Clifford Wolf [Fri, 1 Sep 2017 10:26:55 +0000 (12:26 +0200)]
Update more stuff to use get_src_attribute() and set_src_attribute()

7 years agoupdated to use get_src_attribute() and set_src_attribute().
Jason Lowdermilk [Thu, 31 Aug 2017 20:51:56 +0000 (14:51 -0600)]
updated to use get_src_attribute() and set_src_attribute().

7 years agoMerge pull request #399 from azonenberg/counter-extraction
Clifford Wolf [Thu, 31 Aug 2017 15:54:28 +0000 (17:54 +0200)]
Merge pull request #399 from azonenberg/counter-extraction

Refactored counter extraction to not be GreenPAK specific. Fixes #396.

7 years agoMerge branch 'counter-extraction' of github.com:azonenberg/yosys into counter-extraction
Andrew Zonenberg [Thu, 31 Aug 2017 01:16:15 +0000 (18:16 -0700)]
Merge branch 'counter-extraction' of github.com:azonenberg/yosys into counter-extraction

7 years agoextract_counter: Added optimizations to remove unused high-order bits
Andrew Zonenberg [Thu, 31 Aug 2017 01:14:22 +0000 (18:14 -0700)]
extract_counter: Added optimizations to remove unused high-order bits

7 years agoMerge branch 'master' of https://github.com/cliffordwolf/yosys into counter-extraction
Andrew Zonenberg [Wed, 30 Aug 2017 23:40:41 +0000 (16:40 -0700)]
Merge branch 'master' of https://github.com/cliffordwolf/yosys into counter-extraction

7 years agoextract_counter: Minor changes requested to comply with upstream policy, fixed a...
Andrew Zonenberg [Wed, 30 Aug 2017 23:27:18 +0000 (16:27 -0700)]
extract_counter: Minor changes requested to comply with upstream policy, fixed a few typos

7 years agoMerge remote-tracking branch 'upstream/master'
Jason Lowdermilk [Wed, 30 Aug 2017 17:47:06 +0000 (11:47 -0600)]
Merge remote-tracking branch 'upstream/master'

7 years agofix indent level
Jason Lowdermilk [Wed, 30 Aug 2017 17:46:41 +0000 (11:46 -0600)]
fix indent level

7 years agoMerge pull request #397 from azonenberg/gpak-libfixes
Clifford Wolf [Wed, 30 Aug 2017 09:53:44 +0000 (11:53 +0200)]
Merge pull request #397 from azonenberg/gpak-libfixes

Reformatted GP_COUNTx_ADV resets to avoid Yosys thinking that they're…

7 years agoAdd {get,set}_src_attribute() methods on RTLIL::AttrObject
Clifford Wolf [Wed, 30 Aug 2017 09:39:11 +0000 (11:39 +0200)]
Add {get,set}_src_attribute() methods on RTLIL::AttrObject

7 years agoAdd support for source line tracking through synthesis phase
Jason Lowdermilk [Tue, 29 Aug 2017 20:46:35 +0000 (14:46 -0600)]
Add support for source line tracking through synthesis phase

7 years agoFinished refactoring counter extraction to be nice and generic. Implemented techmappi...
Andrew Zonenberg [Tue, 29 Aug 2017 05:13:36 +0000 (22:13 -0700)]
Finished refactoring counter extraction to be nice and generic. Implemented techmapping from $__COUNT_ to GP_COUNTx cells.

7 years agoRefactored extract_counter to be generic vs GreenPAK specific
Andrew Zonenberg [Tue, 29 Aug 2017 04:48:20 +0000 (21:48 -0700)]
Refactored extract_counter to be generic vs GreenPAK specific

7 years agoRefactoring: Renamed greenpak4_counters pass to extract_counter, moved it to techmap...
Andrew Zonenberg [Tue, 29 Aug 2017 03:52:08 +0000 (20:52 -0700)]
Refactoring: Renamed greenpak4_counters pass to extract_counter, moved it to techmap/ since it's going to become a generic pass

7 years agoReformatted GP_COUNTx_ADV resets to avoid Yosys thinking that they're multi-edge...
Andrew Zonenberg [Mon, 28 Aug 2017 16:06:37 +0000 (09:06 -0700)]
Reformatted GP_COUNTx_ADV resets to avoid Yosys thinking that they're multi-edge-sensitive and getting confused.

7 years agoMerge branch 'azonenberg-recover-reduce'
Clifford Wolf [Mon, 28 Aug 2017 17:52:51 +0000 (19:52 +0200)]
Merge branch 'azonenberg-recover-reduce'

7 years agoRename recover_reduce to extract_reduce, fix args handling
Clifford Wolf [Mon, 28 Aug 2017 17:52:06 +0000 (19:52 +0200)]
Rename recover_reduce to extract_reduce, fix args handling

7 years agoMerge branch 'recover-reduce' of https://github.com/azonenberg/yosys into azonenberg...
Clifford Wolf [Mon, 28 Aug 2017 17:46:17 +0000 (19:46 +0200)]
Merge branch 'recover-reduce' of https://github.com/azonenberg/yosys into azonenberg-recover-reduce

7 years agoFurther improve extract_fa pass
Clifford Wolf [Mon, 28 Aug 2017 17:43:26 +0000 (19:43 +0200)]
Further improve extract_fa pass

7 years agoMerge pull request #392 from azonenberg/greenpak-portfixes
Clifford Wolf [Mon, 28 Aug 2017 13:29:58 +0000 (15:29 +0200)]
Merge pull request #392 from azonenberg/greenpak-portfixes

Fixed bug causing GP_SPI model to not synthesize

7 years agoFixed bug causing GP_SPI model to not synthesize
Andrew Zonenberg [Mon, 14 Aug 2017 22:32:07 +0000 (15:32 -0700)]
Fixed bug causing GP_SPI model to not synthesize

7 years agorecover_reduce: Update documentation
Robert Ou [Sun, 27 Aug 2017 09:19:19 +0000 (02:19 -0700)]
recover_reduce: Update documentation

The documentation now describes the commands performed in the deleted
recover_reduce script.

7 years agorecover_reduce: Reindent using tabs
Robert Ou [Sun, 27 Aug 2017 09:12:41 +0000 (02:12 -0700)]
recover_reduce: Reindent using tabs

7 years agorecover_reduce: Rename recover_reduce_core to recover_reduce
Robert Ou [Sun, 27 Aug 2017 09:01:32 +0000 (02:01 -0700)]
recover_reduce: Rename recover_reduce_core to recover_reduce

Clifford has commented on PR #387 stating that he does not like the
driver script and would prefer to only have the core script with
appropriate notes in the documentation.

Also rename to .cc (rather than .cpp) for consistency.

7 years agorecover_reduce: Add driver script for the $reduce_* recover feature
Robert Ou [Fri, 11 Aug 2017 09:00:33 +0000 (02:00 -0700)]
recover_reduce: Add driver script for the $reduce_* recover feature

Conflicts:
passes/techmap/Makefile.inc

7 years agorecover_reduce_core: Finish implementing the core function
Robert Ou [Fri, 11 Aug 2017 08:48:22 +0000 (01:48 -0700)]
recover_reduce_core: Finish implementing the core function

7 years agorecover_reduce_core: Initial commit
Robert Ou [Fri, 11 Aug 2017 07:40:31 +0000 (00:40 -0700)]
recover_reduce_core: Initial commit

Conflicts:
passes/techmap/Makefile.inc

7 years agoDon't track , ... contradictions through x/z-bits
Clifford Wolf [Fri, 25 Aug 2017 14:18:17 +0000 (16:18 +0200)]
Don't track , ... contradictions through x/z-bits

7 years agoAdd removing of redundant pairs of bits in ==, ===, !=, and !== to opt_expr
Clifford Wolf [Fri, 25 Aug 2017 14:02:15 +0000 (16:02 +0200)]
Add removing of redundant pairs of bits in ==, ===, !=, and !== to opt_expr

7 years agoMerge branch 'extract_fa'
Clifford Wolf [Fri, 25 Aug 2017 11:42:13 +0000 (13:42 +0200)]
Merge branch 'extract_fa'

7 years agoFurther improve extract_fa (seems to be fully functional now)
Clifford Wolf [Fri, 25 Aug 2017 11:41:54 +0000 (13:41 +0200)]
Further improve extract_fa (seems to be fully functional now)

7 years agoRename "adders" to "extract_fa"
Clifford Wolf [Fri, 25 Aug 2017 10:04:40 +0000 (12:04 +0200)]
Rename "adders" to "extract_fa"

7 years agoFix bug in write_smt2 (export logic driving hierarchical cells before exporting regs)
Clifford Wolf [Fri, 25 Aug 2017 09:44:48 +0000 (11:44 +0200)]
Fix bug in write_smt2 (export logic driving hierarchical cells before exporting regs)

7 years agoTowards more generic "adder" function extractor
Clifford Wolf [Wed, 23 Aug 2017 12:20:10 +0000 (14:20 +0200)]
Towards more generic "adder" function extractor

7 years agoAdd experimental adders pass
Clifford Wolf [Tue, 22 Aug 2017 11:48:55 +0000 (13:48 +0200)]
Add experimental adders pass

7 years agoAdd hashlib support for hashing of pools
Clifford Wolf [Tue, 22 Aug 2017 11:04:33 +0000 (13:04 +0200)]
Add hashlib support for hashing of pools

7 years agoAdd consteval support for $_ANDNOT_ and $_ORNOT_
Clifford Wolf [Tue, 22 Aug 2017 11:04:05 +0000 (13:04 +0200)]
Add consteval support for $_ANDNOT_ and $_ORNOT_

7 years agoRemove some dead code from fsm_map
Clifford Wolf [Mon, 21 Aug 2017 13:02:16 +0000 (15:02 +0200)]
Remove some dead code from fsm_map

7 years agoRename "singleton" pass to "uniquify"
Clifford Wolf [Sun, 20 Aug 2017 10:31:50 +0000 (12:31 +0200)]
Rename "singleton" pass to "uniquify"

7 years agoMore intuitive handling of "cd .." for singleton modules
Clifford Wolf [Fri, 18 Aug 2017 22:15:12 +0000 (00:15 +0200)]
More intuitive handling of "cd .." for singleton modules

7 years agoAdd "sim -zinit -rstlen"
Clifford Wolf [Fri, 18 Aug 2017 10:54:17 +0000 (12:54 +0200)]
Add "sim -zinit -rstlen"

7 years agoMerge branch 'sim'
Clifford Wolf [Fri, 18 Aug 2017 09:45:15 +0000 (11:45 +0200)]
Merge branch 'sim'

7 years agoAdd "sim" support for memories
Clifford Wolf [Fri, 18 Aug 2017 09:44:50 +0000 (11:44 +0200)]
Add "sim" support for memories

7 years agoAdd Const methods is_fully_zero(), is_fully_def(), and is_fully_undef()
Clifford Wolf [Fri, 18 Aug 2017 09:40:08 +0000 (11:40 +0200)]
Add Const methods is_fully_zero(), is_fully_def(), and is_fully_undef()

7 years agoAdd support for assert/assume/cover to "sim" command
Clifford Wolf [Fri, 18 Aug 2017 08:24:14 +0000 (10:24 +0200)]
Add support for assert/assume/cover to "sim" command

7 years agoAdd writeback mode to "sim" command
Clifford Wolf [Thu, 17 Aug 2017 13:54:51 +0000 (15:54 +0200)]
Add writeback mode to "sim" command

7 years agoImprove "sim" command
Clifford Wolf [Thu, 17 Aug 2017 10:27:08 +0000 (12:27 +0200)]
Improve "sim" command

7 years agoMerge pull request #386 from azonenberg/gpak-counters
Clifford Wolf [Wed, 16 Aug 2017 13:58:29 +0000 (15:58 +0200)]
Merge pull request #386 from azonenberg/gpak-counters

Bug fixes to GP_COUNTx and GP_PGEN cells in GreenPAK technology library

7 years agoAdd "sim" command skeleton
Clifford Wolf [Wed, 16 Aug 2017 11:05:21 +0000 (13:05 +0200)]
Add "sim" command skeleton

7 years agoFixed more issues with GreenPAK counter sim models
Andrew Zonenberg [Tue, 15 Aug 2017 07:50:31 +0000 (00:50 -0700)]
Fixed more issues with GreenPAK counter sim models

7 years agoUpdated PGEN model to have level triggered reset (matches actual hardware behavior
Andrew Zonenberg [Tue, 15 Aug 2017 00:15:56 +0000 (17:15 -0700)]
Updated PGEN model to have level triggered reset (matches actual hardware behavior

7 years agoFixed bug in GP_COUNTx model
Andrew Zonenberg [Mon, 14 Aug 2017 23:28:59 +0000 (16:28 -0700)]
Fixed bug in GP_COUNTx model

7 years agoFixed bug where GP_COUNTx_ADV would wrap even when KEEP was high
Andrew Zonenberg [Mon, 14 Aug 2017 23:08:54 +0000 (16:08 -0700)]
Fixed bug where GP_COUNTx_ADV would wrap even when KEEP was high

7 years agoMerge branch 'azonenberg-rmports'
Clifford Wolf [Tue, 15 Aug 2017 09:32:55 +0000 (11:32 +0200)]
Merge branch 'azonenberg-rmports'

7 years agoMostly coding style related fixes in rmports pass
Clifford Wolf [Tue, 15 Aug 2017 09:32:35 +0000 (11:32 +0200)]
Mostly coding style related fixes in rmports pass

7 years agoMerge branch 'rmports' of https://github.com/azonenberg/yosys into azonenberg-rmports
Clifford Wolf [Tue, 15 Aug 2017 09:19:55 +0000 (11:19 +0200)]
Merge branch 'rmports' of https://github.com/azonenberg/yosys into azonenberg-rmports

7 years agoMerge pull request #381 from azonenberg/countfix
Clifford Wolf [Mon, 14 Aug 2017 19:47:26 +0000 (21:47 +0200)]
Merge pull request #381 from azonenberg/countfix

Added better behavioral models for GreenPAK counters. Refactored cells_sim into two files so analog/mixed signal stuff is separate

7 years agoMerge pull request #383 from azonenberg/abcfnames
Clifford Wolf [Mon, 14 Aug 2017 19:46:17 +0000 (21:46 +0200)]
Merge pull request #383 from azonenberg/abcfnames

abc: Allow +/ filenames in the abc command

7 years agoMerge pull request #382 from azonenberg/jsoniofix
Clifford Wolf [Mon, 14 Aug 2017 19:45:54 +0000 (21:45 +0200)]
Merge pull request #382 from azonenberg/jsoniofix

json: Parse inout correctly rather than as an output

7 years agoMerge pull request #384 from azonenberg/crtechlib
Clifford Wolf [Mon, 14 Aug 2017 19:45:29 +0000 (21:45 +0200)]
Merge pull request #384 from azonenberg/crtechlib

CoolRunner-II technology library improvements

7 years agocoolrunner2: Add INVERT parameter to some BUFGs
Robert Ou [Mon, 7 Aug 2017 11:01:18 +0000 (04:01 -0700)]
coolrunner2: Add INVERT parameter to some BUFGs

7 years agocoolrunner2: Add FFs with clock enable to cells_sim.v
Robert Ou [Tue, 1 Aug 2017 18:58:01 +0000 (11:58 -0700)]
coolrunner2: Add FFs with clock enable to cells_sim.v

7 years agoabc: Allow +/ filenames in the abc command
Robert Ou [Fri, 11 Aug 2017 04:10:07 +0000 (21:10 -0700)]
abc: Allow +/ filenames in the abc command

7 years agojson: Parse inout correctly rather than as an output
Robert Ou [Mon, 7 Aug 2017 20:37:01 +0000 (13:37 -0700)]
json: Parse inout correctly rather than as an output

7 years agormports: Now remove ports from cell instances if we optimized them out of that cell
Andrew Zonenberg [Mon, 14 Aug 2017 18:44:05 +0000 (11:44 -0700)]
rmports: Now remove ports from cell instances if we optimized them out of that cell

7 years agoProcessModule is no longer virtual (why was it in the first place?)
Andrew Zonenberg [Mon, 14 Aug 2017 18:18:09 +0000 (11:18 -0700)]
ProcessModule is no longer virtual (why was it in the first place?)

7 years agormports now works on all modules in the design, not just the top.
Andrew Zonenberg [Mon, 14 Aug 2017 18:16:44 +0000 (11:16 -0700)]
rmports now works on all modules in the design, not just the top.

7 years agoUpdated Makefile to reflect opt_rmports being renamed to rmports
Andrew Zonenberg [Mon, 14 Aug 2017 18:04:56 +0000 (11:04 -0700)]
Updated Makefile to reflect opt_rmports being renamed to rmports

7 years agoRenamed opt_rmports pass to rmports
Andrew Zonenberg [Mon, 14 Aug 2017 18:00:18 +0000 (11:00 -0700)]
Renamed opt_rmports pass to rmports

7 years agoFixed typo in GP_COUNT8 sim model
Andrew Zonenberg [Fri, 11 Aug 2017 23:55:31 +0000 (16:55 -0700)]
Fixed typo in GP_COUNT8 sim model

7 years agoFixed typo in error message
Andrew Zonenberg [Tue, 8 Aug 2017 03:46:00 +0000 (20:46 -0700)]
Fixed typo in error message

7 years agoChanged LEVEL resets for GP_COUNTx to be properly synthesizeable
Andrew Zonenberg [Tue, 8 Aug 2017 03:42:19 +0000 (20:42 -0700)]
Changed LEVEL resets for GP_COUNTx to be properly synthesizeable

7 years agoChanged LEVEL resets to be edge triggered anyway
Andrew Zonenberg [Tue, 8 Aug 2017 03:33:08 +0000 (20:33 -0700)]
Changed LEVEL resets to be edge triggered anyway

7 years agoAdded level-triggered reset support to GP_COUNTx simulation models
Andrew Zonenberg [Tue, 8 Aug 2017 03:29:05 +0000 (20:29 -0700)]
Added level-triggered reset support to GP_COUNTx simulation models

7 years agoFixed undeclared "count" in GP_COUNT8_ADV
Andrew Zonenberg [Tue, 8 Aug 2017 03:21:55 +0000 (20:21 -0700)]
Fixed undeclared "count" in GP_COUNT8_ADV

7 years agoFixed undeclared "count" in GP_COUNT14_ADV
Andrew Zonenberg [Tue, 8 Aug 2017 03:21:18 +0000 (20:21 -0700)]
Fixed undeclared "count" in GP_COUNT14_ADV

7 years agoFixed typo in last commit
Andrew Zonenberg [Tue, 8 Aug 2017 03:20:17 +0000 (20:20 -0700)]
Fixed typo in last commit

7 years agoFinished initial GP_COUNT8/14/8_ADV/14_ADV sim models. Don't support clock divide...
Andrew Zonenberg [Tue, 8 Aug 2017 03:19:17 +0000 (20:19 -0700)]
Finished initial GP_COUNT8/14/8_ADV/14_ADV sim models. Don't support clock divide, but do everything else.

7 years agoFixed typo in COUNT8 model
Andrew Zonenberg [Mon, 7 Aug 2017 22:49:30 +0000 (15:49 -0700)]
Fixed typo in COUNT8 model

7 years agoMoved GP_POR out of digital cells b/c it has delays
Andrew Zonenberg [Sun, 6 Aug 2017 15:40:23 +0000 (08:40 -0700)]
Moved GP_POR out of digital cells b/c it has delays

7 years agoImproved cells_sim_digital model for GP_COUNT8
Andrew Zonenberg [Sun, 6 Aug 2017 00:33:44 +0000 (17:33 -0700)]
Improved cells_sim_digital model for GP_COUNT8

7 years agoRefactored GreenPAK4 cells_sim into cells_sim_ams and cells_sim_digital
Andrew Zonenberg [Sat, 5 Aug 2017 23:33:24 +0000 (16:33 -0700)]
Refactored GreenPAK4 cells_sim into cells_sim_ams and cells_sim_digital