Remove semicolon after do {} while (0) in DEF_SANITIZER_BUILTIN

2017-11-05  Tom de Vries  <tom@codesourcery.com>

PR other/82784
* asan.c (DEF_SANITIZER_BUILTIN_1): Factor out of ...
(DEF_SANITIZER_BUILTIN): ... here.
(initialize_sanitizer_builtins): Use DEF_SANITIZER_BUILTIN_1 instead of
DEF_SANITIZER_BUILTIN in if stmt.  Add missing semicolon.

From-SVN: r254425

[libcpp] Remove semicolon after do {} while (0) in BUF_APPEND

2017-11-05  Tom de Vries  <tom@codesourcery.com>

PR other/82784
* lex.c (BUF_APPEND): Remove semicolon after
"do {} while (0)".

From-SVN: r254424

Remove semicolon after ASM_OUTPUT_BEFORE_CASE_LABEL macro body

2017-11-05  Tom de Vries  <tom@codesourcery.com>

PR other/82784
* config/elfos.h (ASM_OUTPUT_BEFORE_CASE_LABEL): Remove semicolon after
macro body.
(ASM_OUTPUT_CASE_LABEL): Add semicolon after
ASM_OUTPUT_BEFORE_CASE_LABEL call.
* config/arc/arc.h (ASM_OUTPUT_BEFORE_CASE_LABEL): Remove semicolon
after macro body.
* config/m68k/m68kelf.h (ASM_OUTPUT_BEFORE_CASE_LABEL): Same.
* config/mips/mips.h (ASM_OUTPUT_BEFORE_CASE_LABEL): Same.
* config/v850/v850.h (ASM_OUTPUT_BEFORE_CASE_LABEL): Same.

From-SVN: r254423

[fortran] Remove semicolon after do {} while (0) in match macros

2017-11-05  Tom de Vries  <tom@codesourcery.com>

PR other/82784
* parse.c (match, matcha, matchs, matcho, matchds, matchdo): Remove
semicolon after "do {} while (0)".

From-SVN: r254422

[graphite] Remove semicolon after do {} while (0) in DEBUG_PRINT

2017-11-05  Tom de Vries  <tom@codesourcery.com>

PR other/82784
* graphite-scop-detection.c (DEBUG_PRINT): Remove semicolon after
"do {} while (0)".

From-SVN: r254421

[libquadmath] Remove semicolon after do {} while (0) in MPN_MUL_N_RECURSE

2017-11-05  Tom de Vries  <tom@codesourcery.com>

PR other/82784
* printf/gmp-impl.h (MPN_MUL_N_RECURSE): Remove semicolon after
"do {} while (0)".

From-SVN: r254420

[libsanitizer] Remove semicolon after do {} while (0) in macro body

2017-11-05  Tom de Vries  <tom@codesourcery.com>

PR other/82784
* asan/asan_poisoning.cc (CHECK_SMALL_REGION): Remove semicolon after
"do {} while (0)".
* lsan/lsan_common.cc (LOG_POINTERS, LOG_THREADS): Same.

From-SVN: r254419

RISC-V: Emit "i" suffix for instructions with immediate operands

This changes makes GCC asm output use instruction names that are
consistent with the RISC-V ISA manual.  The assembler accepts
immediate-operand instructions without the "i" suffix, so this all
worked before, it's just a bit cleaner to match the ISA manual more
closely.

gcc/ChangeLog

2017-10-03  Michael Clark  <michaeljclark@mac.com>

        * config/riscv/riscv.c (riscv_print_operand): Add a 'i' format.
        config/riscv/riscv.md (addsi3): Use 'i' for immediates.
        (adddi3): Likewise.
        (*addsi3_extended): Likewise.
        (*addsi3_extended2): Likewise.
        (<optab>si3): Likewise.
        (<optab>di3): Likewise.
        (<optab><mode>3): Likewise.
        (<*optabe>si3_internal): Likewise.
        (zero_extendqi<SUPERQI:mode>2): Likewise.
        (*add<mode>hi3): Likewise.
        (*xor<mode>hi3): Likewise.
        (<optab>di3): Likewise.
        (*<optab>si3_extend): Likewise.
        (*sge<u>_<X:mode><GPR:mode>): Likewise.
        (*slt<u>_<X:mode><GPR:mode>): Likewise.
        (*sle<u>_<X:mode><GPR:mode>): Likewise.

From-SVN: r254418

RISC-V: If -m[no-]strict-align is not passed, assume its value from -mtune

2017-11-04  Andrew Waterman  <andrew@sifive.com>

* config/riscv/riscv.c (riscv_option_override): Conditionally set
TARGET_STRICT_ALIGN based upon -mtune argument.

From-SVN: r254417

RISC-V: Set SLOW_BYTE_ACCESS=1

When implementing the RISC-V port, I took the name of this macro at
face value.  It appears we were mistaken in what this means, here's a
quote from the SPARC port that better describes what SLOW_BYTE_ACCESS
does

    /* Nonzero if access to memory by bytes is slow and undesirable.
       For RISC chips, it means that access to memory by bytes is no
       better than access by words when possible, so grab a whole word
       and maybe make use of that.  */

I've added the comment to our port as well.

See https://gcc.gnu.org/ml/gcc/2017-08/msg00202.html for more
discussion.  Thanks to Michael Clark and Andrew Pinski for the help!

gcc/ChangeLog

2017-11-04  Andrew Waterman  <andrew@sifive.com>

        * config/riscv/riscv.h (SLOW_BYTE_ACCESS): Change to 1.

From-SVN: r254416

Daily bump.

From-SVN: r254415

PR target/82002 Part 2: Correct non-immediate offset/invalid INSN

When we are realigning the stack pointer, making an ms_abi to sysv_abi
call and allocating 2GiB or more on the stack we end up with an invalid
INSN due to a non-immediate offset.  This occurs both with and without
-mcall-ms2sysv-xlogues.  Additionally, the stack allocation with
-mcall-ms2sysv-xlogues is ignoring (silently disabling) stack checking,
stack clash checking and probing.

This patch fixes these problems by:

1. No longer allocate stack space in ix86_emit_outlined_ms2sysv_save.
2. Rearrange where we emit SSE saves or stub call:
   a. Before frame allocation when offset from frame to save area is >= 2GiB.
   b. After frame allocation when frame is < 2GiB.  (Stack allocations
      prior to the stub call can't be combined with those afterwards, so
      this is better when possible.)
3. Modify choose_baseaddr to take an optional scratch_regno argument
   and never return rtx that cannot be used as an immediate.

gcc:
config/i386/i386.c (choose_basereg): Use optional scratch
register and add assertion.
(x86_emit_outlined_ms2sysv_save): Use scratch register when
needed, and don't allocate stack.
(ix86_expand_prologue): Rearrange where SSE saves/stub call is
emitted, correct wrong allocation with -mcall-ms2sysv-xlogues.
(ix86_emit_outlined_ms2sysv_restore): Fix non-immediate offsets.

gcc/testsuite:
gcc.target/i386/pr82002-2a.c: Change from xfail to fail.
gcc.target/i386/pr82002-2b.c: Likewise.

From-SVN: r254412

re PR libgcc/82635 (std::thread's join broken on FreeBSD with all GCCs >= 5)

2017-11-04  Andreas Tobler  <andreast@gcc.gnu.org>

    PR libgcc/82635
    * config/i386/freebsd-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Use a
    sysctl to determine whether we're in a trampoline.
    Keep the pattern matching method for systems without
    KERN_PROC_SIGTRAMP sysctl.

From-SVN: r254411

trans-expr.c (gfc_trans_assignment_1): Character kind conversion may create a loop variant temporary, too.

gcc/fortran/ChangeLog:

2017-11-04  Andre Vehreschild  <vehre@gcc.gnu.org>

* trans-expr.c (gfc_trans_assignment_1): Character kind conversion may
create a loop variant temporary, too.
* trans-intrinsic.c (conv_caf_send): Treat char arrays as arrays and
not as scalars.
* trans.c (get_array_span): Take the character kind into account when
doing pointer arithmetic.

gcc/testsuite/ChangeLog:

2017-11-04  Andre Vehreschild  <vehre@gcc.gnu.org>

* gfortran.dg/coarray/send_char_array_1.f90: New test.

From-SVN: r254407

re PR fortran/70330 (ICE with -Wextra -Wno-unused-dummy-argument and unused optional dummy argument)

2017-11-04  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/70330
* gfortran.dg/pr70330.f90: New test.

From-SVN: r254406

re PR fortran/29600 ([F03] MINLOC and MAXLOC take an optional KIND argument)

2017-11-04  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/29600
* gfortran.h (gfc_check_f): Replace fm3l with fm4l.
* intrinsic.h (gfc_resolve_maxloc): Add gfc_expr * to argument
list in protoytpe.
(gfc_resolve_minloc): Likewise.
* check.c (gfc_check_minloc_maxloc): Handle kind argument.
* intrinsic.c (add_sym_3_ml): Rename to
(add_sym_4_ml): and handle kind argument.
(add_function): Replace add_sym_3ml with add_sym_4ml and add
extra arguments for maxloc and minloc.
(check_specific): Change use of check.f3ml with check.f4ml.
* iresolve.c (gfc_resolve_maxloc): Handle kind argument. If
the kind is smaller than the smallest library version available,
use gfc_default_integer_kind and convert afterwards.
(gfc_resolve_minloc): Likewise.

2017-11-04  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/29600
* gfortran.dg/minmaxloc_8.f90: New test.

From-SVN: r254405

re PR fortran/81735 (double free or corruption (fasttop) error (SIGABRT) with character(:) and custom return type with allocatable)

2017-11-04  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/81735
* trans-decl.c (gfc_trans_deferred_vars): Do a better job of a
case where 'tmp' was used unititialized and remove TODO.

2017-11-04  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/81735
* gfortran.dg/pr81735.f90: New test.

From-SVN: r254404

re PR fortran/82796 (Private+equivalence in used module breaks compilation of pure function)

2017-11-01  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/82796
* resolve.c (resolve_equivalence): An entity in a common block within
  a module cannot appear in an equivalence statement if the entity is
with a pure procedure.

2017-11-01  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/82796
* gfortran.dg/equiv_pure.f90: New test.

From-SVN: r254403

Daily bump.

From-SVN: r254402

re PR target/82823 (ICE in ix86_expand_prologue, at config/i386/i386.c:13171 with -fstack-clash-protection)

PR target/82823
* g++.dg/torture/pr82823.C: New test.

From-SVN: r254398

Add BZ marker to a recent change

From-SVN: r254397

i386.c (ix86_emit_restore_reg_using_pop): Prototype.

* config/i386/i386.c (ix86_emit_restore_reg_using_pop): Prototype.
(ix86_adjust_stack_and_probe_stack_clash): Use a push/pop sequence
to probe at the start of a noreturn function.

* gcc.target/i386/stack-check-12.c: New test.

From-SVN: r254396

re PR tree-optimization/78821 (GCC7: Copying whole 32 bits structure field by field not optimised into copying whole 32 bits at once)

PR tree-optimization/78821
* gimple-ssa-store-merging.c: Update the file comment.
(MAX_STORE_ALIAS_CHECKS): Define.
(struct store_operand_info): New type.
(store_operand_info::store_operand_info): New constructor.
(struct store_immediate_info): Add rhs_code and ops data members.
(store_immediate_info::store_immediate_info): Add rhscode, op0r
and op1r arguments to the ctor, initialize corresponding data members.
(struct merged_store_group): Add load_align_base and load_align
data members.
(merged_store_group::merged_store_group): Initialize them.
(merged_store_group::do_merge): Update them.
(merged_store_group::apply_stores): Pick the constant for
encode_tree_to_bitpos from one of the two operands, or skip
encode_tree_to_bitpos if neither operand is a constant.
(class pass_store_merging): Add process_store method decl.  Remove
bool argument from terminate_all_aliasing_chains method decl.
(pass_store_merging::terminate_all_aliasing_chains): Remove
var_offset_p argument and corresponding handling.
(stmts_may_clobber_ref_p): New function.
(compatible_load_p): New function.
(imm_store_chain_info::coalesce_immediate_stores): Terminate group
if there is overlap and rhs_code is not INTEGER_CST.  For
non-overlapping stores terminate group if rhs is not mergeable.
(get_alias_type_for_stmts): Change first argument from
auto_vec<gimple *> & to vec<gimple *> &.  Add IS_LOAD, CLIQUEP and
BASEP arguments.  If IS_LOAD is true, look at rhs1 of the stmts
instead of lhs.  Compute *CLIQUEP and *BASEP in addition to the
alias type.
(get_location_for_stmts): Change first argument from
auto_vec<gimple *> & to vec<gimple *> &.
(struct split_store): Remove orig_stmts data member, add orig_stores.
(split_store::split_store): Create orig_stores rather than orig_stmts.
(find_constituent_stmts): Renamed to ...
(find_constituent_stores): ... this.  Change second argument from
vec<gimple *> * to vec<store_immediate_info *> *, push pointers
to info structures rather than the statements.
(split_group): Rename ALLOW_UNALIGNED argument to
ALLOW_UNALIGNED_STORE, add ALLOW_UNALIGNED_LOAD argument and handle
it.  Adjust find_constituent_stores caller.
(imm_store_chain_info::output_merged_store): Handle rhs_code other
than INTEGER_CST, adjust split_group, get_alias_type_for_stmts and
get_location_for_stmts callers.  Set MR_DEPENDENCE_CLIQUE and
MR_DEPENDENCE_BASE on the MEM_REFs if they are the same in all stores.
(mem_valid_for_store_merging): New function.
(handled_load): New function.
(pass_store_merging::process_store): New method.
(pass_store_merging::execute): Use process_store method.  Adjust
terminate_all_aliasing_chains caller.

* gcc.dg/store_merging_13.c: New test.
* gcc.dg/store_merging_14.c: New test.

From-SVN: r254391

2017-11-3  Steven G. Kargl  <kargl@gcc.gnu.org>

* gfortran.dg/large_real_kind_2.F90: Test passes on FreeBSD.  Remove
dg-xfail-if directive.

From-SVN: r254390

Improve aarch64_legitimate_constant_p

This patch further improves aarch64_legitimate_constant_p.  Allow all
integer, floating point and vector constants.  Allow label references
and non-anchor symbols with an immediate offset.  This allows such
constants to be rematerialized, resulting in smaller code and fewer stack
spills.  SPEC2006 codesize reduces by 0.08%, SPEC2017 by 0.13%.

    gcc/
* config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
Return true for more constants, symbols and label references.
(aarch64_valid_floating_const): Remove unused function.

From-SVN: r254388

msa.c: Add -fcommon to dg-options.

2017-11-03  Sandra Loosemore  <sandra@codesourcery.com>

gcc/testsuite/
* gcc.target/mips/msa.c: Add -fcommon to dg-options.

From-SVN: r254387

i386.c (ix86_expand_prologue): Tighten assert for int_registers_saved.

* config/i386/i386.c (ix86_expand_prologue): Tighten assert
for int_registers_saved.

From-SVN: r254386

re PR testsuite/82828 (i386/pr70263-2.c fail)

PR testsuite/82828
PR rtl-optimization/70263
* gcc.target/i386/pr70263-2.c: Fix invalid testcase.

From-SVN: r254385

re PR c++/82768 (ICE in synthesize_implicit_template_parm, at cp/parser.c:39338)

Fix PR82768

Forcing LR at the bottom of the frame caused a few test failures.
Since there are some cases that generate worse code, revert this
part, and the frame tests pass again.

    gcc/
PR target/82786
* config/aarch64/aarch64.c (aarch64_layout_frame):
Undo forcing of LR at bottom of frame.

From-SVN: r254384

cfganal.c (single_pred_edge_ignoring_loop_edges): New function extracted from tree-ssa-dom.c.

* cfganal.c (single_pred_edge_ignoring_loop_edges): New function
extracted from tree-ssa-dom.c.
* cfganal.h (single_pred_edge_ignoring_loop_edges): Prototype.
* tree-ssa-dom.c (single_incoming_edge_ignoring_loop_edges): Remove.
(record_equivalences_from_incoming_edge): Add additional argument
to single_pred_edge_ignoring_loop_edges call.
* tree-ssa-uncprop.c (single_incoming_edge_ignoring_loop_edges): Remove.
(uncprop_dom_walker::before_dom_children): Add additional argument
to single_pred_edge_ignoring_loop_edges call.
* tree-ssa-sccvn.c (sccvn_dom_walker::before_dom_children): Use
single_pred_edge_ignoring_loop_edges rather than open coding.
* tree-vrp.c (evrp_dom_walker::before_dom_children): Similarly.

From-SVN: r254383

Generalize -(-X) a little

2017-11-03  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* match.pd (-(-A)): Rewrite.

gcc/testsuite/
* gcc.dg/tree-ssa/negneg-1.c: New file.
* gcc.dg/tree-ssa/negneg-2.c: Likewise.
* gcc.dg/tree-ssa/negneg-3.c: Likewise.
* gcc.dg/tree-ssa/negneg-4.c: Likewise.

From-SVN: r254382

Define std::endian for C++2a (P0463R1)

* include/std/type_traits (endian): Define new enumeration type.
* testsuite/20_util/endian/1.cc: New test.

From-SVN: r254381

rs6000: Remove rs6000_emit_sISEL

Instead of calling rs6000_emit_sISEL, call rs6000_emit_int_cmove
directly, in the one place it is used.

* config/rs6000/rs60000-protos.h (rs6000_emit_sISEL): Delete.
(rs6000_emit_int_cmove): New declaration.
* config/rs6000/rs6000.c (rs6000_emit_int_cmove): Delete declaration.
(rs6000_emit_sISEL): Delete.
(rs6000_emit_int_cmove): Make non-static.
* config/rs6000/rs6000.md (cstore<mode>4): Use rs6000_emit_int_cmove
instead of rs6000_emit_sISEL.

From-SVN: r254380

asan.c (create_cond_insert_point): Maintain profile.

* asan.c (create_cond_insert_point): Maintain profile.
* ipa-utils.c (ipa_merge_profiles): Be sure only IPA profiles are
merged.
* basic-block.h (struct basic_block_def): Remove frequency.
(EDGE_FREQUENCY): Use to_frequency
* bb-reorder.c (push_to_next_round_p): Use only IPA counts for global
heuristics.
(find_traces): Update to use to_frequency.
(find_traces_1_round): Likewise; use only IPA counts.
(bb_to_key): Likewise.
(connect_traces): Use IPA counts only.
(copy_bb_p): Update to use to_frequency.
(fix_up_crossing_landing_pad): Likewise.
(sanitize_hot_paths): Likewise.
* bt-load.c (basic_block_freq): Likewise.
* cfg.c (init_flow): Set count_max to uninitialized.
(check_bb_profile): Remove frequencies; check counts.
(dump_bb_info): Do not dump frequencies.
(update_bb_profile_for_threading): Update counts only.
(scale_bbs_frequencies_int): Likewise.
(MAX_SAFE_MULTIPLIER): Remove.
(scale_bbs_frequencies_gcov_type): Update counts only.
(scale_bbs_frequencies_profile_count): Update counts only.
(scale_bbs_frequencies): Update counts only.
* cfg.h (struct control_flow_graph): Add count-max.
(update_bb_profile_for_threading): Update prototype.
* cfgbuild.c (find_bb_boundaries): Do not update frequencies.
(find_many_sub_basic_blocks): Likewise.
* cfgcleanup.c (try_forward_edges): Likewise.
(try_crossjump_to_edge): Likewise.
* cfgexpand.c (expand_gimple_cond): Likewise.
(expand_gimple_tailcall): Likewise.
(construct_init_block): Likewise.
(construct_exit_block): Likewise.
* cfghooks.c (verify_flow_info): Check consistency of counts.
(dump_bb_for_graph): Do not dump frequencies.
(split_block_1): Do not update frequencies.
(split_edge): Do not update frequencies.
(make_forwarder_block): Do not update frequencies.
(duplicate_block): Do not update frequencies.
(account_profile_record): Do not update frequencies.
* cfgloop.c (find_subloop_latch_edge_by_profile): Use IPA counts
for global heuristics.
* cfgloopanal.c (average_num_loop_insns): Update to use to_frequency.
(expected_loop_iterations_unbounded): Use counts only.
* cfgloopmanip.c (scale_loop_profile): Simplify.
(create_empty_loop_on_edge): Simplify
(loopify): Simplify
(duplicate_loop_to_header_edge): Simplify
* cfgrtl.c (force_nonfallthru_and_redirect): Update profile.
(update_br_prob_note): Take care of removing note when profile
becomes undefined.
(relink_block_chain): Do not dump frequency.
(rtl_account_profile_record): Use to_frequency.
* cgraph.c (symbol_table::create_edge): Convert count to ipa count.
(cgraph_edge::redirect_call_stmt_to_calle): Conver tcount to ipa count.
(cgraph_update_edges_for_call_stmt_node): Likewise.
(cgraph_edge::verify_count_and_frequency): Update.
(cgraph_node::verify_node): Temporarily disable frequency verification.
* cgraphbuild.c (compute_call_stmt_bb_frequency): Use
to_cgraph_frequency.
(cgraph_edge::rebuild_edges): Convert to ipa counts.
* cgraphunit.c (init_lowered_empty_function): Do not initialize
frequencies.
(cgraph_node::expand_thunk): Update profile.
* except.c (dw2_build_landing_pads): Do not update frequency.
* final.c (compute_alignments): Use to_frequency.
(dump_basic_block_info): Do not dump frequency.
* gimple-pretty-print.c (dump_profile): Do not dump frequency.
(dump_gimple_bb_header): Do not dump frequency.
* gimple-ssa-isolate-paths.c (isolate_path): Do not update frequency;
do update count.
* gimple-streamer-in.c (input_bb): Do not stream frequency.
* gimple-streamer-out.c (output_bb): Do not stream frequency.
* haifa-sched.c (sched_pressure_start_bb): Use to_freuqency.
(init_before_recovery): Do not update frequency.
(sched_create_recovery_edges): Do not update frequency.
* hsa-gen.c (convert_switch_statements): Do not update frequency.
* ipa-cp.c (ipcp_propagate_stage): Update search for max_count.
(ipa_cp_c_finalize): Set max_count to uninitialized.
* ipa-fnsummary.c (get_minimal_bb): Use counts.
(param_change_prob): Use counts.
* ipa-profile.c (ipa_profile_generate_summary): Do not summarize
local profiles.
* ipa-split.c (consider_split): Use to_frequency.
(split_function): Use to_frequency.
* ira-build.c (loop_compare_func): Likewise.
(mark_loops_for_removal): Likewise.
(mark_all_loops_for_removal): Likewise.
* loop-doloop.c (doloop_modify): Do not update frequency.
* loop-unroll.c (unroll_loop_runtime_iterations): Do not update
frequency.
* lto-streamer-in.c (input_function): Update count_max.
* omp-expand.c (expand_omp_taskreg): Update count_max.
* omp-simd-clone.c (simd_clone_adjust): Update profile.
* predict.c (maybe_hot_frequency_p): Use to_frequency.
(maybe_hot_count_p): Use ipa counts only.
(maybe_hot_bb_p): Simplify.
(maybe_hot_edge_p): Simplify.
(probably_never_executed): Do not take frequency argument.
(probably_never_executed_bb_p): Do not pass frequency.
(probably_never_executed_edge_p): Likewise.
(combine_predictions_for_bb): Check that profile is nonzero.
(propagate_freq): Do not set frequency.
(drop_profile): Simplify.
(counts_to_freqs): Simplify.
(expensive_function_p): Use to_frequency.
(propagate_unlikely_bbs_forward): Simplify.
(determine_unlikely_bbs): Simplify.
(estimate_bb_frequencies): Add hack to silence graphite issues.
(compute_function_frequency): Use ipa counts.
(pass_profile::execute): Update.
(rebuild_frequencies): Use counts only.
(force_edge_cold): Use counts only.
* profile-count.c (profile_count::dump): Dump new count types.
(profile_count::differs_from_p): Check compatiblity.
(profile_count::to_frequency): New function.
(profile_count::to_cgraph_frequency): New function.
* profile-count.h (struct function): Declare.
(enum profile_quality): Add profile_guessed_local and
profile_guessed_global0.
(class profile_proability): Decrease number of bits to 29;
update from_reg_br_prob_note and to_reg_br_prob_note.
(class profile_count: Update comment; decrease number of bits
to 61. Check compatibility.
(profile_count::compatible_p): New private member function.
(profile_count::ipa_p): New member function.
(profile_count::operator<): Handle global zero correctly.
(profile_count::operator>): Handle global zero correctly.
(profile_count::operator<=): Handle global zero correctly.
(profile_count::operator>=): Handle global zero correctly.
(profile_count::nonzero_p): New member function.
(profile_count::force_nonzero): New member function.
(profile_count::max): New member function.
(profile_count::apply_scale): Handle IPA scalling.
(profile_count::guessed_local): New member function.
(profile_count::global0): New member function.
(profile_count::ipa): New member function.
(profile_count::to_frequency): Declare.
(profile_count::to_cgraph_frequency): Declare.
* profile.c (OVERLAP_BASE): Delete.
(compute_frequency_overlap): Delete.
(compute_branch_probabilities): Do not use compute_frequency_overlap.
* regs.h (REG_FREQ_FROM_BB): Use to_frequency.
* sched-ebb.c (rank): Use counts only.
* shrink-wrap.c (handle_simple_exit): Use counts only.
(try_shrink_wrapping): Use counts only.
(place_prologue_for_one_component): Use counts only.
* tracer.c (find_best_predecessor): Use to_frequency.
(find_trace): Use to_frequency.
(tail_duplicate): Use to_frequency.
* trans-mem.c (expand_transaction): Do not update frequency.
* tree-call-cdce.c: Do not update frequency.
* tree-cfg.c (gimple_find_sub_bbs): Likewise.
(gimple_merge_blocks): Likewise.
(gimple_split_edge): Likewise.
(gimple_duplicate_sese_region): Likewise.
(gimple_duplicate_sese_tail): Likewise.
(move_sese_region_to_fn): Likewise.
(gimple_account_profile_record): Likewise.
(insert_cond_bb): Likewise.
* tree-complex.c (expand_complex_div_wide): Likewise.
* tree-eh.c (lower_resx): Update profile.
* tree-inline.c (copy_bb): Simplify count scaling; do not scale
frequencies.
(initialize_cfun): Do not initialize frequencies
(freqs_to_counts): Delete.
(copy_cfg_body): Ignore count parameter.
(copy_body): Update.
(expand_call_inline): Update count_max.
(optimize_inline_calls): Update count_max.
(tree_function_versioning): Update count_max.
* tree-ssa-coalesce.c (coalesce_cost_bb): Use to_frequency.
* tree-ssa-ifcombine.c (update_profile_after_ifcombine): Do not update
frequency.
* tree-ssa-loop-im.c (execute_sm_if_changed): Use counts only.
* tree-ssa-loop-ivcanon.c (unloop_loops): Do not update freuqency.
(try_peel_loop): Likewise.
* tree-ssa-loop-ivopts.c (get_scaled_computation_cost_at): Use
to_frequency.
* tree-ssa-loop-manip.c (niter_for_unrolled_loop): Pass -1.
(tree_transform_and_unroll_loop): Do not use frequencies
* tree-ssa-loop-niter.c (estimate_numbers_of_iterations):
Use reliable prediction only.
* tree-ssa-loop-unswitch.c (hoist_guard): Do not use frequencies.
* tree-ssa-sink.c (select_best_block): Use to_frequency.
* tree-ssa-tail-merge.c (replace_block_by): Temporarily disable
probability scaling.
* tree-ssa-threadupdate.c (create_block_for_threading): Do
not update frequency
(any_remaining_duplicated_blocks): Likewise.
(update_profile): Likewise.
(estimated_freqs_path): Delete.
(freqs_to_counts_path): Delete.
(clear_counts_path): Delete.
(ssa_fix_duplicate_block_edges): Likewise.
(duplicate_thread_path): Likewise.
* tree-switch-conversion.c (gen_inbound_check): Use counts.
* tree-tailcall.c (decrease_profile): Do not update frequency.
(eliminate_tail_call): Likewise.
* tree-vect-loop-manip.c (vect_do_peeling): Likewise.
* tree-vect-loop.c (scale_profile_for_vect_loop): Likewise.
(optimize_mask_stores): Likewise.
* tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
* ubsan.c (ubsan_expand_null_ifn): Update profile.
(ubsan_expand_ptr_ifn): Update profile.
* value-prof.c (gimple_ic): Simplify.
* value-prof.h (gimple_ic): Update prototype.
* ipa-inline-transform.c (inline_transform): Fix scaling conditoins.
* ipa-inline.c (compute_uninlined_call_time): Be sure that
counts are nonzero.
(want_inline_self_recursive_call_p): Likewise.
(resolve_noninline_speculation): Only cummulate defined counts.
(inline_small_functions): Use nonzero_p.
(ipa_inline): Do not access freed node.

Unknown ChangeLog:

2017-11-02  Jan Hubicka  <hubicka@ucw.cz>

* testsuite/gcc.dg/no-strict-overflow-3.c (foo): Update magic
value to not clash with frequency.
* testsuite/gcc.dg/strict-overflow-3.c (foo): Likewise.
* testsuite/gcc.dg/tree-ssa/builtin-sprintf-2.c: Update template.
* testsuite/gcc.dg/tree-ssa/dump-2.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-10.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-11.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-12.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-20040816-1.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-20040816-2.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-5.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-8.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-9.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-cd.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-pr56541.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-pr68583.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-pr69489-1.c: Update template.
* testsuite/gcc.dg/tree-ssa/ifc-pr69489-2.c: Update template.
* testsuite/gcc.target/i386/pr61403.c: Update template.

From-SVN: r254379

Set default sched pressure algorithm

The Arm backend sets the default sched-pressure algorithm to SCHED_PRESSURE_MODEL.
Benchmarking on AArch64 shows this speeds up floating point performance on SPEC -
eg. CactusBSSN improves by ~16%.  The gains are mostly due to less spilling,
so enable this on AArch64 by default.

    gcc/
* config/aarch64/aarch64.c (aarch64_override_options_internal):
Set PARAM_SCHED_PRESSURE_ALGORITHM to SCHED_PRESSURE_MODEL.

From-SVN: r254378

RISC-V: Handle non-legitimate address in riscv_legitimize_move

GCC may generate non-legitimate address due to we allow some
load/store with non-legitimate address in pic.md.

gcc/ChangeLog

2017-11-03  Kito Cheng  <kito.cheng@gmail.com>

        * config/riscv/riscv.c (riscv_legitimize_move): Handle
        non-legitimate address.

From-SVN: r254376

[PATCH] Fix testsuire error message

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00196.html
* lib/scanlang.exp: Fix error message to refer to scan-lang-dump.

From-SVN: r254375

rs6000: Improve *lt0 patterns

The rs6000 port currently has an *lt0_disi define_insn, setting the DI
result to whether the SI argument is negative or not.  It turns out the
generic optimisers cannot always figure out in the other cases either
that this is just a shift for us.  This patch adds patterns for all
four SI/DI combinations.

* config/rs6000/rs6000.md (*lt0_disi): Delete.
(*lt0_<mode>di, *lt0_<mode>si): New.

From-SVN: r254374

rs6000: move_from_CR_ov_bit is TARGET_PAIRED_FLOAT, not TARGET_ISEL

* config/rs6000/rs6000.md (move_from_CR_ov_bit): Change condition to
TARGET_PAIRED_FLOAT.

From-SVN: r254373

[aarch64] Add Qualcomm saphira CPU support.

This patch adds an mcpu option for the Qualcomm saphira server part.
Tested on aarch64 and did not find any regressions resulting from this
patch.

2017-11-03  Siddhesh Poyarekar  <siddhesh.poyarekar@linaro.org>
    Jim Wilson  <jim.wilson@linaro.org>

* config/aarch64/aarch64-cores.def (saphira): New CPU.
* config/aarch64/aarch64-tune.md: Regenerated.
* doc/invoke.texi (AArch64 Options/-mtune): Add "saphira".
* gcc/config/aarch64/aarch64.c (saphira_tunings): New tuning table.

Co-Authored-By: Jim Wilson <jim.wilson@linaro.org>
From-SVN: r254372

[PR c++/82710] false positive paren warning

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00186.html
PR c++/82710
* decl.c (grokdeclarator): Protect MAYBE_CLASS things from paren
warning too.

PR c++/82710
* g++.dg/warn/pr82710.C: More cases.

From-SVN: r254371

Remove _Node_insert_return::get() member functions (P0508R0)

* include/bits/node_handle.h (_Node_insert_return::get): Remove, as
per P0508R0.

From-SVN: r254368

[ARC] Fix to unwinding.

gcc/ChangeLog:
2017-11-03  Cupertino Miranda  <cmiranda@synopsys.com>

        * config/arc/arc.c (arc_save_restore): Corrected CFA note.
        (arc_expand_prologue): Restore blink for millicode.
        * config/arc/linux.h (LINK_EH_SPEC): Defined.

libgcc/ChangeLog:
2017-11-03  Cupertino Miranda  <cmiranda@synopsys.com>
            Vineet Gupta <vgupta@synopsys.com>

        * config.host (arc*-*-linux*): Set md_unwind_header variable.
        * config/arc/linux-unwind-reg.def: New file.
        * config/arc/linux-unwind.h: Likewise.

Co-Authored-By: Vineet Gupta <vgupta@synopsys.com>
From-SVN: r254367

PR82809: register handling in ix86_vector_duplicate_value

When adding the call to gen_vec_duplicate, I failed to notice that
code further down modified the VEC_DUPLICATE in place.  That isn't
safe if gen_vec_duplicate returned a const_vector.

2017-11-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
PR target/82809
* config/i386/i386.c (ix86_vector_duplicate_value): Use
gen_vec_duplicate after forcing the scalar into a register.

gcc/testsuite/
* gcc.dg/pr82809.c: New test.

From-SVN: r254366

combine: Print insns we try to combine

This adds some extra debug info to the dump file for combine: print
the insns that are input to try_combine.  I was worried printing more
will make the dump file only harder to read, but especially the info
from the REG_DEAD notes is invaluable.

* combine (try_combine): Print the insns input to try_combine to the
dump file.

From-SVN: r254365

Daily bump.

From-SVN: r254364

re PR c++/81957 (ICE decltype)

/cp
2017-11-02  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/81957
* pt.c (make_pack_expansion): Add tsubst_flags_t parameter.
(expand_integer_pack, convert_template_argument, coerce_template_parms,
gen_elem_of_pack_expansion_instantiation, tsubst_pack_expansion,
unify): Adjust calls.
* tree.c (cp_build_qualified_type_real): Likewise.
* cp-tree.h (make_pack_expansion): Adjust declaration.

/testsuite
2017-11-02  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/81957
* g++.dg/cpp0x/variadic-crash5.C: New.

From-SVN: r254361

re PR target/79868 (aarch64: diagnostic "malformed target %s value" not translateable)

PR target/79868
* gcc.target/aarch64/spellcheck_1.c: Update dg-error string to match
new format.
* gcc.target/aarch64/spellcheck_2.c: Ditto.
* gcc.target/aarch64/spellcheck_3.c: Ditto.
* gcc.target/aarch64/target_attr_11.c: Ditto.
* gcc.target/aarch64/target_attr_12.c: Ditto.
* gcc.target/aarch64/target_attr_17.c: Ditto.

From-SVN: r254360

re PR target/79868 (aarch64: diagnostic "malformed target %s value" not translateable)

PR target/79868
* config/aarch64/aarch64-c.c (aarch64_pragma_target_parse):
Remove second argument from aarch64_process_target_attr call.
* config/aarch64/aarch64-protos.h (aarch64_process_target_attr):
Ditto.
* config/aarch64/aarch64.c (aarch64_attribute_info): Change
field type.
(aarch64_handle_attr_arch): Remove second argument.
(aarch64_handle_attr_cpu): Ditto.
(aarch64_handle_attr_tune): Ditto.
(aarch64_handle_attr_isa_flags): Ditto.
(aarch64_process_one_target_attr): Ditto.
(aarch64_process_target_attr): Ditto.
(aarch64_option_valid_attribute_p): Remove second argument.
on aarch64_process_target_attr call.

From-SVN: r254359

Add selftest for diagnostic_get_location_text

gcc/ChangeLog:
* diagnostic.c: Include "selftest-diagnostic.h".
(selftest::assert_location_text): New function.
(selftest::test_diagnostic_get_location_text): New function.
(selftest::diagnostic_c_tests): Call it.

From-SVN: r254355

Move selftest::test_diagnostic_context to its own header

It's useful to not rely on global_dc in selftests, so this patch
moves class selftest::test_diagnostic_context from
diagnostic-show-locus.c to a new header and source file.

gcc/ChangeLog:
* Makefile.in (OBJS-libcommon): Add selftest-diagnostic.o.
* diagnostic-show-locus.c: Include "selftest-diagnostic.h".
(class selftest::test_diagnostic_context): Move to...
* selftest-diagnostic.c: New file.
* selftest-diagnostic.h: New file.

From-SVN: r254354

Add FT32B support

FT32B is a new FT32 architecture type. FT32B has a code compression
scheme which uses linker relaxations. It also has a security option to
prevent reads from program memory.

gcc/
* config/ft32/ft32.c (ft32_addr_space_legitimate_address_p): increase
offset range for FT32B.
* config/ft32/ft32.h: option "mcompress" enables relaxation.
* config/ft32/ft32.md: Add TARGET_NOPM.
* config/ft32/ft32.opt: Add mft32b, mcompress, mnopm.
* gcc/doc/invoke.texi: Add mft32b, mcompress, mnopm.

From-SVN: r254351

[C++ PATCH] overloaded operator fns [8/N]

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00095.html
* cp-tree.h (IDENTIFIER_NEWDEL_OP_P): Restore, adjust.
(IDENTIFIER_NEW_OP_P): New.
* decl.c (grokdeclarator): Restore IDENTIFIER_NEWDEL_OP_P use.
* pt.c (push_template_decl_real): Likewise.
* typeck.c (check_return_expr): Use IDENTIFIER_NEW_OP_P.

From-SVN: r254350

[PR c++/82710] false positive paren warning

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00119.html
PR c++/82710
* decl.c (grokdeclarator): Don't warn when parens protect a return
type from a qualified name.

PR c++/82710
* g++.dg/warn/pr82710.C: New.

From-SVN: r254349

Define MALLOC_ABI_ALIGNMENT

The AArch64 backend currently doesn't set MALLOC_ABI_ALIGNMENT, so
add this to enable alignment optimizations on malloc pointers.
Use the same value as STACK_BOUNDARY and BIGGEST_ALIGNMENT.

    gcc/
* config/aarch64/aarch64.h (MALLOC_ABI_ALIGNMENT): New define.

From-SVN: r254348

Move testsuite entries to proper file

From-SVN: r254346

gimple-ssa-sprintf.c (sprintf_dom_walker): Remove virtual keyword on FINAL OVERRIDE members.

* gimple-ssa-sprintf.c (sprintf_dom_walker): Remove
virtual keyword on FINAL OVERRIDE members.

* tree-ssa-propagate.h (ssa_propagation_engine): Group
virtuals together.  Add virtual destructor.
(substitute_and_fold_engine): Similarly.

From-SVN: r254345

Re: [PATCH] fix fdump-lang-raw ICE

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00093.html
* g++.dg/lang-dump.C: New.

From-SVN: r254344

* x86-tune.def (X86_TUNE_USE_INCDEC): Enable for Haswell+.

From-SVN: r254343

re PR target/82795 (ICE in predicate_mem_writes, at tree-if-conv.c:2251)

2017-11-02  Richard Biener  <rguenther@suse.de>

PR tree-optimization/82795
* tree-if-conv.c (predicate_mem_writes): Remove bogus assert.

* gcc.target/i386/pr82795.c: New testcase.

From-SVN: r254342

Cleanup Solaris linker version checks

* acinclude.m4 (gcc_AC_INITFINI_ARRAY): Don't require
gcc_SUN_LD_VERSION.
(gcc_GAS_CHECK_FEATURE): Remove.
* configure.ac (ld_vers) <*-*-solaris2*>: Move comments from
gcc_AC_INITFINI_ARRAY here.  Update for Solaris 11.4 changes.
* configure: Regenerate.

From-SVN: r254340

[ARC][ZOL] Account for empty body loops

gcc/
2017-11-02  Claudiu Zissulescu <claziss@synopsys.com>

    * config/arc/arc.c (hwloop_optimize): Account for empty
    body loops.

testsuite/
2017-11-02  Claudiu Zissulescu <claziss@synopsys.com>

      * gcc.target/arc/loop-1.c: Add test.

From-SVN: r254339

Fix scan-assembler patterns in i386/naked-{1,2}.c

2017-11-02  Tom de Vries  <tom@codesourcery.com>

PR testsuite/82415
* gcc.target/i386/naked-1.c: Make scan patterns more precise.
* gcc.target/i386/naked-2.c: Same.

From-SVN: r254338

re PR c/82765 (ICE at -Os on valid code on x86_64-linux-gnu: in tree_to_shwi, at tree.c:6611)

2017-11-02  Richard Biener  <rguenther@suse.de>

PR middle-end/82765
* varasm.c (decode_addr_const): Make offset HOST_WIDE_INT.
Truncate ARRAY_REF index and element size.

* gcc.dg/pr82765.c: New testcase.

From-SVN: r254337

Fix scan pattern in gfortran.dg/implied_do_io_1.f90

2017-11-02  Tom de Vries  <tom@codesourcery.com>

* gfortran.dg/implied_do_io_1.f90: Fix scan-tree-dump-times pattern.

From-SVN: r254336

Daily bump.

From-SVN: r254334

RISC-V: Use "@minus{}2 GB" instead of "-2 GB" in invoke.texi

gcc/ChangeLog

2017-11-01  Palmer Dabbelt  <palmer@dabbelt.com>

* doc/invoke.texi (RISC-V Options): Use "@minus{}2 GB", not "-2 GB".

From-SVN: r254331

tree-ssa-ccp.c (ccp_folder): New class derived from substitute_and_fold_engine.

* tree-ssa-ccp.c (ccp_folder): New class derived from
substitute_and_fold_engine.
(ccp_folder::get_value): New member function.
(ccp_folder::fold_stmt): Renamed from ccp_fold_stmt.
(ccp_fold_stmt): Remove prototype.
(ccp_finalize): Call substitute_and_fold from the ccp_class.
* tree-ssa-copy.c (copy_folder): New class derived from
substitute_and_fold_engine.
(copy_folder::get_value): Renamed from get_value.
(fini_copy_prop): Call substitute_and_fold from copy_folder class.
* tree-vrp.c (vrp_folder): New class derived from
substitute_and_fold_engine.
(vrp_folder::fold_stmt): Renamed from vrp_fold_stmt.
(vrp_folder::get_value): New member function.
(vrp_finalize): Call substitute_and_fold from vrp_folder class.
(evrp_dom_walker::before_dom_children): Similarly for replace_uses_in.
* tree-ssa-propagate.h (substitute_and_fold_engine): New class to
provide a class interface to folder/substitute routines.
(ssa_prop_fold_stmt_fn): Remove typedef.
(ssa_prop_get_value_fn): Likewise.
(subsitute_and_fold): Remove prototype.
(replace_uses_in): Likewise.
* tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
Renamed from replace_uses_in.  Call the virtual member function
(substitute_and_fold_engine::replace_phi_args_in): Similarly.
(substitute_and_fold_dom_walker): Remove initialization of
data member entries for calbacks.  Add substitute_and_fold_engine
member and initialize it.
(substitute_and_fold_dom_walker::before_dom_children0: Use the
member functions for get_value, replace_phi_args_in c
replace_uses_in, and fold_stmt calls.
(substitute_and_fold_engine::substitute_and_fold): Renamed from
substitute_and_fold.  Remove assert.   Update ctor call.

From-SVN: r254330

tree-ssa-propagate.h (ssa_prop_visit_stmt_fn): Remove typedef.

* tree-ssa-propagate.h (ssa_prop_visit_stmt_fn): Remove typedef.
(ssa_prop_visit_phi_fn): Likewise.
(class ssa_propagation_engine): New class to provide an interface
into ssa_propagate.
* tree-ssa-propagate.c (ssa_prop_visit_stmt): Remove file scoped
variable.
(ssa_prop_visit_phi): Likewise.
(ssa_propagation_engine::simulate_stmt): Moved into class.
Call visit_phi/visit_stmt from the class rather than via
file scoped static variables.
(ssa_propagation_engine::simulate_block): Moved into class.
(ssa_propagation_engine::process_ssa_edge_worklist): Similarly.
(ssa_propagation_engine::ssa_propagate): Similarly.  No longer
set file scoped statics for the visit_stmt/visit_phi callbacks.
* tree-complex.c (complex_propagate): New class derived from
ssa_propagation_engine.
(complex_propagate::visit_stmt): Renamed from complex_visit_stmt.
(complex_propagate::visit_phi): Renamed from complex_visit_phi.
(tree_lower_complex): Call ssa_propagate via the complex_propagate
class.
* tree-ssa-ccp.c: (ccp_propagate): New class derived from
ssa_propagation_engine.
(ccp_propagate::visit_phi): Renamed from ccp_visit_phi_node.
(ccp_propagate::visit_stmt): Renamed from ccp_visit_stmt.
(do_ssa_ccp): Call ssa_propagate from the ccp_propagate class.
* tree-ssa-copy.c (copy_prop): New class derived from
ssa_propagation_engine.
(copy_prop::visit_stmt): Renamed from copy_prop_visit_stmt.
(copy_prop::visit_phi): Renamed from copy_prop_visit_phi_node.
(execute_copy_prop): Call ssa_propagate from the copy_prop class.
* tree-vrp.c (vrp_prop): New class derived from ssa_propagation_engine.
(vrp_prop::visit_stmt): Renamed from vrp_visit_stmt.
(vrp_prop::visit_phi): Renamed from vrp_visit_phi_node.
(execute_vrp): Call ssa_propagate from the vrp_prop class.

From-SVN: r254329

re PR rtl-optimization/82778 (crash: insn does not satisfy its constraints)

PR rtl-optimization/82778
PR rtl-optimization/82597
* compare-elim.c (struct comparison): Add in_a_setter field.
(find_comparison_dom_walker::before_dom_children): Remove killed
bitmap and df_simulate_find_defs call, instead walk the defs.
Compute last_setter and initialize in_a_setter.  Merge definitions
with first initialization for a few variables.
(try_validate_parallel): Use insn_invalid_p instead of
recog_memoized.  Return insn rather than just the pattern.
(try_merge_compare): Fix up comment.  Don't uselessly test if
in_a is a REG_P.  Use cmp->in_a_setter instead of walking UD
chains.
(execute_compare_elim_after_reload): Remove df_chain_add_problem
call.

* g++.dg/opt/pr82778.C: New test.

2017-11-01  Michael Collison  <michael.collison@arm.com>

PR rtl-optimization/82597
* gcc.dg/pr82597.c: New test.

From-SVN: r254328

[AArch64] Minor rtx costs tweak

aarch64_rtx_costs uses the number of registers in a mode as the basis
of SET costs.  This patch makes it get the number of registers from
aarch64_hard_regno_nregs rather than repeating the calcalation inline.
Handling SVE modes in aarch64_hard_regno_nregs is then enough to get
the correct SET cost as well.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
aarch64_hard_regno_nregs to get the number of registers
in a mode.

Reviewed-By: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254327

[AArch64] Rename the internal "Upl" constraint

The SVE port uses the public constraints "Upl" and "Upa" to mean
"low predicate register" and "any predicate register" respectively.
"Upl" was already used as an internal-only constraint by the
addition patterns, so this patch renames it to "Uaa" ("two adds
needed").

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* config/aarch64/constraints.md (Upl): Rename to...
(Uaa): ...this.
* config/aarch64/aarch64.md
(*zero_extend<SHORT:mode><GPI:mode>2_aarch64, *addsi3_aarch64_uxtw):
Update accordingly.

Reviewed-By: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254326

[AArch64] Move code around

This patch simply moves code around, in order to make the later
patches easier to read, and to avoid forward declarations.
It doesn't add the missing function comments because the interfaces
will change in a later patch.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_add_constant_internal)
(aarch64_add_constant, aarch64_add_sp, aarch64_sub_sp): Move
earlier in file.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254325

[AArch64] Generate permute patterns using rtx builders

This patch replaces switch statements that call specific generator
functions with code that constructs the rtl pattern directly.
This seemed to scale better to SVE and also seems less error-prone.

As a side-effect, the patch fixes the REV handling for diff==1,
vmode==E_V4HFmode and adds missing support for diff==3,
vmode==E_V4HFmode.

To compensate for the lack of switches that check for specific modes,
the patch makes aarch64_expand_vec_perm_const_1 reject permutes on
single-element vectors (specifically V1DImode).

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_evpc_trn, aarch64_evpc_uzp)
(aarch64_evpc_zip, aarch64_evpc_ext, aarch64_evpc_rev)
(aarch64_evpc_dup): Generate rtl direcly, rather than using
named expanders.
(aarch64_expand_vec_perm_const_1): Explicitly check for permutes
of a single element.
* config/aarch64/iterators.md: Add a comment above the permute
unspecs to say that they are generated directly by
aarch64_expand_vec_perm_const.
* config/aarch64/aarch64-simd.md: Likewise the permute instructions.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254324

[PATCH] fix fdump-lang-raw ICE

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00037.html
* tree-dump.c (dequeue_and_dump): Use HAS_DECL_ASSEMBLER_NAME_P.

From-SVN: r254323

[C++ PATCH] overloaded operator fns [8/N]

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00031.html
* cp-tree.h (enum cp_identifier_kind): Delete cik_newdel_op.
Renumber and reserve udlit value.
(IDENTIFIER_NEWDEL_OP): Delete.
(IDENTIFIER_OVL_OP): New.
(IDENTIFIER_ASSIGN_OP): Adjust.
(IDENTIFIER_CONV_OP): Adjust.
(IDENTIFIER_OVL_OP_INFO): Adjust.
(IDENTIFIER_OVL_OP_FLAGS): New.
* decl.c (grokdeclarator): Use IDENTIFIER_OVL_OP_FLAGS.
* lex.c (get_identifier_kind_name): Adjust.
(init_operators): Don't special case new/delete ops.
* mangle.c (write_unqualified_id): Use IDENTIFIER_OVL_OP.
* pt.c (push_template_decl_real): Use IDENTIFIER_OVL_OP_FLAGS.
* typeck.c (check_return_expr): Likewise.

From-SVN: r254322

RISC-V: Document the medlow and medany code models

This documentation is patterned off the aarch64 -mcmodel documentation.

gcc/ChangeLog:

2017-11-01  Palmer Dabbelt  <palmer@dabbelt.com>

        * doc/invoke.texi (RISC-V Options): Explicitly name the medlow
        and medany code models, and describe what they do.

From-SVN: r254321

printers.py (StdExpAnyPrinter.__init__): Strip typename versioned namespace before the substitution.

2017-11-01  François Dumont  <fdumont@gcc.gnu.org>

* python/libstdcxx/v6/printers.py (StdExpAnyPrinter.__init__): Strip
typename versioned namespace before the substitution.
(StdExpOptionalPrinter.__init__): Likewise.
(StdVariantPrinter.__init__): Likewise.
(Printer.add_version): Inject versioned namespace after std or
__gnu_cxx.
(build_libstdcxx_dictionary): Adapt add_version usages, always pass
namespace first and symbol second.

From-SVN: r254320

PR libstdc++/82777 fix path normalization for dot-dot

PR libstdc++/82777
* src/filesystem/std-path.cc (path::lexically_normal): Remove dot-dot
elements correctly.
* testsuite/27_io/filesystem/path/generation/normal.cc: Add testcase.
* testsuite/util/testsuite_fs.h (compare_paths): Improve exception
text.

From-SVN: r254317

revert: combine.c (can_change_dest_mode): Reject changes in REGMODE_NATURAL_SIZE.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
Revert accidental duplicate:

* combine.c (can_change_dest_mode): Reject changes in
REGMODE_NATURAL_SIZE.

From-SVN: r254316

combine: Fix bug in giving up placing REG_DEAD notes (PR82683)

When we have a REG_DEAD note for a reg that is set in the new I2, we
drop the note on the floor (we cannot find whether to place it on I2
or on I3).  But the code I added to do this has a bug and does not
always actually drop it.  This patch fixes it.

But that on its own is too pessimistic, it turns out, and we generate
worse code.  One case where we do know where to place the note is if
it came from I3 (it should go to I3 again).  Doing this fixes all of
the regressions.

PR rtl-optimization/64682
PR rtl-optimization/69567
PR rtl-optimization/69737
PR rtl-optimization/82683
* combine.c (distribute_notes) <REG_DEAD>: If the new I2 sets the same
register mentioned in the note, drop the note, unless it came from I3,
in which case it should go to I3 again.

From-SVN: r254315

[C++ PATCH] overloaded operator fns [6/N]

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00019.html
gcc/cp/
* cp-tree.h (assign_op_identifier, call_op_identifier): Use
compressed code.
(struct lang_decl_fn): Use compressed operator code.
(DECL_OVERLOADED_OPERATOR_CODE): Replace with ...
(DECL_OVERLOADED_OPERATOR_CODE_RAW): ... this.
(DECL_OVERLOADED_OPERATOR_CODE_IS): Use it.
* decl.c (duplicate_decls): Use DECL_OVERLOADED_OPERATOR_CODE_RAW.
(build_library_fn): Likewise.
(grok_op_properties): Likewise.
* mangle.c (write_unqualified_name): Likewise.
* method.c (implicitly_declare_fn): Likewise.
* typeck.c (check_return_expr): Use DECL_OVERLOADED_OPERATOR_IS.

libcc1/
* libcp1plugin.cc (plugin_build_decl): Use
DECL_OVERLOADED_OPERATOR_CODE_RAW.

From-SVN: r254314

Make tree-ssa-dse.c:normalize_ref return a bool

This patch moves the check for an overlapping byte to normalize_ref
from its callers, so that it's easier to convert to poly_ints later.
It's not really worth it on its own.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* tree-ssa-dse.c (normalize_ref): Check whether the ranges overlap
and return false if not.
(clear_bytes_written_by, live_bytes_read): Update accordingly.

From-SVN: r254313

Don't treat zero-sized ranges as overlapping

Most GCC ranges seem to be represented as an offset and a size (rather
than a start and inclusive end or start and exclusive end).  The usual
test for whether X is in a range is of course:

  x >= start && x < start + size
or:
  x >= start && x - start < size

which means that an empty range of size 0 contains nothing.  But other
range tests aren't as obvious.

The usual test for whether one range is contained within another
range is:

  start1 >= start2 && start1 + size1 <= start2 + size2

while the test for whether two ranges overlap (from ranges_overlap_p) is:

     (start1 >= start2 && start1 < start2 + size2)
  || (start2 >= start1 && start2 < start1 + size1)

i.e. the ranges overlap if one range contains the start of the other
range.  This leads to strange results like:

  (start X, size 0) is a subrange of (start X, size 0) but
  (start X, size 0) does not overlap (start X, size 0)

Similarly:

  (start 4, size 0) is a subrange of (start 2, size 2) but
  (start 4, size 0) does not overlap (start 2, size 2)

It seems like "X is a subrange of Y" should imply "X overlaps Y".

This becomes harder to ignore with the runtime sizes and offsets
added for SVE.  The most obvious fix seemed to be to say that
an empty range does not overlap anything, and is therefore not
a subrange of anything.

Using the new definition of subranges didn't seem to cause any
codegen differences in the testsuite.  But there was one change
with the new definition of overlapping ranges.  strncpy-chk.c has:

  memset (dst, 0, sizeof (dst));
  if (strncpy (dst, src, 0) != dst || strcmp (dst, ""))
    abort();

The strncpy is detected as a zero-size write, and so with the new
definition of overlapping ranges, we treat the strncpy as having
no effect on the strcmp (which is true).  The reaching definition
is the memset instead.

This patch makes ranges_overlap_p return false for zero-sized
ranges, even if the other range has an unknown size.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* tree-ssa-alias.h (ranges_overlap_p): Return false if either
range is known to be empty.

From-SVN: r254312

Use (CONST_VECTOR|GET_MODE)_NUNITS in simplify-rtx.c

This patch avoids some calculations of the form:

  GET_MODE_SIZE (vector_mode) / GET_MODE_SIZE (element_mode)

in simplify-rtx.c.  If we're dealing with CONST_VECTORs, it's better
to use CONST_VECTOR_NUNITS, since that remains constant even after the
SVE patches.  In other cases we can get the number from GET_MODE_NUNITS.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* simplify-rtx.c (simplify_const_unary_operation): Use GET_MODE_NUNITS
and CONST_VECTOR_NUNITS instead of computing the number of units from
the byte sizes of the vector and element.
(simplify_binary_operation_1): Likewise.
(simplify_const_binary_operation): Likewise.
(simplify_ternary_operation): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254311

[C++ PATCH] overloaded operator fns [6/N]

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00018.html
* cp-tree.h (IDENTIFIER_CP_INDEX): Define.
(enum ovl_op_flags): Add OVL_OP_FLAG_AMBIARY.
(enum ovl_op_code): New.
(struct ovl_op_info): Add ovl_op_code field.
(ovl_op_info): Size by OVL_OP_MAX.
(ovl_op_mapping, ovl_op_alternate): Declare.
(OVL_OP_INFO): Adjust for mapping array.
(IDENTIFIER_OVL_OP_INFO): New.
* decl.c (ambi_op_p, unary_op_p): Delete.
(grok_op_properties): Use IDENTIFIER_OVL_OP_INFO and
ovl_op_alternate.
* lex.c (ovl_op_info): Adjust and static initialize.
(ovl_op_mappings, ovl_op_alternate): Define.
(init_operators): Iterate over ovl_op_info array and init mappings
& alternate arrays.
* mangle.c (write_unqualified_id): Use IDENTIFIER_OVL_OP_INFO.
* operators.def (DEF_OPERATOR): Remove KIND parm.
(DEF_SIMPLE_OPERATOR): Delete.
(OPERATOR_TRANSITION): Expand if defined.

From-SVN: r254310

Turn var-tracking.c:INT_MEM_OFFSET into a function

This avoids the double evaluation mentioned in the comments and
simplifies the change to make MEM_OFFSET variable.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* var-tracking.c (INT_MEM_OFFSET): Replace with...
(int_mem_offset): ...this new function.
(var_mem_set, var_mem_delete_and_set, var_mem_delete)
(find_mem_expr_in_1pdv, dataflow_set_preserve_mem_locs)
(same_variable_part_p, use_type, add_stores, vt_get_decl_and_offset):
Update accordingly.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254309

Factor out the mode handling in lower-subreg.c

This patch adds a helper routine (interesting_mode_p) to lower-subreg.c,
to make the decision about whether a mode can be split and, if so,
calculate the number of bytes and words in the mode.  At present this
function always returns true; a later patch will add cases in which it
can return false.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* lower-subreg.c (interesting_mode_p): New function.
(compute_costs, find_decomposable_subregs, decompose_register)
(simplify_subreg_concatn, can_decompose_p, resolve_simple_move)
(resolve_clobber, dump_choices): Use it.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254308

Use more specific hash functions in rtlhash.c

Avoid using add_object when we have more specific routines available.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* rtlhash.c (add_rtx): Use add_hwi for 'w' and add_int for 'i'.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254307

More is_a <scalar_int_mode>

alias.c:find_base_term and find_base_value checked:

      if (GET_MODE_SIZE (GET_MODE (src)) < GET_MODE_SIZE (Pmode))

but (a) comparing the precision seems more correct, since it's possible
for modes to have the same memory size as Pmode but fewer bits and
(b) the functions are called on arbitrary rtl, so there's no guarantee
that we're handling an integer truncation.

Since there's no point processing truncations of anything other than an
integer, this patch checks that first.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* alias.c (find_base_value, find_base_term): Only process integer
truncations.  Check the precision rather than the size.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254306

Add an is_narrower_int_mode helper function

This patch adds a function for testing whether an arbitrary mode X
is an integer mode that is narrower than integer mode Y.  This is
useful for code like expand_float and expand_fix that could in
principle handle vectors as well as scalars.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* machmode.h (is_narrower_int_mode): New function
* optabs.c (expand_float, expand_fix): Use it.
* dwarf2out.c (rotate_loc_descriptor): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254305

Add narrower_subreg_mode helper function

This patch adds a narrowing equivalent of wider_subreg_mode.  At present
there is only one user.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* rtl.h (narrower_subreg_mode): New function.
* ira-color.c (update_costs_from_allocno): Use it.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254304

Widening optab cleanup

widening_optab_handler had the comment:

      /* ??? Why does find_widening_optab_handler_and_mode attempt to
         widen things that can't be widened?  E.g. add_optab... */
      if (op > LAST_CONV_OPTAB)
        return CODE_FOR_nothing;

I think it comes from expand_binop using
find_widening_optab_handler_and_mode for two things: to test whether
a "normal" optab like add_optab is supported for a standard binary
operation and to test whether a "convert" optab is supported for a
widening operation like umul_widen_optab.  In the former case from_mode
and to_mode must be the same, in the latter from_mode must be narrower
than to_mode.

For the former case, find_widening_optab_handler_and_mode is only really
testing the modes that are passed in.  permit_non_widening must be true
here.

For the latter case, find_widening_optab_handler_and_mode should only
really consider new from_modes that are wider than the original
from_mode and narrower than the original to_mode.  Logically
permit_non_widening should be false, since widening optabs aren't
supposed to take operands that are the same width as the destination.
We get away with permit_non_widening being true because no target
would/should define a widening .md pattern with matching modes.

But really, it seems better for expand_binop to handle these two
cases itself rather than pushing them down.  With that change,
find_widening_optab_handler_and_mode is only ever called with
permit_non_widening set to false and is only ever called with
a "proper" convert optab.  We then no longer need widening_optab_handler,
we can just use convert_optab_handler directly.

The patch also passes the instruction code down to expand_binop_directly.
This should be more efficient and removes an extra call to
find_widening_optab_handler_and_mode.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* optabs-query.h (convert_optab_p): New function, split out from...
(convert_optab_handler): ...here.
(widening_optab_handler): Delete.
(find_widening_optab_handler): Remove permit_non_widening parameter.
(find_widening_optab_handler_and_mode): Likewise.  Provide an
override that operates on mode class wrappers.
* optabs-query.c (widening_optab_handler): Delete.
(find_widening_optab_handler_and_mode): Remove permit_non_widening
parameter.  Assert that the two modes are the same class and that
the "from" mode is narrower than the "to" mode.  Use
convert_optab_handler instead of widening_optab_handler.
* expmed.c (expmed_mult_highpart_optab): Use convert_optab_handler
instead of widening_optab_handler.
* expr.c (expand_expr_real_2): Update calls to
find_widening_optab_handler.
* optabs.c (expand_widen_pattern_expr): Likewise.
(expand_binop_directly): Take the insn_code as a parameter.
(expand_binop): Only call find_widening_optab_handler for
conversion optabs; use optab_handler otherwise.  Update calls
to find_widening_optab_handler and expand_binop_directly.
Use convert_optab_handler instead of widening_optab_handler.
* tree-ssa-math-opts.c (convert_mult_to_widen): Update calls to
find_widening_optab_handler and use scalar_mode rather than
machine_mode.
(convert_plusminus_to_widen): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254302

Add a fixed_size_mode class

This patch adds a fixed_size_mode machine_mode wrapper
for modes that are known to have a fixed size.  That applies
to all current modes, but future patches will add support for
variable-sized modes.

The use of this class should be pretty restricted.  One important
use case is to hold the mode of static data, which can never be
variable-sized with current file formats.  Another is to hold
the modes of registers involved in __builtin_apply and
__builtin_result, since those interfaces don't cope well with
variable-sized data.

The class can also be useful when reinterpreting the contents of
a fixed-length bit string as a different kind of value.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* machmode.h (fixed_size_mode): New class.
* rtl.h (get_pool_mode): Return fixed_size_mode.
* gengtype.c (main): Add fixed_size_mode.
* target.def (get_raw_result_mode): Return a fixed_size_mode.
(get_raw_arg_mode): Likewise.
* doc/tm.texi: Regenerate.
* targhooks.h (default_get_reg_raw_mode): Return a fixed_size_mode.
* targhooks.c (default_get_reg_raw_mode): Likewise.
* config/ia64/ia64.c (ia64_get_reg_raw_mode): Likewise.
* config/mips/mips.c (mips_get_reg_raw_mode): Likewise.
* config/msp430/msp430.c (msp430_get_raw_arg_mode): Likewise.
(msp430_get_raw_result_mode): Likewise.
* config/avr/avr-protos.h (regmask): Use as_a <fixed_side_mode>
* dbxout.c (dbxout_parms): Require fixed-size modes.
* expr.c (copy_blkmode_from_reg, copy_blkmode_to_reg): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* omp-low.c (lower_oacc_reductions): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Take fixed_size_modes.
(simplify_subreg): Update accordingly.
* varasm.c (constant_descriptor_rtx::mode): Change to fixed_size_mode.
(force_const_mem): Update accordingly.  Return NULL_RTX for modes
that aren't fixed-size.
(get_pool_mode): Return a fixed_size_mode.
(output_constant_pool_2): Take a fixed_size_mode.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254300

Add a VEC_SERIES rtl code

This patch adds an rtl representation of a vector linear series
of the form:

  a[I] = BASE + I * STEP

Like vec_duplicate;

- the new rtx can be used for both constant and non-constant vectors
- when used for constant vectors it is wrapped in a (const ...)
- the constant form is only used for variable-length vectors;
  fixed-length vectors still use CONST_VECTOR

At the moment the code is restricted to integer elements, to avoid
concerns over floating-point rounding.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* doc/rtl.texi (vec_series): Document.
(const): Say that the operand can be a vec_series.
* rtl.def (VEC_SERIES): New rtx code.
* rtl.h (const_vec_series_p_1): Declare.
(const_vec_series_p): New function.
* emit-rtl.h (gen_const_vec_series): Declare.
(gen_vec_series): Likewise.
* emit-rtl.c (const_vec_series_p_1, gen_const_vec_series)
(gen_vec_series): Likewise.
* optabs.c (expand_mult_highpart): Use gen_const_vec_series.
* simplify-rtx.c (simplify_unary_operation): Handle negations
of vector series.
(simplify_binary_operation_series): New function.
(simplify_binary_operation_1): Use it.  Handle VEC_SERIES.
(test_vector_ops_series): New function.
(test_vector_ops): Call it.
* config/powerpcspe/altivec.md (altivec_lvsl): Use
gen_const_vec_series.
(altivec_lvsr): Likewise.
* config/rs6000/altivec.md (altivec_lvsl, altivec_lvsr): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254297

Allow vector CONSTs

This patch allows (const ...) wrappers to be used for rtx vector
constants, as an alternative to const_vector.  This is useful
for SVE, where the number of elements isn't known until runtime.

It could also be useful in future for fixed-length vectors, to
reduce the amount of memory needed to represent simple constants
with high element counts.  However, one nice thing about keeping
it restricted to variable-length vectors is that there is never
any need to handle combinations of (const ...) and CONST_VECTOR.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* doc/rtl.texi (const): Update description of address constants.
Say that vector constants are allowed too.
* common.md (E, F): Use CONSTANT_P instead of checking for
CONST_VECTOR.
* emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
checking for CONST_VECTOR.
* expmed.c (make_tree): Use build_vector_from_val for a CONST
VEC_DUPLICATE.
* expr.c (expand_expr_real_2): Check for vector modes instead
of checking for CONST_VECTOR.
* rtl.h (const_vec_p): New function.
(const_vec_duplicate_p): Check for a CONST VEC_DUPLICATE.
(unwrap_const_vec_duplicate): Handle them here too.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254296

Add more vec_duplicate simplifications

This patch adds a vec_duplicate_p helper that tests for constant
or non-constant vector duplicates.  Together with the existing
const_vec_duplicate_p, this complements the gen_vec_duplicate
and gen_const_vec_duplicate added by a previous patch.

The patch uses the new routines to add more rtx simplifications
involving vector duplicates.  These mirror simplifications that
we already do for CONST_VECTOR broadcasts and are needed for
variable-length SVE, which uses:

  (const:M (vec_duplicate:M X))

to represent constant broadcasts instead.  The simplifications do
trigger on the testsuite for variable duplicates too, and in each
case I saw the change was an improvement.

The best way of testing the new simplifications seemed to be
via selftests.  The patch cribs part of David's patch here:
https://gcc.gnu.org/ml/gcc-patches/2016-07/msg00270.html .

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    David Malcolm  <dmalcolm@redhat.com>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* rtl.h (vec_duplicate_p): New function.
* selftest-rtl.c (assert_rtx_eq_at): New function.
* selftest-rtl.h (ASSERT_RTX_EQ): New macro.
(assert_rtx_eq_at): Declare.
* selftest.h (selftest::simplify_rtx_c_tests): Declare.
* selftest-run-tests.c (selftest::run_tests): Call it.
* simplify-rtx.c: Include selftest.h and selftest-rtl.h.
(simplify_unary_operation_1): Recursively handle vector duplicates.
(simplify_binary_operation_1): Likewise.  Handle VEC_SELECTs of
vector duplicates.
(simplify_subreg): Handle subregs of vector duplicates.
(make_test_reg, test_vector_ops_duplicate, test_vector_ops)
(selftest::simplify_rtx_c_tests): New functions.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Malcolm <dmalcolm@redhat.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254294

Add gen_(const_)vec_duplicate helpers

This patch adds helper functions for generating constant and
non-constant vector duplicates.  These routines help with SVE because
it is then easier to use:

   (const:M (vec_duplicate:M X))

for a broadcast of X, even if the number of elements in M isn't known
at compile time.  It also makes it easier for general rtx code to treat
constant and non-constant duplicates in the same way.

In the target code, the patch uses gen_vec_duplicate instead of
gen_rtx_VEC_DUPLICATE if handling constants correctly is potentially
useful.  It might be that some or all of the call sites only handle
non-constants in practice, in which case the change is a harmless
no-op (and a saving of a few characters).

Otherwise, the target changes use gen_const_vec_duplicate instead
of gen_rtx_CONST_VECTOR if the constant is obviously a duplicate.
They also include some changes to use CONSTxx_RTX for easy global
constants.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* emit-rtl.h (gen_const_vec_duplicate): Declare.
(gen_vec_duplicate): Likewise.
* emit-rtl.c (gen_const_vec_duplicate_1): New function, split
out from...
(gen_const_vector): ...here.
(gen_const_vec_duplicate, gen_vec_duplicate): New functions.
(gen_rtx_CONST_VECTOR): Use gen_const_vec_duplicate for constants
whose elements are all equal.
* optabs.c (expand_vector_broadcast): Use gen_const_vec_duplicate.
* simplify-rtx.c (simplify_const_unary_operation): Likewise.
(simplify_relational_operation): Likewise.
* config/aarch64/aarch64.c (aarch64_simd_gen_const_vector_dup):
Likewise.
(aarch64_simd_dup_constant): Use gen_vec_duplicate.
(aarch64_expand_vector_init): Likewise.
* config/arm/arm.c (neon_vdup_constant): Likewise.
(neon_expand_vector_init): Likewise.
(arm_expand_vec_perm): Use gen_const_vec_duplicate.
(arm_block_set_unaligned_vect): Likewise.
(arm_block_set_aligned_vect): Likewise.
* config/arm/neon.md (neon_copysignf<mode>): Likewise.
* config/i386/i386.c (ix86_expand_vec_perm): Likewise.
(expand_vec_perm_even_odd_pack): Likewise.
(ix86_vector_duplicate_value): Use gen_vec_duplicate.
* config/i386/sse.md (one_cmpl<mode>2): Use CONSTM1_RTX.
* config/ia64/ia64.c (ia64_expand_vecint_compare): Use
gen_const_vec_duplicate.
* config/ia64/vect.md (addv2sf3, subv2sf3): Use CONST1_RTX.
* config/mips/mips.c (mips_gen_const_int_vector): Use
gen_const_vec_duplicate.
(mips_expand_vector_init): Use CONST0_RTX.
* config/powerpcspe/altivec.md (abs<mode>2, nabs<mode>2): Likewise.
(define_split): Use gen_const_vec_duplicate.
* config/rs6000/altivec.md (abs<mode>2, nabs<mode>2): Use CONST0_RTX.
(define_split): Use gen_const_vec_duplicate.
* config/s390/vx-builtins.md (vec_genmask<mode>): Likewise.
(vec_ctd_s64, vec_ctd_u64, vec_ctsl, vec_ctul): Likewise.
* config/spu/spu.c (spu_const): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254292

Prevent invalid register mode changes in combine

This patch stops combine from changing the mode of an existing register
in-place if doing so would change the size of the underlying register
allocation size, as given by REGMODE_NATURAL_SIZE.  Without this,
many tests fail in adjust_reg_mode after SVE is added.  One example
is gcc.c-torture/compile/20090401-1.c.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* combine.c (can_change_dest_mode): Reject changes in
REGMODE_NATURAL_SIZE.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254291

sqrt.c: New test.

* gcc.target/alpha/sqrt.c: New test.

From-SVN: r254289