re PR target/56010 (Powerpc, -mcpu=native and -mtune=native  use the wrong name for target 7450)

PR target/56010
PR target/83743
* config/rs6000/driver-rs6000.c: #include "diagnostic.h".
#include "opts.h".
(rs6000_supported_cpu_names): New static variable.
(linux_cpu_translation_table): Likewise.
(elf_platform) <cpu>: Define new static variable and use it.
Translate kernel AT_PLATFORM name to canonical name if needed.
Error if platform name is unknown.

From-SVN: r257305

re PR middle-end/84089 (FAIL: g++.dg/cpp1y/lambda-generic-x.C  -std=gnu++14 (internal compiler error))

PR target/84089
* config/pa/predicates.md (base14_operand): Handle E_VOIDmode.

From-SVN: r257304

re PR target/84128 (i686: Stack spilling in -fstack-clash-protection prologue neglects %esp change)

PR target/84128
* config/i386/i386.c (release_scratch_register_on_entry): Add new
OFFSET and RELEASE_VIA_POP arguments.  Use SP+OFFSET to restore
the scratch if RELEASE_VIA_POP is false.
(ix86_adjust_stack_and_probe_stack_clash): Un-constify SIZE.
If we have to save a temporary register, decrement SIZE appropriately.
Pass new arguments to release_scratch_register_on_entry.
(ix86_adjust_stack_and_probe): Likewise.
(ix86_emit_probe_stack_range): Pass new arguments to
release_scratch_register_on_entry.

PR target/84128
* gcc.target/i386/pr84128.c: New test.

From-SVN: r257303

re PR rtl-optimization/84157 ([nvptx] ICE: RTL check: expected code 'reg', have 'lshiftrt')

PR rtl-optimization/84157
* combine.c (change_zero_ext): Use REG_P predicate in
front of HARD_REGISTER_P predicate.

From-SVN: r257302

avr.c (avr_option_override): Move disabling of -fdelete-null-pointer-checks to...

gcc/
* config/avr/avr.c (avr_option_override): Move disabling of
-fdelete-null-pointer-checks to...
* common/config/avr/avr-common.c (avr_option_optimization_table):
...here.
testsuite/
* gcc.dg/tree-ssa/vrp111.c (dg-options): Add
-fdelete-null-pointer-checks.

From-SVN: r257301

compiler: omit field name for embedded fields in reflection string

    This matches the gc compiler.

    The test case was sent for the master repo as
    https://golang.org/cl/91138.

    Fixes golang/go#23620

    Reviewed-on: https://go-review.googlesource.com/91139

From-SVN: r257300

net: declare lib_getaddrinfo as returning int32

    Otherwise on a 64-bit system we will read the 32-bit value as a 64-bit
    value.  Since getaddrinfo returns negative numbers as error values,
    these will be interpreted as numbers like 0xfffffffe rather than -2,
    and the comparisons with values like syscall.EAI_NONAME will fail.

    Fixes golang/go#23645

    Reviewed-on: https://go-review.googlesource.com/91296

From-SVN: r257299

re PR c++/83796 (Abstract classes allowed to be instantiated when initialised as default parameter to function or constructor)

/cp
2018-02-01  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/83796
* call.c (convert_like_real): If w're initializing from {} explicitly
call abstract_virtuals_error_sfinae.

/testsuite
2018-02-01  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/83796
* g++.dg/cpp0x/abstract-default1.C: New.

From-SVN: r257298

Use range info in split_constant_offset (PR 81635)

This patch implements the original suggestion for fixing PR 81635:
use range info in split_constant_offset to see whether a conversion
of a wrapping type can be split.  The range info problem described in:

    https://gcc.gnu.org/ml/gcc-patches/2017-08/msg01002.html

seems to have been fixed.

The patch is part 1.  There needs to be a follow-on patch to handle:

  for (unsigned int i = 0; i < n; i += 4)
    {
      ...[i + 2]...
      ...[i + 3]...

which the old SCEV test handles, but which the range check doesn't.
At the moment we record that the low two bits of "i" are clear,
but we still end up with a maximum range of 0xffffffff rather than
0xfffffffc.

2018-01-31  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
PR tree-optimization/81635
* tree-data-ref.c (split_constant_offset_1): For types that
wrap on overflow, try to use range info to prove that wrapping
cannot occur.

gcc/testsuite/
PR tree-optimization/81635
* gcc.dg/vect/bb-slp-pr81635-1.c: New test.
* gcc.dg/vect/bb-slp-pr81635-2.c: Likewise.

From-SVN: r257296

[PR83370][AARCH64]Use tighter register constraint for sibcall patterns.

In aarch64 backend, ip0/ip1 register will be used in the prologue/epilogue as
temporary register.

When the compiler is performing sibcall optimization. It has the chance to use
ip0/ip1 register for indirect function call to hold the address. However,
those two register might be clobbered by the epilogue code which makes the
last sibcall instruction invalid.

The patch here renames the register class CALLER_SAVE_REGS to TAILCALL_ADDR_REGS
to reflect its usage, and remove IP registers from this class.

gcc/

2018-02-01  Renlin Li  <renlin.li@arm.com>

PR target/83370
* config/aarch64/aarch64.c (aarch64_class_max_nregs): Handle
TAILCALL_ADDR_REGS.
(aarch64_register_move_cost): Likewise.
* config/aarch64/aarch64.h (reg_class): Rename CALLER_SAVE_REGS to
TAILCALL_ADDR_REGS.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Rename CALLER_SAVE_REGS to
TAILCALL_ADDR_REGS. Remove IP registers.
* config/aarch64/aarch64.md (Ucs): Update register constraint.

gcc/testsuite/

2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>

PR target/83370
* gcc.target/aarch64/pr83370.c: New.

From-SVN: r257294

domwalk.h (dom_walker::dom_walker): Add additional constructor for specifying RPO order and allow NULL for that.

2018-02-01  Richard Biener  <rguenther@suse.de>

* domwalk.h (dom_walker::dom_walker): Add additional constructor
for specifying RPO order and allow NULL for that.
* domwalk.c (dom_walker::dom_walker): Likewise.
(dom_walker::walk): Handle NULL RPO order.
* tree-into-ssa.c (rewrite_dom_walker): Do not walk dom children
in RPO order.
(rewrite_update_dom_walker): Likewise.
(mark_def_dom_walker): Likewise.

* gcc.dg/graphite/pr35356-1.c: Adjust.

From-SVN: r257293

[AArch64] Fix SVE testsuite failures for ILP32 (PR 83846)

The SVE tests are split into code-quality compile tests and runtime
tests.  A lot of the former are geared towards LP64.  It would be
possible (but tedious!) to mark up every line that is expected to work
only for LP64, but I think it would be a constant source of problems.

Since the code has not been tuned for ILP32 yet, I think the best
thing is to select only the runtime tests for that combination.
They all pass on aarch64-elf and aarch64_be-elf except vec-cond-[34].c,
which are unsupported due to the lack of fenv support.

The patch also replaces uses of built-in types with stdint.h types
where possible.  (This excludes tests that change the endianness,
since we can't assume that system header files work in that case.)

2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
PR testsuite/83846
* gcc.target/aarch64/sve/aarch64-sve.exp: Only do *_run tests
for ILP32.
* gcc.target/aarch64/sve/clastb_2_run.c (main): Use TYPE instead
of hard-coding the choice.
* gcc.target/aarch64/sve/clastb_4_run.c (main): Likewise.
* gcc.target/aarch64/sve/clastb_5_run.c (main): Likewise.
* gcc.target/aarch64/sve/clastb_3_run.c (main): Likewise.  Generalize
memset call.
* gcc.target/aarch64/sve/const_pred_1.C: Include stdint.h and use
stdint.h types.
* gcc.target/aarch64/sve/const_pred_2.C: Likewise.
* gcc.target/aarch64/sve/const_pred_3.C: Likewise.
* gcc.target/aarch64/sve/const_pred_4.C: Likewise.
* gcc.target/aarch64/sve/load_const_offset_2.c: Likewise.
* gcc.target/aarch64/sve/logical_1.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_1.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_2.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_3.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_4.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_5.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_6.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_7.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_8.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_1.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_2.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_3.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_4.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_1.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_2.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_2_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_3.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_3_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_4.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_4_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_7.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_8.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_8_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_9.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_9_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_10.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_10_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_11.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_11_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_12.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_12_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_13.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_13_run.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_14.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_18.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_19.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_20.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_21.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_22.c: Likewise.
* gcc.target/aarch64/sve/struct_vect_23.c: Likewise.
* gcc.target/aarch64/sve/popcount_1.c (popcount_64): Use
__builtin_popcountll rather than __builtin_popcountl.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r257290

[AArch64] Handle SVE subregs that are effectively REVs

Subreg reads should be equivalent to storing the inner register to
memory and loading the appropriate memory bytes back, with subreg
writes doing the reverse.  For the reasons explained in the comments,
this isn't what happens for big-endian SVE if we simply reinterpret
one vector register as having a different element size, so the
conceptual store and load is needed in the general case.

However, that obviously produces poor code if we do it too often.
The patch therefore adds a pattern for handling the operation in
registers.  This copes with the important case of a VIEW_CONVERT
created by tree-vect-slp.c:duplicate_and_interleave.

It might make sense to tighten the predicates in aarch64-sve.md so
that such subregs are not allowed as operands to most instructions,
but that's future work.

This fixes the sve/slp_*.c tests on aarch64_be.

2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* config/aarch64/aarch64-protos.h (aarch64_split_sve_subreg_move)
(aarch64_maybe_expand_sve_subreg_move): Declare.
* config/aarch64/aarch64.md (UNSPEC_REV_SUBREG): New unspec.
* config/aarch64/predicates.md (aarch64_any_register_operand): New
predicate.
* config/aarch64/aarch64-sve.md (mov<mode>): Optimize subreg moves
that are semantically a reverse operation.
(*aarch64_sve_mov<mode>_subreg_be): New pattern.
* config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move):
(aarch64_replace_reg_mode, aarch64_split_sve_subreg_move): New
functions.
(aarch64_can_change_mode_class): For big-endian, forbid changes
between two SVE modes if they have different element sizes.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r257289

[AArch64] Prefer LD1RQ for big-endian SVE

This patch deals with cases in which a CONST_VECTOR contains a
repeating bit pattern that is wider than one element but narrower
than 128 bits.  The current code:

* treats the repeating pattern as a single element
* uses the associated LD1R to load and replicate it (such as LD1RD
  for 64-bit patterns)
* uses a subreg to cast the result back to the original vector type

The problem is that for big-endian targets, the final cast is
effectively a form of element reverse.  E.g. say we're using LD1RD to load
16-bit elements, with h being the high parts and l being the low parts:

                               +-----+-----+-----+-----+-----+----
                         lanes |  0  |  1  |  2  |  3  |  4  | ...
                               +-----+-----+-----+-----+-----+----
     memory              bytes |h0 l0 h1 l1 h2 l2 h3 l3 h0 l0 ....
                               +----------------------------------
                                 V  V  V  V  V  V  V  V
                     ----------+-----------------------+
    register         ....      |           0           |
     after           ----------+-----------------------+  lsb
     LD1RD           .... h3 l3 h0 l0 h1 l1 h2 l2 h3 l3|
                     ----------------------------------+

                     ----+-----+-----+-----+-----+-----+
    expected         ... |  4  |  3  |  2  |  1  |  0  |
    register         ----+-----+-----+-----+-----+-----+  lsb
    contents         .... h0 l0 h3 l3 h2 l2 h1 l1 h0 l0|
                     ----------------------------------+

A later patch fixes the handling of general subregs to account
for this, but it means that we need to do a REV instruction
after the load.  It seems better to use LD1RQ[BHW] on a 128-bit
pattern instead, since that gets the endianness right without
a separate fixup instruction.

2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* config/aarch64/aarch64.c (aarch64_expand_sve_const_vector): Prefer
the TImode handling for big-endian targets.

gcc/testsuite/
* gcc.target/aarch64/sve/slp_2.c: Expect LD1RQ to be used instead
of LD1R[HWD] for multi-element constants on big-endian targets.
* gcc.target/aarch64/sve/slp_3.c: Likewise.
* gcc.target/aarch64/sve/slp_4.c: Likewise.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r257288

[AArch64] Use all SVE LD1RQ variants

The fallback way of handling a repeated 128-bit constant vector for SVE
is to force the 128 bits to the constant pool and use LD1RQ to load it.
Previously the code always used the byte variant of LD1RQ (LD1RQB),
with a preceding BSWAP for big-endian targets.  However, that BSWAP
doesn't handle all cases correctly.

The simplest fix seemed to be to use the LD1RQ appropriate for the
element size.

This helps to fix some of the sve/slp_*.c tests for aarch64_be,
although a later patch is needed as well.

2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* config/aarch64/aarch64-sve.md (sve_ld1rq): Replace with...
(*sve_ld1rq<Vesize>): ... this new pattern.  Handle all element sizes,
not just bytes.
* config/aarch64/aarch64.c (aarch64_expand_sve_widened_duplicate):
Remove BSWAP handing for big-endian targets and use the form of
LD1RQ appropariate for the mode.

gcc/testsuite/
* gcc.target/aarch64/sve/slp_2.c: Expect LD1RQD rather than LD1RQB.
* gcc.target/aarch64/sve/slp_3.c: Expect LD1RQW rather than LD1RQB.
* gcc.target/aarch64/sve/slp_4.c: Expect LD1RQH rather than LD1RQB.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r257287

[AArch64] Generalise aarch64_simd_valid_immediate for SVE

The current aarch64_simd_valid_immediate code predates the move
to the new CONST_VECTOR representation, so for variable-length SVE
it only handles duplicates of single elements, rather than duplicates
of repeating patterns.

This patch removes the restriction.  It means that the validity
of a duplicated constant depends only on the bit pattern, not on
the mode used to represent it.

The patch is needed by a later big-endian fix.

2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Handle
all CONST_VECTOR_DUPLICATE_P vectors, not just those with a single
duplicated element.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r257286

[AArch64] Tighten aarch64_secondary_reload condition (PR 83845)

aarch64_secondary_reload enforced a secondary reload via
aarch64_sve_reload_be for memory and pseudo registers, but failed
to do the same for subregs of pseudo registers.  To avoid this and
any similar problems, the patch instead tests for things that the move
patterns handle directly; if the operand isn't one of those, we should
use the reload pattern instead.

The patch fixes an ICE in sve/mask_struct_store_3.c for aarch64_be,
where the bogus target description was (rightly) causing LRA to cycle.

2018-02-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
PR tearget/83845
* config/aarch64/aarch64.c (aarch64_secondary_reload): Tighten
check for operands that need to go through aarch64_sve_reload_be.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r257285

re PR tree-optimization/81661 (ICE in gimplify_modify_expr, at gimplify.c:5638)

PR tree-optimization/81661
PR tree-optimization/84117
* tree-eh.h (rewrite_to_non_trapping_overflow): Declare.
* tree-eh.c: Include gimplify.h.
(find_trapping_overflow, replace_trapping_overflow,
rewrite_to_non_trapping_overflow): New functions.
* tree-vect-loop.c: Include tree-eh.h.
(vect_get_loop_niters): Use rewrite_to_non_trapping_overflow.
* tree-data-ref.c: Include tree-eh.h.
(get_segment_min_max): Use rewrite_to_non_trapping_overflow.

* gcc.dg/pr81661.c: New test.
* gfortran.dg/pr84117.f90: New test.

From-SVN: r257284

PR 83705 Repeat with large values

This patch fixes the regression by increasing the limit where we fall
back to runtime to 2**28 elements, which is the same limit where
previous releases failed. The are still bugs in the runtime
evaluation, so in many cases longer characters will still fail, so
print a warning message.

Regtested on x86_64-pc-linux-gnu.

gcc/fortran/ChangeLog:

2018-02-01  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/83705
* simplify.c (gfc_simplify_repeat): Increase limit for deferring
to runtime, print a warning message.

gcc/testsuite/ChangeLog:

2018-02-01  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/83705
* gfortran.dg/repeat_7.f90: Catch warning message.

From-SVN: r257281

compiler: check for nil receiver in value method

    We already dereference the pointer to copy the value, but if the
    method does not use the value then the pointer dereference may be
    optimized away.  Do an explicit nil check so that we get the panic
    that is required.

    Fixes golang/go#19806

    Reviewed-on: https://go-review.googlesource.com/91275

* go.go-torture/execute/printnil.go: New test.

From-SVN: r257280

Daily bump.

From-SVN: r257279

elf.c (elf_add): Close descriptor if we use a debugfile.

* elf.c (elf_add): Close descriptor if we use a debugfile.
* btest.c (check_open_files): New static function.
(main): Call check_open_files.

From-SVN: r257275

Update gcc .po files.

* be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po,
ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po,
zh_TW.po: Update.

From-SVN: r257274

Update cpplib .po files.

* be.po, ca.po, da.po, de.po, el.po, eo.po, es.po, fi.po, fr.po,
id.po, ja.po, nl.po, pr_BR.po, ru.po, sr.po, sv.po, tr.po, uk.po,
vi.po, zh_CN.po, zh_TW.po: Update.

From-SVN: r257273

Fix comdat_group check with Solaris as

* lib/target-supports.exp (check_effective_target_comdat_group):
Allow for Solaris as comdat syntax.

* g++.dg/debug/dwarf2/nested-4.C: Xfail scan-assembler-times on
Solaris with comdat_group support and as.

From-SVN: r257272

re PR c/81779 (bool define from stdbool.h suppresses -Wdeclaration-after-statement)

PR c/81779
* c-parser.c (c_parser_compound_statement_nostart): Call
expansion_point_location_if_in_system_header.

* gcc.dg/pr81779.c: New test.

From-SVN: r257271

re PR rtl-optimization/84123 (internal compiler error: in gen_rtx_SUBREG, at emit-rtl.c:908, alpha linux.)

PR rtl-optimization/84123
* combine.c (change_zero_ext): Check if hard register satisfies
can_change_dest_mode before calling gen_lowpart_SUBREG.

From-SVN: r257270

re PR fortran/84116 (ICE in gfc_match_omp_clauses, at fortran/openmp.c:1354)

PR fortran/84116
* openmp.c (gfc_match_omp_clauses): If all the linear
gfc_match_omp_variable_list calls failed, don't gfc_free_omp_namelist
nor set *head = NULL.  Formatting fixes.

* gfortran.dg/gomp/pr84116.f90: New test.

From-SVN: r257266

re PR c++/83993 (ICE: constant not recomputed when ADDR_EXPR changed)

PR c++/83993
* constexpr.c (cxx_eval_outermost_constant_expr): Build NOP_EXPR
around non-constant ADDR_EXPRs rather than clearing TREE_CONSTANT
on ADDR_EXPR.

* g++.dg/init/pr83993-2.C: New test.

From-SVN: r257265

re PR c++/83993 (ICE: constant not recomputed when ADDR_EXPR changed)

PR c++/83993
* constexpr.c (diag_array_subscript): Emit different diagnostics
if TYPE_DOMAIN (arraytype) is NULL.
(cxx_eval_array_reference, cxx_eval_store_expression): For arrays
with NULL TYPE_DOMAIN use size_zero_node as nelts.

* g++.dg/init/pr83993-1.C: New test.
* g++.dg/cpp0x/pr83993.C: New test.

From-SVN: r257264

re PR fortran/84088 ([nvptx] libgomp.oacc-fortran/declare-*.f90 execution fails)

2018-01-31  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/84088
* trans-expr.c (gfc_conv_procedure_call): If the parm expr is
an address expression passed to an assumed rank dummy, convert
to an indirect reference.

2018-01-31  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/84088
* gfortran.dg/pr84088.f90 : New test.

From-SVN: r257262

dump-parse-tree.c (write_proc): Use sym_name (which may be sym->binding_label) instead of sym->name.

2018-01-31  Thomas Koenig  <tkoenig@gcc.gnu.org>

* dump-parse-tree.c (write_proc): Use sym_name (which may
be sym->binding_label) instead of sym->name.

From-SVN: r257260

Use gfc_charlen_t instead of int in gfc_conv_string_init

Committed as obvious.

2018-01-31  Janne Blomqvist  <jb@gcc.gnu.org>

        * trans-const.c (gfc_conv_string_init): Use gfc_charlen_t instead
        of int for slen.

From-SVN: r257258

re PR target/82444 (ICE in ira_init_register_move_cost, at ira.c:1581)

2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>

PR target/82444
* ira.c (ira_init_register_move_cost): Remove assert.

2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>

PR target/82444
* gcc.target/i386/pr82444.c: New.

From-SVN: r257254

altivec-13.c: Remove VSX-requiring built-ins.

[testsuite]

2018-01-31  Will Schmidt  <will_schmidt@vnet.ibm.com>

* gcc.target/powerpc/altivec-13.c: Remove VSX-requiring built-ins.
* gcc.target/powerpc/vsx-13.c: New.

From-SVN: r257253

compiler: lower expression types in lowering pass

    Ensure that array types with complicated length expressions are
    handled correctly by lowering expression types in the lowering pass.

    This required some adjustment of constant expression types to not
    report too many errors for circular constant expressions.  We now
    record error types in the Named_constant type.  If we find the
    circularity due to lowering the Named_constant, we use that location
    for the error message; this retains the error location we used to use.

    Fixes golang/go#23545

    Reviewed-on: https://go-review.googlesource.com/91035

From-SVN: r257250

runtime: fix type descriptor name in C code

    I forgot to update the name of the map[string]bool type descriptor
    used in go-fieldtrack.c.  This didn't cause any errors because it's a
    weak symbol, and the current testsuite has no field tracking tests.

    Reviewed-on: https://go-review.googlesource.com/91096

From-SVN: r257249

gotest: accept symbols with leading dot

    On AIX nm displays symbols with a leading dot; don't discard such
    symbols.

    While we're here stop doing fgrep -v '$', symbol names no longer
    contain '$' anyhow.

    Reviewed-on: https://go-review.googlesource.com/91095

From-SVN: r257247

re PR c++/84092 (ICE on C++14 code with variable template: in build_qualified_name, at cp/tree.c:2043)

/cp
2018-01-31  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84092
* semantics.c (finish_qualified_id_expr): When handling an
UNBOUND_CLASS_TEMPLATE only adjust qualifying_class and expr.

/testsuite
2018-01-31  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84092
* g++.dg/cpp1y/var-templ57.C: New.

From-SVN: r257242

re PR c++/84138 (ICE folding broken constant)

PR c++/84138
* cp-gimplify.c (cp_fold): Check if X is an error node before
calling useless_type_conversion_p.

* g++.dg/diagnostic/pr84138.C: New test.

From-SVN: r257240

re PR rtl-optimization/84071 (wrong elimination of zero-extension after sign-extended load)

PR rtl-optimization/84071
* doc/tm.texi.in (WORD_REGISTER_OPERATIONS): Add explicit case.
* doc/tm.texi: Regenerate.

From-SVN: r257237

net: rename TestAddr6 to avoid gotest confusion

    On ppc64 gotest treats data variables whose names begin with "Test" as
    tests to run.  This is to support the function descriptors used for
    ppc64 ELF ABI v1.  This causes gotest to think that TestAddr6 is a
    test, when it is actually a variable.  For a simple fix until we can
    figure out how to write gotest properly, rename the variable.

    Fixes golang/go#23623

    Reviewed-on: https://go-review.googlesource.com/90995

From-SVN: r257235

Use pointer sized array indices.

Using pointer sized variables (e.g. size_t / ptrdiff_t) when the
variables are used as array indices allows accessing larger arrays,
and can be a slight performance improvement due to no need for sign or
zero extending, or masking.

Regtested on x86_64-pc-linux-gnu.

libgfortran/ChangeLog:

2018-01-31  Janne Blomqvist  <jb@gcc.gnu.org>

* generated/cshift1_16.c (cshift1): Regenerated.
* generated/cshift1_4.c (cshift1): Regenerated.
* generated/cshift1_8.c (cshift1): Regenerated.
* generated/eoshift1_16.c (eoshift1): Regenerated.
* generated/eoshift1_4.c (eoshift1): Regenerated.
* generated/eoshift1_8.c (eoshift1): Regenerated.
* generated/eoshift3_16.c (eoshift3): Regenerated.
* generated/eoshift3_4.c (eoshift3): Regenerated.
* generated/eoshift3_8.c (eoshift3): Regenerated.
* generated/in_pack_c10.c (internal_pack_c10): Regenerated.
* generated/in_pack_c16.c (internal_pack_c16): Regenerated.
* generated/in_pack_c4.c (internal_pack_c4): Regenerated.
* generated/in_pack_c8.c (internal_pack_c8): Regenerated.
* generated/in_pack_i1.c (internal_pack_1): Regenerated.
* generated/in_pack_i16.c (internal_pack_16): Regenerated.
* generated/in_pack_i2.c (internal_pack_2): Regenerated.
* generated/in_pack_i4.c (internal_pack_4): Regenerated.
* generated/in_pack_i8.c (internal_pack_8): Regenerated.
* generated/in_pack_r10.c (internal_pack_r10): Regenerated.
* generated/in_pack_r16.c (internal_pack_r16): Regenerated.
* generated/in_pack_r4.c (internal_pack_r4): Regenerated.
* generated/in_pack_r8.c (internal_pack_r8): Regenerated.
* generated/in_unpack_c10.c (internal_unpack_c10): Regenerated.
* generated/in_unpack_c16.c (internal_unpack_c16): Regenerated.
* generated/in_unpack_c4.c (internal_unpack_c4): Regenerated.
* generated/in_unpack_c8.c (internal_unpack_c8): Regenerated.
* generated/in_unpack_i1.c (internal_unpack_1): Regenerated.
* generated/in_unpack_i16.c (internal_unpack_16): Regenerated.
* generated/in_unpack_i2.c (internal_unpack_2): Regenerated.
* generated/in_unpack_i4.c (internal_unpack_4): Regenerated.
* generated/in_unpack_i8.c (internal_unpack_8): Regenerated.
* generated/in_unpack_r10.c (internal_unpack_r10): Regenerated.
* generated/in_unpack_r16.c (internal_unpack_r16): Regenerated.
* generated/in_unpack_r4.c (internal_unpack_r4): Regenerated.
* generated/in_unpack_r8.c (internal_unpack_r8): Regenerated.
* generated/reshape_c10.c (reshape_c10): Regenerated.
* generated/reshape_c16.c (reshape_c16): Regenerated.
* generated/reshape_c4.c (reshape_c4): Regenerated.
* generated/reshape_c8.c (reshape_c8): Regenerated.
* generated/reshape_i16.c (reshape_16): Regenerated.
* generated/reshape_i4.c (reshape_4): Regenerated.
* generated/reshape_i8.c (reshape_8): Regenerated.
* generated/reshape_r10.c (reshape_r10): Regenerated.
* generated/reshape_r16.c (reshape_r16): Regenerated.
* generated/reshape_r4.c (reshape_r4): Regenerated.
* generated/reshape_r8.c (reshape_r8): Regenerated.
* generated/shape_i1.c (shape_1): Regenerated.
* generated/shape_i16.c (shape_16): Regenerated.
* generated/shape_i2.c (shape_2): Regenerated.
* generated/shape_i4.c (shape_4): Regenerated.
* generated/shape_i8.c (shape_8): Regenerated.
* generated/spread_c10.c (spread_scalar_c10): Regenerated.
* generated/spread_c16.c (spread_scalar_c16): Regenerated.
* generated/spread_c4.c (spread_scalar_c4): Regenerated.
* generated/spread_c8.c (spread_scalar_c8): Regenerated.
* generated/spread_i1.c (spread_scalar_i1): Regenerated.
* generated/spread_i16.c (spread_scalar_i16): Regenerated.
* generated/spread_i2.c (spread_scalar_i2): Regenerated.
* generated/spread_i4.c (spread_scalar_i4): Regenerated.
* generated/spread_i8.c (spread_scalar_i8): Regenerated.
* generated/spread_r10.c (spread_scalar_r10): Regenerated.
* generated/spread_r16.c (spread_scalar_r16): Regenerated.
* generated/spread_r4.c (spread_scalar_r4): Regenerated.
* generated/spread_r8.c (spread_scalar_r8): Regenerated.
* intrinsics/random.c (jump): Use size_t for array index in loop.
(getosrandom): Likewise.
(arandom_r4): Make n an index_type.
(arandom_r8): Likewise.
(arandom_r10): Likewise.
(arandom_r16): Likewise.
(scramble_seed): Use size_t for array index in loop.
* m4/cshift1.m4: Make i an index_type.
* m4/eoshift1.m4: Likewise.
* m4/eoshift3.m4: Likewise.
* m4/in_pack.m4: Make n an index_type.
* m4/in_unpack.m4: Likewise.
* m4/reshape.m4: Make n and dim index_type's.
* m4/shape.m4: Make n an index_type.
* m4/spread.m4: Likewise, use index_type argument rather than
copying to int.
* runtime/bounds.c (bounds_ifunction_return): Make n an
index_type.
* runtime/in_pack_generic.c (internal_pack): Likewise.
* runtime/in_unpack_generic.c (internal_unpack): Make n and size
index_type's.

From-SVN: r257234

PR 78534 Reinstate better string copy algorithm

As part of the change to larger character lengths, the string copy
algorithm was temporarily pessimized to get around some spurious
-Wstringop-overflow warnings.  Having tried a number of variations of
this algorithm I have managed to get it down to one spurious warning,
only with -O1 optimization, in the testsuite.  This patch reinstates
the optimized variant and modifies this one testcase to ignore the
warning.

Regtested on x86_64-pc-linux-gnu.

gcc/fortran/ChangeLog:

2018-01-31  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/78534
* trans-expr.c (fill_with_spaces): Use memset instead of
generating loop.
(gfc_trans_string_copy): Improve opportunity to use builtins with
constant lengths.

gcc/testsuite/ChangeLog:

2018-01-31  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/78534
* gfortran.dg/allocate_deferred_char_scalar_1.f03: Prune
-Wstringop-overflow warnings due to spurious warning with -O1.
* gfortran.dg/char_cast_1.f90: Update dump scan pattern.
* gfortran.dg/transfer_intrinsic_1.f90: Likewise.

From-SVN: r257233

re PR tree-optimization/84132 (tree-data-ref.c:3938: poor coding ?)

2018-01-31  Richard Biener  <rguenther@suse.de>

PR tree-optimization/84132
* tree-data-ref.c (analyze_miv_subscript): Properly
check whether evolution_function_is_affine_multivariate_p
before calling gcd_of_steps_may_divide_p.

* g++.dg/torture/pr84132.C: New testcase.

From-SVN: r257232

pr81360.C: Drop unintended -O2 from dg-options and dg-final scan.

* g++.dg/torture/pr81360.C: Drop unintended -O2 from dg-options and
dg-final scan.

From-SVN: r257230

re PR target/83618 (_rdpid_u32 doesn't work on 64-bit targets as gas expects the 64-bit register)

PR target/83618

gcc/
* config/i386/i386.c (ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
* config/i386/i386.md (rdpid_rex64) New.
(rdpid): Make 32bit only.

gcc/testsuite/
* gcc.target/i386/rdpid.c: Remove "eax".

From-SVN: r257229

re PR lto/84105 (Segmentation fault in pp_tree_identifier() during LTO)

PR lto/84105
* tree-pretty-print.c (dump_generic_node): Handle a TYPE_NAME with
an IDENTIFIER_NODE for FUNCTION_TYPE's.

From-SVN: r257228

Revert
2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>

* config/sparc/sparc.md (vxworks_load_got): Set the GOT register.

From-SVN: r257227

[AArch64] PR tree-optimization/64946: XFAIL gcc.target/aarch64/vect-abs-compile.c

This test has been failing since forever, it has never passed AFAIK.
The PR details the vectoriser deficiency.
I propose we xfail this with a reference to the PR.

        PR tree-optimization/64946
        * gcc.target/aarch64/vect-abs-compile.c: XFAIL byte and half-word
        scan-assembler checks.

From-SVN: r257225

re PR rtl-optimization/84071 (wrong elimination of zero-extension after sign-extended load)

PR rtl-optimization/84071
* combine.c (record_dead_and_set_regs_1): Record the source unmodified
for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.

From-SVN: r257224

[ARC] Add 'aux' variable attribute.

The 'aux' variable attribute is used to directly access the auxiliary
register space from C.

gcc/
2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/arc.c (arc_handle_aux_attribute): New function.
        (arc_attribute_table): Add 'aux' attribute.
        (arc_in_small_data_p): Consider aux like variables.
        (arc_is_aux_reg_p): New function.
        (arc_asm_output_aligned_decl_local): Ignore 'aux' like variables.
        (arc_get_aux_arg): New function.
        (prepare_move_operands): Handle aux-register access.
        (arc_handle_aux_attribute): New function.
        * doc/extend.texi (ARC Variable attributes): Add subsection.

testsuite/
2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>

        * gcc.target/arc/taux-1.c: New test.
        * gcc.target/arc/taux-2.c: Likewise.

From-SVN: r257223

[ARC] Add 'uncached' attribute.

The _Uncached type qualifier can be used to bypass the cache without
resorting to declaring variables as volatile.

gcc/
2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc-protos.h (arc_is_uncached_mem_p): Function proto.
* config/arc/arc.c (arc_handle_uncached_attribute): New function.
(arc_attribute_table): Add 'uncached' attribute.
(arc_print_operand): Print '.di' flag for uncached memory
accesses.
(arc_in_small_data_p): Do not consider for small data the uncached
types.
(arc_is_uncached_mem_p): New function.
* config/arc/predicates.md (compact_store_memory_operand): Check
for uncached memory accesses.
(nonvol_nonimm_operand): Likewise.
* gcc/doc/extend.texi (ARC Type Attribute): New subsection.

gcc/testsuite
2018-01-31  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/uncached.c: New test.

From-SVN: r257222

Fix gnat.dg/lto20.adb XPASS

PR lto/83954
* gnat.dg/lto20.adb: Remove dg-excess-errors.

From-SVN: r257221

re PR preprocessor/69869 (internal compiler error: Segmentation fault in call to skip_macro_block_comment when using '-traditional-cpp')

PR preprocessor/69869
* traditional.c (skip_macro_block_comment): Return bool, true if
the macro block comment is unterminated.
(copy_comment): Use return value from skip_macro_block_comment instead
of always false.

* gcc.dg/cpp/trad/pr69869.c: New test.

From-SVN: r257220

re PR c/84100 (Function __attribute__((optimize(align-loops=32))) gives spurious warning and is ignored)

PR c/84100
* common.opt (falign-functions=, falign-jumps=, falign-labels=,
falign-loops=): Add Optimization flag.

* gcc.dg/pr84100.c: New test.

From-SVN: r257219

go-gcc.cc (Gcc_backend::convert_tree): New private method.

* go-gcc.cc (Gcc_backend::convert_tree): New private method.
(Gcc_backend::constructor_expression): Call it.
(Gcc_backend::assignment_statement): Likewise.
(Gcc_backend::temporary_variable): Likewise.

Fixes https://golang.org/issue/#23606

From-SVN: r257218

re PR target/84064 (ICE in ix86_expand_prologue related to -fstack-clash-protection and memcpy on i686)

PR target/84064
* i386.c (ix86_adjust_stack_and_probe_stack_clash): New argument
INT_REGISTERS_SAVED.  Check it prior to calling
get_scratch_register_on_entry.
(ix86_adjust_stack_and_probe): Similarly.
(ix86_emit_probe_stack_range): Similarly.
(ix86_expand_prologue): Corresponding changes.

PR target/84064
* gcc.target/i386/pr84064: New test.

From-SVN: r257217

compiler: Function_type and Backend_function_type should not be identical

    Function_type and Backend_function_type have different backend
    representations, so they should not be identical. Otherwise it
    confuses Type::type_btypes map.

    Reviewed-on: https://go-review.googlesource.com/90975

From-SVN: r257216

Daily bump.

From-SVN: r257215

re PR debug/84131 (Fortran dynamical array debug info)

PR debug/84131
* trans-array.c (gfc_get_descriptor_offsets_for_info): Set *data_off
to DATA_FIELD's offset rather than OFFSET_FIELD's offset.

From-SVN: r257212

re PR fortran/84134 (ICE: Floating point exception)

2017-01-30  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/84134
* array.c (gfc_ref_dimen_size): Whitespace fixes.  If stride is
zero, return false.

2017-01-30  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/84134
* gfortran.dg/data_implied_do_2.f90: New test.

From-SVN: r257211

Fix use of Solaris values-Xc.o (PR target/40411)

PR target/40411
* config/sol2.h (STARTFILE_ARCH_SPEC): Use -std=c*,
-std=iso9899:199409 instead of -pedantic to select values-Xc.o.

From-SVN: r257209

pr68318_1.f90: Add closing bracket in dejagnu directive.

2018-01-30  Janus Weil  <janus@gcc.gnu.org>

* gfortran.dg/pr68318_1.f90: Add closing bracket in dejagnu directive.

From-SVN: r257208

Add path for gcc.target/powerpc/pr84112.c in ChangeLog.

From-SVN: r257207

re PR fortran/84133 (ICE in gimplify_var_or_parm_decl, at gimplify.c:2706)

2018-01-30  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/84133
* frontend-passes (matmul_to_var_expr): Return early if
in association list.
(inline_matmul_assign): Likewise.

2018-01-30  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/84133
* gfortran.dg/inline_matmul_21.f90: New test case.

From-SVN: r257206

Fix g++.dg/torture/pr81360.C scan-ipa-dump

* g++.dg/torture/pr81360.C: Add -fdump-ipa-icf to dg-options.

From-SVN: r257205

re PR target/84112 (powerpc64le ICE in LRA on openjdk)

2018-01-30  Vladimir Makarov  <vmakarov@redhat.com>

PR target/84112
* lra-constraints.c (curr_insn_transform): Process AND in the
address.

2018-01-30  Vladimir Makarov  <vmakarov@redhat.com>

PR target/84112
* pr84112.c: New.

From-SVN: r257204

re PR target/83986 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2348)

PR rtl-optimization/83986
* sched-deps.c (sched_analyze_insn): For frame related insns, add anti
dependence against last_pending_memory_flush in addition to
pending_jump_insns.

* gcc.dg/pr83986.c: New test.

From-SVN: r257203

PR c++/84091 - ICE with local class in lambda in template.

* decl2.c (determine_visibility): Look for outer containing template
instantiation.

From-SVN: r257202

PR c++/84098 - ICE with lambda in template NSDMI.

* pt.c (instantiate_class_template_1): Ignore more lambdas.

From-SVN: r257199

re PR fortran/37577 ([meta-bug] change internal array descriptor format for better syntax, C interop TR, rank 15)

2018-01-30  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/37577
* libgfortran.h: Remove GFC_DTYPE_DERIVED_1, GFC_DTYPE_DERIVED_2,
GFC_DTYPE_DERIVED_4, GFC_DTYPE_DERIVED_8 and GFC_DTYPE_DERIVED_16.
* m4/cshift1.m4: Remove GFC_DTYPE_DERIVED_1.
* generated/cshift1_16.c: Regenerated.
* generated/cshift1_4.c: Regenerated.
* generated/cshift1_8.c: Regenerated.
* intrinsics/cshift0.c: Remove GFC_DTYPE_DERIVED_1.
* intrinsics/pack_generic.c (pack): Move handling of other types
into separate switch statement.
* intrinsics/spread_generic.c (spread): Likewise.
(spread_scalar): Likewise.
* intrinsics/unpack_generic.c (unpack1): Likewise.
(unpack0): Likewise.
* runtime/in_pack_generic.c (internal_pack): Likewise.
* runtime/in_unpack_generic.c (internal_unpack): Likewise.

From-SVN: r257195

[PR81611] accept copies in simple_iv_increment_p

If there are copies between the GIMPLE_PHI at the loop body and the
increment that reaches it (presumably through a back edge), still
regard it as a simple_iv_increment, so that we won't consider the
value in the back edge eligible for forwprop.  Doing so would risk
making the phi node and the incremented conflicting value live
within the loop, and the phi node to be preserved for propagated
uses after the loop.

for  gcc/ChangeLog

PR tree-optimization/81611
* tree-ssa-dom.c (simple_iv_increment_p): Skip intervening
copies.

From-SVN: r257194

rs6000.c (rs6000_internal_arg_pointer): Only return a reg rtx.

2018-01-30  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_internal_arg_pointer): Only return
a reg rtx.

From-SVN: r257193

[PATCH, rs6000] pr58684, pr83759 xfail test cases that fail on powerpc64.

This patch xfails a few test cases on powerpc64 that fail after r256380
due to a longstanding issue with floating-point compares.

See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58684 for more information.

2018-01-30  Bill Seurer  <seurer@linux.vnet.ibm.com>

PR 58684
* gcc/testsuite/gcc.dg/torture/inf-compare-1.c: Add xfail.
* gcc/testsuite/gcc.dg/torture/inf-compare-2.c: Add xfail.
* gcc/testsuite/gcc.dg/torture/inf-compare-3.c: Add xfail.
* gcc/testsuite/gcc.dg/torture/inf-compare-4.c: Add xfail.

From-SVN: r257190

re PR tree-optimization/84111 (Compile time hog w/ -O2)

PR tree-optimization/84111
* tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): Skip
inner loops added during recursion, as they don't have up-to-date
SSA form.

* gcc.c-torture/compile/pr84111.c: New test.

From-SVN: r257188

re PR ipa/83179 (gcc.dg/ipa/inline-1.c fail)

PR ipa/83179
* gcc.dg/ipa/inline-2.c: Fix template.
* gcc.dg/ipa/inline-3.c: Fix template.

From-SVN: r257186

re PR ipa/81360 (ice in estimate_edge_growth, at ipa-inline.h:86)

PR ipa/81360
* ipa-inline.c (can_inline_edge_p): Break out late tests to...
(can_inline_edge_by_limits_p): ... here.
(can_early_inline_edge_p, check_callers,
update_caller_keys, update_callee_keys, recursive_inlining,
add_new_edges_to_heap, speculation_useful_p,
inline_small_functions,
inline_small_functions, flatten_function,
inline_to_all_callers_1): Update.

* g++.dg/torture/pr81360.C: New testcase

From-SVN: r257184

re PR lto/83954 (LTO: Bogus -Wlto-type-mismatch warning for array of pointer to incomplete type)

PR lto/83954
* lto-symtab.c (warn_type_compatibility_p): Silence false positive
for type match warning on arrays of pointers.
* gcc.dg/lto/pr83954.h: New testcase.
* gcc.dg/lto/pr83954_0.c: New testcase.
* gcc.dg/lto/pr83954_1.c: New testcase.

From-SVN: r257183

profile-count.c (profile_count::combine_with_ipa_count): Handle zeros correctly.

* profile-count.c (profile_count::combine_with_ipa_count): Handle
zeros correctly.

From-SVN: r257182

re PR target/83008 ([performance] Is it better to avoid extra instructions in data passing between loops?)

2018-01-30  Richard Biener  <rguenther@suse.de>

PR tree-optimization/83008
* tree-vect-slp.c (vect_analyze_slp_cost_1): Properly cost
invariant and constant vector uses in stmts when they need
more than one stmt.

From-SVN: r257181

Disable SHF_MERGE on Solaris 10/x86 (PR bootstrap/84017)

gcc/testsuite:
PR bootstrap/84017
* gcc.dg/debug/dwarf2/prod-options.c: Add -fno-merge-debug-strings
to dg-options.
Simplify DW_AT_producer scan.

gcc:
PR bootstrap/84017
* configure.ac (gcc_cv_as_shf_merge): Disable on Solaris 10/x86.
* configure: Regenerate.

From-SVN: r257179

[AArch64] Fix sve/extract_[12].c for big-endian SVE

sve/extract_[12].c were relying on the target-independent optimisation
that removes a redundant vec_select, so that we don't end up with
things like:

    dup v0.4s, v0.4s[0]
    ...use s0...

But that optimisation rightly doesn't trigger for big-endian targets,
because GCC expects lane 0 to be in the high part of the register
rather than the low part.

SVE breaks this assumption -- see the comment at the head of
aarch64-sve.md for details -- so the optimisation is valid for
both endiannesses.  Long term, we probably need some kind of target
hook to make GCC aware of this.

But there's another problem with the current extract pattern: it doesn't
tell the register allocator how cheap an extraction of lane 0 is with
tied registers.  It seems better to split the lane 0 case out into
its own pattern and use tied operands for the FPR<-SIMD case,
so that using different registers has the cost of an extra reload.
I think we want this for both endiannesses, regardless of the hook
described above.

Also, the gen_lowpart in this pattern fails for aarch64_be due to
TARGET_CAN_CHANGE_MODE_CLASS restrictions, so the patch uses gen_rtx_REG
instead.  We're only creating this rtl in order to print it, so there's
no need for anything fancier.

2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_0): New
pattern.
(*vec_extract<mode><Vel>_v128): Require a nonzero lane number.
Use gen_rtx_REG rather than gen_lowpart.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r257178

Fix LRA subreg calculation for big-endian targets

LRA was using a subreg offset of 0 whenever constraints matched
two operands with different modes.  That leads to an invalid offset
(and ICE) on big-endian targets if one of the modes is narrower
than a word.  E.g. if a (reg:SI X) is matched to a (reg:QI Y),
the big-endian subreg should be (subreg:QI (reg:SI X) 3) rather
than (subreg:QI (reg:SI X) 0).

But this raises the issue of what the behaviour should be when the
matched operands occupy different numbers of registers.  Should the
register numbers match, or should the locations of the lsbs match?
Although the documentation isn't clear, reload went for the second
interpretation (which seems the most natural to me):

      /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
         multiple hard register group of scalar integer registers, so that
         for example (reg:DI 0) and (reg:SI 1) will be considered the same
         register.  */

So I think this means that we can/must use the lowpart offset
unconditionally, rather than trying to separate out the multi-register
case.  This also matches the LRA handling of constant integers, which
already uses lowpart subregs.

The patch fixes gcc.target/aarch64/sve/extract_[34].c for aarch64_be.

2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* lra-constraints.c (match_reload): Use subreg_lowpart_offset
rather than 0 when creating partial subregs.

From-SVN: r257177

Expand vec_perm_indices::series_p comment

2018-01-30  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* vec-perm-indices.c (vec_perm_indices::series_p): Give examples
of usage.

From-SVN: r257176

[testsuite] XFAIL gcc.dg/tree-ssa/ssa-dom-cse-2.c on non-NEON arm targets

This test fails to optimise away the PLUS reduction in the loop on arm targets when vectorisation
is not enabled due to absence of SIMD instructions.
From reading the logs and the PR I gather that the presence or absence of SIMD affects the passing of this test
on other targets as well, as evidenced by the long list of xfail targets.
This list looks quite unwieldy to me, but here is a patch adding non-NEON arm to that list.

    * gcc.dg/tree-ssa/ssa-dom-cse-2.c: XFAIL on !arm_neon arm targets.

From-SVN: r257175

Fix AVX-512BITALG test failures

gcc/testsuite
        PR target/83828
* gcc.target/i386/avx512bitalg-vpopcntb-1.c: Fix test.
* gcc.target/i386/avx512bitalg-vpopcntw-1.c: Ditto.
* gcc.target/i386/avx512bitalgvl-vpopcntb-1.c: Ditto.
* gcc.target/i386/avx512bitalgvl-vpopcntw-1.c: Ditto.

From-SVN: r257173

re PR testsuite/81010 (test case gcc.target/powerpc/pr56605.c fails starting with r248958)

PR testsuite/81010
* gcc.target/powerpc/pr56605.c: Update various dg- directives to
better match other tests which require vsx.  Verify the zero
extension is part of the test in the combiner dump.

From-SVN: r257172

internal/syscall/unix: add randomTrap for sh/shbe

    CL 84555 added support for the SuperH architecture, but didn't add the
    randomTrap definition to be used for the getrandom syscall on Linux.
    Add it now.

    Reviewed-on: https://go-review.googlesource.com/90535

From-SVN: r257171

Daily bump.

From-SVN: r257170

re PR libgomp/84096 (Wrong prototype for omp_init_nest_lock_with_hint() in "omp.h.in")

PR libgomp/84096
* omp.h.in (omp_init_nest_lock_with_hint): Use omp_nest_lock_t
instead of omp_lock_t.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r257167

re PR target/81550 (gcc.target/powerpc/loop_align.c fails starting with r250482)

2018-01-29  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/81550
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
and SFmode can go in Altivec registers (-mcpu=power7 for DFmode,
-mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY
flags.  This restores the settings used before the 2017-07-24.
Turning off pre increment/decrement/modify allows IVOPTS to
optimize DF/SF loops where the index is an int.

From-SVN: r257166

compiler: don't insert write barriers if we've seen errors

    The compiler skips the escape analysis pass if it has seen any errors.
    The write barrier pass, especially the check-escapes portion, relies
    on escape analysis running.  So don't run this pass if there have been
    any errors, as it may cause further unreliable error reports.

    Reviewed-on: https://go-review.googlesource.com/90575

From-SVN: r257163

PR c++/68810 - wrong location for reinterpret_cast error.

* cvt.c (cp_convert_to_pointer): Always build a CONVERT_EXPR when
!dofold.

From-SVN: r257161

re PR c++/83996 (ICE with zero-sized array)

PR c++/83996
* constexpr.c (cxx_fold_indirect_ref): Compute ((foo *)&fooarray)[1]
=> fooarray[1] in offset_int.

* g++.dg/ext/pr83996.C: New test.

From-SVN: r257160

re PR c/83966 (ICE in check_function_arguments at gcc/c-family/c-common.c:5617)

PR c/83966
* c-format.c (check_function_format): Check current_function_decl.

* gcc.dg/format/Wsuggest-attribute-1.c: New test.

From-SVN: r257159

re PR bootstrap/80867 (gnat bootstrap broken on powerpc64le-linux-gnu with -O3)

gcc/ChangeLog:

2018-01-29  Richard Biener <rguenther@suse.de>
    Kelvin Nilsen  <kelvin@gcc.gnu.org>

PR bootstrap/80867
* tree-vect-stmts.c (vectorizable_call): Don't call
targetm.vectorize_builtin_md_vectorized_function if callee is
NULL.

Co-Authored-By: Kelvin Nilsen <kelvin@gcc.gnu.org>
From-SVN: r257158

extend.tex: Fix typo in second arg in __builtin_bcdadd_{lt|eq|gt|ov}...

gcc/ChangeLog:

2018-01-22 Carl Love <cel@us.ibm.com>

* doc/extend.tex: Fix typo in second arg in
__builtin_bcdadd_{lt|eq|gt|ov}, and __builtin_bcdsub_{lt|eq|gt|ov}.

From-SVN: r257156

PR c++/83942 - wrong unused warning with static_cast.

* cvt.c (ocp_convert): Call mark_rvalue_use.

From-SVN: r257155

re PR libgomp/84086 ([8 Regresssion] segfault in instantiate_scev_r for libgomp.fortran/examples-4/simd-2.f90 -O1)

2018-01-29  Richard Biener  <rguenther@suse.de>

PR tree-optimization/84086
* tree-ssanames.c: Include cfgloop.h and tree-scalar-evolution.h.
(flush_ssaname_freelist): When SSA names were released reset
the SCEV hash table.

From-SVN: r257152