mesa.git
8 years agoisl: Create per-gen helper libraries for gens 7, 8, and 9
Jason Ekstrand [Sat, 20 Feb 2016 17:22:07 +0000 (09:22 -0800)]
isl: Create per-gen helper libraries for gens 7, 8, and 9

8 years agogenxml: Add MOCS fields to RENDER_SURFACE_STATE
Jason Ekstrand [Sat, 27 Feb 2016 00:11:33 +0000 (16:11 -0800)]
genxml: Add MOCS fields to RENDER_SURFACE_STATE

This allows us to set MOCS as a single uint32_t on all platforms.

8 years agogen/genX_pack: Add genxml to the pack header path
Jason Ekstrand [Wed, 24 Feb 2016 23:51:36 +0000 (15:51 -0800)]
gen/genX_pack: Add genxml to the pack header path

If you have an out-of-tree build, gen8_pack.h and friends will not be in
the same folder as genX_pack.h so this will be a problem.  We fixed
out-of-tree earlier by adding the genxml folder to the includes for the
vulkan driver.  However, this is not a good long-term solution because we
want to use it in ISL as well.

8 years agoisl: Fix isl_surf_get_image_intratile_offset_el()
Nanley Chery [Wed, 24 Feb 2016 20:10:44 +0000 (12:10 -0800)]
isl: Fix isl_surf_get_image_intratile_offset_el()

Consecutive tiles are separated by the size of the tile, not by the
logical tile width.

v2: Remove extra subtraction (Ville)
    Add parenthesis (Jason)
v3: Update the unit tests for the function

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agoanv: remove stray ; after if
Thomas Hindoe Paaboel Andersen [Thu, 25 Feb 2016 21:00:09 +0000 (22:00 +0100)]
anv: remove stray ; after if

Both logic and indentation suggests that the ; were not intended here.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
8 years agoanv/gen8: Emit the 3DSTATE_PS_BLEND packet
Jason Ekstrand [Fri, 26 Feb 2016 20:37:04 +0000 (12:37 -0800)]
anv/gen8: Emit the 3DSTATE_PS_BLEND packet

8 years agoanv/device: Properly handle apiVersion == 0
Jason Ekstrand [Thu, 25 Feb 2016 16:52:35 +0000 (08:52 -0800)]
anv/device: Properly handle apiVersion == 0

From the Vulkan 1.0 spec section 3.2:

"If apiVersion is 0 the implementation must ignore it"

8 years agoMerge remote-tracking branch 'origin/master' into vulkan
Kristian Høgsberg Kristensen [Wed, 24 Feb 2016 20:50:27 +0000 (12:50 -0800)]
Merge remote-tracking branch 'origin/master' into vulkan

8 years agoanv: Set max_hs_threads/max_ds_threads
Kristian Høgsberg Kristensen [Fri, 12 Feb 2016 05:11:48 +0000 (21:11 -0800)]
anv: Set max_hs_threads/max_ds_threads

8 years agoanv: Allocate more push constant space.
Kenneth Graunke [Tue, 23 Feb 2016 01:28:22 +0000 (17:28 -0800)]
anv: Allocate more push constant space.

Previously we allocated 4kB of push constant space for VS, GS, and PS
(for a total of 12kB) no matter what.  This works, but doesn't fully
utilize the space - we have 16kB or 32kB of space.

This makes anv use the same method as brw - divide up the space evenly
among all active shader stages.  This means HS and DS would get space,
if those shader stages existed.

In the future, we can probably do better by inspecting how many push
constants each shader stage uses, and weight things accordingly.  But
this is strictly better than the old code, and ideally we'd justify
a fancier solution with actual performance data.

8 years agoanv: Properly size the push constant L3 area.
Kenneth Graunke [Tue, 23 Feb 2016 01:26:15 +0000 (17:26 -0800)]
anv: Properly size the push constant L3 area.

We were assuming it was 32kB everywhere, reducing the available URB
space.  It's actually 16kB on Ivybridge, Baytrail, and Haswell GT1-2.

8 years agoanv: Emit 3DSTATE_PUSH_CONSTANT_ALLOC_* via a loop.
Kenneth Graunke [Mon, 22 Feb 2016 23:46:23 +0000 (15:46 -0800)]
anv: Emit 3DSTATE_PUSH_CONSTANT_ALLOC_* via a loop.

Now we're emitting HS and DS packets as well.

8 years agoanv: Emit 3DSTATE_URB_* via a loop.
Kenneth Graunke [Mon, 22 Feb 2016 23:23:06 +0000 (15:23 -0800)]
anv: Emit 3DSTATE_URB_* via a loop.

Rather than keeping separate {vs,hs,ds,gs}_start fields, we now store an
array indexed by the shader stage (MESA_SHADER_*).  The 3DSTATE_URB_*
commands are also sequentially numbered.  This makes it easy to just
emit them in a loop.

This simplifies the code a little, and also will make it easier to add
more credible HS and DS code later.

8 years agomesa: replace for loop with bitshifting in supported_buffer_bitmask()
Brian Paul [Tue, 23 Feb 2016 20:46:28 +0000 (13:46 -0700)]
mesa: replace for loop with bitshifting in supported_buffer_bitmask()

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agomesa: updates some comments in buffers.c
Brian Paul [Tue, 23 Feb 2016 20:41:27 +0000 (13:41 -0700)]
mesa: updates some comments in buffers.c

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agomesa: make _mesa_draw_buffers() static
Brian Paul [Tue, 23 Feb 2016 20:35:32 +0000 (13:35 -0700)]
mesa: make _mesa_draw_buffers() static

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agomesa: make _mesa_draw_buffer() static
Brian Paul [Tue, 23 Feb 2016 20:34:46 +0000 (13:34 -0700)]
mesa: make _mesa_draw_buffer() static

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agomesa: make _mesa_read_buffer() static
Brian Paul [Tue, 23 Feb 2016 20:32:21 +0000 (13:32 -0700)]
mesa: make _mesa_read_buffer() static

Not called from any other file.  Remove _mesa_ prefix and update comments.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agomesa: move declaration of buffer var in handle_first_current()
Brian Paul [Tue, 23 Feb 2016 20:25:43 +0000 (13:25 -0700)]
mesa: move declaration of buffer var in handle_first_current()

Declare the var in the scopes where it's used.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agomesa: use gl_buffer_index in a few places
Brian Paul [Tue, 23 Feb 2016 20:24:11 +0000 (13:24 -0700)]
mesa: use gl_buffer_index in a few places

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agost/mesa: remove useless break statement
Brian Paul [Tue, 23 Feb 2016 20:19:29 +0000 (13:19 -0700)]
st/mesa: remove useless break statement

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agost/mesa: rename st_readpixels to st_ReadPixels
Brian Paul [Tue, 23 Feb 2016 20:12:56 +0000 (13:12 -0700)]
st/mesa: rename st_readpixels to st_ReadPixels

To match the convention of other device driver functions.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agost/mesa: fix frontbuffer glReadPixels regressions
Brian Paul [Tue, 23 Feb 2016 23:15:34 +0000 (16:15 -0700)]
st/mesa: fix frontbuffer glReadPixels regressions

The change "mesa/readpix: Don't clip in _mesa_readpixels()" caused a
few piglit regressions.  The failing tests use glReadPixels to read
from the front color buffer.  The problem is we were trying to read
from a non-existant front color buffer.  The front color buffer is
created on demand in st/mesa.  Since the missing buffer bounds were
effectively 0 x 0 the glReadPixels was totally clipped and returned
early.

The fix involves creating the real front color buffer when we're about
to try reading from it.

Tested with llvmpipe and VMware driver on Linux, Windows.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94253
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94254
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94257
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
8 years agonir/spirv: Allow but warn for a few capabilities
Jason Ekstrand [Wed, 24 Feb 2016 06:02:41 +0000 (22:02 -0800)]
nir/spirv: Allow but warn for a few capabilities

Unfortunately, glslang gives us cull/clip distance and GS streams even if
the shader doesn't use it whenever a shader is declared as version 450.
This is a glslang bug, but we can easily enough ignore it for now.

8 years agoanv/descriptor_set: Use the correct size for the descriptor pool
Jason Ekstrand [Wed, 24 Feb 2016 05:23:06 +0000 (21:23 -0800)]
anv/descriptor_set: Use the correct size for the descriptor pool

The descriptor sizes array gives the total number of each type of
descriptor that will ever be allocated from the pool, not the total amount
that may be in any particular set.  In our case, this simply means that we
have to sum a bunch of things up and there we go.

8 years agonir/spirv: Add more capabilities
Jason Ekstrand [Wed, 24 Feb 2016 05:01:00 +0000 (21:01 -0800)]
nir/spirv: Add more capabilities

8 years agoanv/meta: Allocate descriptor pools on-the-fly
Jason Ekstrand [Wed, 24 Feb 2016 01:04:19 +0000 (17:04 -0800)]
anv/meta: Allocate descriptor pools on-the-fly

We can't use a global descriptor pool like we were because it's not
thread-safe.  For now, we'll allocate them on-the-fly and that should work
fine.  At some point in the future, we could do something where we
stack-allocate them or allocate them out of one of the state streams.

8 years agogallium/radeon: Correctly translate colorswaps for big endian
Oded Gabbay [Tue, 23 Feb 2016 14:33:45 +0000 (16:33 +0200)]
gallium/radeon: Correctly translate colorswaps for big endian

The current code in r600_translate_colorswap uses the swizzle information
to determine which colorswap to use.

This works for BE & LE when the nr_channels is <4, but when nr_channels==4
(e.g. PIPE_FORMAT_A8R8G8B8_UNORM), this method can not be used for both BE
and LE, because the swizzle info is the same for both of them.

As a result, r600g doesn't support 24bit color formats, only 16bit, which
forces the user to choose 16bit color in X server.

This patch fixes this bug by separating the checks for LE and BE and
adapting the swizzle conditions in the BE part of the checks.

Tested on an Evergreen GPU (Cedar GL FirePro 2270) running inside POWER7
Big-Endian Machine.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
CC: "11.2" "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agomesa: use sizeof on the correct type
Thomas Hindoe Paaboel Andersen [Mon, 22 Feb 2016 22:58:00 +0000 (15:58 -0700)]
mesa: use sizeof on the correct type

Before the luminance stride was based on the size of GL_FLOAT
which is just the type constant (0x1406). Change it to use the
size of GLfloat.

Reviewed-by: Brian Paul <brianp@vmware.com>
8 years agotgsi/scan: handle holes between VS inputs, assert-fail in other cases
Marek Olšák [Mon, 22 Feb 2016 23:37:39 +0000 (00:37 +0100)]
tgsi/scan: handle holes between VS inputs, assert-fail in other cases

"st/mesa: overhaul vertex setup for clearing, glDrawPixels, glBitmap"
added a vertex shader declaring IN[0] and IN[2], but not IN[1].

Drivers relying on tgsi_shader_info can't handle holes in declarations,
because tgsi_shader_info doesn't track that.

This is just a quick workaround meant for stable that will work for vertex
shaders.

This fixes radeonsi DrawPixels and CopyPixels crashes.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
8 years agoanv/descriptor_set: Set descriptor type for immuatable samplers
Jason Ekstrand [Tue, 23 Feb 2016 05:39:14 +0000 (21:39 -0800)]
anv/descriptor_set: Set descriptor type for immuatable samplers

8 years agointel/genxml: Update macro documentation
Jason Ekstrand [Tue, 23 Feb 2016 05:20:04 +0000 (21:20 -0800)]
intel/genxml: Update macro documentation

8 years agodocs: Mark off GL_OES_shader_image_atomic as done.
Francisco Jerez [Mon, 22 Feb 2016 23:48:17 +0000 (15:48 -0800)]
docs: Mark off GL_OES_shader_image_atomic as done.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoi965/fs: Return result of image atomic in a register of the expected type.
Francisco Jerez [Sun, 16 Aug 2015 22:52:19 +0000 (01:52 +0300)]
i965/fs: Return result of image atomic in a register of the expected type.

So the result is of float type if we're implementing the float
overload of imageAtomicExchange.  This is the only back-end change
required to support OES_shader_image_atomic AFAICT.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoglsl: Implement the required built-in functions when OES_shader_image_atomic is enabled.
Francisco Jerez [Fri, 21 Aug 2015 11:12:22 +0000 (14:12 +0300)]
glsl: Implement the required built-in functions when OES_shader_image_atomic is enabled.

This is basically just the same atomic functions exposed by
ARB_shader_image_load_store, with one exception:

    "highp float imageAtomicExchange(
         coherent IMAGE_PARAMS,
         float data);"

There's no float atomic exchange overload in the original
ARB_shader_image_load_store or GL 4.2, so this seems like new
functionality that requires specific back-end support and a separate
availability condition in the built-in function generator.

v2: Move image availability predicate logic into a separate static
    function for clarity.  Had to pull out the image_function_flags
    enum from the builtin_builder class for that to be possible.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoglsl: Add usual extension boilerplate for OES_shader_image_atomic.
Francisco Jerez [Mon, 22 Feb 2016 23:06:45 +0000 (15:06 -0800)]
glsl: Add usual extension boilerplate for OES_shader_image_atomic.

v2: No need for extension enable bits (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agomesa: Add extension table entry for OES_shader_image_atomic.
Francisco Jerez [Mon, 22 Feb 2016 23:04:37 +0000 (15:04 -0800)]
mesa: Add extension table entry for OES_shader_image_atomic.

v2: No need for extension enable bits (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoanv/state: Replace a bunch of ANV_GEN with GEN_GEN
Jason Ekstrand [Tue, 23 Feb 2016 03:19:00 +0000 (19:19 -0800)]
anv/state: Replace a bunch of ANV_GEN with GEN_GEN

8 years agoanv/descriptor_set: Stop marking everything as having dynamic offsets
Jason Ekstrand [Tue, 23 Feb 2016 01:13:46 +0000 (17:13 -0800)]
anv/descriptor_set: Stop marking everything as having dynamic offsets

8 years agoanv: Implement descriptor pools
Kristian Høgsberg Kristensen [Fri, 12 Feb 2016 06:46:28 +0000 (22:46 -0800)]
anv: Implement descriptor pools

Descriptor pools are an optimization that lets applications allocate
descriptor sets through an externally synchronized object (that is,
unlocked).  In our case it's also plugging a memory leak, since we
didn't track all allocated sets and failed to free them in
vkResetDescriptorPool() and vkDestroyDescriptorPool().

8 years agoanv/x11: Free swapchain images and memory on destroy
Kristian Høgsberg Kristensen [Mon, 22 Feb 2016 18:19:43 +0000 (10:19 -0800)]
anv/x11: Free swapchain images and memory on destroy

8 years agonvc0: rename 3d binding points to NVC0_BIND_3D_XXX
Samuel Pitoiset [Sun, 21 Feb 2016 10:58:35 +0000 (11:58 +0100)]
nvc0: rename 3d binding points to NVC0_BIND_3D_XXX

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: rename 3d dirty flags to NVC0_NEW_3D_XXX
Samuel Pitoiset [Sun, 21 Feb 2016 10:49:25 +0000 (11:49 +0100)]
nvc0: rename 3d dirty flags to NVC0_NEW_3D_XXX

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: prefix compute macros with _CP_ instead of _COMPUTE_
Samuel Pitoiset [Sun, 21 Feb 2016 10:15:43 +0000 (11:15 +0100)]
nvc0: prefix compute macros with _CP_ instead of _COMPUTE_

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: rename NVXX_COMPUTE to NVXX_CP
Samuel Pitoiset [Sun, 21 Feb 2016 10:13:01 +0000 (11:13 +0100)]
nvc0: rename NVXX_COMPUTE to NVXX_CP

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: rename nvc0_context::dirty to nvc0_context::dirty_3d
Samuel Pitoiset [Sun, 21 Feb 2016 10:06:27 +0000 (11:06 +0100)]
nvc0: rename nvc0_context::dirty to nvc0_context::dirty_3d

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0/ir: add missing emission of locked load predicate
Samuel Pitoiset [Mon, 22 Feb 2016 20:11:33 +0000 (21:11 +0100)]
nvc0/ir: add missing emission of locked load predicate

Like unlocked store on shared memory, locked store can fail and the
second dest which is a predicate must be emitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
8 years agonvc0/ir: add ld lock/st unlock emission on GK104
Samuel Pitoiset [Sun, 21 Feb 2016 14:28:16 +0000 (15:28 +0100)]
nvc0/ir: add ld lock/st unlock emission on GK104

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: restore OP_SELP to be a regular instruction
Samuel Pitoiset [Sun, 21 Feb 2016 18:40:01 +0000 (19:40 +0100)]
nv50/ir: restore OP_SELP to be a regular instruction

Actually OP_SELP doesn't need to be a compare instruction. Instead we
just need to set the NOT modifier when building the instruction.
While we are at it, fix the dst register type and use a GPR.

Suggested by Ilia Mirkin.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agovulkan: fix out-of-tree builds
Mark Janes [Mon, 22 Feb 2016 19:31:15 +0000 (11:31 -0800)]
vulkan: fix out-of-tree builds

8 years agosvga: unbind index buffer when drawing non-indexed primitives
Brian Paul [Mon, 22 Feb 2016 15:53:47 +0000 (08:53 -0700)]
svga: unbind index buffer when drawing non-indexed primitives

Silences a warning reported by the svga3d device.

v2: also null-out the index buffer pointer

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agointel/genxml: Add README
Kristian Høgsberg Kristensen [Mon, 22 Feb 2016 17:14:25 +0000 (09:14 -0800)]
intel/genxml: Add README

I've had people ask about the design of the pack functions, for example,
why aren't we using bitfields. I wrote up a bit of background on why and
how we ended up with the current design and we might as well keep that
with the code.

8 years agoanv/meta_blit: Handle compressed textures in anv_CmdCopyImage
Nanley Chery [Thu, 18 Feb 2016 22:05:31 +0000 (14:05 -0800)]
anv/meta_blit: Handle compressed textures in anv_CmdCopyImage

As with anv_CmdCopyBufferToImage, compressed textures require special
handling during copies.

Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
8 years agomesa: add GL_EXT_texture_border_clamp support
Ilia Mirkin [Wed, 17 Feb 2016 12:36:58 +0000 (07:36 -0500)]
mesa: add GL_EXT_texture_border_clamp support

This extension is identical to GL_OES_texture_border_clamp. But dEQP has
tests that want the EXT variant.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
8 years agomesa: add GL_OES_texture_border_clamp support
Ilia Mirkin [Tue, 16 Feb 2016 00:09:15 +0000 (19:09 -0500)]
mesa: add GL_OES_texture_border_clamp support

Only minor differences to the existing ARB_texture_border_clamp support.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
8 years agomesa: bump version
Ilia Mirkin [Mon, 22 Feb 2016 14:06:59 +0000 (09:06 -0500)]
mesa: bump version

11.2 has been branched, we're on 11.3 now.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
8 years agonouveau: update the Makefile.sources list
Emil Velikov [Mon, 22 Feb 2016 10:22:21 +0000 (10:22 +0000)]
nouveau: update the Makefile.sources list

Reflect the nv50->g80 change and the new gm107_texture header.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agonir/spirv: Add support for multisampled textures
Jason Ekstrand [Mon, 22 Feb 2016 05:42:33 +0000 (21:42 -0800)]
nir/spirv: Add support for multisampled textures

8 years agoradeonsi: implement binary shaders & shader cache in memory (v2)
Marek Olšák [Thu, 11 Feb 2016 14:49:34 +0000 (15:49 +0100)]
radeonsi: implement binary shaders & shader cache in memory (v2)

v2: handle _mesa_hash_table_insert failure
    other cosmetic changes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: remove unused radeon_shader_binary_free_* functions
Marek Olšák [Thu, 11 Feb 2016 22:33:54 +0000 (23:33 +0100)]
gallium/radeon: remove unused radeon_shader_binary_free_* functions

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: make radeon_shader_reloc name string fixed-sized
Marek Olšák [Thu, 11 Feb 2016 22:20:38 +0000 (23:20 +0100)]
radeonsi: make radeon_shader_reloc name string fixed-sized

This will simplify implementations of binary shaders.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: move some struct si_shader members to new struct si_shader_info
Marek Olšák [Thu, 11 Feb 2016 20:09:38 +0000 (21:09 +0100)]
radeonsi: move some struct si_shader members to new struct si_shader_info

This will be part of shader binaries.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: use smaller types for some si_shader members
Marek Olšák [Thu, 11 Feb 2016 20:06:33 +0000 (21:06 +0100)]
radeonsi: use smaller types for some si_shader members

in order to decrease the shader size for a shader cache.

v2: add & use SI_MAX_VS_OUTPUTS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: enable compiling one variant per shader
Marek Olšák [Thu, 28 Jan 2016 00:29:59 +0000 (01:29 +0100)]
radeonsi: enable compiling one variant per shader

Shader stats from VERDE:

Default scheduler:

Totals:
SGPRS: 491272 -> 488672 (-0.53 %)
VGPRS: 289980 -> 311093 (7.28 %)
Code Size: 11091656 -> 11219948 (1.16 %) bytes
LDS: 97 -> 97 (0.00 %) blocks
Scratch: 1732608 -> 2246656 (29.67 %) bytes per wave
Max Waves: 78063 -> 77352 (-0.91 %)
Wait states: 0 -> 0 (0.00 %)

Looking at some of the worst regressions, I get:
- The VGPR increase seems to be caused by the fact that if PS has used less
  than 16 VGPRs, now it will always use 16 VGPRs and sometimes even 20.
  However, the wave count remains at 10 if VGPRs <= 24, so no harm there.
- The scratch increase seems to be caused by SGPR spilling.
  The unnecessary SGPR spilling has been an ongoing issue with the compiler
  and it's completely fixable by rematerializing s_loads or reordering
  instructions.

SI scheduler:

Totals:
SGPRS: 374848 -> 374576 (-0.07 %)
VGPRS: 284456 -> 307515 (8.11 %)
Code Size: 11433068 -> 11535452 (0.90 %) bytes
LDS: 97 -> 97 (0.00 %) blocks
Scratch: 509952 -> 522240 (2.41 %) bytes per wave
Max Waves: 79456 -> 78217 (-1.56 %)
Wait states: 0 -> 0 (0.00 %)

VGPRs - same story as before. The SI scheduler doesn't spill SGPRs so much
and generally spills way less than the default scheduler.
(522240 spills vs 2246656 spills)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: print full shader name before disassembly
Marek Olšák [Fri, 5 Feb 2016 22:30:01 +0000 (23:30 +0100)]
radeonsi: print full shader name before disassembly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: compile non-GS middle parts of shaders immediately if enabled
Marek Olšák [Thu, 28 Jan 2016 01:53:13 +0000 (02:53 +0100)]
radeonsi: compile non-GS middle parts of shaders immediately if enabled

Still disabled.

Only prologs & epilogs are compiled in draw calls, but each variant of those
is compiled only once per process.

VS is always compiled as hw VS.
TES is always compiled as hw VS.

LS and ES stages are always compiled on demand.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: rework polygon stippling for PS prolog
Marek Olšák [Wed, 27 Jan 2016 01:59:23 +0000 (02:59 +0100)]
radeonsi: rework polygon stippling for PS prolog

Don't use the pstipple module.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add PS prolog
Marek Olšák [Mon, 15 Feb 2016 22:57:54 +0000 (23:57 +0100)]
radeonsi: add PS prolog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add PS epilog
Marek Olšák [Tue, 26 Jan 2016 23:50:29 +0000 (00:50 +0100)]
radeonsi: add PS epilog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add TCS epilog
Marek Olšák [Tue, 26 Jan 2016 23:38:03 +0000 (00:38 +0100)]
radeonsi: add TCS epilog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add VS epilog
Marek Olšák [Tue, 26 Jan 2016 23:33:07 +0000 (00:33 +0100)]
radeonsi: add VS epilog

It only exports the primitive ID.
Also used by TES when it's compiled as VS.

The VS input location of the primitive ID input is v2.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add VS prolog
Marek Olšák [Tue, 26 Jan 2016 23:29:53 +0000 (00:29 +0100)]
radeonsi: add VS prolog

This is disabled with use_monolithic_shaders = true.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: first bits for non-monolithic shaders
Marek Olšák [Mon, 15 Feb 2016 22:16:32 +0000 (23:16 +0100)]
radeonsi: first bits for non-monolithic shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add code for dumping all shader parts together (v2)
Marek Olšák [Tue, 26 Jan 2016 21:15:27 +0000 (22:15 +0100)]
radeonsi: add code for dumping all shader parts together (v2)

v2: unify some code into si_get_shader_binary_size

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: add code for combining and uploading shaders from 3 shader parts
Marek Olšák [Tue, 26 Jan 2016 21:12:26 +0000 (22:12 +0100)]
radeonsi: add code for combining and uploading shaders from 3 shader parts

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: fail compilation if non-GS non-CS shaders have rodata
Marek Olšák [Thu, 11 Feb 2016 21:04:35 +0000 (22:04 +0100)]
radeonsi: fail compilation if non-GS non-CS shaders have rodata

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: separate 2 pieces of code from create_function
Marek Olšák [Tue, 26 Jan 2016 21:05:16 +0000 (22:05 +0100)]
radeonsi: separate 2 pieces of code from create_function

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add samplemask parameter to si_export_mrt_color
Marek Olšák [Tue, 26 Jan 2016 20:57:57 +0000 (21:57 +0100)]
radeonsi: add samplemask parameter to si_export_mrt_color

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: add start_instance parameter to get_instance_index_for_fetch
Marek Olšák [Tue, 26 Jan 2016 20:55:28 +0000 (21:55 +0100)]
radeonsi: add start_instance parameter to get_instance_index_for_fetch

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: separate out shader key bits for prologs & epilogs
Marek Olšák [Tue, 26 Jan 2016 17:46:31 +0000 (18:46 +0100)]
radeonsi: separate out shader key bits for prologs & epilogs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: compute how many input VGPRs fragment shaders have
Marek Olšák [Sun, 3 Jan 2016 02:26:28 +0000 (03:26 +0100)]
radeonsi: compute how many input VGPRs fragment shaders have

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agoradeonsi: compute how many input SGPRs and VGPRs shaders have
Marek Olšák [Fri, 1 Jan 2016 19:37:38 +0000 (20:37 +0100)]
radeonsi: compute how many input SGPRs and VGPRs shaders have

Prologs (shader binaries inserted before the API shader binary) need to
know this, so that they won't change the input registers unintentionally.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agogallium/radeon: add basic code for setting shader return values
Marek Olšák [Tue, 22 Dec 2015 19:55:53 +0000 (20:55 +0100)]
gallium/radeon: add basic code for setting shader return values

LLVMBuildInsertValue will be used on return_value.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
8 years agonvc0: enable compute shaders on Fermi
Samuel Pitoiset [Fri, 5 Feb 2016 12:32:59 +0000 (13:32 +0100)]
nvc0: enable compute shaders on Fermi

Kepler compute support is really different than Fermi and it's not
ready yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: add atomics support on shared memory for Fermi
Samuel Pitoiset [Tue, 26 Jan 2016 00:32:23 +0000 (01:32 +0100)]
nv50/ir: add atomics support on shared memory for Fermi

Changes from v3:
 - move the previous OP_SELP change to the previous commit

Changes from v2:
 - make sure the op is OP_SELP when emitting the predicate and add one
   assert
 - use bld.getSSA() for mkOp2()
 - add cross edge between tryLockAndSetBB and joinBB

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: make OP_SELP a compare instruction
Samuel Pitoiset [Fri, 5 Feb 2016 14:09:07 +0000 (15:09 +0100)]
nv50/ir: make OP_SELP a compare instruction

This OP_SELP insn will be used to handle compare and swap subops.

Changes from v2:
 - fix logic for GK110+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: add lock/unlock subops for load/store
Samuel Pitoiset [Mon, 25 Jan 2016 20:43:13 +0000 (21:43 +0100)]
nv50/ir: add lock/unlock subops for load/store

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: use s[] addr space for shared buffers
Samuel Pitoiset [Sat, 16 Jan 2016 14:34:34 +0000 (15:34 +0100)]
nv50/ir: use s[] addr space for shared buffers

Shared memory address space (FILE_MEMORY_SHARED) must be used instead
of global memory when a shared memory area is declared.

Changes from v2:
 - oops, do not remove TGSI_FILE_BUFFER in a switch in
   nv50_ir_from_tgsi.cpp

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: reduce likelihood of collision for real buffers on Fermi
Samuel Pitoiset [Thu, 11 Feb 2016 22:49:45 +0000 (23:49 +0100)]
nvc0: reduce likelihood of collision for real buffers on Fermi

Reduce likelihood of collision with real buffers by placing the
hole at the top of the 4G area. This fixes some indirect draw+compute
tests with large buffers.

Suggested by Ilia Mirkin.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: invalidate compute state when switching pipe contexts
Samuel Pitoiset [Wed, 17 Feb 2016 21:01:18 +0000 (22:01 +0100)]
nvc0: invalidate compute state when switching pipe contexts

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: add support for indirect compute on Fermi
Samuel Pitoiset [Tue, 12 Jan 2016 22:51:00 +0000 (23:51 +0100)]
nvc0: add support for indirect compute on Fermi

When indirect compute is used, the size of the grid (in blocks) is
stored as three integers inside a buffer. This requires a macro to
set up GRIDDIM_YX and GRIDDIM_Z.

Changes from v2:
 - do not launch the grid if the number of groups for a dimension is 0

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: bind textures/samplers for compute on Fermi
Samuel Pitoiset [Mon, 11 Jan 2016 22:21:45 +0000 (23:21 +0100)]
nvc0: bind textures/samplers for compute on Fermi

Textures and samplers don't seem to be aliased between COMPUTE and 3D.

Changes from v2:
 - refactor the code to share (almost) the same logic between 3d and
   compute

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: bind shader buffers for compute on Fermi
Samuel Pitoiset [Wed, 6 Jan 2016 17:46:00 +0000 (18:46 +0100)]
nvc0: bind shader buffers for compute on Fermi

This is loosely based on 3D. Shader buffers are bound on c15 (the
driver constbuf) at offset 0x200.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: bind driver constbuf for compute on Fermi
Samuel Pitoiset [Mon, 11 Jan 2016 21:11:19 +0000 (22:11 +0100)]
nvc0: bind driver constbuf for compute on Fermi

Changes from v3:
 - add new validation state for COMPUTE driver constbuf

Changes from v2:
 - always bind the driver consts even if user params come in via clover

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: add a new validation state for 3D driver constbuf
Samuel Pitoiset [Wed, 17 Feb 2016 20:43:40 +0000 (21:43 +0100)]
nvc0: add a new validation state for 3D driver constbuf

This will be used to invalidate 3D driver constbuf when using COMPUTE
and vice-versa. This is needed because this CB contains a bunch of
useful information like the addrs of shader buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: bind constant buffers for compute on Fermi
Samuel Pitoiset [Mon, 11 Jan 2016 14:35:21 +0000 (15:35 +0100)]
nvc0: bind constant buffers for compute on Fermi

Loosely based on 3D.

Changs from v3:
 - invalidate COMPUTE CBs after validating 3D CBs because they are
   aliased

Changes from v2:
 - get rid of the 's' param to nvc0_cb_bo_push() because it doesn't
   matter to upload constbufs for compute using the 3d chan

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: allocate an area for compute user constbufs
Samuel Pitoiset [Mon, 11 Jan 2016 13:59:08 +0000 (14:59 +0100)]
nvc0: allocate an area for compute user constbufs

For compute shaders, we might need to upload uniforms.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoanv: Fix a typo in apply_dynamic_offsets
Jason Ekstrand [Sun, 21 Feb 2016 04:02:37 +0000 (20:02 -0800)]
anv: Fix a typo in apply_dynamic_offsets

shader->num_uniforms is in terms of bytes in i965.

8 years agoanv: Zero out the WSI array when initializing the instance
Jason Ekstrand [Sun, 21 Feb 2016 03:29:05 +0000 (19:29 -0800)]
anv: Zero out the WSI array when initializing the instance

8 years agoisl: Stop including mesa/main/imports.h
Jason Ekstrand [Sat, 20 Feb 2016 18:25:49 +0000 (10:25 -0800)]
isl: Stop including mesa/main/imports.h

It pulls in all sorts of stuff we don't want.