riscv-isa-sim.git
8 years agoFix indent.
Tim Newsome [Mon, 29 Aug 2016 21:40:07 +0000 (14:40 -0700)]
Fix indent.

8 years agoRename tdata0--tdata2 to tdata1--tdata3.
Tim Newsome [Mon, 29 Aug 2016 18:49:47 +0000 (11:49 -0700)]
Rename tdata0--tdata2 to tdata1--tdata3.

8 years agopartially update spike to newer debug spec
Andrew Waterman [Fri, 26 Aug 2016 04:27:10 +0000 (21:27 -0700)]
partially update spike to newer debug spec

8 years agoFix spike interactive (-d) mode
Andrew Waterman [Fri, 26 Aug 2016 03:24:14 +0000 (20:24 -0700)]
Fix spike interactive (-d) mode

8 years agoremove HWBPCOUNT field of DCSR
Andrew Waterman [Tue, 23 Aug 2016 01:33:28 +0000 (18:33 -0700)]
remove HWBPCOUNT field of DCSR

8 years agoImplement address and data triggers.
Tim Newsome [Mon, 22 Aug 2016 16:49:20 +0000 (09:49 -0700)]
Implement address and data triggers.

So far I only have testcases for instruction and data address.
Not implemented is the mechanism that lets the debugger prevent a user
program from using triggers at all. I'll be adding that soonish.

The critical path is unchanged, but my experimenting shows the
simulation is slowed down about 8% by this code. Reducing the size of
trigger_match() (which is never called during my benchmark) fixes that,
but making it not be inlined has no effect. I suspect the slowdown comes
from cache alignment or something similar, and on a different CPU or
after more code changes the speed will come back.

8 years agoAllow mstatus.MPP to store bad values; instead, validate on MRET
Andrew Waterman [Wed, 17 Aug 2016 21:00:58 +0000 (14:00 -0700)]
Allow mstatus.MPP to store bad values; instead, validate on MRET

Either approach is legal, but this more closely matches Rocket.

8 years agoremove old rvc directory (#61)
Colin Schmidt [Tue, 16 Aug 2016 18:42:16 +0000 (11:42 -0700)]
remove old rvc directory (#61)

8 years agoAdd support for virtual priv register. (#59)
Tim Newsome [Thu, 28 Jul 2016 21:51:31 +0000 (14:51 -0700)]
Add support for virtual priv register. (#59)

Users can use this register to inspect and change the privilege level of
the core. It doesn't make any assumptions about the actual underlying
debug mechanism (as opposed to having the user change DCSR directly,
which may not exist in all debug implementations).

8 years agoSet U bit in misa register
Andrew Waterman [Fri, 22 Jul 2016 21:05:06 +0000 (14:05 -0700)]
Set U bit in misa register

8 years agoMake address translation work in 32-bit. (#58)
Tim Newsome [Tue, 19 Jul 2016 18:19:47 +0000 (11:19 -0700)]
Make address translation work in 32-bit. (#58)

8 years agoFix single step over csrw instructions. (#57)
Tim Newsome [Wed, 13 Jul 2016 20:26:09 +0000 (13:26 -0700)]
Fix single step over csrw instructions. (#57)

csrw instructions instantly return if the PC isn't serialized. Take note
of this, and don't enter debug mode until the instruction we just
executed actually completed.

8 years agoDon't treat RVC NOP as illegal instruction
Andrew Waterman [Tue, 12 Jul 2016 19:43:30 +0000 (12:43 -0700)]
Don't treat RVC NOP as illegal instruction

8 years agoFix page table walker not respecting valid bit
Andrew Waterman [Tue, 12 Jul 2016 19:43:07 +0000 (12:43 -0700)]
Fix page table walker not respecting valid bit

8 years agoUpdate to new PTE format
Andrew Waterman [Wed, 6 Jul 2016 10:22:18 +0000 (03:22 -0700)]
Update to new PTE format

8 years agoRemove debug printf that was cluttering up output.
Tim Newsome [Fri, 1 Jul 2016 16:51:26 +0000 (09:51 -0700)]
Remove debug printf that was cluttering up output.

8 years agoDisassemble RVC instructions based on XLEN
Andrew Waterman [Wed, 29 Jun 2016 22:00:22 +0000 (15:00 -0700)]
Disassemble RVC instructions based on XLEN

The interpretation of RVC opcodes depends on XLEN, and the disassembler
always assumed RV32.

h/t Michael Clark

8 years agoMake gdbserver code work with small Debug RAM.
Tim Newsome [Tue, 14 Jun 2016 20:34:54 +0000 (13:34 -0700)]
Make gdbserver code work with small Debug RAM.

8 years agoSupport debugging 32-bit spike instances.
Tim Newsome [Tue, 14 Jun 2016 00:55:47 +0000 (17:55 -0700)]
Support debugging 32-bit spike instances.

8 years agoParameterize debug ROM contents on XLEN
Andrew Waterman [Thu, 23 Jun 2016 06:29:16 +0000 (23:29 -0700)]
Parameterize debug ROM contents on XLEN

8 years agoRemove fence.i from debug ROM
Andrew Waterman [Thu, 23 Jun 2016 06:28:39 +0000 (23:28 -0700)]
Remove fence.i from debug ROM

8 years agoDon't use I$ in debug mode
Andrew Waterman [Thu, 23 Jun 2016 06:25:55 +0000 (23:25 -0700)]
Don't use I$ in debug mode

This avoids the need for fence.i.

8 years agoRemove legacy HTIF; implement HTIF directly
Andrew Waterman [Thu, 23 Jun 2016 05:52:29 +0000 (22:52 -0700)]
Remove legacy HTIF; implement HTIF directly

8 years agoFix paddr_bits computation prior to VM setup
Andrew Waterman [Thu, 23 Jun 2016 05:51:12 +0000 (22:51 -0700)]
Fix paddr_bits computation prior to VM setup

8 years agoMerge sasid into sptbr
Andrew Waterman [Sat, 18 Jun 2016 03:58:01 +0000 (20:58 -0700)]
Merge sasid into sptbr

8 years agoTrap on tdrdata registers when tdrselect[XLEN-1]=0
Andrew Waterman [Thu, 9 Jun 2016 21:20:54 +0000 (14:20 -0700)]
Trap on tdrdata registers when tdrselect[XLEN-1]=0

8 years agomake check: Fail if the tests failed
Jonathan Neuschäfer [Sat, 4 Jun 2016 12:13:45 +0000 (14:13 +0200)]
make check: Fail if the tests failed

8 years agoFix 2 bugs in Debug ROM: (#52)
Tim Newsome [Thu, 9 Jun 2016 17:18:32 +0000 (10:18 -0700)]
Fix 2 bugs in Debug ROM: (#52)

1. Debug ROM wasn't actually writing 0xffffffff to the last word in
Debug RAM after an exception happened.
2. Fix a race where debug interrupts were cleared before that write
would have happened, so a debugger (gdbserver.cc in this case) might get
the wrong idea about whether an exception happened or not.

Why wasn't this wreaking havoc before?

8 years agoAdd degenerate HW breakpoint implementation
Andrew Waterman [Thu, 9 Jun 2016 03:04:17 +0000 (20:04 -0700)]
Add degenerate HW breakpoint implementation

8 years agoKeep DCSR_XDEBUGVER unsigned.
Tim Newsome [Fri, 3 Jun 2016 22:07:04 +0000 (15:07 -0700)]
Keep DCSR_XDEBUGVER unsigned.

8 years agoMinor usability improvements (#48)
neuschaefer [Fri, 3 Jun 2016 20:45:05 +0000 (22:45 +0200)]
Minor usability improvements (#48)

* spike_main/disasm.cc: Print unknown CSR numbers in hex

* interactive mode: Print "Unknown command" when appropriate

8 years agoDCSR cause was moved, bug debug ROM wasn't updated
Tim Newsome [Fri, 3 Jun 2016 20:08:09 +0000 (13:08 -0700)]
DCSR cause was moved, bug debug ROM wasn't updated

As a result Debug ROM would always take the spontaneous halt code path.
This didn't hurt spike since (so far?) the spike debug handler doesn't
attempt to do anything quick while code is running. But now the ROM is
more correct.

8 years agoFix 'make check' when run from build directory.
Tim Newsome [Thu, 2 Jun 2016 18:01:37 +0000 (11:01 -0700)]
Fix 'make check' when run from build directory.

8 years agoFix build when not building inside root directory
Andrew Waterman [Wed, 1 Jun 2016 20:54:46 +0000 (13:54 -0700)]
Fix build when not building inside root directory

8 years agoAdd gitignore
Andrew Waterman [Wed, 1 Jun 2016 20:54:38 +0000 (13:54 -0700)]
Add gitignore

8 years agoMove sethaltnot and cleardebint.
Tim Newsome [Wed, 1 Jun 2016 15:39:31 +0000 (08:39 -0700)]
Move sethaltnot and cleardebint.

Now it matches Krste's memory map.

8 years agoNew encoding.h for new CSR addresses.
Tim Newsome [Tue, 24 May 2016 21:37:23 +0000 (14:37 -0700)]
New encoding.h for new CSR addresses.

8 years agoMove cleardebint, per spec.
Tim Newsome [Tue, 24 May 2016 16:39:44 +0000 (09:39 -0700)]
Move cleardebint, per spec.

8 years agoUse .word for mret, for now.
Tim Newsome [Mon, 23 May 2016 23:24:59 +0000 (16:24 -0700)]
Use .word for mret, for now.

The current assembler doesn't seem to know it?

8 years agoChange DCSR bits to match spec.
Tim Newsome [Mon, 23 May 2016 23:17:28 +0000 (16:17 -0700)]
Change DCSR bits to match spec.

Cleaned up debug ROM code a little.

8 years agoKill spike as soon as the test is done with it.
Tim Newsome [Mon, 23 May 2016 19:16:20 +0000 (12:16 -0700)]
Kill spike as soon as the test is done with it.

8 years agoLink standalone programs at 0x80010000.
Tim Newsome [Sun, 22 May 2016 04:22:22 +0000 (21:22 -0700)]
Link standalone programs at 0x80010000.

This leaves some memory for pk, where it keeps tohost/fromhost which we
cannot just write to.

8 years agoTurn off debugging.
Tim Newsome [Wed, 11 May 2016 22:13:57 +0000 (15:13 -0700)]
Turn off debugging.

All the printfs would be pretty annoying if you're actually using this
to debug something.

Also fixed a small jump bug in halt.

8 years agoTell gdb we can handle large packets.
Tim Newsome [Wed, 11 May 2016 02:29:17 +0000 (19:29 -0700)]
Tell gdb we can handle large packets.

This speeds up downloads to 93KB/s, which is starting to get usable.

8 years agoFix writing odd numbers of bytes to odd addresses.
Tim Newsome [Tue, 10 May 2016 20:53:16 +0000 (13:53 -0700)]
Fix writing odd numbers of bytes to odd addresses.

8 years agoExceptions in Debug Mode don't update any regs.
Tim Newsome [Tue, 10 May 2016 20:22:31 +0000 (13:22 -0700)]
Exceptions in Debug Mode don't update any regs.

8 years agoIgnore MPRV in Debug Mode.
Tim Newsome [Tue, 10 May 2016 18:36:33 +0000 (11:36 -0700)]
Ignore MPRV in Debug Mode.

8 years agoWrite test for downloading a mostly random program
Tim Newsome [Tue, 10 May 2016 17:03:28 +0000 (10:03 -0700)]
Write test for downloading a mostly random program

It passes, but it's slow.

8 years agoRemove already-implemented TODO.
Tim Newsome [Mon, 9 May 2016 21:43:12 +0000 (14:43 -0700)]
Remove already-implemented TODO.

8 years agoMove debug rom link map to the right place.
Tim Newsome [Mon, 9 May 2016 21:38:06 +0000 (14:38 -0700)]
Move debug rom link map to the right place.

Turns out this doesn't actually matter, but it's better to be correct.

8 years agoRemove obsolete TODO.
Tim Newsome [Mon, 9 May 2016 20:48:20 +0000 (13:48 -0700)]
Remove obsolete TODO.

8 years agoImplement ebreak[mhsu].
Tim Newsome [Mon, 9 May 2016 20:47:44 +0000 (13:47 -0700)]
Implement ebreak[mhsu].

8 years agoRemove dependency on include file in my homedir.
Tim Newsome [Mon, 9 May 2016 20:08:41 +0000 (13:08 -0700)]
Remove dependency on include file in my homedir.

8 years agoForce gdb to not print entry values.
Tim Newsome [Mon, 9 May 2016 16:41:01 +0000 (09:41 -0700)]
Force gdb to not print entry values.

All of a sudden gdb decided to start printing them, which messed up the
breakpoint test. It would only print them in the test, not if I manually
ran the same commands. I'm sure it's my fault somehow, but this should
keep things consistent in the future.

8 years agomprv test now breaks like it's supposed to.
Tim Newsome [Sat, 7 May 2016 18:15:59 +0000 (11:15 -0700)]
mprv test now breaks like it's supposed to.

8 years agoDeal with escapes that gdb sends in binary data.
Tim Newsome [Fri, 6 May 2016 23:54:33 +0000 (16:54 -0700)]
Deal with escapes that gdb sends in binary data.

8 years agoMake -H halt the core right out of reset.
Tim Newsome [Fri, 6 May 2016 19:14:22 +0000 (12:14 -0700)]
Make -H halt the core right out of reset.

Added a test, too.

8 years agoHalt when gdb user hits ^C.
Tim Newsome [Fri, 6 May 2016 00:40:02 +0000 (17:40 -0700)]
Halt when gdb user hits ^C.

8 years agoMake sure to fence.i after setting/clearing a swbp
Tim Newsome [Thu, 5 May 2016 21:53:56 +0000 (14:53 -0700)]
Make sure to fence.i after setting/clearing a swbp

This doesn't change anything since Debug ROM already executes a fence.i,
but it will be more correct if that is no longer necessary.

8 years agoImplemented register writes.
Tim Newsome [Thu, 5 May 2016 20:45:14 +0000 (13:45 -0700)]
Implemented register writes.

All existing tests pass!

8 years agoFix reading CSRs.
Tim Newsome [Thu, 5 May 2016 18:21:07 +0000 (11:21 -0700)]
Fix reading CSRs.

8 years agoSingle step appears to work.
Tim Newsome [Thu, 5 May 2016 01:51:26 +0000 (18:51 -0700)]
Single step appears to work.

8 years agoSoftware breakpoints sort of work.
Tim Newsome [Wed, 4 May 2016 20:14:46 +0000 (13:14 -0700)]
Software breakpoints sort of work.

8 years agoUse fence.i in Debug ROM.
Tim Newsome [Wed, 4 May 2016 16:45:56 +0000 (09:45 -0700)]
Use fence.i in Debug ROM.

This replaces a hack that just disabled all of the icache.

8 years agoFix off-by-two in general read registers.
Tim Newsome [Wed, 4 May 2016 16:40:20 +0000 (09:40 -0700)]
Fix off-by-two in general read registers.

Now the exit test passes!

8 years agoWalk page tables to translate addresses.
Tim Newsome [Wed, 4 May 2016 01:53:16 +0000 (18:53 -0700)]
Walk page tables to translate addresses.

8 years agoTurn operation into a queue,
Tim Newsome [Tue, 3 May 2016 20:46:57 +0000 (13:46 -0700)]
Turn operation into a queue,

in preparation for address translation.

8 years agoRemove unused code.
Tim Newsome [Tue, 3 May 2016 19:24:25 +0000 (12:24 -0700)]
Remove unused code.

Add some debug printfs, which I'll be wanting for at least a little
while.

8 years agoSave/restore mstatus, too.
Tim Newsome [Tue, 3 May 2016 17:55:00 +0000 (10:55 -0700)]
Save/restore mstatus, too.

Also read DCSR, which will be useful to figure out why we halted.

8 years agoIgnore more files.
Tim Newsome [Tue, 3 May 2016 17:54:08 +0000 (10:54 -0700)]
Ignore more files.

8 years agoProperly read s0/s1.
Tim Newsome [Tue, 3 May 2016 17:43:27 +0000 (10:43 -0700)]
Properly read s0/s1.

8 years agoAdd dret.
Tim Newsome [Tue, 3 May 2016 01:07:51 +0000 (18:07 -0700)]
Add dret.

8 years agoImplement memory writes.
Tim Newsome [Mon, 2 May 2016 22:04:03 +0000 (15:04 -0700)]
Implement memory writes.

8 years agoImplement single memory read access.
Tim Newsome [Sun, 1 May 2016 20:18:03 +0000 (13:18 -0700)]
Implement single memory read access.

Prevent unaligned accesses in memory read.

Also change how exceptions in Debug Mode are signaled.

8 years agoProperly save/restore dpc, mcause, mbadaddr.
Tim Newsome [Sun, 1 May 2016 16:53:23 +0000 (09:53 -0700)]
Properly save/restore dpc, mcause, mbadaddr.

Also clear dcsr.cause when leaving Debug Mode so future traps go where
they should.

8 years agoExceptions in Debug Mode, stay in Debug Mode.
Tim Newsome [Sat, 30 Apr 2016 22:24:38 +0000 (15:24 -0700)]
Exceptions in Debug Mode, stay in Debug Mode.

Now things don't blow up when reading a non-existent CSR.

8 years agoRemove debug printfs.
Tim Newsome [Sun, 1 May 2016 19:26:29 +0000 (12:26 -0700)]
Remove debug printfs.

8 years agoHave Debug memory kind of working again.
Tim Newsome [Sun, 1 May 2016 19:05:48 +0000 (12:05 -0700)]
Have Debug memory kind of working again.

Debug exception -> ROM -> RAM -> ROM, then something goes wrong.

8 years agoRead FP registers, and general CSRs*
Tim Newsome [Fri, 29 Apr 2016 20:38:59 +0000 (13:38 -0700)]
Read FP registers, and general CSRs*

*) Only works if you read CSRs that actually exist.

8 years agoContinue works well enough for DebugTest.test_exit
Tim Newsome [Fri, 29 Apr 2016 18:17:58 +0000 (11:17 -0700)]
Continue works well enough for DebugTest.test_exit

8 years agoFix race using fence.
Tim Newsome [Thu, 28 Apr 2016 20:15:46 +0000 (13:15 -0700)]
Fix race using fence.

8 years agoRefactor how we track in-progress operations.
Tim Newsome [Wed, 27 Apr 2016 20:52:54 +0000 (13:52 -0700)]
Refactor how we track in-progress operations.

I think the functionality is unchanged.

8 years agogdb can attach and read the PC:
Tim Newsome [Tue, 26 Apr 2016 21:32:08 +0000 (14:32 -0700)]
gdb can attach and read the PC:

(gdb) target remote localhost:1234
Remote debugging using localhost:1234
0x0000000000010178 in fib (n=0) at waste.c:1
1       unsigned int fib(unsigned int n) {
(gdb)

8 years agoprocessor_t unfriends gdbserver_t.
Tim Newsome [Tue, 26 Apr 2016 19:12:57 +0000 (12:12 -0700)]
processor_t unfriends gdbserver_t.

8 years agoCorrectly read PC on halt.
Tim Newsome [Tue, 26 Apr 2016 17:22:02 +0000 (10:22 -0700)]
Correctly read PC on halt.

8 years agoFix store to clear debug interrupt.
Tim Newsome [Tue, 26 Apr 2016 15:29:17 +0000 (08:29 -0700)]
Fix store to clear debug interrupt.

8 years agoAdd debug_module bus device.
Tim Newsome [Sun, 24 Apr 2016 15:54:19 +0000 (08:54 -0700)]
Add debug_module bus device.

This should replace the ROM hack I implemented earlier, but for now both
exist together.

Back to the point where gdb connects, core jumps to ROM->RAM->ROM.

8 years agoROM -> RAM -> ROM, waiting for debug int.
Tim Newsome [Sat, 23 Apr 2016 18:09:07 +0000 (11:09 -0700)]
ROM -> RAM -> ROM, waiting for debug int.

8 years agoMake sure to translate Debug RAM addresses also.
Tim Newsome [Sat, 23 Apr 2016 17:40:23 +0000 (10:40 -0700)]
Make sure to translate Debug RAM addresses also.

8 years agoJump to the correct (temporary) Debug RAM address.
Tim Newsome [Sat, 23 Apr 2016 17:25:57 +0000 (10:25 -0700)]
Jump to the correct (temporary) Debug RAM address.

8 years agoClean up how Debug ROM is included.
Tim Newsome [Sat, 23 Apr 2016 17:18:05 +0000 (10:18 -0700)]
Clean up how Debug ROM is included.

I'm not thrilled about including a static copy in so many cc files, and
making the compiler throw it out. But without really grokking the
Makefile this is the best it's going to be.

8 years agoCan jump to and execute Debug ROM.
Tim Newsome [Sat, 23 Apr 2016 03:11:29 +0000 (20:11 -0700)]
Can jump to and execute Debug ROM.

Connect with gdb, and the core will jump to Debug ROM and start
executing it. Then it crashes when it jumps to 0x400 because Debug RAM
isn't implemented (and doesn't live there anyway, for now).

8 years agoCheck in compiled debug ROM.
Tim Newsome [Fri, 22 Apr 2016 22:11:26 +0000 (15:11 -0700)]
Check in compiled debug ROM.

Not everybody will have a cross-compiled toolchain set up when they
build spike.

8 years agoWhen gdb connects, jump to Debug ROM and segfault.
Tim Newsome [Fri, 22 Apr 2016 22:10:23 +0000 (15:10 -0700)]
When gdb connects, jump to Debug ROM and segfault.

8 years agoAdd debug rom code.
Tim Newsome [Fri, 22 Apr 2016 22:08:35 +0000 (15:08 -0700)]
Add debug rom code.

8 years agoGutting direct-access gdb.
Tim Newsome [Fri, 22 Apr 2016 19:09:59 +0000 (12:09 -0700)]
Gutting direct-access gdb.

8 years agoAdd writing to DCSR, DPC, DSCRATCH.
Tim Newsome [Thu, 21 Apr 2016 22:53:46 +0000 (15:53 -0700)]
Add writing to DCSR, DPC, DSCRATCH.

Make those 3 CSRs writable.

8 years agoActually run the ebreak test.
Tim Newsome [Wed, 30 Mar 2016 17:43:45 +0000 (10:43 -0700)]
Actually run the ebreak test.

8 years agoOnly halt on ebreak if a debugger is attached.
Tim Newsome [Thu, 24 Mar 2016 00:42:17 +0000 (17:42 -0700)]
Only halt on ebreak if a debugger is attached.

8 years agoTest ebreak without gdb.
Tim Newsome [Wed, 23 Mar 2016 23:14:50 +0000 (16:14 -0700)]
Test ebreak without gdb.

Currently this test fails.