Update baseline symbols for aarch64-none-linux-gnu

       * config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Regenerate

From-SVN: r249454

Support dg-add-options in profopt.exp

2017-06-21  Tom de Vries  <tom@codesourcery.com>

* lib/profopt.exp (profopt-get-options): Support dg-add-options.

From-SVN: r249453

Fix warning in gcc.dg/tree-prof/comp-goto-1.c

2017-06-21  Tom de Vries  <tom@codesourcery.com>

* gcc.dg/tree-prof/comp-goto-1.c: Fix 'return type defaults to int'
warning.

From-SVN: r249452

Rework cold and hot label attributes in predict.c.

2017-06-21  Martin Liska  <mliska@suse.cz>

* gimplify.c (gimplify_label_expr): Insert GIMPLE_PREDICT
statements on cold and hot labels.
* predict.c (tree_estimate_probability_bb): Remove the
prediction from this place.
2017-06-21  Martin Liska  <mliska@suse.cz>

* gcc.dg/tree-ssa/attr-hotcold-2.c: Update scanned patterns.

From-SVN: r249451

Make early return predictor more precise.

2017-06-21  Martin Liska  <mliska@suse.cz>

PR tree-optimization/79489
* gimplify.c (maybe_add_early_return_predict_stmt): New
function.
(gimplify_return_expr): Call the function.
* predict.c (tree_estimate_probability_bb): Remove handling
of early return.
* predict.def: Update comment about early return predictor.
* gimple-predict.h (is_gimple_predict): New function.
* predict.def: Change default value of early return to 66.
* tree-tailcall.c (find_tail_calls): Skip GIMPLE_PREDICT
statements.
* passes.def: Put pass_strip_predict_hints to the beginning of
IPA passes.

From-SVN: r249450

DWARF: make it possible to emit debug info for declarations only

The DWARF back-end used to systematically ignore file-scope function and
variable declarations.  While this is justified in language like C/C++,
where such declarations can appear in several translation units and thus
bloat uselessly the debug info, this behavior is counter-productive in
languages with a well-defined module system.  Specifically, it prevents
the description of imported entities, that belong to foreign languages,
making them unavailable from debuggers.

Take for instance:

    package C_Binding is
        function My_C_Function (I : Integer) return Integer;
        pragma Import (C, My_C_Function, "my_c_function");
    end C_Binding;

This makes available for Ada programs the C function "my_c_function"
under the following name: C_Binding.My_C_Function.  When GCC compiles
it, though, it is represented as a FUNCTION_DECL node with DECL_EXTERNAL
set and a null DECL_INITIAL, which used to be discarded unconditionally
in the DWARF back-end.

This patch moves such filter from the DWARF back-end to the relevant
callers: passes.c:rest_of_decl_compilation and
godump.c:go_early_global_decl. It also This patch also updates the Ada
front-end to call debug hooks for functions such as in the above
example, so that we do generate debugging information for them.

gcc/
* dwarf2out.c (gen_decl_die): Remove the guard to skip file-scope
FUNCTION_DECL declarations.
(dwarf2out_early_global_decl): Remove the guard to skip FUNCTION_DECL
declarations.
(dwaf2out_decl): Likewise.
* godump.c (go_early_global_decl): Skip call to the real debug hook
for FUNCTION_DECL declarations.
* passes.c (rest_of_decl_compilation): Skip call to the
early_global_decl debug hook for FUNCTION_DECL declarations, unless
-fdump-go-spec is passed.

gcc/ada/
* gcc-interface/ada-tree.h (DECL_FUNCTION_IS_DEF): Update copyright
notice.  New macro.
* gcc-interface/trans.c (Subprogram_Body_to_gnu): Tag the subprogram
as a definition.
(Compilation_Unit_to_gnu): Tag the elaboration procedure as a
definition.
* gcc-interface/decl.c (gnat_to_gnu_entity): Tag declarations of
imported subprograms for the current compilation unit as
definitions.  Disable debug info for references to variables.
* gcc-interface/gigi.h (create_subprog_decl): Update declaration.
* gcc-interface/utils.c (gnat_pushdecl): Add external DECLs that are
not built-in functions to their binding scope.
(create_subprog_decl): Add a DEFINITION parameter.  If it is true, tag
the function as a definition.  Update all callers.
(gnat_write_global_declarations): Emit debug info for imported
functions.  Filter out external variables for which debug info
is disabled.

gcc/testsuite/
* gnat.dg/debug11_pkg.adb, gnat.dg/debug11_pkg.ads,
gnat.dg/debug11_pkg2.ads: New testcase.

From-SVN: r249449

[i386] __builtin_ia32_stmxcsr could be pure

2017-06-21  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* config/i386/i386.c (struct builtin_isa): New field pure_p.
Reorder for compactness.
(def_builtin, def_builtin2, ix86_add_new_builtins): Handle pure_p.
(def_builtin_pure, def_builtin_pure2): New functions.
(ix86_init_mmx_sse_builtins) [__builtin_ia32_stmxcsr]: Mark as pure.

gcc/testsuite/
* gcc.target/i386/getround.c: New file.

From-SVN: r249448

NOP conversions in X+CST+CST

2017-06-21  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* match.pd (nop_convert): New predicate.
((A +- CST1) +- CST2): Allow some NOP conversions.

gcc/testsuite/
* gcc.dg/tree-ssa/addadd.c: Un-XFAIL.
* gcc.dg/tree-ssa/addadd-2.c: New file.

From-SVN: r249447

line-map.c (location_adhoc_data_update): Perform addition in uintptr_t type rather than char * type.

* line-map.c (location_adhoc_data_update): Perform addition in
uintptr_t type rather than char * type.  Read *data using
ptrdiff_t type instead of int64_t.
(get_combined_adhoc_loc): Change offset type to ptrdiff_t from
int64_t.

From-SVN: r249446

re PR c++/81130 (ICE OpenMP shared clause in gimplify_var_or_parm_decl, at gimplify.c:2584)

PR c++/81130
* gimplify.c (omp_add_variable): Don't force GOVD_SEEN for types
with ctors/dtors if GOVD_SHARED is set.

* testsuite/libgomp.c++/pr81130.C: New test.

From-SVN: r249445

Emit SIMD moves as mov

SIMD moves are currently emitted as ORR.  Change this to use the MOV
pseudo instruction just like integer moves (the ARM-ARM states MOV is the
preferred disassembly), improving readability of -S output.

    gcc/
* config/aarch64/aarch64.md (movti_aarch64):
Emit mov rather than orr.
(movtf_aarch64): Likewise.
* config/aarch64/aarch64-simd.md (aarch64_simd_mov):
Emit mov rather than orr.

From-SVN: r249444

Improve dup pattern

Improve the dup pattern to prefer vector registers.  When doing a dup
after a load, the register allocator thinks the costs are identical
and chooses an integer load.  However a dup from an integer register
includes an int->fp transfer which is not modelled.  Adding a '?' to
the integer variant means the cost is increased slightly so we prefer
using a vector register.  This improves the following example:

#include <arm_neon.h>
void f(unsigned *a, uint32x4_t *b)
{
  b[0] = vdupq_n_u32(a[1]);
  b[1] = vdupq_n_u32(a[2]);
}

to:
        ldr     s0, [x0, 4]
        dup     v0.4s, v0.s[0]
        str     q0, [x1]
        ldr     s0, [x0, 8]
        dup     v0.4s, v0.s[0]
        str     q0, [x1, 16]
        ret

    gcc/
* config/aarch64/aarch64-simd.md (aarch64_simd_dup):
Swap alternatives, make integer dup more expensive.

From-SVN: r249443

Mark symbols as constant

Aarch64_legitimate_constant_p currently returns false for symbols,
eventhough they are always valid constants.  This means LOSYM isn't
CSEd correctly.  If we return true CSE works better, resulting in
smaller/faster code (0.3% smaller code on SPEC2006).  Avoid this
for TLS symbols since their sequence is complex.

    gcc/
* config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
Return true for non-tls symbols.

From-SVN: r249442

[Patch AArch64] Add initial tuning support for Cortex-A55 and Cortex-A75

This patch adds support for the ARM Cortex-A75 and
Cortex-A55 processors through the -mcpu/-mtune values cortex-a55 and
cortex-a75, and an ARM DynamIQ big.LITTLE configuration of these two
processors through the -mcpu/-mtune value cortex-a75.cortex-a55

The ARM Cortex-A75 is ARM's latest and highest performance applications
processor. For the initial tuning provided in this patch, I have chosen to
share the tuning structure with its predecessor, the Cortex-A73.

The ARM Cortex-A55 delivers the best combination of power efficiency
and performance in its class. For the initial tuning provided in this patch,
I have chosen to share the tuning structure with its predecessor, the
Cortex-A53.

Both Cortex-A55 and Cortex-A75 support ARMv8-A with the ARM8.1-A and
ARMv8.2-A extensions, along with the cryptography extension, and
the RCPC extensions from ARMv8.3-A. This is reflected in the patch,
-mcpu=cortex-a75 is treated as equivalent to passing -mtune=cortex-a75
-march=armv8.2-a+rcpc .

2017-06-21  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64-cores.def (cortex-a55): New.
(cortex-a75): Likewise.
(cortex-a75.cortex-a55): Likewise.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (-mtune): Document new values for -mtune.

From-SVN: r249441

Add dg-add-options feature stack_size

2017-06-21  Tom de Vries  <tom@codesourcery.com>

* doc/sourcebuild.texi (Add Options, Features for dg-add-options): Add
stack_size feature.
(Effective-Target Keywords, Other attributes): Suggest using
dg-add-options stack_size feature to get stack limit in stack_size
effective target documentation.

* lib/target-supports.exp (add_options_for_stack_size): New proc.
* gcc.c-torture/execute/920501-7.c: Use dg-add-options stack_size.
* gcc.c-torture/compile/20080806-1.c: Same.
* gcc.c-torture/compile/920723-1.c: Same.
* gcc.c-torture/compile/930621-1.c: Same.
* gcc.c-torture/compile/991214-2.c: Same.
* gcc.c-torture/compile/bcopy.c: Same.
* gcc.c-torture/compile/memtst.c: Same.
* gcc.c-torture/compile/msp.c: Same.
* gcc.c-torture/compile/stuct.c: Same.
* gcc.c-torture/execute/20011008-3.c: Same.
* gcc.c-torture/execute/20030209-1.c: Same.
* gcc.c-torture/execute/20031012-1.c: Same.
* gcc.c-torture/execute/20040805-1.c: Same.
* gcc.c-torture/execute/920410-1.c: Same.
* gcc.c-torture/execute/921113-1.c: Same.
* gcc.c-torture/execute/921202-1.c: Same.
* gcc.c-torture/execute/921208-2.c: Same.
* gcc.c-torture/execute/930106-1.c: Same.
* gcc.c-torture/execute/930406-1.c: Same.
* gcc.c-torture/execute/950221-1.c: Same.
* gcc.c-torture/execute/960521-1.c: Same.
* gcc.c-torture/execute/980605-1.c: Same.
* gcc.c-torture/execute/comp-goto-1.c: Same.
* gcc.c-torture/execute/comp-goto-2.c: Same.
* gcc.c-torture/execute/memcpy-1.c: Same.
* gcc.c-torture/execute/multi-ix.c: Same.
* gcc.c-torture/execute/nestfunc-4.c: Same.
* gcc.c-torture/execute/pr20621-1.c: Same.
* gcc.c-torture/execute/pr23135.c: Same.
* gcc.c-torture/execute/pr28982b.c: Same.
* gcc.dg/loop-3.c: Same.
* gcc.dg/struct-ret-3.c: Same.
* gcc.dg/torture/stackalign/comp-goto-1.c: Same.
* gcc.dg/torture/stackalign/non-local-goto-4.c: Same.
* gcc.dg/tree-prof/comp-goto-1.c: Same.
* gcc.dg/tree-prof/pr44777.c: Same.

From-SVN: r249440

PR libstdc++/81092 Regenerate configure for libtool_VERSION change

PR libstdc++/81092
* configure: Regenerate.

From-SVN: r249438

configure.ac: Add AC_SYS_LARGEFILE.

2017-06-21  Richard Biener  <rguenther@suse.de>

* configure.ac: Add AC_SYS_LARGEFILE.
* config.h.in: Regenerate.
* configure: Likewise.

From-SVN: r249436

re PR gcov-profile/81080 (target libgcov not built with large file support)

2017-06-21  Richard Biener  <rguenther@suse.de>

PR gcov-profile/81080
* configure.ac: Add AC_SYS_LARGEFILE.
* libgcov.h: Include auto-target.h before tsystem.h to pick
up _FILE_OFFSET_BITS which might differ for multilibs.
* config.in: Regenerate.
* configure: Likewise.

From-SVN: r249435

Update the ChangeLog to include config/arm/cortex-a53.md
and config/arm/exynos-m1.md modifications

From-SVN: r249434

* config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi)
(aarch64_crypto_pmullv2di): Change type attribute to crypto_pmull.
* config/aarch64/thunderx2t99.md (thunderx2t99_pmull): New
reservation.
* config/arm/cortex-a57.md (cortex_a57_neon_type): Add crypto_pmull to
attribute type list for neon_multiply.
* config/arm/crypto.md (crypto_vmullp64): Change type to crypto_pmull.
* config/arm/types.md (crypto_pmull): Add.
* config/arm/xgene1.md (xgene1_neon_pmull): Add crypto_pmull to
attribute type list.

Co-Authored-By: Naveen H.S <Naveen.Hurugalawadi@cavium.com>
From-SVN: r249433

Daily bump.

From-SVN: r249432

config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to arm1176jzf-s.

2017-06-20  Andreas Tobler  <andreast@gcc.gnu.org>

    * config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to
    arm1176jzf-s.

From-SVN: r249428

Fix -Werror=class-memaccess failures in jit testsuite (PR jit/81144)

gcc/testsuite/ChangeLog:
PR jit/81144
* jit.dg/test-operator-overloading.cc (make_test_quadratic): Replace
memset call with zero-initialization.
* jit.dg/test-quadratic.cc (make_test_quadratic): Likewise.

From-SVN: r249427

ira-costs.c (find_costs_and_classes): Initialize cost_classes later to make sure not to dereference a NULL...

* ira-costs.c (find_costs_and_classes): Initialize cost_classes later
to make sure not to dereference a NULL cost_classes_ptr pointer.

From-SVN: r249426

pr80732.c: Include fma4-check.h.

* gcc.target/i386/pr80732.c: Include fma4-check.h.
(main): Renamed to ...
(fma4_test): ... this.

From-SVN: r249425

rs6000-c.c (altivec_overloaded_builtins): Add ALTIVEC_BUILTIN_VMULESW...

gcc/ChangeLog:

2017-06-20  Carl Love  <cel@us.ibm.com>

* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.
* config/rs6000/altivec.md (MVULEUW, VMULESW, VMULOUW,
VMULOSW): New enum "unspec" values.
(vec_widen_umult_even_v4si, vec_widen_smult_even_v4si,
vec_widen_umult_odd_v4si, vec_widen_smult_odd_v4si,
altivec_vmuleuw, altivec_vmulesw, altivec_vmulouw,
altivec_vmulosw): New patterns.
* config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
VMULOSW): Add definitions.

From-SVN: r249424

Fix rounding pattern similar to PR73350.

gcc/
* config/i386/i386.c: Fix rounding expand for new pattern.
* config/i386/subst.md: Fix pattern (parallel -> unspec).
gcc/testsuite/
* gcc.target/i386/pr73350-2.c: New test.

From-SVN: r249423

Support multi-tool sum files in dg-cmp-results.sh

2017-06-20  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    contrib/
    * dg-cmp-results.sh: Keep test result lines rather than throwing
    header and summary to support sum files with multiple tools.

From-SVN: r249422

PR c++/80972 - C++17 ICE with attribute packed.

* call.c (build_over_call): Allow a TARGET_EXPR from reference
binding.

From-SVN: r249420

cp-tree.h (CPTI_NELTS_IDENTIFIER): Delete.

* cp-tree.h (CPTI_NELTS_IDENTIFIER): Delete.
(nelts_identifier): Delete.
* decl.c (initialize_predefined_identifiers): Remove nelts.

From-SVN: r249419

baseline_symbols.txt: Update.

* config/abi/post/alpha-linux-gnu/baseline_symbols.txt: Update.

From-SVN: r249418

[Patch AArch64] Add rcpc extension

gcc/

* config/aarch64/aarch64-option-extensions.def (rcpc): New.
* config/aarch64/aarch64.h (AARCH64_FL_RCPC): New.

From-SVN: r249414

[Patch AArch64 obvious] Fix expected string for fp16 extensions

gcc/

* config/aarch64/aarch64-option-extensions.def (fp16): Fix expected
feature string.

From-SVN: r249411

[Patch AArch64 obvious] Rearrange the processors in aarch64-cores.def

gcc/

* config/aarch64/aarch64-cores.def: Rearrange to sort by
architecture, then by implementer ID.
* config/aarch64/aarch64-tune.md: Regenerate.

From-SVN: r249410

Always check for target i?86 and x86_64

libstdc++-v3:
* testsuite/20_util/variant/index_type.cc: Allow for all ilp32 and
lp64 targets.

gcc/testsuite:
* c-c++-common/fold-masked-cmp-1.c: Allow for i?86-*-* target.
* c-c++-common/fold-masked-cmp-2.c: Likewise.
* c-c++-common/fold-masked-cmp-3.c: Likewise.
* g++.dg/cpp0x/alignas4.C: Allow for i?86-*-* target, don't
restrict to x86_64-*-*-gnu.
Skip scan-assembler on *-*-darwin*.
* g++.dg/vect/pr70944.cc: Allow for i?86-*-* target.
* gcc.dg/loop-invariant.c: Likewise.
* gcc.dg/lto/pr70955_0.c: Likewise.
* gcc.dg/tree-ssa/pr69196-1.c: Likewise.
* gcc.dg/tree-ssa/pr79803.c: Likewise.
* gfortran.dg/pr68078.f90: Allow for i?86-*-linux*.

* g++.dg/debug/dwarf2/const2b.C: Allow for x86_64-*-* target.
* gcc.dg/attr-ms_struct-1.c: Allow for all i?86-*-*, x86_64-*-*
targets.
* gcc.dg/attr-ms_struct-2.c: Likewise.
* gcc.dg/attr-ms_struct-packed1.c: Likewise.
* gcc.dg/bf-ms-layout.c: Likewise.
* gcc.dg/bf-ms-layout-2.c: Likewise.
* gcc.dg/pic-macro-define.c: Remove target restrictions.
Require fpic support.
* gcc.target/i386/bitfield1.c: Allow for all i?86-*-*, x86_64-*-*
targets.
* gcc.target/i386/bitfield2.c: Likewise.
* gcc.target/i386/darwin-fpmath.c: Allow for x86_64-*-darwin*
targets.
* gfortran.dg/fmt_pf.f90: Remove i?86-*-solaris2.9* from xfail.

From-SVN: r249409

PR c++/67074 - namespace aliases

PR c++/67074 - namespace aliases
* decl.c (duplicate_decls): Don't error here on mismatched
namespace alias.
* name-lookup.c (name_lookup::add_value): Matching namespaces are
not ambiguous.
(diagnose_name_conflict): Namespaces are never redeclarations.
(update_binding): An alias can match a real namespace.

PR c++/67074
* g++.dg/lookup/pr67074.C: New.
* g++.dg/parse/namespace-alias-1.C: Adjust.

From-SVN: r249408

re PR sanitizer/81097 (UBSAN: false positive for not existing negation operator and a bogus message)

2017-06-20  Richard Biener  <rguenther@suse.de>

PR middle-end/81097
* fold-const.c (split_tree): Fold to type before negating.

* c-c++-common/ubsan/pr81097.c: New testcase.

From-SVN: r249407

Prevent fix-it hints from affecting more than one line

Attempts to apply a removal or replacement fix-it hint to a source
range that covers multiple lines currently lead to nonsensical
results from the printing code in diagnostic-show-locus.c.

We were already filtering them out in edit-context.c (leading
to -fdiagnostics-generate-patch not generating any output for
the whole TU).

Reject attempts to add such fix-it hints within rich_location,
fixing the diagnostic-show-locus.c issue.

gcc/ChangeLog:
* diagnostic-show-locus.c
(selftest::test_fixit_deletion_affecting_newline): New function.
(selftest::diagnostic_show_locus_c_tests): Call it.

libcpp/ChangeLog:
* include/line-map.h (class rich_location): Document that attempts
to delete or replace a range *affecting* multiple lines will fail.
* line-map.c (rich_location::maybe_add_fixit): Implement this
restriction.

From-SVN: r249403

re PR target/80970 (internal compiler error in find_reloads, at reload.c:4077)

PR target/80970
* config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d"
instead of "+d".

From-SVN: r249401

pr65947-9.c: Adjust.

2017-06-20  Richard Biener  <rguenther@suse.de>

* gcc.dg/vect/pr65947-9.c: Adjust.

From-SVN: r249400

[ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-20  Prakhar Bahuguna  <prakhar.bahuguna@arm.com>

    gcc/
    * config/arm/arm-c.c (arm_cpu_builtins): New block to define
    __ARM_FEATURE_COPROC according to support.

    gcc/testsuite/
    * gcc.target/arm/acle/cdp.c: Add feature macro bitmap test.
    * gcc.target/arm/acle/cdp2.c: Likewise.
    * gcc.target/arm/acle/ldc.c: Likewise.
    * gcc.target/arm/acle/ldc2.c: Likewise.
    * gcc.target/arm/acle/ldc2l.c: Likewise.
    * gcc.target/arm/acle/ldcl.c: Likewise.
    * gcc.target/arm/acle/mcr.c: Likewise.
    * gcc.target/arm/acle/mcr2.c: Likewise.
    * gcc.target/arm/acle/mcrr.c: Likewise.
    * gcc.target/arm/acle/mcrr2.c: Likewise.
    * gcc.target/arm/acle/mrc.c: Likewise.
    * gcc.target/arm/acle/mrc2.c: Likewise.
    * gcc.target/arm/acle/mrrc.c: Likewise.
    * gcc.target/arm/acle/mrrc2.c: Likewise.
    * gcc.target/arm/acle/stc.c: Likewise.
    * gcc.target/arm/acle/stc2.c: Likewise.
    * gcc.target/arm/acle/stc2l.c: Likewise.
    * gcc.target/arm/acle/stcl.c: Likewise.

From-SVN: r249399

tree-chkp.c (chkp_get_hard_register_var_fake_base_address): Rewritten to avoid overflow for > 32-bit pointers.

* tree-chkp.c (chkp_get_hard_register_var_fake_base_address):
Rewritten to avoid overflow for > 32-bit pointers.

From-SVN: r249398

re PR sanitizer/81125 (-fsanitize=undefined ICE)

PR sanitizer/81125
* ubsan.h (ubsan_encode_value): Workaround buggy clang++ parser
by removing enum keyword.
(ubsan_type_descriptor): Likewise.  Formatting fix.

From-SVN: r249397

re PR target/81121 (ICE: in extract_insn, at recog.c:2311)

PR target/81121
* config/i386/i386.md (TARGET_USE_VECTOR_CONVERTS float si->{sf,df}
splitter): Require TARGET_SSE2 in the condition.

* gcc.target/i386/pr81121.c: New test.

From-SVN: r249396

re PR target/79799 (Improve vec_insert of float on Power9)

[gcc]
2017-06-20  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/79799
* config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support
for doing vector set of SFmode on ISA 3.0.
* config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF
element.
(vsx_insert_extract_v4sf_p9): Add an optimization for inserting a
SFmode value into a V4SF variable that was extracted from another
V4SF variable without converting the element to double precision
and back to single precision vector format.
(vsx_insert_extract_v4sf_p9_2): Likewise.

[gcc/testsuite]
2017-06-20  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/79799
* gcc.target/powerpc/pr79799-1.c: New test.
* gcc.target/powerpc/pr79799-2.c: Likewise.
* gcc.target/powerpc/pr79799-3.c: Likewise.
* gcc.target/powerpc/pr79799-4.c: Likewise.
* gcc.target/powerpc/pr79799-5.c: Likewise.

From-SVN: r249395

Daily bump.

From-SVN: r249394

PR c++/80562 - ICE with constexpr if.

* semantics.c (finish_if_stmt_cond): Call
instantiate_non_dependent_expr.

From-SVN: r249387

PR c++/80829 - ICE with constexpr copy of base subobject.

* constexpr.c (clear_no_implicit_zero): New.
(cxx_eval_call_expression): Call it.

From-SVN: r249386

re PR c++/81124 (internal compiler error: in operator*, at cp/cp-tree.h:726)

PR c++/81124
PR c++/79766
* name-lookup.c (set_decl_namespace): Don't follow using
directives and ignore using decls.  Only check overly-explicit
scope after discovering decl.

* g++.dg/lookup/pr79766.C: New.
* g++.dg/lookup/pr81124.C: New.
* g++.dg/template/explicit6.C: Adjust.
* g++.old-deja/g++.other/decl5.C: Adjust.

From-SVN: r249385

badalloc1.C: Remove code path for -DSTACK_SIZE.

* g++.old-deja/g++.eh/badalloc1.C: Remove code path for -DSTACK_SIZE.

2017-06-19  Christophe Lyon  <christophe.lyon@linaro.org>

* g++.old-deja/g++.eh/badalloc1.C: Remove code path for
-DSTACK_SIZE.

From-SVN: r249384

PR c++/81073 - constexpr and static var in statement-expression.

* typeck2.c (store_init_value): Always call
require_potential_constant_expression.
* pt.c (convert_nontype_argument): Likewise.
* constexpr.c (potential_constant_expression_1): Adjust message.
Use decl_maybe_constant_var_p instead of decl_constant_var_p.
* decl2.c (decl_maybe_constant_var_p): Consider initializer.

From-SVN: r249382

tree-ssa-structalias.c (get_constraint_for_ptr_offset): Multiply in UWHI to avoid undefined overflow.

* tree-ssa-structalias.c (get_constraint_for_ptr_offset): Multiply
in UWHI to avoid undefined overflow.

From-SVN: r249381

re PR sanitizer/81125 (-fsanitize=undefined ICE)

PR sanitizer/81125
* ubsan.h (enum ubsan_encode_value_phase): New.
(ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase with default value of
UBSAN_ENCODE_VALUE_GENERIC.
* ubsan.c (ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase PHASE from bool IN_EXPAND_P,
adjust uses, for UBSAN_ENCODE_VALUE_GENERIC use just
create_tmp_var_raw instead of create_tmp_var and use a
TARGET_EXPR.
(ubsan_expand_bounds_ifn, ubsan_build_overflow_builtin,
instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust
ubsan_encode_value callers.

* g++.dg/ubsan/pr81125.C: New test.

From-SVN: r249376

re PR sanitizer/81111 (Cannot build libstdc++ with -fsanitize=undefined)

PR sanitizer/81111
* ubsan.c (ubsan_encode_value): If current_function_decl is NULL,
use create_tmp_var_raw instead of create_tmp_var, mark it addressable
just by setting TREE_ADDRESSABLE on the result and use a TARGET_EXPR.

* g++.dg/ubsan/pr81111.C: New test.

From-SVN: r249375

re PR tree-optimization/81118 (ice in remove_redundant_iv_tests)

2017-06-19  Richard Biener  <rguenther@suse.de>

PR middle-end/81118
* tree-cfgcleanup.c (cleanup_tree_cfg_noloop): Clear niter
estimates if we changed anything.

* gcc.dg/torture/pr81118.c: New testcase.

From-SVN: r249374

re PR bootstrap/80887 (gnat bootstrap fails at s-regpat.o: raised STORAGE_ERROR : stack overflow or erroneous memory access)

2017-06-19  Richard Biener  <rguenther@suse.de>

PR tree-optimization/80887
        c/
* gimple-parser.c (c_parser_gimple_postfix_expression): Handle
negated _Literals to parse _Literal (int) -1.

* tree-ssa-sccvn.c (mprts_hook_cnt): New global.
(vn_lookup_simplify_result): Allow only mprts_hook_cnt succesful
simplified lookups, then reset mprts_hook.
(vn_nary_build_or_lookup_1): Set mprts_hook_cnt to 9 before
simplifying.
(try_to_simplify): Likewise.

* gcc.dg/tree-ssa/pr80887.c: New testcase.

From-SVN: r249373

re PR ipa/81112 (internal compiler error: tree check: expected integer_cst, have range_expr in get_len, at tree.h:5321)

PR ipa/81112
* g++.dg/torture/pr81112.C: Add -Wno-psabi to dg-additional-options.

From-SVN: r249371

pt.c (coerce_template_parms): Fix indentation.

* pt.c (coerce_template_parms): Fix indentation.
(tsubst_decl): Remove repeated SET_DECL_RTL.  Move VAR_P handling
in to single block.

From-SVN: r249370

re PR c++/81119 (-Wshadow warns on "typedef struct foo foo;")

PR c++/81119
* name-lookup.c (update_binding): Only warn about constructors
hidden by functions.

PR c++/81119
* g++.dg/warn/pr81119.C: New.

From-SVN: r249369

Initialize live_switch_vars for SWITCH_BODY == STATEMENT_LIST (PR sanitizer/80879).

2017-06-19  Martin Liska  <mliska@suse.cz>

PR sanitizer/80879
* gimplify.c (gimplify_switch_expr):
Initialize live_switch_vars for SWITCH_BODY == STATEMENT_LIST.
2017-06-19  Martin Liska  <mliska@suse.cz>

PR sanitizer/80879
* gcc.dg/asan/use-after-scope-switch-4.c: New test.

From-SVN: r249368

Enable -flto in all PGO stages for bootstrap-lto-{,noplugin}.mk.

2017-06-19  Martin Liska  <mliska@suse.cz>

* bootstrap-lto-noplugin.mk: Enable -flto in all PGO stages.
* bootstrap-lto.mk: Likewise.

From-SVN: r249367

Introduce 4-stages profiledbootstrap to get a better profile.

2017-06-19  Martin Liska  <mliska@suse.cz>

* doc/install.texi: Document that PGO runs in 4 stages.
2017-06-19  Martin Liska  <mliska@suse.cz>

* Makefile.def: Define 4 stages PGO bootstrap.
* Makefile.tpl: Define FLAGS.
* Makefile.in: Regenerate.

From-SVN: r249366

Fix multi-versioning issues (PR ipa/80732).

2017-06-19  Martin Liska  <mliska@suse.cz>

PR ipa/80732
* attribs.c (make_dispatcher_decl): Do not append '.ifunc'
to dispatcher function name.
* multiple_target.c (replace_function_decl): New function.
(create_dispatcher_calls): Redirect both edges and references.
2017-06-19  Martin Liska  <mliska@suse.cz>

PR ipa/80732
* gcc.target/i386/mvc5.c: Scan indirect_function.
* gcc.target/i386/mvc7.c: Likewise.
* gcc.target/i386/pr80732.c: New test.

From-SVN: r249365

re PR c++/66093 (g++ produces incorrect output on code with constexpr function initializing class with private fields)

2017-06-19  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/66093
* g++.dg/cpp1y/constexpr-66093.C: New.

From-SVN: r249364

Update Solaris baselines for GCC 8.0 (PR libstdc++/81092)

* config/abi/post/i386-solaris2.10/baseline_symbols.txt: Regenerate.
* config/abi/post/i386-solaris2.10/amd64/baseline_symbols.txt: Likewise.
* config/abi/post/i386-solaris2.11/baseline_symbols.txt: Likewise.
* config/abi/post/i386-solaris2.11/amd64/baseline_symbols.txt: Likewise.
* config/abi/post/sparc-solaris2.10/baseline_symbols.txt: Likewise.
* config/abi/post/sparc-solaris2.10/sparcv9/baseline_symbols.txt:
Likewise.
* config/abi/post/sparc-solaris2.11/baseline_symbols.txt: Likewise.
* config/abi/post/sparc-solaris2.11/sparcv9/baseline_symbols.txt:
Likewise.

From-SVN: r249362

Fix typo

From-SVN: r249361

profile-count.c (profile_count::dump): Dump quality.

* profile-count.c (profile_count::dump): Dump quality.
(profile_count::differs_from_p): Update for unsigned val.
* profile-count.h (profile_count_quality): New enum.
(profile_count): Turn m_val to 62bit unsigned, add quality tracking.

From-SVN: r249360

Remove reference to Solaris 2.[56]

* g++.dg/other/unused1.C: Remove *-*-solaris2.[56]* from
dg-skip-if list.

From-SVN: r249359

tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take struct function as arg.

2017-06-19  Richard Biener  <rguenther@suse.de>

* tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take
struct function as arg.
(estimate_numbers_of_iterations): Export overload with loop arg.
(free_numbers_of_iterations_estimates_loop): Use an overload of
free_numbers_of_iterations_estimates instead.
* tree-cfg.c (remove_bb): Adjust.
* tree-cfgcleanup.c (remove_forwarder_block_with_phi): Likewise.
* tree-parloops.c (gen_parallel_loop): Likewise.
* tree-ssa-loop-ivcanon.c (canonicalize_induction_variables):
Likewise.
(tree_unroll_loops_completely): Likewise.
* tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop):
Use an overload instead and export.
(estimated_loop_iterations): Adjust.
(max_loop_iterations): Likewise.
(likely_max_loop_iterations): Likewise.
(estimate_numbers_of_iterations): Take struct function as arg
and adjust.
(loop_exits_before_overflow): Adjust.
(free_numbers_of_iterations_estimates_loop): Use an overload.
* tree-vect-loop.c (vect_analyze_loop_form): Adjust.
* tree-vectorizer.c (vect_free_loop_info_assumptions): Likewise.

From-SVN: r249358

re PR ipa/81112 (internal compiler error: tree check: expected integer_cst, have range_expr in get_len, at tree.h:5321)

2017-06-19  Richard Biener  <rguenther@suse.de>

PR ipa/81112
* ipa-prop.c (find_constructor_constant_at_offset): Handle
RANGE_EXPR conservatively.

* g++.dg/torture/pr81112.C: New testcase.

From-SVN: r249357

Daily bump.

From-SVN: r249356

* gcc.dg/lto/pr69866_0.c: This test needs alias.

From-SVN: r249352

re PR fortran/52473 (CSHIFT slow - inline it?)

2017-06-18  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/52473
* m4/cshift0.m4:  For arrays that are contiguous up to
shift, implement blocked algorighm for cshift.
* generated/cshift0_c10.c:  Regenerated.
* generated/cshift0_c16.c:  Regenerated.
* generated/cshift0_c4.c:  Regenerated.
* generated/cshift0_c8.c:  Regenerated.
* generated/cshift0_i1.c:  Regenerated.
* generated/cshift0_i16.c:  Regenerated.
* generated/cshift0_i2.c:  Regenerated.
* generated/cshift0_i4.c:  Regenerated.
* generated/cshift0_i8.c:  Regenerated.
* generated/cshift0_r10.c:  Regenerated.
* generated/cshift0_r16.c:  Regenerated.
* generated/cshift0_r4.c:  Regenerated.
* generated/cshift0_r8.c:  Regenerated.

2017-06-18  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/52473
* gfortran.dg/cshift_1.f90:  New test.

From-SVN: r249350

x32: Update baseline_symbols.txt

PR libstdc++/81092
* config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Updated.

From-SVN: r249349

re PR libstdc++/81092 (Missing symbols for new std::wstring constructors)

PR libstdc++/81092
* config/abi/post/m68k-linux-gnu/baseline_symbols.txt: Update.

From-SVN: r249348

PR c++/60063 - -Wunused-local-typedefs and templates.

* decl2.c (is_late_template_attribute): Return false for "used".

From-SVN: r249347

PR c++/70844 - -Wuseless-cast and inheriting constructor.

* method.c (forward_parm): Suppress warn_useless_cast.

From-SVN: r249344

Daily bump.

From-SVN: r249343

Get rid of dg-skip-if etc. default args

libstdc++-v3:
* testsuite: Remove dg-skip-if, dg-xfail-if, dg-xfail-run-if
default args.

libgomp:
* testsuite/libgomp.fortran/strassen.f90: Remove dg-skip-if
default args.
* testsuite/libgomp.oacc-c-c++-common/vprop.c: Remove
dg-xfail-run-if default args.

gcc/testsuite:
Remove dg-skip-if, dg-xfail-if, dg-xfail-run-if default args.

From-SVN: r249339

PR libstdc++/80893 don't run test for C++98 modes

PR libstdc++/80893
* testsuite/23_containers/vector/bool/80893.cc: Add { target c++11 }.

From-SVN: r249338

altivec.md (define_mode_attr VF_sxddp): Move to vsx.md.

gcc/ChangeLog:

2017-06-16  Carl Love  <cel@us.ibm.com>

* config/rs6000/altivec.md (define_mode_attr VF_sxddp): Move to vsx.md.
* config/rs6000/vsx.md (define_mode_attr VF_sxddp
define_expand "floate<mode>",
define_expand "floato<mode>"): Add VF_sxddp definition, replace
undefined VFC_inst with VF_sxddp definition

From-SVN: r249337

ChangeLog: Update for commit 249311 didn't get committed

2017-06-16  Carl Love  <cel@us.ibm.com>

* gcc/ChangeLog: Update for commit 249311 didn't get committed

* gcc/testsuite/ChangeLog: Update for commit commit 249311 didn't
get committed.

From-SVN: r249336

fix ChangeLog

From-SVN: r249334

PR c++/81045 - Wrong type-dependence with auto return type.

* pt.c (type_dependent_expression_p): An undeduced auto outside the
template isn't dependent.
* call.c (build_over_call): Instantiate undeduced auto even in a
template.

From-SVN: r249323

PR c++/80465 - ICE with generic lambda with noexcept-specifier.

* lambda.c (maybe_add_lambda_conv_op): Keep processing_template_decl
set longer for a generic lambda.

From-SVN: r249322

PR c++/80614 - Wrong mangling for C++17 noexcept type

* mangle.c (write_type): Put the eh spec back on the function type.

From-SVN: r249321

PR c++/81102 - Wrong error with partial specialization.

* pt.c (unify) [TEMPLATE_PARM_INDEX]: Strip reference when comparing
types.  Do type deduction later.

From-SVN: r249320

PR c++/80174 - ICE with partial specialization of member template.

PR c++/71747
* pt.c (get_partial_spec_bindings): Only coerce innermost args.

From-SVN: r249319

PR c++/80831 - ICE with -fsyntax-only.

* decl2.c (c_parse_final_cleanups): Use cgraph_node::get_create.

From-SVN: r249318

PR c++/80639 - ICE with invalid PMF initialization.

PR c++/80043 - ICE with -fpermissive
* typeck.c (convert_for_assignment): Recurse when instantiate_type
returns without an error.

From-SVN: r249317

Daily bump.

From-SVN: r249316

rs6000-c.c (altivec_overloaded_builtins): Add definitions for vec_float, vec_float2, vec_floato, vec_floate built-ins.

gcc/ChangeLog:

2017-06-16  Carl Love  <cel@us.ibm.com>

* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
definitions for vec_float, vec_float2, vec_floato,
vec_floate built-ins.
* config/rs6000/vsx.md (define_c_enum "unspec"): Add RTL code
for instructions vsx_xvcvsxws vsx_xvcvuxwsp, float2, floato and
floate.
* config/rs6000/rs6000-builtin.def (FLOAT2_V2DI, FLOATE_V2DF,
FLOATE_2DI, FLOATO_V2DF, FLOATEE_V2DI, XVCVSXWSP_V4SF,
UNS_FLOATO_V2DI, UNS_FLOATE_V2DI): Add definitions.
* config/altivec.md (define_insn "p8_vmrgew_<mode>",
define_mode_attr VF_sxddp): Add V4SF type to p8_vmrgew.
* config/rs6000/altivec.h (vec_float, vec_float2, vec_floate,
vec_floato): Add builtin defines.
* doc/extend.texi (vec_float, vec_float2, vec_floate, vec_floato):
Update the built-in documentation file for the new built-in
functions.

gcc/testsuite/ChangeLog:

2017-06-16  Carl Love  <cel@us.ibm.com>

* gcc.target/powerpc/builtins-3-runnable.c (test_result_sp,
main): Add runnable tests and test checker for vec_float,
vec_float2, vec_floate and vec_floato builtins.

From-SVN: r249311

[arm] Fix various tests

The neon-thumb2-move.c test was overriding the options that had been
detected as being necessary to enable Neon.  The result was that the
combination of the test's options and those auto-detected were not
compatible with neon leading to a test failure.  The correct fix here
is to stick with the options that dg-add-options arm_neon has worked
out.

The thumb2-slow-flash-data tests were relying (incorrectly) on a
particular FPU being enabled by default.  These tests are fixed by
adding +fp to the architecture selected.

* gcc.target/arm/neon-thumb2-move.c (dg-options): Don't override
the architecture options added by dg-add-options arm_neon.
* gcc.target/arm/thumb2-slow-flash-data-2.c (dg-opitions): Add +fp
to the architecture.
* gcc.target/arm/thumb3-slow-flash-data-3.c (dg-opitions): Likewise.
* gcc.target/arm/thumb4-slow-flash-data-3.c (dg-opitions): Likewise.
* gcc.target/arm/thumb5-slow-flash-data-3.c (dg-opitions): Likewise.

From-SVN: r249310

[arm] Mark -marm and -mthumb as being inverse options

-marm and -mthumb are opposites: one cancels out the other.  This patch
marks them as such so that the driver will eliminate all but the last
option on the command line.  This aids multilib selection which otherwise
can get confused if both are present.

* config/arm/arm.opt (marm): Mark as the negative of of -mthumb.
(mthumb): Mark as the negative of -marm.

From-SVN: r249309

[arm][doc] Document changes to -mcpu, -mtune and -mfpu.

This patch adds the remainder of the main documentation changes.  It
adds the changes for -mcpu, -mtune and -mfpu.  I've chosen to document
the extension options under -mcpu rather than under -mtune because,
while they are permitted with -mtune, they do not affect the behaviour
of the tuning done by the compiler.

I've also inverted the sense of the table (making the primary index
the extension name and then listing the CPU names to which it applies.
This is because the extensions are much more orthoganal in meaning
here and having a primary entry via the CPU name would lead to
enormous duplication.

Finally, it adds the relevant changes to -mfpu.  I haven't stated yet
that any setting of -mfpu other than 'auto' is deprecated, but that is
certainly the long-term goal of this patch series.

* doc/invoke.texi (ARM Options, -mcpu): Document supported
extension options.
(ARM Options, -mtune): Document that this accepts the same
extension options as -mcpu.
(ARM Options, -mfpu): Document addition of -mfpu=auto.

From-SVN: r249308

[arm][doc] Document new -march= syntax.

This adds documentation for the new extension options to -march= on ARM.
I tried a number of different ways of formatting the information, but this
seems the best, given what can be achieved in texinfo format.

* doc/invoke.texi (ARM Options, -march=): Document new syntax and
permitted extensions.

From-SVN: r249307

[arm] Add a few missing architecture extension options.

Reviewing the list of options for the purposes of writing the
documentation revealed that a small number of options were missing.
Mostly these are aliases for existing options, but in a couple of
cases we lacked the ability to disable certain other options.

* config/arm/arm-cpus.in (armv7): Add extension +nofp.
(armv7-r): Add aliases vfpv3xd and vfpv3-d16.
(armv8-m.main): Add option +nodsp.
* config/arm/arm-cpu-cdata.h: Regenerated.

From-SVN: r249306

[arm] Rework multilib support

It looks like the fuchsia port relied on inheriting the multilib rules from
the bare-metal port (the t-arm-elf makefile fragment), but that has now been
rewritten on the assuption that the base architecture is ARMv4t; fuchsia
has a base architecture of ARMv7-a.

To account for this, I've cloned the original t-arm-elf rules into a
new makefile fragment t-fuchsia and arranged for that to be used when
targetting this system.

* config/arm/t-fuchsia: New file.
* config.gcc (arm*-*-fuchsia*): Use it.

From-SVN: r249305

[arm] Rework multlib builds for symbianelf

Symbianelf used to build multilib for armv5t with softfp, but that
architecture doesn't really support floating point instructions.  This
patch reworks the multilib configuration to use armv5te as the base
when building for floating point.

I'm not sure just how useful the symbian port is these days, so this
has only been very lightly tested (checks that libgcc builds for all
multilib variants).  Perhaps we should consider deprecating this
config?

* config/arm/t-symbian: Rewrite for new option infrastructure.

From-SVN: r249304

[arm] reset all multilib variables

NB.  This configuration does not build in GCC-7 and doesn't build now either.

This patch resets a couple of multlib variables which previously were
not cleared.

It almost certainly needs further work to make it use the new option
framework correctly, but since the library configurations are already
clearly wrong, it's not clear what the changes need to be.  In
particular it tries to build a hard-float library for ARM7TDMI in both
ARM and thumb modes, but ARMv4t does not support any floating-point
instructions; furthermore, GCC has never supported a hard-float thumb1
library.

* config/arm/t-phoenix (MULTILIB_REUSE): Clear variable.
(MULTILIB_REQUIRED): Likewise.

From-SVN: r249303