git.libre-soc.org Git - binutils-gdb.git/log

fix Dwarf2 build with certain gcc versions

Older gcc reports:

.../bfd/dwarf2.c: In function 'read_ranges':
.../bfd/dwarf2.c:3107: error: comparison between signed and unsigned
.../bfd/dwarf2.c: In function 'read_rnglists':
.../bfd/dwarf2.c:3189: error: comparison between signed and unsigned

Similarly for binutils/dwarf.c. Arrange for the left sides of the > to
also be unsigned quantities.

Automatic date update in version.in

gdb/testsuite: set sysroot in gdb.server/stop-reply-no-thread-multi.exp

I get some random timeouts in this test due to big debug info taking a
lot of time to read through gdbserver.  When host and target are on the
same machine, clear the sysroot parameter so that GDB reads the files
from the local file system, as we already do in many tests.

I agree with what Pedro says here:

  https://sourceware.org/pipermail/gdb-patches/2019-March/156568.html

that if this is bad for us, it's also bad for users, so we should be
fixing the slowness instead.  But so far nobody seems to be working on
it, and the testsuite timeouts are getting in the way, so I think this
"set sysroot" is a net positive for now.

Without this patch, the test takes over 2 minutes to run (most of it
"downloading" libc debug info), with it it takes 10 seconds.

gdb/testsuite/ChangeLog:

* gdb.server/stop-reply-no-thread-multi.exp: Clear sysroot when
host and target are local.

Change-Id: Ieb6304f0e56b4575af450913de4210c667c6bf7b

Automatic date update in version.in

Fix gdb crash due to SIGPIPE when the compile command fails

Due to the SIGPIPE the gdb process is killed here, which is
not helpful.

2021-06-05 Bernd Edlinger <bernd.edlinger@hotmail.de>

* compile/compile.c (scoped_ignore_sigpipe): New helper class.
(compile_to_object): Ignore SIGPIPE before calling the plugin.

Really fix data-directory/Makefile rebuilding

Oops, I botched the last patch to fix data-directory/Makefile
rebuilding, by copying the config.status line and forgetting to update
the directory name. This one fixes the problem for real.

gdb/ChangeLog
2021-06-05 Tom Tromey <tom@tromey.com>

* data-directory/Makefile.in (Makefile): Use correct directory
name.

Fix gdb/data-directory Makefile-regeneration rule

My recent changes to the gdb build removed a special case for
data-directory/Makefile, but neglected to update the rule in that
Makefile. This patch fixes the error by rewriting this rule.

gdb/ChangeLog
2021-06-05 Tom Tromey <tom@tromey.com>

* data-directory/Makefile.in (Makefile): Rewrite.

Use ACX_NONCANONICAL_TARGET in gdb/configure

Shahab Vahedi pointed out that the patch to remove
gdb/testsuite/configure regressed the site.exp creation a bit -- it
left an unresolved configure substitution. Andrew Burgess pointed out
that the patch removed the call to ACX_NONCANONICAL_TARGET, which
caused this problem.

This patch adds ACX_NONCANONICAL_TARGET to gdb's configure, and fixes
the bug.

gdb/ChangeLog
2021-06-05 Tom Tromey <tromey@adacore.com>

* configure: Rebuild.
* configure.ac: Add ACX_NONCANONICAL_TARGET.

sim: common: start dedicated local.mk

This provides a space to generate things that we only need to build
once per-arch. Some day that will be all of common/, but for now,
we move the version.c management in.

Fix symbol constants tests for Python 3

gdb/testsuite/ChangeLog:

2021-06-05 Hannes Domani <ssbssa@yahoo.de>

* gdb.python/py-symbol.exp: Fix tests for Python 3.

arc: Add 'set disassembler-options' support

Implement ARC target support for passing options to the disassembler
through the command interface. e.g.:

gdb> set disassembler-options cpu=hs38_linux ...

gdb/ChangeLog:

* NEWS: Document 'set disassembler-options' support for the ARC
target.
* arc-tdep.c (arc_gdbarch_init): Set
'gdbarch_valid_disassembler_options'.

gdb/doc/ChangeLog:

* gdb.texinfo (Source and Machine Code): Document 'set
disassembler-options' support for the ARC target.

gdb/testsuite/ChangeLog:

* gdb.arch/arc-disassembler-options.exp: New test.
* gdb.arch/arc-disassembler-options.s: New test source.

Automatic date update in version.in

Add PROP_VARIABLE_NAME

With -fgnat-encodings=minimal, an internal version (these patches will
be upstreamed in the near future) of the Ada compiler can emit DWARF
for an array where the bound comes from a variable, like:

<1><12a7>: Abbrev Number: 7 (DW_TAG_array_type)
    <12a8>   DW_AT_name        : (indirect string, offset: 0x1ae9): pck__my_array
[...]
<2><12b4>: Abbrev Number: 8 (DW_TAG_subrange_type)
    <12b5>   DW_AT_type        : <0x1294>
    <12b9>   DW_AT_upper_bound : <0x1277>

With the upper bound DIE being:

<1><1277>: Abbrev Number: 2 (DW_TAG_variable)
    <1278>   DW_AT_name        : (indirect string, offset: 0x1a4d): pck__my_length___U
    <127c>   DW_AT_type        : <0x128f>
    <1280>   DW_AT_external    : 1
    <1280>   DW_AT_artificial  : 1
    <1280>   DW_AT_declaration : 1

Note that the variable is just a declaration -- in this situation, the
variable comes from another compilation unit, and must be found when
trying to compute the array bound.

This patch adds a new PROP_VARIABLE_NAME kind, to enable this search.

This same scenario can occur with DW_OP_GNU_variable_value, so this
patch adds support for that as well.

gdb/ChangeLog
2021-06-04  Tom Tromey  <tromey@adacore.com>

* dwarf2/read.h (dwarf2_fetch_die_type_sect_off): Add 'var_name'
parameter.
* dwarf2/loc.c (dwarf2_evaluate_property) <case
PROP_VARIABLE_NAME>: New case.
(compute_var_value): New function.
(sect_variable_value): Use compute_var_value.
* dwarf2/read.c (attr_to_dynamic_prop): Handle DW_TAG_variable.
(var_decl_name): New function.
(dwarf2_fetch_die_type_sect_off): Add 'var_name' parameter.
* gdbtypes.h (enum dynamic_prop_kind) <PROP_VARIABLE_NAME>: New
constant.
(union dynamic_prop_data) <variable_name>: New member.
(struct dynamic_prop) <variable_name, set_variable_name>: New
methods.

gdb/testsuite/ChangeLog
2021-06-04  Tom Tromey  <tromey@adacore.com>

* gdb.ada/array_of_symbolic_length.exp: New file.
* gdb.ada/array_of_symbolic_length/foo.adb: New file.
* gdb.ada/array_of_symbolic_length/gl.adb: New file.
* gdb.ada/array_of_symbolic_length/gl.ads: New file.
* gdb.ada/array_of_symbolic_length/pck.adb: New file.
* gdb.ada/array_of_symbolic_length/pck.ads: New file.

gdb: add some additional debug output in remote.c

I needed more debug output from:
remote_target::select_thread_for_ambiguous_stop_reply
I thought this would be useful for others too.

gdb/ChangeLog:

* remote.c (remote_target)
<select_thread_for_ambiguous_stop_reply>: Add additional debug
output.

Forward mouse click to python TUI window

If the TUI window object implements the click method, it is called for each
mouse click event in this window.

gdb/ChangeLog:

2021-06-04 Hannes Domani <ssbssa@yahoo.de>

* python/py-tui.c (class tui_py_window): Add click function.
(tui_py_window::click): Likewise.

gdb/doc/ChangeLog:

2021-06-04 Hannes Domani <ssbssa@yahoo.de>

* python.texi (TUI Windows In Python): Document Window.click.

Initial TUI mouse support

Implements an overridable tui_win_info::click method whose arguments
are the mouse coordinates inside the specific window, and the mouse
button clicked.

And if the curses implementation supports 5 buttons, the 4th and 5th
buttons are used for scrolling.

gdb/ChangeLog:

2021-06-04 Hannes Domani <ssbssa@yahoo.de>

* ser-mingw.c (console_select_thread): Handle MOUSE_EVENT.
* tui/tui-data.h (struct tui_win_info): Add click function.
* tui/tui-io.c (tui_prep_terminal): Enable mouse events.
(tui_deprep_terminal): Disable mouse events.
(tui_dispatch_ctrl_char): Handle KEY_MOUSE.
* tui/tui.c (tui_disable): Disable mouse events.

Automatic date update in version.in

gdb: fix eval.c assert during inferior exit event

Evaluating expressions from within an inferior exit event handler can
cause a crash:

    echo "int main() { return 0; }" > repro.c
    gcc -g repro.c -o repro
    ./gdb -q --ex "set language c++" --ex "python gdb.events.exited.connect(lambda _: gdb.execute('set \$_a=0'))" --ex "run" repro

    Reading symbols from repro...
    Starting program: /home/mhov/repos/binutils-gdb-master/install-bad/bin/repro
    [Inferior 1 (process 1974779) exited normally]
    ../../gdb/thread.c:72: internal-error: thread_info* inferior_thread(): Assertion `current_thread_ != nullptr' failed.
    A problem internal to GDB has been detected,
    further debugging may prove unreliable.
    Quit this debugging session? (y or n) [answered Y; input not from terminal]

    This is a bug, please report it.  For instructions, see:
    <https://www.gnu.org/software/gdb/bugs/>.

Backtrace
    0  in internal_error of ../../gdbsupport/errors.cc:51
    1  in inferior_thread of ../../gdb/thread.c:72
    2  in expression::evaluate of ../../gdb/eval.c:98
    3  in evaluate_expression of ../../gdb/eval.c:115
    4  in set_command of ../../gdb/printcmd.c:1502
    5  in do_const_cfunc of ../../gdb/cli/cli-decode.c:101
    6  in cmd_func of ../../gdb/cli/cli-decode.c:2181
    7  in execute_command of ../../gdb/top.c:670
    ...
    22 in python_inferior_exit of ../../gdb/python/py-inferior.c:182

In `expression::evaluate (...)' there is a call to `inferior_thread
()' that is guarded by `target_has_execution ()':

    struct value *
    expression::evaluate (struct type *expect_type, enum noside noside)
    {
      gdb::optional<enable_thread_stack_temporaries> stack_temporaries;
      if (target_has_execution ()
          && language_defn->la_language == language_cplus
          && !thread_stack_temporaries_enabled_p (inferior_thread ()))
        stack_temporaries.emplace (inferior_thread ());

The `target_has_execution ()' guard maps onto `inf->pid' and the
`inferior_thread ()' call assumes that `current_thread_' is set to
something meaningful:

    struct thread_info*
    inferior_thread (void)
    {
      gdb_assert (current_thread_ != nullptr);
      return current_thread_;
    }

In other words, it is assumed that if `inf->pid' is set then
`current_thread_' must also be set. This does not hold at the point
where inferior exit observers are notified:
- `generic_mourn_inferior (...)'
  - `switch_to_no_thread ()'
    - `current_thread_ = nullptr;'
  - `exit_inferior (...)'
    - `gdb::observers::inferior_exit.notify (...)'
    - `inf->pid = 0'

The inferior exit notification means that a Python handler can get a
chance to run while `current_thread' has been cleared and the
`inf->pid' has not been cleared. Since the Python handler can call any
GDB command with `gdb.execute(...)' (in my case `gdb.execute("set
$_a=0")' we can end up evaluating expressions and asserting in
`evaluate_subexp (...)'.

This patch adds a test in `evaluate_subexp (...)' to check the global
`inferior_ptid' which is reset at the same time as `current_thread_'.
Checking `inferior_ptid' at the same time as `target_has_execution ()'
seems to be a common pattern:

    $ git grep -n -e inferior_ptid --and -e target_has_execution
    gdb/breakpoint.c:2998:    && (inferior_ptid == null_ptid || !target_has_execution ()))
    gdb/breakpoint.c:3054:    && (inferior_ptid == null_ptid || !target_has_execution ()))
    gdb/breakpoint.c:4587:  if (inferior_ptid == null_ptid || !target_has_execution ())
    gdb/infcmd.c:360:  if (inferior_ptid != null_ptid && target_has_execution ())
    gdb/infcmd.c:2380:  /* FIXME:  This should not really be inferior_ptid (or target_has_execution).
    gdb/infrun.c:3438:  if (!target_has_execution () || inferior_ptid == null_ptid)
    gdb/remote.c:11961:  if (!target_has_execution () || inferior_ptid == null_ptid)
    gdb/solib.c:725:  if (target_has_execution () && inferior_ptid != null_ptid)

The testsuite has been run on 5.4.0-59-generic x86_64 GNU/Linux:
- Ubuntu 20.04.1 LTS
- gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0
- DejaGnu version 1.6.2
  - Expect version 5.45.4
  - Tcl version 8.6
- Native configuration: x86_64-pc-linux-gnu
- Target: unix

Results show a few XFAIL in
gdb.threads/attach-many-short-lived-threads.exp. The existing
py-events.exp tests are skipped for native-gdbserver and fail for
native-extended-gdbserver, but the new tests pass with
native-extended-gdbserver when run without the existing tests.

gdb/ChangeLog:

2021-06-03  Magne Hov  <mhov@undo.io>

PR python/27841
* eval.c (expression::evaluate): Check inferior_ptid.

gdb/testsuite/ChangeLog:

2021-06-03  Magne Hov  <mhov@undo.io>

PR python/27841
* gdb.python/py-events.exp: Extend inferior exit tests.
* gdb.python/py-events.py: Print inferior exit PID.

Update my email address in MAINTAINERS

gdb/ChangeLog:
yyyy-mm-dd Pedro Alves <pedro@palves.net>

* MAINTAINERS (The Official FSF-appointed GDB Maintainers): Remove
affiliation.
(Global Maintainers): Update my address.
(Write After Approval): Remove stale entry.

Change-Id: I3266fedeebfa6800faa2217baf6c032408e84902

Report additional details for signals received on FreeBSD.

Provide a description for si_code values as a sigcode-meaning field.
For signals raised by a system call, provide the pid and user ID of
the sending process.  For signals raised by a POSIX timer exparation,
provide the id of the timer.  For signals raised by a POSIX message
queue, provide the id of the message queue.  For SIGCHLD provide the
pid and user ID of the child process along with the exit status or
relevant signal number.

Sample output for SIGUSR1 raised by kill():

before:

Program received signal SIGUSR1, User defined signal 1.
kill () at kill.S:4
4       RSYSCALL(kill)

after:

Program received signal SIGUSR1, User defined signal 1.
Sent by kill() from pid 30529 and user 1001.
kill () at kill.S:4
4       RSYSCALL(kill)

SIGCHLD for exited process:

before:

Program received signal SIGCHLD, Child status changed.

after:

Program received signal SIGCHLD, Child status changed.
Child has exited: pid 31929, uid 1001, exit status 0.

SIGALRM raised by a POSIX timer (timer_create):

before:

Program received signal SIGALRM, Alarm clock.

after:

Program received signal SIGALRM, Alarm clock.
Timer expired: timerid 3.

gdb/ChangeLog:

* fbsd-tdep.c (FBSD_SI_USER, FBSD_SI_QUEUE, FBSD_SI_TIMER)
(FBSD_SI_ASYNCIO, FBSD_SI_MESGQ, FBSD_SI_KERNEL, FBSD_SI_LWP)
(FBSD_ILL_ILLOPC, FBSD_ILL_ILLOPN, FBSD_ILL_ILLADR)
(FBSD_ILL_ILLTRP, FBSD_ILL_PRVOPC, FBSD_ILL_PRVREG)
(FBSD_ILL_COPROC, FBSD_ILL_BADSTK, FBSD_BUS_ADRALN)
(FBSD_BUS_ADRERR, FBSD_BUS_OBJERR, FBSD_BUS_OOMERR)
(FBSD_SEGV_MAPERR, FBSD_SEGV_ACCERR, FBSD_SEGV_PKUERR)
(FBSD_FPE_INTOVF, FBSD_FPE_INTDIV, FBSD_FPE_FLTDIV)
(FBSD_FPE_FLTOVF, FBSD_FPE_FLTUND, FBSD_FPE_FLTRES)
(FBSD_FPE_FLTINV, FBSD_FPE_FLTSUB, FBSD_TRAP_BRKPT)
(FBSD_TRAP_TRACE, FBSD_TRAP_DTRACE, FBSD_TRAP_CAP)
(FBSD_CLD_EXITED, FBSD_CLD_KILLED, FBSD_CLD_DUMPED)
(FBSD_CLD_TRAPPED, FBSD_CLD_STOPPED, FBSD_CLD_CONTINUED)
(FBSD_POLL_IN, FBSD_POLL_OUT, FBSD_POLL_MSG, FBSD_POLL_ERR)
(FBSD_POLL_PRI, FBSD_POLL_HUP, fbsd_signal_cause)
(fbsd_report_signal_info): New.
(fbsd_init_abi): Use fbsd_report_signal_info as gdbarch
report_signal_info method.

Add ChangeLog entry for previous commit

Add myself to gdb/MAINTAINERS

gdb/ChangeLog:

2021-06-03 Magne Hov <mhov@undo.io>

* MAINTAINERS (Write After Approval): Add Magne Hov.

Restore gdb.SYMBOL_LABEL_DOMAIN constant

It was removed (probably by mistake) in
51e78fc5fa21870d415c52f90b93e3c6ad57be46.

gdb/ChangeLog:

2021-06-03 Hannes Domani <ssbssa@yahoo.de>

* python/py-symbol.c (gdbpy_initialize_symbols): Restore
gdb.SYMBOL_LABEL_DOMAIN constant.

gdb/testsuite/ChangeLog:

2021-06-03 Hannes Domani <ssbssa@yahoo.de>

* gdb.python/py-symbol.exp: Test symbol constants.

PR4283, update gprof manual with note about GMON_OUT_PREFIX

PR 4283
* gprof.texi (Executing): Note GMON_OUT_PREFIX environment variable.

PR2589, ld vs. ld.so

PR 2589
* ld.texi (link-time runtime library search path): Mention
plugin library path. Correct order of search.

PR1202, mcore disassembler: wrong address loopt

Fixes a 16 year old bug report, which even came with a patch.

opcodes/
PR 1202
* mcore-dis.c (print_insn_mcore): Correct loopt disassembly.
Use unsigned int for inst.
gas/
PR 1202
* testsuite/gas/mcore/allinsn.d: Correct loopt expected output.

Automatic date update in version.in

Fix temp-dir leakage in per-bfd-sharing.exp

Whan using clang as compiler this compile step fails due to the
unknown option "-Wl,--build-id". This leaks the already created
temp-dir.

Fixed by compiling first, and creating the temp-dir only when the
compile succeeded.

2021-06-02 Bernd Edlinger <bernd.edlinger@hotmail.de>

* gdb.dwarf2/per-bfd-sharing.exp: Fix temp-dir leakage.

sim m32c: Include defs.h in m32c.opc and r8c.opc.

gnulib can override stdio.h and/or stdlib.h in which case the gnulib
headers require config.h to be included first.

gdb/sim/m32c/ChangeLog:

* m32c.opc: Include defs.h.
* r8c.opc: Likewise.

Fix threadapply test

The current test case leaves detached processes running at the end of
the test. This patch changes the test to use a barrier wait to ensure all
processes exit cleanly at the end of the tests.

gdb/testsuite/ChangeLog:

2021-06-02 Carl Love <cel@us.ibm.com>

* gdb.threads/threadapply.c: Add global mybarrier.
(main): Add pthread_barrier_init.
(thread_function): Replace while loop with myp increment and
pthread_barrier_wait.

arc: Construct disassembler options dynamically

The idea of this change is simple: Populate a data structure, namely
"disasm_option_and_arg_t" from "include/dis-asm.h", to encompass the
disassembly options and their possible arguments.

This will make it easier to manage or extend those options by adapting
entries in a data structure, "arc_options".  There will be lesser need
to hard-code the options in the code itself.  Moreover, ARC GDB will
use this population function, "disassembler_options_arc ()", to enable
the "set disassembler-option" for ARC targets.  The gdb change will be
in a separate patch though.

The changes in this patch can be divided into:

1) Introduction of "disassembler_options_arc ()" that will return a
"disasm_option_and_arg_t" structure representing the disassembly
options and their likely arguments.

2) New data type "arc_options_arg_t" and new data "arc_options".
These are the internals for keeping track of options and arguments
entries that can easily be extended.

3) To print the options, the "print_arc_disassembler_options ()" has
been adjusted to use this dynamically built structure instead of having
them hard-coded inside.

To see this in effect, one can look into the output of:
$ ./binutils/objdump --help
  ...
  The following ARC specific disassembler options are...
  ...

include/ChangeLog:

* dis-asm.h (disassembler_options_arc): New prototype.

opcodes/ChangeLog:

* arc-dis.c (arc_option_arg_t): New enumeration.
(arc_options): New variable.
(disassembler_options_arc): New function.
(print_arc_disassembler_options): Reimplement in terms of
"disassembler_options_arc".

gdb/testsuite: only add -J option when compiling with gfortran

We currently make use of the -J option to gfortran in order that
compiled modules should be placed in the correct output directory.
Obviously different compilers, e.g. flang, will have different options
to achieve the same result.

This commit makes it so we only add the -J flag when using a gcc
based (i.e. gfortran) compiler.

I had a look through the flang help page and tried a few likely
looking options, but couldn't find anything that seemed to do the same
thing, so, for now, I'm only adding an extra option when compiling
with gfortran.

This does mean that any compiler other than gfortran might run into
problems if running the testsuite in parallel due to modules of the
same name all being written to the same directory, and so possibly
overwriting each other.

gdb/testsuite/ChangeLog:

* lib/gdb.exp (gdb_compile): Only add the -J option when using a
gcc based Fortran compiler, for example, flang does not support
this option.

gdb/testsuite: escape '*' character in pattern used by flang

One of the integer type patterns used by flang included a '*'
character which was not escaped.

gdb/testsuite/ChangeLog:

* lib/fortran.exp (fortran_int8): Escape '*' in pattern.

asan: heap buffer overflow in _bfd_elf_parse_attributes

* elf-attrs.c (_bfd_elf_parse_attributes): Break out of loop if
subsection length is too small to cover tag and length field.

Automatic date update in version.in

Conditionally restore displaced stepping state after fork.

There is no default method for
gdbarch_displaced_step_restore_all_in_ptid, so calling it
unconditionally for fork events triggered an assertion failure on
platforms that do not support displaced stepping. To fix, only invoke
the method if the gdbarch supports displaced stepping.

Note that not all gdbarches support both displaced stepping and fork
events, so gdbarch validation does not require
gdbarch_displaced_step_restore_all_in_ptid for any gdbarch supporting
displaced stepping. However, the internal assertion in
gdbarch_displaced_step_restore_all_in_ptid should catch any gdbarches
which do support both but fail to provide this method.

gdb/ChangeLog:

* infrun.c (handle_inferior_event): Only call
gdbarch_displaced_step_restore_all_in_ptid if
gdbarch_supports_displaced_stepping is true.

Remove some gdb/data-directory special cases

I found an odd special case for data-directory in gdb's Makefile. I
don't see a reason to have this, so this removes it in favor of having
this code work in the most ordinary way for a subdirectory build.

gdb/ChangeLog
2021-06-01 Tom Tromey <tromey@adacore.com>

* Makefile.in (all-data-directory): Remove.
(data-directory/Makefile): Remove.

Clean up gdb's --enable-shared

The old testsuite configure did not use AS_HELP_STRING, and it had a
typo in the help for --enable-shared.  This patch fixes these
problems.

gdb/ChangeLog
2021-06-01  Tom Tromey  <tromey@adacore.com>

* configure: Rebuild.
* configure.ac: Use AS_HELP_STRING for enable-shared.  Fix typo.

Apply silent Makefile rules to gdb/testsuite

This applies the silent-rules.mk treatment to gdb/testsuite/Makefile.

gdb/ChangeLog
2021-06-01 Tom Tromey <tromey@adacore.com>

* silent-rules.mk (ECHO_CC): New variable.

gdb/testsuite/ChangeLog
2021-06-01 Tom Tromey <tromey@adacore.com>

* Makefile.in (all): Don't print anything.
($(abs_builddir)/site.exp site.exp): Use $(ECHO_GEN).
(expect-read1): Likewise.
(read1.so): Use $(ECHO_CC).
Include silent-rules.mk.

Always build 'all' in gdb/testsuite

gdb's Makefile currently excludes testsuite from the subdirectories to
build. I don't think there's a good reason for this, so this patch
adds testsuite to the SUBDIRS list and removes a special case from
'all'.

gdb/ChangeLog
2021-06-01 Tom Tromey <tromey@adacore.com>

* Makefile.in (SUBDIRS): Add testsuite.
(all): Don't exclude testsuite.

Remove gdb/testsuite/configure

I didn't see a strong reason to have a separate configure script in
gdb/testsuite, so this patch removes it.  The few relevant configury
bits are moved into gdb's configure script.  Some of the old
testsuite/configure script (e.g., the header check) is dead code.

This also adds a Makefile rule to rebuild lib/pdtrace.  This was
missing from the old code.

'read1' is now a dependency of check-read1, rather than extra code at
configure time.

Finally, the old "ENABLE_LIBCTF" subst in gdb/configure was not used;
nor was the variable defined, so this was always empty.  However, the
lower-case variant was used by the testsuite, so this patch renames
the subst.

gdb/ChangeLog
2021-06-01  Tom Tromey  <tromey@adacore.com>

* configure.ac: Copy some code from testsuite/configure.ac.
(enable_libctf): Subst this, not ENABLE_LIBCTF.
* configure: Rebuild.

gdb/testsuite/ChangeLog
2021-06-01  Tom Tromey  <tromey@adacore.com>

* aclocal.m4, configure.ac, configure: Remove.
* Makefile.in (EXTRA_RULES): Remove.
($(abs_builddir)/site.exp site.exp): Don't depend on
config.status.
(distclean maintainer-clean realclean, Makefile): Update.
(config.status): Remove target.
(lib/pdtrace): New target.
(all): Don't depend on EXTRA_RULES.
(check-read1): Depend on read1.so, expect-read1.

[gdb/symtab] Ignore cold clones

Consider the test-case contained in this patch, compiled for c using gcc-10:
...
$ gcc-10 -x c src/gdb/testsuite/gdb.cp/cold-clone.cc -O2 -g -Wall -Wextra
...

When setting a breakpoint on foo, we get one breakpoint location:
...
$ gdb -q -batch a.out -ex "b foo"
Breakpoint 1 at 0x400560: file cold-clone.cc, line 28.
...

However, when we compile for c++ instead, we get two breakpoint locations:
...
$ gdb -q -batch a.out -ex "b foo" -ex "info break"
Breakpoint 1 at 0x400430: foo. (2 locations)
Num  Type        Disp Enb Address            What
1    breakpoint  keep y   <MULTIPLE>
1.1                   y   0x0000000000400430 in foo() at cold-clone.cc:30
1.2                   y   0x0000000000400560 in foo() at cold-clone.cc:28
...

The additional breakpoint location at 0x400430 corresponds to the cold clone:
...
$ nm a.out | grep foo
0000000000400560 t _ZL3foov
0000000000400430 t _ZL3foov.cold
...
which demangled looks like this:
...
$ nm -C a.out | grep foo
0000000000400560 t foo()
0000000000400430 t foo() [clone .cold]
...

[ Or, in the case of the cc1 mentioned in PR23710:
...
$ nm cc1 | grep do_rpo_vn.*cold
000000000058659d t \
  _ZL9do_rpo_vnP8functionP8edge_defP11bitmap_headbb.cold.138
$ nm -C cc1 | grep do_rpo_vn.*cold
000000000058659d t \
  do_rpo_vn(function*, edge_def*, bitmap_head*, bool, bool) [clone .cold.138]
... ]

The cold clone is a part of the function that is split off from the rest of
the function because it's considered cold (not frequently executed).  So while
the symbol points to code that is part of a function, it doesn't point to a
function entry, so the desirable behaviour for "break foo" is to ignore this
symbol.

When compiling for c, the symbol "foo.cold" is entered as minimal symbol
with the search name "foo.cold", and the lookup using "foo" fails to find that
symbol.

But when compiling for c++, the symbol "foo.cold" is entered as minimal symbol
with both the mangled and demangled name, and for the demangled name
"foo() [clone .cold]" we get the search name "foo" (because
cp_search_name_hash stops hashing at '('), and the lookup using "foo" succeeds.

Fix this by recognizing the cold clone suffix and returning false for such a
minimal symbol in msymbol_is_function.

Tested on x86_64-linux.

gdb/ChangeLog:

2021-06-01  Tom de Vries  <tdevries@suse.de>

PR symtab/26096
* minsyms.c (msymbol_is_cold_clone): New function.
(msymbol_is_function): Use msymbol_is_cold_clone.

gdb/testsuite/ChangeLog:

2021-06-01  Tom de Vries  <tdevries@suse.de>

PR symtab/26096
* gdb.cp/cold-clone.cc: New test.
* gdb.cp/cold-clone.exp: New file.

gdb: run 'maint selftest' with an executable loaded

I spotted that 'maint selftest' with an executable loaded into GDB,
would (when GDB was compiled for all targets) crash GDB.  I fixed this
with a commit to bfd:

  commit 427e4066afd13d1bf52c849849475f536e285d66
  Date:   Thu May 20 09:16:41 2021 +0100

      gdb/bfd: avoid crash when architecture is forced to csky or riscv

However, this issue was not spotted as we currently only run 'maint
selftest' without an executable loaded.

This commit extends the testsuite to run 'maint selftest' both with
and without an executable loaded into GDB.

Currently, when no executable is loaded into GDB all of the selftest
pass (i.e. the fail count is 0), however, when running with an
executable loaded, I am seeing 1 failure (on an x86-64 GNU/Linux
host).

This failure is from the ARM disassembler tests, it appears that the
disassembler somehow gets itself into a state where it thinks it is in
thumb mode; when running the same test without an executable loaded
this doesn't happen.

This commit doesn't fix the ARM disassembler issue, but I thought it
was worth adding this anyway, as this will spot if GDB again starts to
crash when 'maint selftest' is run.

gdb/testsuite/ChangeLog:

* gdb.gdb/unittest.c: New file.
* gdb.gdb/unittest.exp: Run with and without a binary file loaded
into GDB.

gdb/arm: add support for bare-metal core dumps

This commit adds support for bare metal core dumps on the ARM target,
and is based off of this patch submitted to the mailing list:

  https://sourceware.org/pipermail/gdb-patches/2020-October/172845.html

Compared to the version linked above this version is updated to take
account of recent changes to the core dump infrastructure in GDB,
there is now more shared infrastructure for core dumping within GDB,
and also some common bare metal core dumping infrastructure.  As a
result this patch is smaller than the original proposed patch.

Further, the original patch included some unrelated changes to the
simulator that have been removed from this version.

I have written a ChangeLog entry as the original patch was missing
one.

I have done absolutely no testing of this patch.  It is based on the
original submitted patch, which I assume was tested, but after my
modifications things might have been broken, however, the original
patch author has tested this version and reported it as being good:

  https://sourceware.org/pipermail/gdb-patches/2021-May/178900.html

The core dump format is based around generating an ELF containing
sections for the writable regions of memory that a user could be
using.  Which regions are dumped rely on GDB's existing common core
dumping code, GDB will attempt to figure out the stack and heap as
well as copying out writable data sections as identified by the
original ELF.

Register information is added to the core dump using notes, just as it
is for Linux of FreeBSD core dumps.  The note types used consist of
the 2 basic types you would expect in a OS based core dump,
NT_PRPSINFO, NT_PRSTATUS, along with the architecture specific
NT_ARM_VFP note.

The data layouts for each note type are described below, in all cases,
all padding fields should be set to zero.

Note NT_PRPSINFO is optional.  Its data layout is:

  struct prpsinfo_t
  {
    uint8_t padding[28];
    char fname[16];
    char psargs[80];
  }

Field 'fname' - null terminated string consisting of the basename of
    (up to the fist 15 characters of) the executable.  Any additional
    space should be set to zero.  If there's no executable name then
    this field can be set to all zero.

Field 'psargs' - a null terminated string up to 80 characters in
    length.  Any additional space should be filled with zero.  This
    field contains the full executable path and any arguments passed
    to the executable.  If there's nothing sensible to write in this
    field then fill it with zero.

Note NT_PRSTATUS is required, its data layout is:

  struct prstatus_t
  {
    uint8_t padding_1[12];
    uint16_t sig;
    uint8_t padding_2[10];
    uint32_t thread_id;
    uint8_t padding_3[44];
    uint32_t gregs[18];
  }

Field 'sig' - the signal that stopped this thread.  It's implementation
    defined what this field actually means.  Within GDB this will be
    the signal number that the remote target reports as the stop
    reason for this thread.

Field 'thread_is' - the thread id for this thread.  It's implementation
    defined what this field actually means.  Within GDB this will be
    thread thread-id that is assigned to each remote thread.

Field 'gregs' - holds the general purpose registers $a1 through to $pc
    at indices 0 to 15.  At index 16 the program status register.
    Index 17 should be set to zero.

Note NT_ARM_VFP is optional, its data layout is:

  armvfp_t
  {
    uint64_t regs[32];
    uint32_t fpscr;
  }

Field 'regs' - holds the 32 d-registers 0 to 31 in order.

Field 'fpscr' - holds the fpscr register.

The rules for ordering the notes is the same as for Linux.  The
NT_PRSTATUS note must come before any other notes about additional
register sets.  And for multi-threaded targets all registers for a
single thread should be grouped together.  This is because only
NT_PRSTATUS includes a thread-id, all additional register notes after
a NT_PRSTATUS are assumed to belong to the same thread until a
different NT_PRSTATUS is seen.

gdb/ChangeLog:

PR gdb/14383
* Makefile.in (ALL_TARGET_OBS): Add arm-none-tdep.o.
(ALLDEPFILES): Add arm-none-tdep.c
* arm-none-tdep.c: New file.
* configure.tgt (arm*-*-*): Add arm-none-tdep.o to cpu_obs.

gdb: avoid premature dummy frame garbage collection

Consider the following chain of events:

  * GDB is performing an inferior call, and

  * the inferior calls longjmp, and

  * GDB detects that the longjmp has completed, stops, and enters
    check_longjmp_breakpoint_for_call_dummy (in breakpoint.c), and

  * GDB tries to unwind the stack in order to check that the dummy
    frame (setup for the inferior call) is still on the stack, but

  * The unwind fails, possibly due to missing debug information, so

  * GDB incorrectly concludes that the inferior has longjmp'd past the
    dummy frame, and so deletes the dummy frame, including the dummy
    frame breakpoint, but then

  * The inferior continues, and eventually returns to the dummy frame,
    which is usually (always?) on the stack, the inferior starts
    trying to execute the random contents of the stack, this results
    in undefined behaviour.

This situation is already warned about in the comment on the function
check_longjmp_breakpoint_for_call_dummy where we say:

   You should call this function only at places where it is safe to currently
   unwind the whole stack.  Failed stack unwind would discard live dummy
   frames.

The warning here is fine, the problem is that, even though we call the
function from a location within GDB where we hope to be able to
unwind, sometime the state of the inferior means that the unwind will
not succeed.

This commit tries to improve the situation by adding the following
additional check; when GDB fails to find the dummy frame on the stack,
instead of just assuming that the dummy frame can be garbage
collected, first find the stop_reason for the last frame on the stack.
If this stop_reason indicates that the stack unwinding may have failed
then we assume that the dummy frame is still in use.  However, if the
last frame's stop_reason indicates that the stack unwind completed
successfully then we can be confident that the dummy frame is no
longer in use, and we garbage collect it.

Tested on x86-64 GNU/Linux.

gdb/ChangeLog:

* breakpoint.c (check_longjmp_breakpoint_for_call_dummy): Add
check for why the backtrace stopped.

gdb/testsuite/ChangeLog:

* gdb.base/premature-dummy-frame-removal.c: New file.
* gdb.base/premature-dummy-frame-removal.exp: New file.
* gdb.base/premature-dummy-frame-removal.py: New file.

Change-Id: I8f330cfe0f3f33beb3a52a36994094c4abada07e

Automatic date update in version.in

gdb: pass signature to allocate_signatured_type and signatured_type constructor

All signatured_type constucted (even those used only for lookups in hash
maps) need a signature. Enforce that by passing the signature all the
way to the signatured_type constructor.

gdb/ChangeLog:

* dwarf2/read.h (struct structured_type) <signatured_type>: New.
Update all callers.
(struct dwarf2_per_bfd) <allocate_signatured_type>: Add
signature parameter, update all callers.
* dwar2/read.c (dwarf2_per_bfd::allocate_signatured_type): Add
signature parameter.

Change-Id: I99bc1f88f54127666aa133ddbbabb7f7668fa14a

gdb: add and use signatured_type_up

Add an alias for std::unique_ptr<signatured_type> and use it where
possible.

gdb/ChangeLog:

* dwarf2/read.h (signatured_type_up): New, use where possible.

Change-Id: I5a41e8345551434c8beeb9f269b03bdcf27989be

gdb: move dwarf2_per_cu_data and signatured_type up

Move them up before dwarf2_per_bfd, this will allow adding and using
signatured_type_up in the next patch.

gdb/ChangeLog:

* dwarf2/read.h (signatured_type, dwarf2_per_cu_data): Move up.

Change-Id: I85acad4476c8236930b6f9e53ddb8bbbad009e5e

RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust.

2021-05-31  Nelson Chu  <nelson.chu@sifive.com>
            Lifang Xia  <lifang_xia@c-sky.com>

The data segment phase exp_seg_relro_adjust means we are still adjusting the
relro segments, so we will get the symbol values which havn't consider the
relro.  It is dangerous and we shouldn't do the relaxations at this stage.
Otherwise, we may get the truncated fails when the relax range crossing the
data segment.

One of the solution is that, we use a pointer to monitor the data segment
phase while relaxing, to know whether the relro has been handled or not.
Once we check the phase is exp_seg_relro_adjust, we should skip this round
of relaxations, since the incorrect symbol values will affect the correctness
of relaxations.  I think we probably need to record more information about
data segment or alignments in the future, to make sure it is safe to doing
relaxations.

For the two new testcases, relro-relax-lui and relro-relax-pcrel, we get
the following truncated errors when using toolchains, which enable relro:

(.text+0x0): relocation truncated to fit: R_RISCV_GPREL_I against symbol `SymbolRodata' defined in .rodata section in test1.o

After applying this patch, the truncated errors should be resolved.
However, only linux toolchains support -z relro, so we only test these
two testcases when supporting shared library.

bfd/
    PR 27566
    * elfnn-riscv.c (struct riscv_elf_link_hash_table): New integer pointer
    to monitor the data segment phase.
    (bfd_elfNN_riscv_set_data_segment_info): New function called by
    after_allocation, to set the data_segment_phase from expld.dataseg.
    (_bfd_riscv_relax_section): Don't relax when data_segment_phase is
    exp_seg_relro_adjust (0x4).
    * elfxx-riscv.h (bfd_elf32_riscv_set_data_segment_info): New extern.
    (bfd_elf64_riscv_set_data_segment_info): Likewise.
ld/
    PR 27566
    * emultempl/riscvelf.em (after_allocation): Call
    riscv_set_data_segment_info to set data segment phase before relaxing.
    * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
    * testsuite/ld-riscv-elf/relro-relax-lui.d: New testcase.
    * testsuite/ld-riscv-elf/relro-relax-lui.s: Likewise.
    * testsuite/ld-riscv-elf/relro-relax-pcrel.d: Likewise.
    * testsuite/ld-riscv-elf/relro-relax-pcrel.s: Likewise.

Set is_debug_types in allocate_signatured_type

All callers of allocate_signatured_type set the is_debug_types flag on
the result -- in fact, they are required to, because this is the sign
that downcasting the object to signatured_type is safe. This patch
moves this assignment into the allocation function.

2021-05-30 Tom Tromey <tom@tromey.com>

* dwarf2/read.c (dwarf2_per_bfd::allocate_signatured_type): Set
is_debug_types.
(create_signatured_type_table_from_index)
(create_signatured_type_table_from_debug_names, add_type_unit)
(read_comp_units_from_section): Update.

Remove dwarf2_per_bfd::m_num_psymtabs

Now that CUs and TUs are stored together in all_comp_units, the
m_num_psymtabs member is no longer needed -- it is always identical to
the length of the vector. This patch removes it.

2021-05-30 Tom Tromey <tom@tromey.com>

* dwarf2/read.h (struct dwarf2_per_bfd) <num_psymtabs,
m_num_psymtabs>: Remove.
(resize_symtabs): Update.
* dwarf2/read.c (dwarf2_per_bfd::allocate_per_cu)
(dwarf2_per_bfd::allocate_signatured_type): Update.

Automatic date update in version.in

sim: ppc: enable -Wno-format for mingw targets

This mirrors what we do for other builds already.

sim: ppc: avoid shadowing errno

If the OS headers define the "errno" symbol, it breaks some of these
funcs that were using "int errno" itself. Rename local vars to "err"
to avoid that, and delete the old "extern int errno".

sim: v850: add pointer casts for execv on Windows

The execv prototypes on Windows via mingw64 include extra const
markings on the argv/envp pointers than what POSIX specifies.
Cast them to void* as a hack to get it working on all platforms.

sim: mn10300: add SIGTRAP fallback

This is a bit of a hack, but it matches the hack we use in other
places in the sim currently. This fixes building for e.g. Windows.
The signal fallback logic needs a bit of love in general at some
point across all sim code.

sim: pull in extra gnulib libs too

Some modules might require extra linking depending on the platform
(e.g. Windows might need -lws2_32), so include the existing extra
gnulib libs setting.

sim: mips: fix build w/out dv-sockser

Make sure we don't fail to build when dv-socker is unavailable.

sim: frv: fix up a bunch of prototype warnings

Some were missing, some were unused, and some were partially renamed.

sim: frv: fix compiler parentheses suggestions warnings

Newer gcc warns when writing statements like (a && b || c && d),
so add more parentheses to make it (and the reader) happy.

sim: sh: fix a few compiler warnings

sim: m32c: rename open symbol to avoid collisions

If the header files define open(), make sure our local open var
doesn't shadow it.

sim: leverage gnulib

We use getline, so leverage gnulib to provide fallback implementation.

Re: readelf and objdump help

Fix a last-minute change..

* objdump (usage): Add missing \n.

Fix InlinedFrameDecorator example

Argument fobj was only available in the constructor.

gdb/doc/ChangeLog:

2021-05-29 Hannes Domani <ssbssa@yahoo.de>

* python.texi (Writing a Frame Filter): Fix example.

PowerPC table driven -Mraw disassembly

opcodes/
* ppc-dis.c (lookup_powerpc): Test deprecated field when -Many.
Don't special case PPC_OPCODE_RAW.
(lookup_prefix): Likewise.
(lookup_vle, lookup_spe2): Similarly. Add dialect parameter and..
(print_insn_powerpc): ..update caller.
* ppc-opc.c (EXT): Define.
(powerpc_opcodes): Mark extended mnemonics with EXT.
(prefix_opcodes, vle_opcodes): Likewise.
(XISEL, XISEL_MASK): Add cr field and simplify.
(powerpc_opcodes): Use XISEL with extended isel mnemonics and sort
all isel variants to where the base mnemonic belongs. Sort dstt,
dststt and dssall.
gas/
* testsuite/gas/ppc/raw.s,
* testsuite/gas/ppc/raw.d: New test.
* testsuite/gas/ppc/ppc.exp: Run it.

readelf and objdump help

Splitting up help strings makes it more likely that at least some of
the help translation survives adding new options.

* readelf.c (parse_args): Call dwarf_select_sections_all on
--debug-dump without optarg.
(usage): Associate -w and --debug-dump options closely.
Split up help message. Remove extraneous blank lines around
ctf help.
* objdump.c (usage): Similarly.

sim: bfin: fix the otp fix fix

Need to shift the upper 32-bits and not just combine directly with
the lower 32-bits.

MIPS/opcodes: Reorder legacy COP0, COP2, COP3 opcode instructions

Group legacy instructions using the COP0, COP2, COP3 opcodes together
and by their coprocessor number, and move them towards the end of the
opcode table. No functional change.

With the addition of explicit ISA exclusions this is maybe not strictly
necessary anymore as the individual legacy instructions are not supposed
to match ISA levels or CPU implementations that have discarded them or
replaced with a new instruction each, but let's not have them scattered
randomly across blocks of unrelated instruction sets where someone chose
to put them previously. Perhaps they could be put back in alphabetical
order in the main instruction block, but let's leave it for another
occasion.

opcodes/
* mips-opc.c (mips_builtin_opcodes): Reorder legacy COP0, COP2,
COP3 opcode instructions.

MIPS/GAS/testsuite: Add C0, C1, C2, C3 opcode tests

Add tests for the generic C0, C1, C2, C3 coprocessor instructions.

gas/
* testsuite/gas/mips/c0.d: New test.
* testsuite/gas/mips/mips1@c0.d: New test.
* testsuite/gas/mips/mips2@c0.d: New test.
* testsuite/gas/mips/mips3@c0.d: New test.
* testsuite/gas/mips/mips4@c0.d: New test.
* testsuite/gas/mips/mips5@c0.d: New test.
* testsuite/gas/mips/mips32@c0.d: New test.
* testsuite/gas/mips/mips64@c0.d: New test.
* testsuite/gas/mips/r3000@c0.d: New test.
* testsuite/gas/mips/r3900@c0.d: New test.
* testsuite/gas/mips/r4000@c0.d: New test.
* testsuite/gas/mips/vr5400@c0.d: New test.
* testsuite/gas/mips/r5900@c0.d: New test.
* testsuite/gas/mips/sb1@c0.d: New test.
* testsuite/gas/mips/interaptiv-mr2@c0.d: New test.
* testsuite/gas/mips/octeon@c0.d: New test.
* testsuite/gas/mips/xlr@c0.d: New test.
* testsuite/gas/mips/c1.d: New test.
* testsuite/gas/mips/mips1@c1.d: New test.
* testsuite/gas/mips/mips2@c1.d: New test.
* testsuite/gas/mips/mips3@c1.d: New test.
* testsuite/gas/mips/mips4@c1.d: New test.
* testsuite/gas/mips/mips5@c1.d: New test.
* testsuite/gas/mips/mips32@c1.d: New test.
* testsuite/gas/mips/mips64@c1.d: New test.
* testsuite/gas/mips/mipsr6@c1.d: New test.
* testsuite/gas/mips/r3000@c1.d: New test.
* testsuite/gas/mips/r3900@c1.d: New test.
* testsuite/gas/mips/r4000@c1.d: New test.
* testsuite/gas/mips/vr5400@c1.d: New test.
* testsuite/gas/mips/r5900@c1.d: New test.
* testsuite/gas/mips/sb1@c1.d: New test.
* testsuite/gas/mips/interaptiv-mr2@c1.d: New test.
* testsuite/gas/mips/octeon@c1.d: New test.
* testsuite/gas/mips/xlr@c1.d: New test.
* testsuite/gas/mips/c2.d: New test.
* testsuite/gas/mips/vr5400@c2.d: New test.
* testsuite/gas/mips/r5900@c2.d: New test.
* testsuite/gas/mips/octeon@c2.d: New test.
* testsuite/gas/mips/c3.d: New test.
* testsuite/gas/mips/mips1@c3.d: New test.
* testsuite/gas/mips/mips2@c3.d: New test.
* testsuite/gas/mips/mips32@c3.d: New test.
* testsuite/gas/mips/r3000@c3.d: New test.
* testsuite/gas/mips/r3900@c3.d: New test.
* testsuite/gas/mips/c0.l: New test stderr output.
* testsuite/gas/mips/c2.l: New test stderr output.
* testsuite/gas/mips/c3.l: New test stderr output.
* testsuite/gas/mips/c0.s: New test source.
* testsuite/gas/mips/c1.s: New test source.
* testsuite/gas/mips/c2.s: New test source.
* testsuite/gas/mips/c3.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.

MIPS/GAS/testsuite: Run RFE test across all ISAs

Verify that the RFE instruction is not only accepted where supported,
but rejected where it is not as well.

gas/
* testsuite/gas/mips/mips.exp: Run RFE test across all ISAs.
* testsuite/gas/mips/rfe.d: Update for ISA exclusions.
* testsuite/gas/mips/mips1@rfe.d: New test.
* testsuite/gas/mips/mips2@rfe.d: New test.
* testsuite/gas/mips/r3000@rfe.d: New test.
* testsuite/gas/mips/r3900@rfe.d: New test.
* testsuite/gas/mips/rfe.l: New test stderr output.

MIPS/GAS/testsuite: Run coprocessor tests across all ISAs

Verify that individual coprocessor instructions are not only accepted
where supported, but rejected where they are not as well.

gas/
* testsuite/gas/mips/mips.exp: Run coprocessor tests across all
ISAs.
* testsuite/gas/mips/cp0b.d: Update for ISA exclusions.
* testsuite/gas/mips/cp0bl.d: Update for ISA exclusions.
* testsuite/gas/mips/cp0c.d: Update for ISA exclusions.
* testsuite/gas/mips/cp0m.d: Update for ISA exclusions.
* testsuite/gas/mips/cp3.d: Update for ISA exclusions.
* testsuite/gas/mips/cp3b.d: Update for ISA exclusions.
* testsuite/gas/mips/cp3bl.d: Update for ISA exclusions.
* testsuite/gas/mips/cp3m.d: Update for ISA exclusions.
* testsuite/gas/mips/cp3d.d: Update for ISA exclusions.
* testsuite/gas/mips/mips1@cp0b.d: New test.
* testsuite/gas/mips/mips2@cp0b.d: New test.
* testsuite/gas/mips/mips3@cp0b.d: New test.
* testsuite/gas/mips/r3000@cp0b.d: New test.
* testsuite/gas/mips/r3900@cp0b.d: New test.
* testsuite/gas/mips/r4000@cp0b.d: New test.
* testsuite/gas/mips/r5900@cp0b.d: New test.
* testsuite/gas/mips/mips2@cp0bl.d: New test.
* testsuite/gas/mips/mips3@cp0bl.d: New test.
* testsuite/gas/mips/r3900@cp0bl.d: New test.
* testsuite/gas/mips/r4000@cp0bl.d: New test.
* testsuite/gas/mips/r5900@cp0bl.d: New test.
* testsuite/gas/mips/mips1@cp0c.d: New test.
* testsuite/gas/mips/mips2@cp0c.d: New test.
* testsuite/gas/mips/mips3@cp0c.d: New test.
* testsuite/gas/mips/mips4@cp0c.d: New test.
* testsuite/gas/mips/mips5@cp0c.d: New test.
* testsuite/gas/mips/r3000@cp0c.d: New test.
* testsuite/gas/mips/r3900@cp0c.d: New test.
* testsuite/gas/mips/r4000@cp0c.d: New test.
* testsuite/gas/mips/vr5400@cp0c.d: New test.
* testsuite/gas/mips/r5900@cp0c.d: New test.
* testsuite/gas/mips/mips1@cp0m.d: New test.
* testsuite/gas/mips/r3000@cp0m.d: New test.
* testsuite/gas/mips/octeon@cp2.d: New test.
* testsuite/gas/mips/mipsr6@cp2b.d: New test.
* testsuite/gas/mips/vr5400@cp2b.d: New test.
* testsuite/gas/mips/octeon@cp2b.d: New test.
* testsuite/gas/mips/mips1@cp2bl.d: New test.
* testsuite/gas/mips/mipsr6@cp2bl.d: New test.
* testsuite/gas/mips/r3000@cp2bl.d: New test.
* testsuite/gas/mips/vr5400@cp2bl.d: New test.
* testsuite/gas/mips/octeon@cp2bl.d: New test.
* testsuite/gas/mips/vr5400@cp2m.d: New test.
* testsuite/gas/mips/r5900@cp2m.d: New test.
* testsuite/gas/mips/octeon@cp2m.d: New test.
* testsuite/gas/mips/mips1@cp2d.d: New test.
* testsuite/gas/mips/r3000@cp2d.d: New test.
* testsuite/gas/mips/r3900@cp2d.d: New test.
* testsuite/gas/mips/vr5400@cp2d.d: New test.
* testsuite/gas/mips/r5900@cp2d.d: New test.
* testsuite/gas/mips/octeon@cp2d.d: New test.
* testsuite/gas/mips/mips1@cp2-64.d: New test.
* testsuite/gas/mips/mips2@cp2-64.d: New test.
* testsuite/gas/mips/mips32@cp2-64.d: New test.
* testsuite/gas/mips/mips32r2@cp2-64.d: New test.
* testsuite/gas/mips/mips32r3@cp2-64.d: New test.
* testsuite/gas/mips/mips32r5@cp2-64.d: New test.
* testsuite/gas/mips/mips32r6@cp2-64.d: New test.
* testsuite/gas/mips/r3000@cp2-64.d: New test.
* testsuite/gas/mips/r3900@cp2-64.d: New test.
* testsuite/gas/mips/interaptiv-mr2@cp2-64.d: New test.
* testsuite/gas/mips/mips1@cp3.d: New test.
* testsuite/gas/mips/mips2@cp3.d: New test.
* testsuite/gas/mips/mips32@cp3.d: New test.
* testsuite/gas/mips/r3000@cp3.d: New test.
* testsuite/gas/mips/r3900@cp3.d: New test.
* testsuite/gas/mips/mips1@cp3b.d: New test.
* testsuite/gas/mips/mips2@cp3b.d: New test.
* testsuite/gas/mips/mips32@cp3b.d: New test.
* testsuite/gas/mips/r3000@cp3b.d: New test.
* testsuite/gas/mips/r3900@cp3b.d: New test.
* testsuite/gas/mips/mips2@cp3bl.d: New test.
* testsuite/gas/mips/mips32@cp3bl.d: New test.
* testsuite/gas/mips/r3900@cp3bl.d: New test.
* testsuite/gas/mips/mips1@cp3m.d: New test.
* testsuite/gas/mips/mips2@cp3m.d: New test.
* testsuite/gas/mips/r3000@cp3m.d: New test.
* testsuite/gas/mips/r3900@cp3m.d: New test.
* testsuite/gas/mips/mips2@cp3d.d: New test.
* testsuite/gas/mips/cp0b.l: New test stderr output.
* testsuite/gas/mips/cp0bl.l: New test stderr output.
* testsuite/gas/mips/cp0c.l: New test stderr output.
* testsuite/gas/mips/cp0m.l: New test stderr output.
* testsuite/gas/mips/cp2.l: New test stderr output.
* testsuite/gas/mips/cp2-64.l: New test stderr output.
* testsuite/gas/mips/cp2b.l: New test stderr output.
* testsuite/gas/mips/cp2bl.l: New test stderr output.
* testsuite/gas/mips/cp2m.l: New test stderr output.
* testsuite/gas/mips/cp2d.l: New test stderr output.
* testsuite/gas/mips/cp3.l: New test stderr output.
* testsuite/gas/mips/cp3b.l: New test stderr output.
* testsuite/gas/mips/cp3bl.l: New test stderr output.
* testsuite/gas/mips/cp3m.l: New test stderr output.
* testsuite/gas/mips/cp3d.l: New test stderr output.

MIPS/opcodes: Accurately record coprocessor opcode CPU/ISA membership

Adjust opcode table entries for coprocessor instructions that have been
removed from certain ISA levels or CPU implementations as follows:

- remove CP0 memory access instructions from MIPS II up as the LWC0 and
  SWC0 opcodes have been reused for the LL and SC instructions
  respectively[1]; strictly speaking LWC0 and SWC0 have never really
  been defined in the first place[2], but let's keep them for now in
  case an odd implementation did,

- remove CP0 branch instructions from MIPS IV[3] and MIPS32[4] up, as
  they have been removed as from those ISAs,

- remove CP0 control register move instructions from MIPS32 up, as they
  have been removed as from that ISA[5],

- remove the RFE instruction from MIPS III[6] and MIPS32[7] up, as it
  has been removed as from those ISAs in favour to ERET,

- remove CP2 instructions from Vr5400 CPUs as their encodings have been
  reused for the multimedia instruction set extensions[8] and no CP2
  registers exist[9],

- remove CP3 memory access instructions from MIPS III up as coprocessor
  3 has been removed as from that ISA[10][11] and from MIPS32 up as the
  LWC3 opcode has been reused for the PREF instruction and consequently
  all the four memory access instructions removed from the ISA (though
  the COP3 opcode has been retained)[12].

Update the testsuite accordingly.

References:

[1]  Charles Price, "MIPS IV Instruction Set", MIPS Technologies, Inc.,
     Revision 3.2, September, 1995, Table A-38 "CPU Instruction Encoding
     - MIPS II Architecture", p. A-178

[2]  same, Section A.2.5.1 "Coprocessor Load and Store", p. A-12

[3]  "MIPS R10000 Microprocessor User's Manual", Version 2.0, MIPS
     Technologies, Inc., January 29, 1997, Section 14.25 "CP0
     Instructions", Subsection "Branch on Coprocessor 0", p. 285

[4]  "MIPS32 Architecture For Programmers, Volume II: The MIPS32
     Instruction Set", MIPS Technologies, Inc., Document Number:
     MD00086, Revision 1.00, June 9, 2003, Table A-9 "MIPS32 COP0
     Encoding of rs Field", p. 242

[5]  same

[6]  Joe Heinrich, "MIPS R4000 Microprocessor User's Manual", Second
     Edition, MIPS Technologies, Inc., April 1, 1994, Figure A-2 "R4000
     Opcode Bit Encoding", p. A-182

[8]  "Vr5432 64-bit MIPS RISC Microprocessor User's Manual, Volume 1",
     NEC Electronics Inc., Document No. U13751EU5V0UM00, May 2000,
     Section 1.2.3 "CPU Instruction Set Overview", p. 9

[9]  "Vr5432 64-bit MIPS RISC Microprocessor User's Manual, Volume 2",
     NEC Electronics Inc., Document No. U13751EU5V0UM00, May 2000,
     Section 19.2 "Multimedia Instruction Format", p. 681

[10] Charles Price, "MIPS IV Instruction Set", MIPS Technologies, Inc.,
     Revision 3.2, September, 1995, Section A 8.3.4 "Coprocessor 3 -
     COP3 and CP3 load/store", p. A-176

[11] same, Table A-39 "CPU Instruction Encoding - MIPS III
     Architecture", p. A-179

[12] "MIPS32 Architecture For Programmers, Volume II: The MIPS32
     Instruction Set", MIPS Technologies, Inc., Document Number:
     MD00086, Revision 1.00, August 29, 2002, Table A-2 "MIPS32 Encoding
     of the Opcode Field", p. 241

opcodes/
* mips-opc.c (mips_builtin_opcodes): Update exclusion list for
"ldc2", "ldc3", "lwc0", "lwc2", "lwc3", "sdc2", "sdc3", "swc0",
"swc2", "swc3", "cfc0", "ctc0", "bc2f", "bc2fl", "bc2t",
"bc2tl", "cfc2", "ctc2", "dmfc2", "dmtc2", "mfc2", "mtc2",
"bc3f", "bc3fl", "bc3t", "bc3tl", "cfc3", "ctc3", "mfc3",
"mtc3", "bc0f", "bc0fl", "bc0t", "bc0tl", "rfe", "c2", "c3",
"cop2", and "cop3" entries.

gas/
* testsuite/gas/mips/mips32@isa-override-1.d: Update for LDC3
instruction removal.
* testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise.

MIPS/opcodes: Remove DMFC3 and DMTC3 instructions

Coprocessor 3 has been removed from the MIPS ISA as from MIPS III[1][2]
with the LDC3 and SDC3 instructions having been replaced with LD and SD
instructions respectively and therefore the doubleword move instructions
from and to that coprocessor have never materialized (for 32-bit ISAs
coprocessor 3 has likewise been removed as from MIPS32r2[3]).  Remove
the DMFC3 and DMTC3 instructions from the opcode table then to avoid
confusion.

References:

[1] Charles Price, "MIPS IV Instruction Set", MIPS Technologies, Inc.,
    Revision 3.2, September, 1995, Section A 8.3.4 "Coprocessor 3 - COP3
    and CP3 load/store", p. A-176

[2] same, Table A-39 "CPU Instruction Encoding - MIPS III Architecture",
    p. A-179

[3] "MIPS32 Architecture For Programmers, Volume II: The MIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
    Revision 2.00, June 9, 2003, Table A-2 "MIPS32 Encoding of the
    Opcode Field", p. 317

opcodes/
* mips-opc.c (mips_builtin_opcodes): Remove "dmfc3" and "dmtc3"
entries and associated comments.

MIPS/GAS/testsuite: Add tests for coprocessor branch instructions

Cover basic CP0, CP2, CP3 branch and branch-likely instructions across
the relevant ISA levels. Omit CP1 branches, covered elsewhere.

gas/
* testsuite/gas/mips/cp0b.d: New test.
* testsuite/gas/mips/cp0bl.d: New test.
* testsuite/gas/mips/cp2b.d: New test.
* testsuite/gas/mips/micromips@cp2b.d: New test.
* testsuite/gas/mips/cp2bl.d: New test.
* testsuite/gas/mips/micromips@cp2bl.d: New test.
* testsuite/gas/mips/cp3b.d: New test.
* testsuite/gas/mips/cp3bl.d: New test.
* testsuite/gas/mips/cp0b.s: New test source.
* testsuite/gas/mips/cp0bl.s: New test source.
* testsuite/gas/mips/cp2b.s: New test source.
* testsuite/gas/mips/cp2bl.s: New test source.
* testsuite/gas/mips/cp3b.s: New test source.
* testsuite/gas/mips/cp3bl.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.

MIPS/opcodes: Disassemble the RFE instruction

Fix a commit b015e599c772 ("[MIPS] Add new virtualization instructions"),
<https://sourceware.org/ml/binutils/2013-05/msg00118.html>, regression
and bring the disassembly of the RFE instruction back for the relevant
ISA levels.

It is because the "rfe" opcode table entry was incorrectly moved behind
the catch-all generic "c0" entry for CP0 instructions, causing output
like:

  00: 42000010 c0 0x10

to be produced rather than:

  00: 42000010 rfe

even for ISA levels that do include the RFE instruction.

Move the "rfe" entry ahead of "c0" then, correcting the problem.  Add a
suitable test case.

opcodes/
* mips-opc.c (mips_builtin_opcodes): Move the "rfe" entry ahead
of "c0".

gas/
* testsuite/gas/mips/rfe.d: New test.
* testsuite/gas/mips/rfe.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

MIPS/opcodes: Properly handle ISA exclusion

Remove the hack used for MIPSr6 ISA exclusion from `cpu_is_member' and
handle the exclusion for any ISA levels properly in `opcode_is_member'.
Flatten the structure of the `if' statements there. No functional
change for the existing opcode tables.

include/
* opcode/mips.h (cpu_is_member): Remove code for MIPSr6 ISA
exclusion.
(opcode_is_member): Handle ISA level exclusion.

MIPS/opcodes: Factor out ISA matching against flags

In preparation for the next change factor out code for ISA matching
against instruction flags used in MIPS opcode tables, similarly to how
CPU matching is already done. No functional change, though for clarity
split the single `if' statement into multiple ones and use temporaries
rather than repeated expressions.

include/
* opcode/mips.h (isa_is_member): New inline function, factored
out from...
(opcode_is_member): ... here.

MIPS/opcodes: Add legacy CP1 control register names

The two CP1 control registers defined by legacy ISAs used to be referred
to by various names, such as FCR0, FCR31, FSR, however their documented
full names have always been the Implementation and Revision, and Control
and Status respectively, so the FIR and FCSR acronyms coming from modern
ISA revisions will be just as unambiguous while improving the clarity of
disassembly. Do not update the TX39 though as it did not have an FPU.

opcodes/
* mips-dis.c (mips_cp1_names_mips): New variable.
(mips_arch_choices): Use it rather than `mips_cp1_names_numeric'
for "r3000", "r4000", "r4010", "vr4100", "vr4111", "vr4120",
"r4300", "r4400", "r4600", "r4650", "r5000", "vr5400", "vr5500",
"r5900", "r6000", "rm7000", "rm9000", "r8000", "r10000",
"r12000", "r14000", "r16000", "mips5", "loongson2e", and
"loongson2f".

gas/
* testsuite/gas/mips/cp1-names-r3900.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test.
* testsuite/gas/mips/branch-misc-3.d: Update disassembly
according to changes to opcodes.
* testsuite/gas/mips/cp1-names-r3000.d: Likewise.
* testsuite/gas/mips/cp1-names-r4000.d: Likewise.
* testsuite/gas/mips/relax-swap1-mips1.d: Likewise.
* testsuite/gas/mips/relax-swap1-mips2.d: Likewise.
* testsuite/gas/mips/trunc.d: Likewise.

MIPS/GAS/testsuite: Add tests for coprocessor access instructions

Cover basic CP0, CP2, CP3 move, load and store instructions across the
relevant ISA levels. Omit CP0 move and CP1 instructions as they are
covered elsewhere.

gas/
* testsuite/gas/mips/cp0c.d: New test.
* testsuite/gas/mips/cp0m.d: New test.
* testsuite/gas/mips/r3900@cp0m.d: New test.
* testsuite/gas/mips/cp2.d: New test.
* testsuite/gas/mips/micromips@cp2.d: New test.
* testsuite/gas/mips/cp2m.d: New test.
* testsuite/gas/mips/mipsr6@cp2m.d: New test.
* testsuite/gas/mips/micromips@cp2m.d: New test.
* testsuite/gas/mips/cp2d.d: New test.
* testsuite/gas/mips/mipsr6@cp2d.d: New test.
* testsuite/gas/mips/micromips@cp2d.d: New test.
* testsuite/gas/mips/cp2-64.d: New test.
* testsuite/gas/mips/micromips@cp2-64.d: New test.
* testsuite/gas/mips/cp3.d: New test.
* testsuite/gas/mips/cp3m.d: New test.
* testsuite/gas/mips/cp3d.d: New test.
* testsuite/gas/mips/cp0c.s: New test source.
* testsuite/gas/mips/cp0m.s: New test source.
* testsuite/gas/mips/cp2.s: New test source.
* testsuite/gas/mips/cp2m.s: New test source.
* testsuite/gas/mips/cp2d.s: New test source.
* testsuite/gas/mips/cp2-64.s: New test source.
* testsuite/gas/mips/cp3.s: New test source.
* testsuite/gas/mips/cp3m.s: New test source.
* testsuite/gas/mips/cp3d.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.

MIPS/opcodes: Do not use CP0 register names for control registers

The CP0 control register set has never been defined, however encodings
for the CFC0 and CTC0 instructions remained available for implementers
up until the MIPS32 ISA declared them invalid and causing the Reserved
Instruction exception[1].  Therefore we handle them for both assembly
and disassembly, however in the latter case the names of CP0 registers
from the regular set are incorrectly printed if named registers are
requested.  This is because we do not define separate operand classes
for coprocessor regular and control registers respectively, which means
the disassembler has no way to tell the two cases apart.  Consequently
nonsensical disassembly is produced like:

cfc0 v0,c0_random

Later the MIPSr5 ISA reused the encodings for XPA ASE MFHC0 and MTHC0
instructions[2] although it failed to document them in the relevant
opcode table until MIPSr6 only.

Correct the issue then by defining a new register class, OP_REG_CONTROL,
and corresponding operand codes, `g' and `y' for the two positions in
the machine instruction a control register operand can take.  Adjust the
test cases affected accordingly.

While at it swap the regular MIPS opcode table "cfc0" and "ctc0" entries
with each other so that they come in the alphabetical order.

References:

[1] "MIPS32 Architecture For Programmers, Volume II: The MIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
    Revision 1.00, August 29, 2002, Table A-9 "MIPS32 COP0 Encoding of
    rs Field", p. 242

[2] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
    Revision 5.04, December 11, 2013, Section 3.2 "Alphabetical List of
    Instructions", pp. 195, 216

include/
* opcode/mips.h: Document `g' and `y' operand codes.
(mips_reg_operand_type): Add OP_REG_CONTROL enumeration
constant.

gas/
* tc-mips.c (convert_reg_type) <OP_REG_CONTROL>: New case.
(macro) <M_TRUNCWS, M_TRUNCWD>: Use the `g' rather than `G'
operand code.

opcodes/
* mips-dis.c (print_reg) <OP_REG_COPRO>: Move control register
handling code over to...
<OP_REG_CONTROL>: ... this new case.
* mips-opc.c (decode_mips_operand) <'g', 'y'>: New cases.
(mips_builtin_opcodes): Update "cfc1", "ctc1", "cttc1", "cttc2",
"cfc0", "ctc0", "cfc2", "ctc2", "cfc3", and "ctc3" entries
replacing the `G' operand code with `g'.  Update "cftc1" and
"cftc2" entries replacing the `E' operand code with `y'.
* micromips-opc.c (decode_micromips_operand) <'g'>: New case.
(micromips_opcodes): Update "cfc1", "cfc2", "ctc1", and "ctc2"
entries replacing the `G' operand code with `g'.

binutils/
* testsuite/binutils-all/mips/mips-xpa-virt-1.d: Correct CFC0
operand disassembly.
* testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise.

MIPS/opcodes: Add TX39 CP0 register names

The TX39 core has its distinct set of CP0 registers[1], so it needs a
separate table to hold their names.  Add a test case accordingly.

References:

[1] "32-Bit RISC Microprocessor TX39 Family Core Architecture User's
    Manual", Toshiba, Jul. 27, 1995, Section 2.2.2 "System control
    coprocessor (CP0) registers", pp. 9-10

opcodes/
* mips-dis.c (mips_cp0_names_r3900): New variable.
(mips_arch_choices): Use it rather than `mips_cp0_names_numeric'
for "r3900".

gas/
* testsuite/gas/mips/cp0-names-r3900.d: New test.
* testsuite/gas/mips/mips.exp: Run it.

MIPS/binutils/testsuite: Fix XPA and Virtualization ASE cases

Fix commit 9785fc2a4d22 ("MIPS: Fix XPA base and Virtualization ASE
instruction handling") and explicitly use the `mips:3000' machine for
disassembly across the XPA base and XPA Virtualization ASE test cases,
providing actual coverage for the `virt' and `xpa' disassembler options
and removing failures for targets that default to those ASEs enabled:

mipsisa32r2-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r2-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r2-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r2-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r2-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r2-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r2el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r2el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r2el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r2el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r2el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r2el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r3-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r3-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r3-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r3-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r3-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r3-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r3el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r3el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r3el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r3el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r3el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r3el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r5-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r5-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r5-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r5-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r5-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r5-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r5el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r5el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r5el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r5el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r5el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r5el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r6-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r6-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r6-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r6-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r6-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r6-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r6el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r6el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r6el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa32r6el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa32r6el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa32r6el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r2-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r2-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r2-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r2-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r2-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r2-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r2el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r2el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r2el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r2el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r2el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r2el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r3-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r3-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r3-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r3-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r3-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r3-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r3el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r3el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r3el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r3el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r3el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r3el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r5-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r5-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r5-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r5-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r5-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r5-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r5el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r5el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r5el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r5el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r5el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r5el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r6-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r6-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r6-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r6-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r6-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r6-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r6el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r6el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r6el-elf  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3
mipsisa64r6el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1
mipsisa64r6el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2
mipsisa64r6el-linux  -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3

This is because the test cases rely on these ASEs being disabled for
disassembly by default and expect instructions belonging to these ASEs
not to be shown unless explicitly enabled.  The `mips-xpa-virt-4' test
case passes regardless, but we want it to verify the explicit options do
work, so use the `mips:3000' machine to set the defaults there as well.

binutils/
* testsuite/binutils-all/mips/mips-xpa-virt-1.d: Use `mips:3000'
machine for disassembly.
* testsuite/binutils-all/mips/mips-xpa-virt-2.d: Likewise.
* testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise.
* testsuite/binutils-all/mips/mips-xpa-virt-4.d: Likewise.

MIPS/opcodes: Free up redundant `g' operand code

In the operand handling rewrite made for the MIPS disassembler with
commit ab90248154ba ("Add structures to describe MIPS operands"),
<https://sourceware.org/ml/binutils/2013-07/msg00135.html>, the `g'
operand code has become redundant for the regular MIPS instruction set
by duplicating the OP_REG_COPRO semantics of the `G' operand code.

Later commit 351cdf24d223 ("Implement O32 FPXX, FP64 and FP64A ABI
extensions") converted the CTTC1 instruction from the `g' to the `G'
operand code, but still left a few instructions behind.

Convert the three remaining instructions still using the `g' code then,
namely: CTTC2, MTTC2 and MTTHC2, and remove all traces of the operand
code, freeing it up for other use.

opcodes/
* mips-opc.c (mips_builtin_opcodes): Switch "cttc2", "mttc2",
and "mtthc2" to using the `G' rather than `g' operand code for
the coprocessor control register referred.

include/
* opcode/mips.h: Complement change made to opcodes and remove
references to the `g' regular MIPS ISA operand code.

microMIPS/opcodes: Refer FPRs rather than FCRs with DMTC1

The DMTC1 instruction operates on a floating-point general register as
its second operand, however in the disassembly of the microMIPS encoding
a floating-point control register is shown instead.  This is due to an
incorrect ordering of the two "dmtc1" entries in the opcode table, which
gives precedence to one using the `G' aka coprocessor format over one
using the `S' or floating-point register format.

The coprocessor format, or OP_REG_COPRO, is used so that GAS supports
referring to FPRs by their numbers in assembly, such as $0, $1, etc.
however in the case of CP1/FPU it is also used by the disassembler to
decode those numbers to the names of corresponding control registers.
This in turn causes nonsensical disassembly such as:

dmtc1 a1,c1_fir

in a reference to $f0.  It has been like this ever since microMIPS ISA
support has been added.

Correct the ordering of the two entries then by swapping them with each
other, making disassembly output consistent with the regular MIPS DMTC1
instruction as well all the remaining CP1 move instructions.  Adjust all
the test cases affected accordingly.

opcodes/
* micromips-opc.c (micromips_opcodes): Swap the two "dmtc1"
entries with each other.

gas/
* testsuite/gas/mips/micromips.d: Update disassembly according
to "dmtc1" entry fix with opcodes.
* testsuite/gas/mips/micromips-compact.d: Likewise.
* testsuite/gas/mips/micromips-insn32.d: Likewise.
* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* testsuite/gas/mips/micromips-trap.d: Likewise.
* testsuite/gas/mips/micromips@isa-override-1.d: Likewise.

MIPS/GAS: Use FCSR rather than RA with CFC1/CTC1

Fix an issue caused by commit f9419b056fe2 ("MIPS gas: code cleanup"),
<https://sourceware.org/ml/binutils/2002-05/msg00192.html>, and replace
the incorrect use of RA with the CFC1 and CTC1 instructions with FCSR.
While the register referred by its number is $31 in both cases, these
instructions operate on the floating-point control register file rather
than general-purpose registers.

gas/
* config/tc-mips.c (FCSR): New macro.
(macro) <M_TRUNCWS, M_TRUNCWD>: Use it in place of RA.

Automatic date update in version.in

x86: Restore PC16 relocation overflow check

The x86-64 psABI has

---
A program or object file using R_X86_64_8, R_X86_64_16, R_X86_64_PC16
or R_X86_64_PC8 relocations is not conformant to this ABI, these
relocations are only added for documentation purposes.
---

Since x86 PC16 relocations have been used for 16-bit programs in an ELF32
or ELF64 container, PC16 relocation should wrap-around in 16-bit address
space.  Revert

commit a7664973b24a242cd9ea17deb5eaf503065fc0bd
Author: Jan Beulich <jbeulich@suse.com>
Date:   Mon Apr 26 10:41:35 2021 +0200

    x86: correct overflow checking for 16-bit PC-relative relocs

and xfail the related tests.  Also revert

commit 50c95a739c91ae70cf8481936611aa1f5397a384
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed May 26 12:13:13 2021 -0700

    x86: Propery check PC16 reloc overflow in 16-bit mode instructions

while keeping PR ld/27905 tests for PC16 relocation in 16-bit programs.

bfd/

PR ld/27905
* elf32-i386.c: Don't include "libiberty.h".
(elf_howto_table): Revert commits a7664973b24 and 50c95a739c9.
(elf_i386_rtype_to_howto): Revert commit 50c95a739c9.
(elf_i386_info_to_howto_rel): Likewise.
(elf_i386_tls_transition): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (x86_64_elf_howto_table): Revert commits
a7664973b24 and 50c95a739c9.
(elf_x86_64_rtype_to_howto): Revert commit 50c95a739c9.
* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Likewise.
* elfxx-x86.h (elf_x86_obj_tdata): Likewise.
(elf_x86_has_code16): Likewise.

binutils/

PR ld/27905
* readelf.c (decode_x86_feature_2): Revert commit 50c95a739c9.

gas/

PR ld/27905
* config/tc-i386.c (set_code_flag): Revert commit 50c95a739c9.
(set_16bit_gcc_code_flag): Likewise.
(x86_cleanup): Likewise.
* testsuite/gas/i386/code16-2.d: Updated.
* testsuite/gas/i386/x86-64-code16-2.d: Likewise.

include/

PR ld/27905
* elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): Removed.

ld/

PR ld/27905
* testsuite/ld-i386/pcrel16-2.d: xfail.
* testsuite/ld-x86-64/pcrel16-2.d: Likewise.

sim: h8300 add special case test.

* addb.s: Add special case reg,<@reg+ / @reg- / @+reg / @-reg>.
* andb.s: Likewise.
* cmpb.s: Likewise.
* orb.s: Likewise.
* subb.s: Likewise.
* xorb.s: Likewise.
* movb.s: Add special case reg,<@reg+ / @reg- / @+reg / @-reg>
@reg+,@reg+ / @-reg,@-reg.
* movw.s: Likewise.
* movl.s: Likewise.

sim: h8300 Fixed different behavior in preinc/predec.

* sim-main.h (h8_typecodes): Add operand type OP_REG_DEC, OP_REG_INC.
* compile.c (decode): Rewrite oprand type for specific case.
(fetch_1): Add handling OP_REG_DEC and OP_REG_INC.
(step_once): Fix operand fetch order.

Automatic date update in version.in

PowerPC: Add new xxmr and xxlnot extended mnemonics

opcodes/
* ppc-opc.c (powerpc_opcodes) <xxmr, xxlnot>: New extended mnemonics.

gas/
* testsuite/gas/ppc/vsx.d <xxmr, xxlnot>: Add tests.
* testsuite/gas/ppc/vsx.s: Likewise.

gdb: fix tab after space indentation issues

I spotted some indentation issues where we had some spaces followed by
tabs at beginning of line, that I wanted to fix. So while at it, I did
a quick grep to find and fix all I could find.

gdb/ChangeLog:

* Fix tab after space indentation issues throughout.

Change-Id: I1acb414dd9c593b474ae2b8667496584df4316fd

gdb: fix some indentation issues

I wrote a small script to spot a pattern of indentation mistakes I saw
happened in breakpoint.c. And while at it I ran it on all files and
fixed what I found. No behavior changes intended, just indentation and
addition / removal of curly braces.

gdb/ChangeLog:

* Fix some indentation mistakes throughout.

gdbserver/ChangeLog:

* Fix some indentation mistakes throughout.

Change-Id: Ia01990c26c38e83a243d8f33da1d494f16315c6e

gdb: remove iterate_over_bp_locations function

Remove it, change users (well, a single one) to use all_bp_locations.
This requires moving all_bp_locations to breakpoint.h to expose it.

gdb/ChangeLog:

* breakpoint.h (iterate_over_bp_locations): Remove. Update
users to use all_bp_locations.
(all_bp_locations): New.
* breakpoint.c (all_bp_locations): Make non-static.
(iterate_over_bp_locations): Remove.

Change-Id: Iaf1f716d6c2c5b2975579b3dc113a86f5d0975be

gdb: remove iterate_over_breakpoints function

Now that we have range functions that let us use ranged for loops, we
can remove iterate_over_breakpoints in favor of those, which are easier
to read and write. This requires exposing the declaration of
all_breakpoints and all_breakpoints_safe in breakpoint.h, as well as the
supporting types.

Change some users of iterate_over_breakpoints to use all_breakpoints,
when they don't need to delete the breakpoint, and all_breakpoints_safe
otherwise.

gdb/ChangeLog:

* breakpoint.h (iterate_over_breakpoints): Remove. Update
callers to use all_breakpoints or all_breakpoints_safe.
(breakpoint_range, all_breakpoints, breakpoint_safe_range,
all_breakpoints_safe): Move here.
* breakpoint.c (all_breakpoints, all_breakpoints_safe): Make
non-static.
(iterate_over_breakpoints): Remove.
* python/py-finishbreakpoint.c (bpfinishpy_detect_out_scope_cb):
Return void.
* python/py-breakpoint.c (build_bp_list): Add comment, reverse
return value logic.
* guile/scm-breakpoint.c (bpscm_build_bp_list): Return void.

Change-Id: Idde764a1f577de0423e4f2444a7d5cdb01ba5e48

gdb: add all_bp_locations_at_addr function

Add the all_bp_locations_at_addr function, which returns a range of all
breakpoint locations at exactly the given address.  This lets us
replace:

  bp_location *loc, **loc2p, *locp;
  ALL_BP_LOCATIONS_AT_ADDR (loc2p, locp, address)
    {
      loc = *loc2p;

      // use loc
    }

with

  for (bp_location *loc : all_bp_locations_at_addr (address))
    {
      // use loc
    }

The all_bp_locations_at_addr returns a bp_locations_at_addr_range
object, which is really just a wrapper around two std::vector iterators
representing the beginning and end of the interesting range.  These
iterators are found when constructing the bp_locations_at_addr_range
object using std::equal_range, which seems a perfect fit for this use
case.

One thing I noticed about the current ALL_BP_LOCATIONS_AT_ADDR is that
if you call it with a NULL start variable, that variable gets filled in
and can be re-used for subsequent iterations.  This avoids the cost of
finding the start of the interesting range again for the subsequent
iterations.  This happens in build_target_command_list, for example.
The same effect can be achieved by storing the range in a local
variable, it can be iterated on multiple times.

Note that the original comment over ALL_BP_LOCATIONS_AT_ADDR says:

    Iterates through locations with address ADDRESS for the currently
    selected program space.

I don't see anything restricting the iteration to a given program space,
as we iterate over all bp_locations, which as far as I know contains all
breakpoint locations, regardless of the program space.  So I just
dropped that part of the comment.

gdb/ChangeLog:

* breakpoint.c (get_first_locp_gte_addr): Remove.
(ALL_BP_LOCATIONS_AT_ADDR): Remove.  Replace all uses with
all_bp_locations_at_addr.
(struct bp_locations_at_addr_range): New.
(all_bp_locations_at_addr): New.
(bp_locations_compare_addrs): New.

Change-Id: Icc8c92302045c47a48f507b7f1872bdd31d4ba59

gdb: add all_bp_locations function

Add the all_bp_locations function to replace the ALL_BP_LOCATIONS macro.
For simplicity, all_bp_locations simply returns a const reference to the
bp_locations vector. But the callers just treat it as a range to
iterate on, so if we ever change the breakpoint location storage, we can
change the all_bp_locations function to return some other range type,
and the callers won't need to be changed.

gdb/ChangeLog:

* breakpoint.c (ALL_BP_LOCATIONS): Remove, update users to use
all_bp_locations.
(all_bp_locations): New.

Change-Id: Iae71a1ba135c1a5bcdb4658bf3cf9793f0e9f81c