Clifford Wolf [Sun, 27 Oct 2013 21:35:15 +0000 (14:35 -0700)]
Merge pull request #12 from jameswalmsley/master
[EXAMPLES] Ported the mojo counter example to Zynq ZED board.
James Walmsley [Sun, 27 Oct 2013 20:48:39 +0000 (21:48 +0100)]
[EXAMPLES] Ported the mojo counter example to Zynq ZED board.
Will be adding a tutorial on this to verilog.james.walms.co.uk in a few days.
Clifford Wolf [Sun, 27 Oct 2013 09:05:19 +0000 (10:05 +0100)]
Fixed get_share_file_name() for installed yosys
Clifford Wolf [Sun, 27 Oct 2013 08:52:00 +0000 (09:52 +0100)]
Cleanups in xilinx examples
Clifford Wolf [Sun, 27 Oct 2013 08:33:47 +0000 (09:33 +0100)]
Added synth_xilinx command
Clifford Wolf [Sun, 27 Oct 2013 08:33:26 +0000 (09:33 +0100)]
Added API and Makefile rules for share/ files
Clifford Wolf [Sun, 27 Oct 2013 08:30:58 +0000 (09:30 +0100)]
Added design->full_selection() helper method
Clifford Wolf [Sun, 27 Oct 2013 08:30:17 +0000 (09:30 +0100)]
Moved simple xilinx counter sim example to subdir
Clifford Wolf [Sun, 27 Oct 2013 07:21:56 +0000 (08:21 +0100)]
Xilinx mojo_counter example is now working
Clifford Wolf [Sun, 27 Oct 2013 07:21:05 +0000 (08:21 +0100)]
Fixed hex string generation bug in edif backend
Clifford Wolf [Sat, 26 Oct 2013 20:29:40 +0000 (22:29 +0200)]
Renamed techlibs/xilinx7 to techlibs/xilinx
Clifford Wolf [Sat, 26 Oct 2013 20:28:42 +0000 (22:28 +0200)]
Improved xilinx mojo_counter example
Clifford Wolf [Sat, 26 Oct 2013 20:27:40 +0000 (22:27 +0200)]
Added support for i/o buffers to iopadmap
Clifford Wolf [Sat, 26 Oct 2013 15:22:29 +0000 (17:22 +0200)]
Added another xilinx example (not funcional yet)
Clifford Wolf [Thu, 24 Oct 2013 16:20:06 +0000 (18:20 +0200)]
Added support for sr flip-flops to dfflibmap
Clifford Wolf [Thu, 24 Oct 2013 14:54:05 +0000 (16:54 +0200)]
Added support for complex set-reset flip-flops in proc_dff
Clifford Wolf [Thu, 24 Oct 2013 09:37:54 +0000 (11:37 +0200)]
Fixed handling of boolean attributes (passes)
Clifford Wolf [Thu, 24 Oct 2013 09:27:30 +0000 (11:27 +0200)]
Fixed handling of boolean attributes (backends)
Clifford Wolf [Thu, 24 Oct 2013 09:20:13 +0000 (11:20 +0200)]
Fixed handling of boolean attributes (frontends)
Clifford Wolf [Thu, 24 Oct 2013 08:59:27 +0000 (10:59 +0200)]
Fixed handling of boolean attributes (kernel)
Clifford Wolf [Wed, 23 Oct 2013 16:38:31 +0000 (18:38 +0200)]
Fixed parsing of value-less attributes in ilang
Clifford Wolf [Mon, 21 Oct 2013 12:51:58 +0000 (14:51 +0200)]
Improved handling of dff with async resets
Clifford Wolf [Fri, 18 Oct 2013 22:50:13 +0000 (00:50 +0200)]
Added handling of multiple async paths in proc_arst
Clifford Wolf [Fri, 18 Oct 2013 12:19:45 +0000 (14:19 +0200)]
Changed NEW_WIRE API to return the wire, not the signal
Clifford Wolf [Fri, 18 Oct 2013 11:26:52 +0000 (13:26 +0200)]
Added dffsr support to proc_dff pass
Clifford Wolf [Fri, 18 Oct 2013 11:25:24 +0000 (13:25 +0200)]
Added RTLIL NEW_WIRE macro
Clifford Wolf [Fri, 18 Oct 2013 11:24:44 +0000 (13:24 +0200)]
Bugfix in dffsr techmap rules
Clifford Wolf [Fri, 18 Oct 2013 10:29:21 +0000 (12:29 +0200)]
Added techmap rules for $sr, $dffsr and $dlatch
Clifford Wolf [Fri, 18 Oct 2013 10:13:34 +0000 (12:13 +0200)]
Added $_SR_[PN][PN]_, $_DFFSR_[PN][PN][PN]_, $_DLATCH_[PN]_
Clifford Wolf [Fri, 18 Oct 2013 09:56:16 +0000 (11:56 +0200)]
Added $sr, $dffsr and $dlatch cell types
Clifford Wolf [Thu, 17 Oct 2013 20:19:38 +0000 (22:19 +0200)]
Improved way of connecting ports in techmap pass
Clifford Wolf [Thu, 17 Oct 2013 20:10:55 +0000 (22:10 +0200)]
Only prefer connected signals iff they have public names
Clifford Wolf [Thu, 17 Oct 2013 19:37:18 +0000 (21:37 +0200)]
Added -buf, -true and -false options to blif backend
Clifford Wolf [Thu, 17 Oct 2013 19:00:37 +0000 (21:00 +0200)]
Fixed bug in synthesis of memories that are never written
Clifford Wolf [Thu, 17 Oct 2013 18:48:40 +0000 (20:48 +0200)]
Avoid re-arranging signals on register outputs
Clifford Wolf [Thu, 17 Oct 2013 00:41:59 +0000 (02:41 +0200)]
Fixed detection of major wires in opt_clean
Clifford Wolf [Wed, 16 Oct 2013 14:16:06 +0000 (16:16 +0200)]
Added iopadmap pass
Clifford Wolf [Wed, 16 Oct 2013 13:32:26 +0000 (15:32 +0200)]
Moved dfflibmap from passes/dfflibmap to passes/techmap
Clifford Wolf [Wed, 16 Oct 2013 08:57:18 +0000 (10:57 +0200)]
Added map, par and bitgen to xlinx7 example
Clifford Wolf [Wed, 16 Oct 2013 04:32:35 +0000 (06:32 +0200)]
Fixed parsing or liberty file statements such as 'clocked_on : "(!CLK)";'
Patch by Tim Edwards
Clifford Wolf [Fri, 11 Oct 2013 20:25:23 +0000 (22:25 +0200)]
Added recommended apt-get commands to README
Clifford Wolf [Fri, 11 Oct 2013 19:17:01 +0000 (21:17 +0200)]
Fixed minisat include
Clifford Wolf [Thu, 3 Oct 2013 14:03:30 +0000 (16:03 +0200)]
Pinned ABC revision to
0f9e5488ced3
Clifford Wolf [Tue, 17 Sep 2013 11:07:12 +0000 (13:07 +0200)]
Improvements in EDIF backend
Clifford Wolf [Sun, 15 Sep 2013 11:33:33 +0000 (13:33 +0200)]
Added additional options to BLIF backend
Clifford Wolf [Sun, 15 Sep 2013 11:13:01 +0000 (13:13 +0200)]
Added BLIF backend
Clifford Wolf [Sun, 15 Sep 2013 10:19:06 +0000 (12:19 +0200)]
A couple of small fixes in SPICE backend
Clifford Wolf [Sun, 15 Sep 2013 09:52:57 +0000 (11:52 +0200)]
Moved common techlib files to techlibs/common
Clifford Wolf [Sun, 15 Sep 2013 09:41:05 +0000 (11:41 +0200)]
Updated manual
Clifford Wolf [Sat, 14 Sep 2013 11:29:11 +0000 (13:29 +0200)]
Added spice testbench to techlibs/cmos
Clifford Wolf [Sat, 14 Sep 2013 09:23:45 +0000 (11:23 +0200)]
Added spice backend
Clifford Wolf [Tue, 3 Sep 2013 17:10:25 +0000 (19:10 +0200)]
Merge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Tue, 3 Sep 2013 17:10:11 +0000 (19:10 +0200)]
Added -selected option to various backends
Clifford Wolf [Wed, 28 Aug 2013 06:48:49 +0000 (08:48 +0200)]
Encode large (>32 bits) parameters as hex string in edif backend
Clifford Wolf [Tue, 27 Aug 2013 12:22:11 +0000 (14:22 +0200)]
Improved edif backend
Clifford Wolf [Tue, 27 Aug 2013 11:12:26 +0000 (13:12 +0200)]
Added mapping to techlibs/xilinx7 testbench (exposes EDIF backend todos)
Clifford Wolf [Thu, 22 Aug 2013 18:26:19 +0000 (20:26 +0200)]
Added simple xilinx7 technology mapping files
Clifford Wolf [Thu, 22 Aug 2013 18:22:19 +0000 (20:22 +0200)]
More explicit integer output in verilog backend
Clifford Wolf [Thu, 22 Aug 2013 12:30:33 +0000 (14:30 +0200)]
Added correct encoding of identifiers in EDIF backend
Clifford Wolf [Thu, 22 Aug 2013 09:34:55 +0000 (11:34 +0200)]
Added edif backend (still under construction)
Clifford Wolf [Wed, 21 Aug 2013 16:47:06 +0000 (09:47 -0700)]
Merge pull request #10 from hansiglaser/master
fixed Verilog parser filename and line numbering issue with include files
Clifford Wolf [Wed, 21 Aug 2013 10:16:44 +0000 (12:16 +0200)]
Some minor documentation fixes
Johann Glaser [Wed, 21 Aug 2013 07:20:59 +0000 (09:20 +0200)]
fixed Verilog parser filename and line numbering issue with include files
Clifford Wolf [Tue, 20 Aug 2013 16:38:31 +0000 (09:38 -0700)]
Merge pull request #9 from hansiglaser/master
Added support for include directories with the new '-I' argument of the 'read_verilog' command
Johann Glaser [Tue, 20 Aug 2013 13:48:16 +0000 (15:48 +0200)]
Added support for include directories with the new '-I' argument of the
'read_verilog' command
Clifford Wolf [Tue, 20 Aug 2013 10:36:34 +0000 (03:36 -0700)]
Merge pull request #8 from hansiglaser/master
Added support for notif0/notif1 primitives
Johann Glaser [Tue, 20 Aug 2013 09:23:59 +0000 (11:23 +0200)]
Added support for notif0/notif1 primitives
Clifford Wolf [Tue, 20 Aug 2013 08:12:54 +0000 (10:12 +0200)]
Added cleaning of old version_* files to version_* make rule
Clifford Wolf [Tue, 20 Aug 2013 07:48:12 +0000 (09:48 +0200)]
Added version info to yosys command and added -V option
Clifford Wolf [Tue, 20 Aug 2013 07:46:05 +0000 (09:46 +0200)]
Minor fixes in abc build instructions and abc pass
Clifford Wolf [Mon, 19 Aug 2013 18:58:01 +0000 (20:58 +0200)]
Fixed width and sign detection for ** operator
Clifford Wolf [Mon, 19 Aug 2013 17:50:04 +0000 (19:50 +0200)]
Added support for bufif0/bufif1 primitives
Clifford Wolf [Mon, 19 Aug 2013 17:49:14 +0000 (19:49 +0200)]
Improved ast dumping (ast/verilog frontend)
Clifford Wolf [Thu, 15 Aug 2013 19:00:06 +0000 (21:00 +0200)]
Implemented same div-by-zero behavior as found in other synthesis tools
Clifford Wolf [Thu, 15 Aug 2013 16:23:42 +0000 (18:23 +0200)]
Fixed signed div/mod in const eval (rounding and stuff)
Clifford Wolf [Thu, 15 Aug 2013 12:40:26 +0000 (14:40 +0200)]
Added ezsat api for creation of anonymous vectors
Clifford Wolf [Thu, 15 Aug 2013 09:40:01 +0000 (11:40 +0200)]
Added sat -ignore_div_by_zero switch
Clifford Wolf [Thu, 15 Aug 2013 09:09:30 +0000 (11:09 +0200)]
Added eval -brute_force_equiv_checker_x mode
Clifford Wolf [Mon, 12 Aug 2013 12:47:50 +0000 (14:47 +0200)]
Added support for "2**n" shifter encoding
Clifford Wolf [Sun, 11 Aug 2013 14:27:15 +0000 (16:27 +0200)]
Added SAT support for $div and $mod cells
Clifford Wolf [Sun, 11 Aug 2013 11:59:14 +0000 (13:59 +0200)]
Added "clean -purge" and ";;;" support
Clifford Wolf [Sun, 11 Aug 2013 11:33:38 +0000 (13:33 +0200)]
Added ";;" as shortcut for "; clean;"
Clifford Wolf [Sat, 10 Aug 2013 13:03:13 +0000 (15:03 +0200)]
freduce performance fix
Clifford Wolf [Fri, 9 Aug 2013 15:09:24 +0000 (17:09 +0200)]
Added $div and $mod technology mapping
Clifford Wolf [Fri, 9 Aug 2013 13:20:22 +0000 (15:20 +0200)]
Added techmap -opt mode
Clifford Wolf [Fri, 9 Aug 2013 10:42:32 +0000 (12:42 +0200)]
Some fixes to improve determinism
Clifford Wolf [Thu, 8 Aug 2013 13:46:00 +0000 (15:46 +0200)]
Sort ctrl signals in fsm_extract
Clifford Wolf [Thu, 8 Aug 2013 08:56:27 +0000 (10:56 +0200)]
Added -try option to freduce pass
Clifford Wolf [Thu, 8 Aug 2013 08:53:37 +0000 (10:53 +0200)]
Added "clean" command (less verbose opt_clean)
Clifford Wolf [Wed, 7 Aug 2013 17:38:19 +0000 (19:38 +0200)]
Fixed topological ordering in freduce pass
Clifford Wolf [Wed, 7 Aug 2013 16:39:49 +0000 (18:39 +0200)]
Improved handling of private names in opt_clean and rename commands
Clifford Wolf [Wed, 7 Aug 2013 00:19:35 +0000 (02:19 +0200)]
Added stubnets example to manual prog chapter
Clifford Wolf [Tue, 6 Aug 2013 13:53:09 +0000 (15:53 +0200)]
Small bugfixes in freduce pass
Clifford Wolf [Tue, 6 Aug 2013 13:04:52 +0000 (15:04 +0200)]
Added freduce command
Clifford Wolf [Tue, 6 Aug 2013 13:04:24 +0000 (15:04 +0200)]
Fixed SigPool::del() method
Clifford Wolf [Tue, 6 Aug 2013 13:03:46 +0000 (15:03 +0200)]
Added proper deallocation of history buffer
Clifford Wolf [Thu, 1 Aug 2013 18:02:15 +0000 (20:02 +0200)]
Updated TODO section in README
Clifford Wolf [Sat, 27 Jul 2013 12:27:51 +0000 (14:27 +0200)]
Added "design" command (-reset, -save, -load)
Clifford Wolf [Thu, 25 Jul 2013 22:01:31 +0000 (00:01 +0200)]
Added "help -write-web-command-reference-manual"
Clifford Wolf [Thu, 25 Jul 2013 13:01:02 +0000 (15:01 +0200)]
Fixed comments in manual rtlil/ilang syntax