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lkcl [Thu, 8 Mar 2018 08:48:33 +0000 (08:48 +0000)]
Luke Kenneth Casson Leighton [Thu, 8 Mar 2018 08:17:07 +0000 (08:17 +0000)]
add redesigned mux
Luke Kenneth Casson Leighton [Wed, 7 Mar 2018 13:26:18 +0000 (13:26 +0000)]
add i2c casl reference
lkcl [Wed, 7 Mar 2018 07:47:59 +0000 (07:47 +0000)]
lkcl [Wed, 7 Mar 2018 07:47:46 +0000 (07:47 +0000)]
lkcl [Wed, 7 Mar 2018 07:46:17 +0000 (07:46 +0000)]
Luke Kenneth Casson Leighton [Wed, 7 Mar 2018 07:34:45 +0000 (07:34 +0000)]
add GPIO page
lkcl [Wed, 7 Mar 2018 07:29:10 +0000 (07:29 +0000)]
Luke Kenneth Casson Leighton [Wed, 7 Mar 2018 07:25:56 +0000 (07:25 +0000)]
add mygpiomux from Pin_Control_Subsystem_Overview.pdf, elinux.org
lkcl [Wed, 7 Mar 2018 05:41:25 +0000 (05:41 +0000)]
Luke Kenneth Casson Leighton [Wed, 7 Mar 2018 03:40:38 +0000 (03:40 +0000)]
add sdram preliminary functions
Luke Kenneth Casson Leighton [Wed, 7 Mar 2018 03:40:07 +0000 (03:40 +0000)]
add tristate buffer diagram
Luke Kenneth Casson Leighton [Tue, 6 Mar 2018 19:15:59 +0000 (19:15 +0000)]
add ULPI page
Luke Kenneth Casson Leighton [Tue, 6 Mar 2018 12:22:02 +0000 (12:22 +0000)]
add RGMII bank G
Luke Kenneth Casson Leighton [Tue, 6 Mar 2018 12:16:47 +0000 (12:16 +0000)]
add gpio power for bank f
Luke Kenneth Casson Leighton [Tue, 6 Mar 2018 12:15:16 +0000 (12:15 +0000)]
add extra bank c
Luke Kenneth Casson Leighton [Tue, 6 Mar 2018 07:00:48 +0000 (07:00 +0000)]
change spec to select correct interfaces
Luke Kenneth Casson Leighton [Tue, 6 Mar 2018 06:54:44 +0000 (06:54 +0000)]
add i_class preliminary draft
lkcl [Sun, 4 Mar 2018 06:36:51 +0000 (06:36 +0000)]
lkcl [Sun, 4 Mar 2018 06:32:05 +0000 (06:32 +0000)]
lkcl [Sun, 4 Mar 2018 05:39:44 +0000 (05:39 +0000)]
lkcl [Sun, 4 Mar 2018 05:39:17 +0000 (05:39 +0000)]
lkcl [Sat, 3 Mar 2018 13:00:03 +0000 (13:00 +0000)]
lkcl [Sat, 3 Mar 2018 09:02:02 +0000 (09:02 +0000)]
Luke Leighton [Sat, 3 Mar 2018 09:01:41 +0000 (09:01 +0000)]
add EINT
lkcl [Sat, 3 Mar 2018 09:01:12 +0000 (09:01 +0000)]
lkcl [Sat, 3 Mar 2018 08:54:37 +0000 (08:54 +0000)]
lkcl [Sat, 3 Mar 2018 08:53:52 +0000 (08:53 +0000)]
Luke Leighton [Sat, 3 Mar 2018 08:52:59 +0000 (08:52 +0000)]
add PWM
lkcl [Sat, 3 Mar 2018 08:39:21 +0000 (08:39 +0000)]
lkcl [Sat, 3 Mar 2018 08:38:56 +0000 (08:38 +0000)]
lkcl [Sat, 3 Mar 2018 08:37:19 +0000 (08:37 +0000)]
lkcl [Sat, 3 Mar 2018 08:36:52 +0000 (08:36 +0000)]
lkcl [Sat, 3 Mar 2018 08:20:28 +0000 (08:20 +0000)]
Luke Leighton [Sat, 3 Mar 2018 08:18:57 +0000 (08:18 +0000)]
Merge branch 'master' of libre-riscv.org:/root/libreriscv
Luke Leighton [Sat, 3 Mar 2018 08:18:40 +0000 (08:18 +0000)]
add USB3 analysis
lkcl [Sat, 3 Mar 2018 08:15:46 +0000 (08:15 +0000)]
lkcl [Sat, 3 Mar 2018 08:15:34 +0000 (08:15 +0000)]
Luke Leighton [Sat, 3 Mar 2018 08:14:14 +0000 (08:14 +0000)]
move AC97 page
lkcl [Sat, 3 Mar 2018 08:13:11 +0000 (08:13 +0000)]
lkcl [Sat, 3 Mar 2018 08:07:23 +0000 (08:07 +0000)]
lkcl [Sat, 3 Mar 2018 08:06:47 +0000 (08:06 +0000)]
lkcl [Sat, 3 Mar 2018 07:25:56 +0000 (07:25 +0000)]
lkcl [Sat, 3 Mar 2018 05:04:46 +0000 (05:04 +0000)]
lkcl [Sat, 3 Mar 2018 05:02:07 +0000 (05:02 +0000)]
aurojyoti [Thu, 1 Mar 2018 08:27:50 +0000 (08:27 +0000)]
lkcl [Thu, 1 Mar 2018 01:19:30 +0000 (01:19 +0000)]
Xing_G [Thu, 1 Mar 2018 01:16:56 +0000 (01:16 +0000)]
update: Xing's profile
Xing_G [Thu, 1 Mar 2018 01:07:10 +0000 (01:07 +0000)]
update: Xing's profile
lkcl [Wed, 28 Feb 2018 20:11:41 +0000 (20:11 +0000)]
lkcl [Wed, 28 Feb 2018 19:52:00 +0000 (19:52 +0000)]
lkcl [Wed, 28 Feb 2018 19:50:55 +0000 (19:50 +0000)]
lkcl [Wed, 28 Feb 2018 16:52:48 +0000 (16:52 +0000)]
lkcl [Wed, 28 Feb 2018 09:05:48 +0000 (09:05 +0000)]
lkcl [Wed, 28 Feb 2018 00:05:37 +0000 (00:05 +0000)]
lkcl [Wed, 28 Feb 2018 00:00:12 +0000 (00:00 +0000)]
lkcl [Tue, 27 Feb 2018 23:46:30 +0000 (23:46 +0000)]
lkcl [Tue, 27 Feb 2018 23:19:47 +0000 (23:19 +0000)]
Luke Leighton [Tue, 27 Feb 2018 02:38:11 +0000 (02:38 +0000)]
fix rgmii pinouts
Luke Leighton [Tue, 27 Feb 2018 02:36:04 +0000 (02:36 +0000)]
fix rgmii pinouts
Luke Leighton [Tue, 27 Feb 2018 01:18:18 +0000 (01:18 +0000)]
add DDR controller interface
Luke Leighton [Tue, 27 Feb 2018 01:15:45 +0000 (01:15 +0000)]
add litesdcard
Luke Leighton [Tue, 27 Feb 2018 01:07:09 +0000 (01:07 +0000)]
add liteeth link
Luke Leighton [Tue, 27 Feb 2018 01:04:44 +0000 (01:04 +0000)]
add pkerling link
Luke Leighton [Tue, 27 Feb 2018 00:29:38 +0000 (00:29 +0000)]
add bugzilla backlinks
Luke Leighton [Tue, 27 Feb 2018 00:22:24 +0000 (00:22 +0000)]
add more interfaces
Luke Leighton [Tue, 27 Feb 2018 00:21:20 +0000 (00:21 +0000)]
add more interfaces
Luke Leighton [Mon, 26 Feb 2018 01:27:05 +0000 (01:27 +0000)]
pinmux
Luke Leighton [Sun, 25 Feb 2018 23:40:31 +0000 (23:40 +0000)]
move sdmmc to separate page
Luke Leighton [Sun, 25 Feb 2018 11:14:43 +0000 (11:14 +0000)]
add spi interface page
Luke Leighton [Sun, 25 Feb 2018 11:07:36 +0000 (11:07 +0000)]
add rgbttl interface page
Luke Leighton [Sun, 25 Feb 2018 10:24:50 +0000 (10:24 +0000)]
add flexbus libreriscv bug page
Luke Leighton [Sun, 25 Feb 2018 10:17:13 +0000 (10:17 +0000)]
add i2s libre-riscv bug link
Luke Leighton [Sun, 25 Feb 2018 10:09:13 +0000 (10:09 +0000)]
add i2c libre-riscv bug link
Luke Leighton [Sun, 25 Feb 2018 10:06:45 +0000 (10:06 +0000)]
add i2c page link
Luke Leighton [Sun, 25 Feb 2018 10:06:09 +0000 (10:06 +0000)]
move i2c page
Luke Leighton [Sun, 25 Feb 2018 10:05:22 +0000 (10:05 +0000)]
add i2c page
Luke Leighton [Sun, 25 Feb 2018 09:55:04 +0000 (09:55 +0000)]
update links
Luke Leighton [Sun, 25 Feb 2018 09:48:05 +0000 (09:48 +0000)]
add m_class
IkiWiki [Sat, 24 Feb 2018 23:26:52 +0000 (23:26 +0000)]
initial commit
projects / libreriscv.git / log