yosys.git
5 years agoAdd log_push()/log_pop() inside write_xaiger
Eddie Hung [Sat, 22 Jun 2019 00:16:38 +0000 (17:16 -0700)]
Add log_push()/log_pop() inside write_xaiger

5 years agoOne more workaround for gcc-4.8
Eddie Hung [Fri, 21 Jun 2019 21:35:58 +0000 (14:35 -0700)]
One more workaround for gcc-4.8

5 years agoWorkaround issues exposed by gcc-4.8
Eddie Hung [Fri, 21 Jun 2019 21:23:39 +0000 (14:23 -0700)]
Workaround issues exposed by gcc-4.8

5 years agoNo point logging constant bit
Eddie Hung [Fri, 21 Jun 2019 19:46:55 +0000 (12:46 -0700)]
No point logging constant bit

5 years agoMove comment
Eddie Hung [Fri, 21 Jun 2019 19:43:20 +0000 (12:43 -0700)]
Move comment

5 years agoFix spacing
Eddie Hung [Fri, 21 Jun 2019 05:29:40 +0000 (22:29 -0700)]
Fix spacing

5 years agoRevert Makefile
Eddie Hung [Fri, 21 Jun 2019 05:28:55 +0000 (22:28 -0700)]
Revert Makefile

5 years agoRefactor bit2aig for less lookups
Eddie Hung [Fri, 21 Jun 2019 05:09:13 +0000 (22:09 -0700)]
Refactor bit2aig for less lookups

5 years agoFix gcc invalidation behaviour for write_aiger
Eddie Hung [Fri, 21 Jun 2019 04:56:02 +0000 (21:56 -0700)]
Fix gcc invalidation behaviour for write_aiger

5 years agoFix gcc error, due to dict invalidation during recursion
Eddie Hung [Fri, 21 Jun 2019 04:55:08 +0000 (21:55 -0700)]
Fix gcc error, due to dict invalidation during recursion

5 years agoFix gcc warning of potentially uninitialised
Eddie Hung [Fri, 21 Jun 2019 04:53:27 +0000 (21:53 -0700)]
Fix gcc warning of potentially uninitialised

5 years agowrite_xaiger to flatten 1'bx/1'bz to 1'b0 again
Eddie Hung [Fri, 21 Jun 2019 02:40:17 +0000 (19:40 -0700)]
write_xaiger to flatten 1'bx/1'bz to 1'b0 again

5 years agoFix simple_abc9/generate test with 1'bx at MSB
Eddie Hung [Fri, 21 Jun 2019 02:37:03 +0000 (19:37 -0700)]
Fix simple_abc9/generate test with 1'bx at MSB

5 years agoFix different abc9 test
Eddie Hung [Fri, 21 Jun 2019 02:31:22 +0000 (19:31 -0700)]
Fix different abc9 test

5 years agoFix broken abc9.v test due to inout being 1'bx
Eddie Hung [Fri, 21 Jun 2019 02:27:00 +0000 (19:27 -0700)]
Fix broken abc9.v test due to inout being 1'bx

5 years agoRun simple_abc9 tests
Eddie Hung [Fri, 21 Jun 2019 02:06:51 +0000 (19:06 -0700)]
Run simple_abc9 tests

5 years agoMerge remote-tracking branch 'origin/master' into xaig
Eddie Hung [Fri, 21 Jun 2019 02:00:36 +0000 (19:00 -0700)]
Merge remote-tracking branch 'origin/master' into xaig

5 years agoFix issue with part of PI being 1'bx
Eddie Hung [Fri, 21 Jun 2019 00:29:45 +0000 (17:29 -0700)]
Fix issue with part of PI being 1'bx

5 years agoCall opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc
Eddie Hung [Thu, 20 Jun 2019 23:45:09 +0000 (16:45 -0700)]
Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc

5 years agoHandle COs driven by 1'bx
Eddie Hung [Thu, 20 Jun 2019 17:47:20 +0000 (10:47 -0700)]
Handle COs driven by 1'bx

5 years agoDo not call "setundef -zero" in abc9
Eddie Hung [Thu, 20 Jun 2019 17:22:14 +0000 (10:22 -0700)]
Do not call "setundef -zero" in abc9

5 years agowrite_xaiger to skip POs driven by 1'bx
Eddie Hung [Thu, 20 Jun 2019 17:21:57 +0000 (10:21 -0700)]
write_xaiger to skip POs driven by 1'bx

5 years agoFix typo, fixes #1095
Clifford Wolf [Thu, 20 Jun 2019 13:34:52 +0000 (15:34 +0200)]
Fix typo, fixes #1095

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoImprove shregmap help message, fixes #1113
Clifford Wolf [Thu, 20 Jun 2019 13:23:55 +0000 (15:23 +0200)]
Improve shregmap help message, fixes #1113

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoUpdate some .gitignore files
Clifford Wolf [Thu, 20 Jun 2019 12:27:57 +0000 (14:27 +0200)]
Update some .gitignore files

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix typo
Clifford Wolf [Thu, 20 Jun 2019 10:23:07 +0000 (12:23 +0200)]
Fix typo

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge branch 'towoe-unpacked_arrays'
Clifford Wolf [Thu, 20 Jun 2019 10:06:58 +0000 (12:06 +0200)]
Merge branch 'towoe-unpacked_arrays'

5 years agoAdd proper test for SV-style arrays
Clifford Wolf [Thu, 20 Jun 2019 10:06:07 +0000 (12:06 +0200)]
Add proper test for SV-style arrays

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towoe-unpack...
Clifford Wolf [Thu, 20 Jun 2019 10:03:00 +0000 (12:03 +0200)]
Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towoe-unpacked_arrays

5 years agoMerge pull request #1111 from acw1251/help_summary_fixes
Eddie Hung [Wed, 19 Jun 2019 22:30:50 +0000 (15:30 -0700)]
Merge pull request #1111 from acw1251/help_summary_fixes

Fixed the help summary line for a few commands

5 years agoFixed small typo in ice40_unlut help summary
acw1251 [Wed, 19 Jun 2019 20:39:46 +0000 (16:39 -0400)]
Fixed small typo in ice40_unlut help summary

5 years agoFixed the help summary line for a few commands
acw1251 [Wed, 19 Jun 2019 19:27:04 +0000 (15:27 -0400)]
Fixed the help summary line for a few commands

5 years agoFix bug in #1078, add entry to CHANGELOG
Eddie Hung [Wed, 19 Jun 2019 16:51:11 +0000 (09:51 -0700)]
Fix bug in #1078, add entry to CHANGELOG

5 years agoMerge pull request #1109 from YosysHQ/clifford/fix1106
Clifford Wolf [Wed, 19 Jun 2019 15:25:39 +0000 (17:25 +0200)]
Merge pull request #1109 from YosysHQ/clifford/fix1106

Add "read_verilog -pwires" feature

5 years agoAdd "read_verilog -pwires" feature, closes #1106
Clifford Wolf [Wed, 19 Jun 2019 12:38:50 +0000 (14:38 +0200)]
Add "read_verilog -pwires" feature, closes #1106

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #1105 from YosysHQ/clifford/fixlogicinit
Clifford Wolf [Wed, 19 Jun 2019 11:53:07 +0000 (13:53 +0200)]
Merge pull request #1105 from YosysHQ/clifford/fixlogicinit

Improve handling of initial/default values

5 years agoUnpacked array declaration using size
Tobias Wölfel [Wed, 19 Jun 2019 10:47:48 +0000 (12:47 +0200)]
Unpacked array declaration using size

Allows fixed-sized array dimension specified by a single number.

This commit is based on the work from PeterCrozier
https://github.com/YosysHQ/yosys/pull/560.
But is split out of the original work.

5 years agoMake tests/aiger less chatty
Clifford Wolf [Wed, 19 Jun 2019 10:20:35 +0000 (12:20 +0200)]
Make tests/aiger less chatty

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd defvalue test, minor autotest fixes for .sv files
Clifford Wolf [Wed, 19 Jun 2019 10:12:08 +0000 (12:12 +0200)]
Add defvalue test, minor autotest fixes for .sv files

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoUse input default values in hierarchy pass
Clifford Wolf [Wed, 19 Jun 2019 09:49:20 +0000 (11:49 +0200)]
Use input default values in hierarchy pass

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd defaultvalue attribute
Clifford Wolf [Wed, 19 Jun 2019 09:37:11 +0000 (11:37 +0200)]
Add defaultvalue attribute

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix handling of "logic" variables with initial value
Clifford Wolf [Wed, 19 Jun 2019 09:25:11 +0000 (11:25 +0200)]
Fix handling of "logic" variables with initial value

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #1100 from bwidawsk/home
Clifford Wolf [Wed, 19 Jun 2019 08:52:59 +0000 (10:52 +0200)]
Merge pull request #1100 from bwidawsk/home

Support ~ in filename parsing

5 years agoMerge pull request #1104 from whitequark/case-semantics
Clifford Wolf [Wed, 19 Jun 2019 08:50:32 +0000 (10:50 +0200)]
Merge pull request #1104 from whitequark/case-semantics

Clarify switch/case semantics in RTLIL

5 years agoExplain exact semantics of switch and case rules in the manual.
whitequark [Wed, 19 Jun 2019 05:22:40 +0000 (05:22 +0000)]
Explain exact semantics of switch and case rules in the manual.

5 years agoIn RTLIL::Module::check(), check process invariants.
whitequark [Wed, 19 Jun 2019 05:22:13 +0000 (05:22 +0000)]
In RTLIL::Module::check(), check process invariants.

5 years agoSupport filename rewrite in backends
Ben Widawsky [Mon, 17 Jun 2019 21:45:48 +0000 (14:45 -0700)]
Support filename rewrite in backends

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoSupport ~ for home directory
Ben Widawsky [Mon, 17 Jun 2019 21:45:11 +0000 (14:45 -0700)]
Support ~ for home directory

This is tested on Linux only

v2:
Wrap functioanlity in ifndef _WIN32 (eddiehung)
Find '~/' instead of '~' (cliffordwolf)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoReally permute Xilinx LUT mappings as default LUT6.I5:A6
Eddie Hung [Tue, 18 Jun 2019 18:48:48 +0000 (11:48 -0700)]
Really permute Xilinx LUT mappings as default LUT6.I5:A6

5 years agoRevert "Fix (do not) permute LUT inputs, but permute mux selects"
Eddie Hung [Tue, 18 Jun 2019 18:35:21 +0000 (11:35 -0700)]
Revert "Fix (do not) permute LUT inputs, but permute mux selects"

This reverts commit da3d2eedd2b6391621e81b3eaaa28a571e058f9d.

5 years agoClean up
Eddie Hung [Tue, 18 Jun 2019 16:50:37 +0000 (09:50 -0700)]
Clean up

5 years agoFix (do not) permute LUT inputs, but permute mux selects
Eddie Hung [Tue, 18 Jun 2019 16:49:57 +0000 (09:49 -0700)]
Fix (do not) permute LUT inputs, but permute mux selects

5 years agoMerge pull request #1086 from udif/pr_elab_sys_tasks2
Clifford Wolf [Tue, 18 Jun 2019 14:52:08 +0000 (16:52 +0200)]
Merge pull request #1086 from udif/pr_elab_sys_tasks2

Fixed broken $error()/$info/$warning() on non-generate blocks (within always/initial blocks)

5 years agoFix copy-pasta issue
Eddie Hung [Tue, 18 Jun 2019 05:29:22 +0000 (22:29 -0700)]
Fix copy-pasta issue

5 years agoPermute INIT for +/xilinx/lut_map.v
Eddie Hung [Tue, 18 Jun 2019 05:24:35 +0000 (22:24 -0700)]
Permute INIT for +/xilinx/lut_map.v

5 years agoSimplify comment
Eddie Hung [Tue, 18 Jun 2019 02:14:41 +0000 (19:14 -0700)]
Simplify comment

5 years agoUpdate LUT7/8 delays to take account for [ABC]OUTMUX delay
Eddie Hung [Tue, 18 Jun 2019 00:06:01 +0000 (17:06 -0700)]
Update LUT7/8 delays to take account for [ABC]OUTMUX delay

5 years ago&scorr before &sweep, remove &retime as recommended
Eddie Hung [Mon, 17 Jun 2019 20:32:08 +0000 (13:32 -0700)]
&scorr before &sweep, remove &retime as recommended

5 years agoCopy not move parameters/attributes
Eddie Hung [Mon, 17 Jun 2019 20:19:45 +0000 (13:19 -0700)]
Copy not move parameters/attributes

5 years agoFix leak removing cells during ABC integration; also preserve attr
Eddie Hung [Mon, 17 Jun 2019 19:54:24 +0000 (12:54 -0700)]
Fix leak removing cells during ABC integration; also preserve attr

5 years agoTry -W 300
Eddie Hung [Sun, 16 Jun 2019 19:08:03 +0000 (12:08 -0700)]
Try -W 300

5 years agoRe-enable &dc2
Eddie Hung [Mon, 17 Jun 2019 17:28:51 +0000 (10:28 -0700)]
Re-enable &dc2

5 years agoAdd timescale and generated-by header to yosys-smtbmc MkVcd
Clifford Wolf [Sun, 16 Jun 2019 21:12:03 +0000 (23:12 +0200)]
Add timescale and generated-by header to yosys-smtbmc MkVcd

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoCleanup
Eddie Hung [Sun, 16 Jun 2019 16:34:26 +0000 (09:34 -0700)]
Cleanup

5 years agoFix upper XC7 LUT[78] delays to use I[01] -> O delay not S -> O
Eddie Hung [Sat, 15 Jun 2019 12:45:16 +0000 (05:45 -0700)]
Fix upper XC7 LUT[78] delays to use I[01] -> O delay not S -> O

5 years agoLeave breadcrumb behind
Eddie Hung [Fri, 14 Jun 2019 20:34:40 +0000 (13:34 -0700)]
Leave breadcrumb behind

5 years agoRemove redundant condition
Eddie Hung [Fri, 14 Jun 2019 20:31:18 +0000 (13:31 -0700)]
Remove redundant condition

5 years agoRevert "Cleanup/optimise toposort in write_xaiger"
Eddie Hung [Fri, 14 Jun 2019 20:28:47 +0000 (13:28 -0700)]
Revert "Cleanup/optimise toposort in write_xaiger"

This reverts commit 1948e7c846ea318d003148974945d917701a4452.

Restores old toposort with optimisations

5 years agoUpdate comment
Eddie Hung [Fri, 14 Jun 2019 20:10:46 +0000 (13:10 -0700)]
Update comment

5 years agoCheck that whiteboxes are synthesisable
Eddie Hung [Fri, 14 Jun 2019 20:08:38 +0000 (13:08 -0700)]
Check that whiteboxes are synthesisable

5 years agoGet rid of compiler warnings
Eddie Hung [Fri, 14 Jun 2019 20:07:56 +0000 (13:07 -0700)]
Get rid of compiler warnings

5 years agoAs per @daveshah1 remove async DFF timing from xilinx
Eddie Hung [Fri, 14 Jun 2019 19:43:20 +0000 (12:43 -0700)]
As per @daveshah1 remove async DFF timing from xilinx

5 years agoCover __APPLE__ too for little to big endian
Eddie Hung [Fri, 14 Jun 2019 19:40:51 +0000 (12:40 -0700)]
Cover __APPLE__ too for little to big endian

5 years agoUpdate abc9 -D doc
Eddie Hung [Fri, 14 Jun 2019 19:29:46 +0000 (12:29 -0700)]
Update abc9 -D doc

5 years agoEnable "abc9 -D <num>" for timing-driven synthesis
Eddie Hung [Fri, 14 Jun 2019 19:28:01 +0000 (12:28 -0700)]
Enable "abc9 -D <num>" for timing-driven synthesis

5 years agoFurther cleanup based on @daveshah1
Eddie Hung [Fri, 14 Jun 2019 19:25:06 +0000 (12:25 -0700)]
Further cleanup based on @daveshah1

5 years agoResolve comments from @daveshah1
Eddie Hung [Fri, 14 Jun 2019 19:00:02 +0000 (12:00 -0700)]
Resolve comments from @daveshah1

5 years agoAdd XC7_WIRE_DELAY macro to synth_xilinx.cc
Eddie Hung [Fri, 14 Jun 2019 18:38:22 +0000 (11:38 -0700)]
Add XC7_WIRE_DELAY macro to synth_xilinx.cc

5 years agoUpdate delays based on SymbiFlow/prjxray-db
Eddie Hung [Fri, 14 Jun 2019 18:33:10 +0000 (11:33 -0700)]
Update delays based on SymbiFlow/prjxray-db

5 years agoRename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut}
Eddie Hung [Fri, 14 Jun 2019 17:51:11 +0000 (10:51 -0700)]
Rename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut}

5 years agoComment out dist RAM boxing on ECP5 for now
Eddie Hung [Fri, 14 Jun 2019 17:42:30 +0000 (10:42 -0700)]
Comment out dist RAM boxing on ECP5 for now

5 years agoRemove WIP ABC9 flop support
Eddie Hung [Fri, 14 Jun 2019 17:37:52 +0000 (10:37 -0700)]
Remove WIP ABC9 flop support

5 years agoMerge remote-tracking branch 'origin/master' into xaig
Eddie Hung [Fri, 14 Jun 2019 17:33:27 +0000 (10:33 -0700)]
Merge remote-tracking branch 'origin/master' into xaig

5 years agoMake doc consistent
Eddie Hung [Fri, 14 Jun 2019 17:32:46 +0000 (10:32 -0700)]
Make doc consistent

5 years agoCleanup
Eddie Hung [Fri, 14 Jun 2019 17:29:27 +0000 (10:29 -0700)]
Cleanup

5 years agoMerge branch 'xaig' of github.com:YosysHQ/yosys into xaig
Eddie Hung [Fri, 14 Jun 2019 17:29:16 +0000 (10:29 -0700)]
Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig

5 years agoMerge pull request #1097 from YosysHQ/dave/xaig_ecp5
Eddie Hung [Fri, 14 Jun 2019 17:28:30 +0000 (10:28 -0700)]
Merge pull request #1097 from YosysHQ/dave/xaig_ecp5

Add ECP5 ABC9 support (to xaig branch)

5 years agoCleanup
Eddie Hung [Fri, 14 Jun 2019 17:27:30 +0000 (10:27 -0700)]
Cleanup

5 years agoCleanup/optimise toposort in write_xaiger
Eddie Hung [Fri, 14 Jun 2019 17:13:17 +0000 (10:13 -0700)]
Cleanup/optimise toposort in write_xaiger

5 years agoRemove extra semicolon
Eddie Hung [Fri, 14 Jun 2019 17:11:34 +0000 (10:11 -0700)]
Remove extra semicolon

5 years agoAdd TODO to parse_xaiger
Eddie Hung [Fri, 14 Jun 2019 17:11:13 +0000 (10:11 -0700)]
Add TODO to parse_xaiger

5 years agoecp5: Add abc9 option
David Shah [Fri, 14 Jun 2019 11:02:12 +0000 (12:02 +0100)]
ecp5: Add abc9 option

Signed-off-by: David Shah <dave@ds0.me>
5 years agoOptimise some more
Eddie Hung [Fri, 14 Jun 2019 00:02:58 +0000 (17:02 -0700)]
Optimise some more

5 years agoMove ConstEvalAig to aigerparse.cc
Eddie Hung [Thu, 13 Jun 2019 23:28:11 +0000 (16:28 -0700)]
Move ConstEvalAig to aigerparse.cc

5 years agoFix name clash
Eddie Hung [Thu, 13 Jun 2019 21:27:07 +0000 (14:27 -0700)]
Fix name clash

5 years agoMore slimming
Eddie Hung [Thu, 13 Jun 2019 20:29:03 +0000 (13:29 -0700)]
More slimming

5 years agoAdd ConstEvalAig specialised for AIGs
Eddie Hung [Thu, 13 Jun 2019 20:13:48 +0000 (13:13 -0700)]
Add ConstEvalAig specialised for AIGs

5 years agoUpdate CHANGELOG with "synth -abc9"
Eddie Hung [Thu, 13 Jun 2019 16:15:30 +0000 (09:15 -0700)]
Update CHANGELOG with "synth -abc9"

5 years agoFix LP SB_LUT4 timing
Eddie Hung [Thu, 13 Jun 2019 15:24:33 +0000 (08:24 -0700)]
Fix LP SB_LUT4 timing

5 years agoMore accurate CHANGELOG
Eddie Hung [Thu, 13 Jun 2019 15:22:22 +0000 (08:22 -0700)]
More accurate CHANGELOG