Miodrag Milanovic [Fri, 16 Aug 2019 11:21:11 +0000 (13:21 +0200)]
Regression in abc9
Miodrag Milanovic [Fri, 16 Aug 2019 08:22:04 +0000 (10:22 +0200)]
Just needed IDs to be IdString
Clifford Wolf [Thu, 15 Aug 2019 20:56:32 +0000 (22:56 +0200)]
Merge pull request #1299 from YosysHQ/eddie/cleanup2
More cleanup, more use of ID() inside passes/techmap
Eddie Hung [Thu, 15 Aug 2019 18:25:42 +0000 (11:25 -0700)]
Fix
Eddie Hung [Thu, 15 Aug 2019 17:26:24 +0000 (10:26 -0700)]
Change signature of parse_blif to take IdString
Eddie Hung [Thu, 15 Aug 2019 17:25:54 +0000 (10:25 -0700)]
ID(\\.*) -> ID(.*)
Eddie Hung [Thu, 15 Aug 2019 17:24:35 +0000 (10:24 -0700)]
Convert a few more to ID
Eddie Hung [Thu, 15 Aug 2019 17:19:29 +0000 (10:19 -0700)]
Transform all "\\*" identifiers into ID()
Eddie Hung [Thu, 15 Aug 2019 17:05:08 +0000 (10:05 -0700)]
Transform "$.*" to ID("$.*") in passes/techmap
Eddie Hung [Thu, 15 Aug 2019 16:23:57 +0000 (09:23 -0700)]
More use of IdString::in()
Eddie Hung [Thu, 15 Aug 2019 14:49:02 +0000 (07:49 -0700)]
Merge pull request #1297 from YosysHQ/eddie/fix_1284_again
extract_fa: Un-inverting AND with an inverted input also inverts input to X{,N}OR
Eddie Hung [Thu, 15 Aug 2019 13:48:40 +0000 (06:48 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/fix_1284_again
Clifford Wolf [Thu, 15 Aug 2019 10:03:16 +0000 (12:03 +0200)]
Merge pull request #1275 from YosysHQ/clifford/ids
New ID() macro and now also use it
Clifford Wolf [Thu, 15 Aug 2019 08:22:59 +0000 (10:22 +0200)]
Merge branch 'master' into clifford/ids
Clifford Wolf [Thu, 15 Aug 2019 08:20:22 +0000 (10:20 +0200)]
Merge pull request #1295 from YosysHQ/eddie/fix_travis
Fix Travis CI
Eddie Hung [Wed, 14 Aug 2019 23:26:24 +0000 (16:26 -0700)]
AND with an inverted input, causes X{,N}OR output to be inverted too
Eddie Hung [Wed, 14 Aug 2019 22:23:25 +0000 (15:23 -0700)]
Revert "Only sort leaves on non-ANDNOT/ORNOT cells"
This reverts commit
5ec5f6dec7d4cdcfd9e1a2cda999886605778400.
Eddie Hung [Wed, 14 Aug 2019 19:28:17 +0000 (12:28 -0700)]
Revert earliest to gcc-4.8, compile iverilog with default compiler
Eddie Hung [Wed, 14 Aug 2019 19:26:45 +0000 (12:26 -0700)]
Revert "Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!"
This reverts commit
c82b2fa31f8965be2680c87af6cd9ac5d26ead4d.
Eddie Hung [Wed, 14 Aug 2019 19:23:15 +0000 (12:23 -0700)]
Remove .0 from clang-8.0
Eddie Hung [Wed, 14 Aug 2019 19:16:02 +0000 (12:16 -0700)]
Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!
Eddie Hung [Wed, 14 Aug 2019 18:52:08 +0000 (11:52 -0700)]
bionic -> xenial as its on whitelist
Eddie Hung [Wed, 14 Aug 2019 18:26:32 +0000 (11:26 -0700)]
Bump gcc from 4.8 to 4.9 as undefined reference
... to `__warn_memset_zero_len'.
Also remove gcc-6, bump gcc-7 to gcc-9, clang from 5.0 to 8.0
Eddie Hung [Wed, 14 Aug 2019 18:25:56 +0000 (11:25 -0700)]
Only sort leaves on non-ANDNOT/ORNOT cells
Eddie Hung [Wed, 14 Aug 2019 17:42:18 +0000 (10:42 -0700)]
Merge pull request #1294 from YosysHQ/revert-1288-eddie/fix_1284
Revert "Since $_ANDNOT_ is not symmetric, do not sort leaves"
Eddie Hung [Wed, 14 Aug 2019 17:40:53 +0000 (10:40 -0700)]
Revert "Since $_ANDNOT_ is not symmetric, do not sort leaves"
Eddie Hung [Tue, 13 Aug 2019 16:06:11 +0000 (09:06 -0700)]
Merge pull request #1288 from YosysHQ/eddie/fix_1284
Since $_ANDNOT_ is not symmetric, do not sort leaves
Eddie Hung [Mon, 12 Aug 2019 18:17:15 +0000 (11:17 -0700)]
Since $_ANDNOT_ is not symmetric, do not sort leaves
Serge Bazanski [Mon, 12 Aug 2019 13:09:25 +0000 (15:09 +0200)]
Merge pull request #1152 from 1138-4EB/feat-docker
Dockerfile
Eddie Hung [Mon, 12 Aug 2019 05:10:17 +0000 (22:10 -0700)]
Merge pull request #1277 from YosysHQ/eddie/fix_1262
opt_expr -fine to now trim LSBs of $alu cells too
Eddie Hung [Mon, 12 Aug 2019 04:13:40 +0000 (21:13 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/fix_1262
Clifford Wolf [Sun, 11 Aug 2019 10:23:16 +0000 (12:23 +0200)]
Add YOSYS_NO_IDS_REFCNT configuration macro
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sat, 10 Aug 2019 10:24:16 +0000 (12:24 +0200)]
Use ID() in kernel/*, add simple ID:: hack (to be improved upon later)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Sat, 10 Aug 2019 09:41:09 +0000 (11:41 +0200)]
More improvements and cleanups in IdString subsystem
- better use of "inline" keyword
- deprecate "sticky" IDs feature
- improve handling of empty ID
- add move constructor
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 9 Aug 2019 16:58:14 +0000 (18:58 +0200)]
Use ID() macro in all of passes/opt/
This was obtained by running the following SED command in passes/opt/
and then using "meld foo.cc foo.cc.orig" to manually fix all resulting
compiler errors.
sed -i.orig -r 's/"\\\\([a-zA-Z0-9_]+)"/ID(\1)/g; s/"(\$[a-zA-Z0-9_]+)"/ID(\1)/g;' *.cc
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 9 Aug 2019 16:54:03 +0000 (18:54 +0200)]
Improve API of ID() macro
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Sat, 10 Aug 2019 21:18:16 +0000 (14:18 -0700)]
Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"
Eddie Hung [Sat, 10 Aug 2019 18:55:00 +0000 (11:55 -0700)]
Wrong way around
David Shah [Sat, 10 Aug 2019 16:14:48 +0000 (17:14 +0100)]
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"
Eddie Hung [Sat, 10 Aug 2019 15:26:41 +0000 (08:26 -0700)]
cover_list -> cover as per @cliffordwolf
Clifford Wolf [Sat, 10 Aug 2019 07:52:14 +0000 (09:52 +0200)]
Merge pull request #1258 from YosysHQ/eddie/cleanup
Cleanup a few barnacles across codebase
Clifford Wolf [Sat, 10 Aug 2019 07:47:25 +0000 (09:47 +0200)]
Merge pull request #1261 from YosysHQ/clifford/verific_init
Automatically prune init attributes in verific front-end
Clifford Wolf [Sat, 10 Aug 2019 07:47:10 +0000 (09:47 +0200)]
Merge pull request #1263 from ucb-bar/firrtl_err_on_unsupported_cell
FIRRTL error on unsupported cell
Clifford Wolf [Sat, 10 Aug 2019 07:46:46 +0000 (09:46 +0200)]
Merge pull request #1270 from YosysHQ/eddie/alu_lcu_doc
Add a few comments to document $alu and $lcu
Clifford Wolf [Sat, 10 Aug 2019 07:45:26 +0000 (09:45 +0200)]
Merge pull request #1272 from mmicko/travis_fix
Propagate parameters for Travis build
Clifford Wolf [Sat, 10 Aug 2019 07:45:06 +0000 (09:45 +0200)]
Merge pull request #1274 from YosysHQ/eddie/fix_1271
Add __STDC_FORMAT_MACROS before <inttypes.h> as per @mithro
Clifford Wolf [Sat, 10 Aug 2019 07:38:22 +0000 (09:38 +0200)]
Merge pull request #1276 from YosysHQ/clifford/fix1273
Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib
Eddie Hung [Fri, 9 Aug 2019 19:43:21 +0000 (12:43 -0700)]
Grammar
Eddie Hung [Fri, 9 Aug 2019 19:33:39 +0000 (12:33 -0700)]
Reformat so it shows up/looks nice when "help $alu" and "help $alu+"
Eddie Hung [Fri, 9 Aug 2019 19:13:32 +0000 (12:13 -0700)]
Separate $alu handling
Eddie Hung [Fri, 9 Aug 2019 19:13:17 +0000 (12:13 -0700)]
Add $alu tests
Eddie Hung [Fri, 9 Aug 2019 17:32:12 +0000 (10:32 -0700)]
opt_expr -fine to trim LSBs of $alu too
Eddie Hung [Fri, 9 Aug 2019 17:30:53 +0000 (10:30 -0700)]
Add alumacc versions of opt_expr tests
Eddie Hung [Fri, 9 Aug 2019 17:22:06 +0000 (10:22 -0700)]
Add new $alu test, remove wreduce
Clifford Wolf [Fri, 9 Aug 2019 17:17:23 +0000 (19:17 +0200)]
Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib, add "abc -g all", fixes #1273
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Fri, 9 Aug 2019 17:13:49 +0000 (10:13 -0700)]
Cleanup some more
whitequark [Fri, 9 Aug 2019 17:10:46 +0000 (17:10 +0000)]
Merge pull request #1267 from whitequark/proc_prune-fix-1243
proc_prune: fix handling of exactly identical assigns
Eddie Hung [Fri, 9 Aug 2019 17:08:17 +0000 (10:08 -0700)]
Simplify opt_expr tests using equiv_opt
Eddie Hung [Fri, 9 Aug 2019 16:50:47 +0000 (09:50 -0700)]
A bit more on where $lcu comes from
Eddie Hung [Fri, 9 Aug 2019 16:48:17 +0000 (09:48 -0700)]
Add more comments
Eddie Hung [Fri, 9 Aug 2019 16:17:35 +0000 (09:17 -0700)]
Add __STDC_FORMAT_MACROS before <inttypes.h> as per @mithro
Miodrag Milanovic [Fri, 9 Aug 2019 06:54:17 +0000 (08:54 +0200)]
ABC requires it like this
Miodrag Milanovic [Fri, 9 Aug 2019 06:06:14 +0000 (08:06 +0200)]
Propagate parameters for Travis build
Eddie Hung [Thu, 8 Aug 2019 17:05:28 +0000 (10:05 -0700)]
Add a few comments to document $alu and $lcu
Eddie Hung [Thu, 8 Aug 2019 14:58:33 +0000 (07:58 -0700)]
Merge pull request #1264 from YosysHQ/eddie/fix_1254
opt_lut to ignore LUT cells, or those that drive bits, with (* keep *)
Eddie Hung [Thu, 8 Aug 2019 14:58:11 +0000 (07:58 -0700)]
Merge pull request #1266 from YosysHQ/eddie/ice40_full_adder
Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER
whitequark [Thu, 8 Aug 2019 05:28:01 +0000 (05:28 +0000)]
proc_prune: fix handling of exactly identical assigns.
Before this commit, in a process like:
process $proc$bug.v:8$3
assign $foo \bar
switch \sel
case 1'1
assign $foo 1'1
assign $foo 1'1
case
assign $foo 1'0
end
end
both of the "assign $foo 1'1" would incorrectly be removed.
Fixes #1243.
Eddie Hung [Thu, 8 Aug 2019 04:36:02 +0000 (21:36 -0700)]
Remove dump call
Eddie Hung [Thu, 8 Aug 2019 04:35:48 +0000 (21:35 -0700)]
Move tests/various/opt* into tests/opt/
Eddie Hung [Thu, 8 Aug 2019 04:33:56 +0000 (21:33 -0700)]
Remove ice40_unlut call, simply do equiv_opt on synth_ice40
Eddie Hung [Thu, 8 Aug 2019 04:31:32 +0000 (21:31 -0700)]
Add testcase from removed opt_ff.{v,ys}
Eddie Hung [Wed, 7 Aug 2019 23:48:38 +0000 (16:48 -0700)]
Remove tests/opt/opt_ff.{v,ys} as they don't seem to do anything but run
Eddie Hung [Wed, 7 Aug 2019 23:40:24 +0000 (16:40 -0700)]
Allow whitebox modules to be overwritten
Eddie Hung [Wed, 7 Aug 2019 23:33:46 +0000 (16:33 -0700)]
Update CHANGELOG
Eddie Hung [Wed, 7 Aug 2019 23:27:24 +0000 (16:27 -0700)]
Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER
Eddie Hung [Wed, 7 Aug 2019 23:27:07 +0000 (16:27 -0700)]
Add test
Eddie Hung [Wed, 7 Aug 2019 21:52:56 +0000 (14:52 -0700)]
Remove ice40_unlut
Eddie Hung [Wed, 7 Aug 2019 21:50:59 +0000 (14:50 -0700)]
Wrap SB_CARRY+SB_LUT into $__ICE40_FULL_ADDER
Eddie Hung [Wed, 7 Aug 2019 20:12:28 +0000 (13:12 -0700)]
opt_lut to ignore LUT cells, or those that drive bits, with (* keep *)
Eddie Hung [Wed, 7 Aug 2019 19:25:26 +0000 (12:25 -0700)]
Merge pull request #1248 from YosysHQ/eddie/abc9_speedup
abc9: speedup by using using "clean" more efficiently
Eddie Hung [Wed, 7 Aug 2019 19:20:08 +0000 (12:20 -0700)]
substr() -> compare()
Eddie Hung [Wed, 7 Aug 2019 18:14:03 +0000 (11:14 -0700)]
RTLIL::S{0,1} -> State::S{0,1} for headers
Eddie Hung [Wed, 7 Aug 2019 18:12:38 +0000 (11:12 -0700)]
RTLIL::S{0,1} -> State::S{0,1}
Eddie Hung [Wed, 7 Aug 2019 18:11:50 +0000 (11:11 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/cleanup
Eddie Hung [Wed, 7 Aug 2019 18:11:14 +0000 (11:11 -0700)]
Remove std:: namespace
Eddie Hung [Wed, 7 Aug 2019 18:10:18 +0000 (11:10 -0700)]
'make clean' to not remove anything abc
Eddie Hung [Wed, 7 Aug 2019 18:09:17 +0000 (11:09 -0700)]
stoi -> atoi
1138-4EB [Wed, 7 Aug 2019 12:24:09 +0000 (14:24 +0200)]
dockerfile: use 'python:3-slim-buster' base image
1138-4EB [Wed, 7 Aug 2019 03:37:00 +0000 (05:37 +0200)]
dockerfile: use PREFIX instead of cp
Jim Lawson [Wed, 7 Aug 2019 17:14:45 +0000 (10:14 -0700)]
Merge branch 'master' into firrtl_err_on_unsupported_cell
# Conflicts:
# backends/firrtl/firrtl.cc
Eddie Hung [Tue, 6 Aug 2019 20:20:32 +0000 (13:20 -0700)]
Add comment
Eddie Hung [Tue, 6 Aug 2019 20:19:21 +0000 (13:19 -0700)]
Eddie Hung [Fri, 2 Aug 2019 05:30:10 +0000 (22:30 -0700)]
Add TODO
Eddie Hung [Fri, 2 Aug 2019 05:21:56 +0000 (22:21 -0700)]
Compute box_lookup just once
Eddie Hung [Fri, 2 Aug 2019 05:21:30 +0000 (22:21 -0700)]
Run "clean" on mapped_mod in its own design
Eddie Hung [Fri, 2 Aug 2019 05:21:14 +0000 (22:21 -0700)]
Run "clean -purge" on holes_module in its own design
David Shah [Wed, 7 Aug 2019 14:35:29 +0000 (15:35 +0100)]
Merge pull request #1260 from YosysHQ/dave/ecp5_cell_fixes
ecp5: Make cells_sim.v consistent with nextpnr
Clifford Wolf [Wed, 7 Aug 2019 13:31:49 +0000 (15:31 +0200)]
Automatically prune init attributes in verific front-end, fixes #1237
Signed-off-by: Clifford Wolf <clifford@clifford.at>
David Shah [Wed, 7 Aug 2019 13:19:31 +0000 (14:19 +0100)]
ecp5: Make cells_sim.v consistent with nextpnr
Signed-off-by: David Shah <dave@ds0.me>
Clifford Wolf [Wed, 7 Aug 2019 12:27:35 +0000 (14:27 +0200)]
Merge pull request #1213 from YosysHQ/eddie/wreduce_add
wreduce/opt_expr: improve width reduction for $add and $sub cells