radeonsi: fix syncobj wait timeout

syncobj wait takes absolute timeout value.

Fixes: 162502370c7 "winsys/amdgpu: implement sync_file import/export"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6579>

android: util: fix missing include path

Fixes the following building error:

external/mesa/src/util/format/u_format_bptc.c:28:10:
fatal error: 'u_format_pack.h' file not found
         ^~~~~~~~~~~~~~~~~
1 error generated.

Fixes: 8d38b2578 ("util: Explicitly call the unpack functions from inside bptc pack/unpack.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6619>

android: amd/registers: switch to new generated register definitions

Android building rules are aligned to meson ones

Fixes the following building error:

FAILED: ninja: 'external/mesa/src/amd/registers/amdgfxregs.json',
needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_amd_common_intermediates/common/sid_tables.h',
missing and no known rule to make it

Fixes: b7a6333ee ("amd/registers: switch to new generated register definitions")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6618>

ac/llvm: fix b2f for v2f16

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: add better code for fsign

There are 2 improvements:
- better code for 16, 32, and 64 bits
- vector support for 16 and 32 bits

Totals:
SGPRS: 2639738 -> 2625882 (-0.52 %)
VGPRS: 1534120 -> 1533916 (-0.01 %)
Spilled SGPRs: 3541 -> 3557 (0.45 %)
Spilled VGPRs: 33 -> 33 (0.00 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 292 -> 292 (0.00 %) dwords per thread
Code Size: 55640332 -> 55384892 (-0.46 %) bytes
Max Waves: 964785 -> 964857 (0.01 %)

Totals from affected shaders:
SGPRS: 377352 -> 363496 (-3.67 %)
VGPRS: 209800 -> 209596 (-0.10 %)
Spilled SGPRs: 1979 -> 1995 (0.81 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 256 -> 256 (0.00 %) dwords per thread
Code Size: 12549300 -> 12293860 (-2.04 %) bytes
Max Waves: 105762 -> 105834 (0.07 %)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: add better code for isign

There are 2 improvements:
- select v_med3_i32
- support vectors

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: remove dead code handling for fmod

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: fix bcsel for v2*16

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: fix amdgcn.rsq for v2f16

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: fix amdgcn.fract for v2f16

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: fix amdgcn.rcp for v2f16

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

ac/llvm: remove stub prototype for fmed3

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

Revert "ac: generate FMA for inexact instructions for radeonsi"

This reverts commit 4b9370cb0f3a2d9030e827f847f66bdefeaf08fd.

Fixes: 4b9370cb0f3a2d9030e827f847f66bdefeaf08fd
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3429
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

radeonsi: move nir_shader_compiler_options into si_screen

so that they can be different depending on the GPU (for 16-bit support)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

radeonsi: remove redundant no-signed-zero-fp-math LLVM attribute

Already set by AC_FLOAT_MODE_DEFAULT_OPENGL.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6284>

egl/x11: Free memory allocated for reply structures on error

This patch fixes memory leaks when reply is allocated and is not freed
on error execution path.

Found by enabling address sanitizer on simple EGL app.

```c

int main()
{
    EGLDisplay display = eglGetDisplay(EGL_DEFAULT_DISPLAY);
    EGLint major;
    EGLint minor;

    if (!eglInitialize(display, &major, &minor))
    {
        return 1;
    }
    eglTerminate(display);
    return 0;
}
```

Compiled with: `gcc testme.c -o testme -fsanitize=address -lasan -lEGL`

Execution environment:
- Windows 10, VMWare Player 15.5.2 build-15785246 without 3D accelaration
- Guest OS: OpenSUSE Leap 15.2
- Mesa 19.3.4

Program output:

```sh
ASAN_OPTIONS=fast_unwind_on_malloc=0 ./testme

libEGL warning: DRI2: failed to authenticate
==52510==ERROR: LeakSanitizer: detected memory leaks

Direct leak of 32 byte(s) in 1 object(s) allocated from:
    #0 0x7fa62315f500 in malloc (/usr/lib64/libasan.so.4+0xdc500)
    #1 0x7fa61e12d86b  (/usr/lib64/libxcb.so.1+0xf86b)
    #2 0x7fa61e12b5c7  (/usr/lib64/libxcb.so.1+0xd5c7)
    #3 0x7fa61e12cc3e  (/usr/lib64/libxcb.so.1+0xec3e)
    #4 0x7fa61e12cd4f in xcb_wait_for_reply (/usr/lib64/libxcb.so.1+0xed4f)
    #5 0x7fa61ebe02a5  (/usr/lib64/libEGL_mesa.so.0+0x202a5)
    #6 0x7fa61ebdb5ca  (/usr/lib64/libEGL_mesa.so.0+0x1b5ca)
    #7 0x7fa61ebd750c  (/usr/lib64/libEGL_mesa.so.0+0x1750c)
    #8 0x7fa61ebd7554  (/usr/lib64/libEGL_mesa.so.0+0x17554)
    #9 0x7fa61ebd1107  (/usr/lib64/libEGL_mesa.so.0+0x11107)
    #10 0x400856 in main (/home/user/testme+0x400856)
    #11 0x7fa622ad8349 in __libc_start_main (/lib64/libc.so.6+0x24349)
    #12 0x4006e9 in _start (/home/user/testme+0x4006e9)

SUMMARY: AddressSanitizer: 32 byte(s) leaked in 1 allocation(s).
```

Signed-off-by: Andrey Vostrikov <av.linux.dev@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6611>

glsl_to_nir: fix crashes with int16 shifts

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6613>

At this commit driver skeleton is able to dump spirv and nir
for first shader being inserted in pipeline.

At this stage after adding few more stubs driver fails at
libresoc_CreateGraphicsPipelines().

Making SWAPChain exntesions work.
There is lots of commented code.

Implement libresoc_DeviceWaitIdle() libresoc_QueueWaitIdle().

Implement GetDeviceQueue()

Add implementation for libresoc_CreatePipelineCache().
At this commit test fails at libresoc_GetDeviceQueue() which is yet to be implemented.

Add code to few more essential methods in libresoc_device.c
Currently code failes in libresoc_CreateDevice() because it requires
implementation for libresoc_CreatePipelineCache().

Create very primitive physical device and instance.

LibreSoc Vulkan Driver Initial Commit
  - This commit mostly includes copy & paste code from other vulkan driver.
  - Python scripts to generate extensions, entrypoints and icd.
  - Meson file updates.

spirv: fix emitting switch cases that directly jump to the merge block

As shown in the valid SPIR-V below, if one switch case statement
directly jumps to the merge block, it has no branches at all and
we have to reset the fall variable. Otherwise, it creates an
unintentional fallthrough.

       OpSelectionMerge %97 None
       OpSwitch %96 %97 1 %99 2 %100
%100 = OpLabel
%102 = OpAccessChain %_ptr_StorageBuffer_v4float %86 %uint_0 %uint_37
%103 = OpLoad %v4float %102
%104 = OpBitcast %v4uint %103
%105 = OpCompositeExtract %uint %104 0
%106 = OpShiftLeftLogical %uint %105 %uint_1
       OpBranch %97
 %99 = OpLabel
       OpBranch %97
 %97 = OpLabel
%107 = OpPhi %uint %uint_4 %75 %uint_5 %99 %106 %100

This fixes serious corruption in Horizon Zero Dawn.

v2: Changed the code to skip the entire if-block instead of resetting
    the fallthrough variable.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3460
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6590>

compiler/types: Fix deserializing structs with >= 15 members

This was a typo in a0b82c24b6d08c where we used the wrong struct member
to decide whether or not to read the explicit_alignment.

Fixes: a0b82c24b6d08c "nir/glsl: Add an explicit_alignment field to glsl_type"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3487
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6605>

freedreno/regs: add 7nm DSI PHY/PLL regs

This is for the kernel driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6603>

gallivm: add InstSimplify pass

This is the recommended replacement for the removed ConstantPropagation
pass, and llvm now added c binding for it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6585>

intel/compiler: fix typo in a comment

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>

intel/compiler: print dispatch width when shader fails to compile

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>

intel/compiler: move extern C functions out of namespace brw

brw_compile_gs and brw_compile_tcs are extern C functions, but are
defined inside of brw namespace, which somehow works but confuses
Eclipse CDT's code analysis.

Move these functions out of brw namespace and fix references to
objects from brw namespace.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>

intel/compiler: use the same name for nir shaders in brw_compile_* functions

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>

intel/compiler: match brw_compile_* declarations with their definitions

Current state confuses Eclipse CDT's code analysis.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6602>

nir/algebraic: add 16-bit versions of a few 32-bit patterns

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>

nir/algebraic: trivially enable existing 32-bit patterns for all bit sizes

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>

nir: get ffma support from NIR options for nir_lower_flrp

This also fixes the inverted last parameter of nir_lower_flrp in most drivers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>

iris: Better determine map_would_stall for Z/S

Use iris_has_invalid_primary to determine if mapping a depth or stencil
surface would lead to a stall due to resolving.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>

iris: Drop a use of the need_resolve boolean

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>

iris: Avoid resolving Z/S reads in transfer_map

Resolves are destructive for depth and stencil surfaces, so avoid
resolving them for reads.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>

iris: Make iris_has_color_unresolved more generic

Replace iris_has_color_unresolved with iris_has_invalid_primary.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>

iris: Fold a condition into no_gpu for consistency

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6192>

aco: handle unaligned loads on GFX10.3

Same as GFX10.

Cc: 20.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6594>

nir/load_store_vectorizer: Add unit tests for alignment handling.

The alignment upgrading logic is pretty tricky, but this gives me good
confidence that it actually works.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>

nir/load_store_vectorizer: Use more imm helpers in the tests.

It's a lot more readable this way, I think.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>

nir/load_store_vectorize: rework alignment calculation

It now also updates align_offset and creates better alignment information
with a constant 0 offset.

shader-db (Navi):
Totals from 63 (0.05% of 127638) affected shaders:
SGPRs: 3072 -> 3064 (-0.26%)
VGPRs: 2736 -> 2740 (+0.15%)
CodeSize: 325180 -> 324336 (-0.26%); split: -0.27%, +0.01%
Instrs: 63555 -> 63413 (-0.22%); split: -0.24%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>

aco: fix byte_align_scalar for 3 dword vectors

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: fe08f0ccf94a7315bded5868b4f6a8bae744de79
   ('aco: add byte_align_scalar() & trim_subdword_vector() helper functions')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4710>

intel/fs: add hint how to get more info when shader validation fails

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6559>

intel: add INTEL_DEBUG=shaders

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6559>

ac/llvm: fix unaligned VS input loads on gfx10.3

Fixes: a23802bcb9a
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6595>

nir: fix const-cast warning on MSVC

We're casting pointers to const memory to const pointers. MSVC complains
about this with the following warning:

warning C4090: 'initializing': different 'const' qualifiers

In this case, we can easily use both constnesses, because all we do is
read here. So let's avoid the warning by adding another const-keyword.

Fixes: 193765e26ba ("nir/lower_goto_if: Sort blocks in select_fork")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6582>

meson: drop leftover PTHREAD_SETAFFINITY_IN_NP_HEADER

55765f80 replaced this with a check for the header itself.

Fixes: 55765f80b9ce7cce4ec6 ("util/u_thread: include pthread_np.h if found")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6548>

radv,aco: disable opts if VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT

Sounds useful to determine if ACO breaks a specific pipeline
because of various optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6487>

panfrost: Fix gnu-empty-initializer errors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3473
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6551>

iris: Fix aux assertion in resource_get_handle

iris_resource_get_handle currently asserts that the resource has an aux
state that is suitable for sharing. However, the caller of this function
can pass a flag to specify that it will handle flushing/resolving the
resource as needed for sharing. Take this flag into account when
asserting the state of the aux buffer.

Fixes: e81392868e6 ("iris/resource: Drop redundant checks for aux support")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/128
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1371>

ci/bare-metal: Use python for handling fastboot booting and parsing

Modeling after what I did for cros_servo_run.py, this gives us easy
support for restarting the test run a530 when we detect a spontaneous
reboot.  I had to touch up serial_buffer.py to handle buffering in from a
file instead of a serial device, to support the upcoming etnaviv CI
(tested by running it against a serial log from db410c and seeing it step
to calling "fastboot")

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>

ci/bare-metal: Fix capturing of serial output as job artifacts.

I tried to put them in the wrong directory -- everything needs to go in
results/, which we want clean and ready before we start our job.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>

ci/bare-metal: Log why our run restarts when it does.

It would be confusing to see a job quietly restart itself in the middle.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>

ci/bare-metal: Include a timestamp in our serial reads.

gitlab CI doesn't include timestamps in its logs by default, but it's
really useful for finding delays in our CI so stuff one in on the lines
coming in from serial and being output to the gitlab log.  The artifacts
file is still the raw serial output.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>

ci/bare-metal: Fix detection of "POWER_GOOD not seen in time" fails

We were only reading from the CPU serial, not EC, so we'd never notice
these sources of job timeouts.  I couldn't find a cleaner solution, so I
spawned two threads to do the blocking reads from our serial line fifos
and merge them together in a single queue to read.

Closes: #3470
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>

ci/bare-metal: Use re.search() instead re.match() for our line matching.

match() looks for the start of the line to match our regex, while search
just looks for the regex anywhere in the line.  I messed this up when
converting our greps in shell to python, which was part of breaking the
POWER_GOOD flake detection.  Most of our matches worked, but let's
consistently use this one so we don't mess this up in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6529>

amd/common: Fix various non-critical integer overflows

The result of 0xf << 28 is a signed integer and hence overflows into the sign
bit. In practice compilers did the right thing here, since the intent of the
code was unsigned arithmetic anyway.

Cc: mesa-stable
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>

aco: Fix integer overflows when emitting parallel copies during RA

32-bit shifts were accidentally used before this change despite the intended
output being 64 bits.

This was observed when compiling Dolphin's ubershaders.

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>

radv: Fix various non-critical integer overflows

The result of 0xf << 28 is a signed integer and hence overflows into the sign
bit. In practice compilers did the right thing here, since the intent of the
code was unsigned arithmetic anyway.

These conditions were observed in:
* dEQP-VK.pipeline.image.suballocation.sampling_type.combined.view_type.1d.format.r4g4b4a4_unorm_pack16.count_8.size.512x1
* dEQP-VK.binding_model.descriptorset_random.sets32.noarray.ubolimitlow.sbolimitlow.sampledimglow.outimgonly.noiub.nouab.frag.ialimithigh.0

Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6568>

aco: remove omod_success/clamp_success

This simplifies the optimizer and should make SDWA optimizations easier.

No fossil-db changes on Navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6293>

aco: fix mad splitting after applying output modifiers

Previously, this wasn't done because the mad label wasn't passed to the
new definition.

fossil-db (Navi):
Totals from 5770 (4.24% of 135946) affected shaders:
SGPRs: 391920 -> 391872 (-0.01%)
VGPRs: 349084 -> 348424 (-0.19%); split: -0.20%, +0.01%
CodeSize: 34639636 -> 34637496 (-0.01%); split: -0.02%, +0.01%
MaxWaves: 58828 -> 58862 (+0.06%)
Instrs: 6723436 -> 6723297 (-0.00%); split: -0.02%, +0.02%
Cycles: 197594168 -> 197591968 (-0.00%); split: -0.02%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6293>

radv: remove descriptor_indexing fails from expected fails

I think these should be fixed since
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6451. They also
pass for me on polaris and navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6586>

anv: Set alignments on UBO/SSBO root derefs

This doesn't really do anything for us today.  One day, I suppose we
could use it to do something with wide loads with non-uniform offsets.
The big reason to do this is to get better testing to make sure that NIR
doesn't blow up on the deref paths.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

spirv: Drop the OpenCL type layout code

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

clover/nir: Use lower_vars_to_explicit for uniform and global

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

spirv: Stop counting inputs in entry_point_wrapper

nir_shader::num_inputs isn't supposed to be a count of how many input
variables we have.  It's a size of the lowered input space.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

clover: Use args.size() to compute new var locations

This is better than using num_uniforms as it guarantees what we want: a
mapping from nir_variable to the args vector.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir: Allow uniform in nir_lower_vars_to_explicit_types

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir: Allow var_mem_global in nir_lower_vars_to_explicit_types

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

spirv: Propagate alignments to deref chains via casts

This commit propagates the alignment information provided either through
the Alignment decoration on pointers or via the alignment mem operands
to OpLoad, OpStore, and OpCopyMemory to the NIR deref chain.  It does so
by wrapping the deref in a cast.  NIR should be able to clean up most
unnecessary casts only leaving us with the useful alignment information.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

spirv: Add pointer helper vars to OpCopyMemory

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir/opt_deref: Remove restrictive alignment information from casts

If we have a cast deref with alignment information and we can get equal
or better alignment information from something further up the deref
chain, we can strip the alignment information from the cast and allow
other optimizations to potentially eliminate the cast.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir/opt_deref: Don't remove casts with alignment information

Generally, if a cast has alignment information, that information is
useful and we don't want to loose it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir/lower_io: Apply alignments from derefs when available

If the deref has no explicit alignment in the chain, we assume component
alignment which is what we currently assume for all derefs today.  This
should be correct for all APIs in the sense that we can usually assume
at least component alignment.  However, for some APIs such as OpenCL, we
could potentially make larger alignment assumptions.  The intention is
that those will be handled via alignment-increasing casts.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir: Add a helper for getting the alignment of a deref

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir: Handle all array stride cases in nir_deref_instr_array_stride

This renames it to drop the ptr_as and makes it handle all of the stride
cases.  There's a bit of a tricky bit in here around Booleans but we
currently use 32-bit for those always.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir: Add alignment information to cast derefs

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir/glsl: Add an explicit_alignment field to glsl_type

When creating explicit type, the alignment information is lost, thus
forcing explicit type users to recalculate the alignment using the same
size_align() function. Let's add a new field to cache this information.

Only structs, matrices, and vectors have and explicit alignment.  Arrays
alignment is implicitly set to its element alignment and matrices are
required to have an alignment that matches that of its vector columns.
the concept of alignment simply doesn't apply to other types.

We make the strategic choice to not allow explicit alignments on
scalars.  This is for a couple of reasons:

 1. There are no cases today where we use explicit types where we want
    any other alignment for scalars than natural alignment.

 2. Vectors don't have a component alignment that's separate from the
    explicit_alignment so it's impossible to get an explicitly aligned
    scalar type which is the component of the explicitly aligned vector
    type.

This choice may cause problems if we ever want to use explicitly laid
out types for things like varyings where we sometimes want vec4
alignment of scalars.  We can deal with that when the time comes.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

compiler/types: Make booleans 32-bit for cl_size/align

OpenCL doesn't mandate a size and this is consistent with the rest of
the glsl_type system.  While we're here, we also clean ::cl_size() up a
bit and use a new explicit_type_scalar_byte_size() helper.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir: Expose the packed attribute attached to glsl_type objects

This should help code calculating field offsets to get it right when
the structure is marked packed.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir/glsl: Consider block interfaces as structs when it comes to size/align calculation

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

glsl: Propagate packed info in get_explicit_type_for_size_align()

Right now, when calling get_explicit_type_for_size_align() on a packed
struct, the packed attribute is lost and field offsets are wrong.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

spirv: Propagate packed information to glsl_type

We need to parse the CPacked decoration early enough to apply it when
calculating field offsets and creating the struct type.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

spirv: Don't accept CPacked decoration on struct members

CPacked decoration is only allowed on struct definitions, not struct
members.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

clover: Call nir_lower_mem_constant_vars

Fixes: 26a4c8f375e "clover/nir: Use nir_var_mem_constant for..."
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

nir: Don't bail too early in lower_mem_constant_vars

If there were no constant variables, we would bail out entirely.
However, we may still have constant input pointers coming in from the
client.

Fixes: 4360a8a2b3fce "nir/lower_io: Add support for nir_var_mem_constant"
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

intel/nir: Stop using nir_lower_vars_to_scratch

Instead, we do a limited indirect deref lowering and then use
nir_lower_vars_to_explicit_types and nir_lower_explicit_io to lower it
as if it were SSBO or global memory access.  Among other things, this
should enable pointer arithmetic on local variables.  Fun!

The only shader-db change from this change on ICL was a few tiny cycle
count changes in 7 Aztec Ruins compute shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>

nir/lower_indirect_derefs: Add a threshold

Instead of always lowering everything, we add a threshold such that if
the total indirected array size (AoA size) is above that threshold, it
won't lower.  It's assumed that the driver will sort things out somehow
by, for instance, lowering to scratch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>

intel/compiler: Handle all indirect lowering choices in brw_nir.c

Since everything flows through NIR and we're doing all of our indirect
deref lowering there now, there's no reason to keep making those
decisions in brw_compiler and stuffing them in the GLSL compiler
structs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>

zink: generically handle matrix types

there's a bunch of glsl 1.10 tests for this

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6268>

gallium/util: use uint sampler for stencil-reads

Some drivers can't use float-samplers to read integer textures, so let's
make sure the stenicil-sampler has the right type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6512>

radeonsi: optimize out the loop in si_get_ps_input_cntl

Use a remap table from a semantic to an index instead of searching
for the correct index.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

radeonsi: replace TGSI_SEMANTIC with VARYING_SLOT and FRAG_RESULT

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

radeonsi: replace TGSI_INTERPOLATE with INTERP_MODE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>