litex.git
9 years agoMerge branch 'master' of https://github.com/m-labs/migen
Sebastien Bourdeauducq [Sun, 5 Jul 2015 08:53:32 +0000 (10:53 +0200)]
Merge branch 'master' of https://github.com/m-labs/migen

9 years agoAllow using non-milkymist cables with UrJTAG.
Tim 'mithro' Ansell [Sun, 5 Jul 2015 08:43:40 +0000 (18:43 +1000)]
Allow using non-milkymist cables with UrJTAG.

9 years agomibuild: Adding error checking around xsvf generation
Tim 'mithro' Ansell [Thu, 2 Jul 2015 14:51:03 +0000 (16:51 +0200)]
mibuild: Adding error checking around xsvf generation

9 years agoAdding support for programming with FPGALink
Tim 'mithro' Ansell [Thu, 2 Jul 2015 14:44:39 +0000 (16:44 +0200)]
Adding support for programming with FPGALink

Steps for getting it set up.

 * Get libfpgalink dependencies
   sudo apt-get install \
      build-essential libreadline-dev libusb-1.0-0-dev python-yaml

 * Build libfpgalink
   wget -qO- http://tiny.cc/msbil | tar zxf -
   cd makestuff; ./scripts/msget.sh makestuff/common
   cd libs; ../scripts/msget.sh libfpgalink
   cd libfpgalink; make deps

 * Convert libfpgalink to python3
   wget -O - http://www.swaton.ukfsn.org/bin/2to3.tar.gz | tar zxf -
   cd examples/python
   cp fpgalink2.py fpgalink3.py
   ../../2to3/2to3 fpgalink3.py | patch fpgalink3.py

 * Set your path's correctly.

   export LD_LIBRARY_PATH=$(pwd)/libfpgalink/lin.x64/rel:$LD_LIBRARY_PATH
   export PYTHON_PATH=$(pwd)/libfpgalink/examples/python:$PYTHON_PATH

9 years agomibuild/xilinx: Adding programming with the Digilent Adept tools
Tim 'mithro' Ansell [Thu, 2 Jul 2015 14:03:44 +0000 (16:03 +0200)]
mibuild/xilinx: Adding programming with the Digilent Adept tools

9 years agomibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx...
Florent Kermarrec [Thu, 2 Jul 2015 07:32:33 +0000 (09:32 +0200)]
mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation

Fix DDROutput implementation on spartan6 (tested with LiteETH's GMII phy)

9 years agotravis: use use-local for conda install
Yann Sionneau [Mon, 29 Jun 2015 22:42:13 +0000 (00:42 +0200)]
travis: use use-local for conda install

http://conda.pydata.org/docs/build_tutorials/pkgs.html

9 years agoRemove self.programmer references in Mercury, as mercury programmer is not implemented.
William D. Jones [Sun, 28 Jun 2015 15:06:46 +0000 (11:06 -0400)]
Remove self.programmer references in Mercury, as mercury programmer is not implemented.

9 years agoAdd Mercury dev board to mibuild (http://www.micro-nova.com/mercury/)
William D. Jones [Sat, 20 Jun 2015 22:47:24 +0000 (18:47 -0400)]
Add Mercury dev board to mibuild (micro-nova.com/mercury/)

9 years agoMerge pull request #21 from psmears/patch-1
Sébastien Bourdeauducq [Wed, 24 Jun 2015 10:46:58 +0000 (10:46 +0000)]
Merge pull request #21 from psmears/patch-1

Minor improvements to wording

9 years agofhdl/specials: add Keep SynthesisDirective
Florent Kermarrec [Mon, 22 Jun 2015 22:35:58 +0000 (00:35 +0200)]
fhdl/specials: add Keep SynthesisDirective

9 years agobus/wishbone: remove size CSR from Cache (L2 size will be reported to the software...
Florent Kermarrec [Fri, 19 Jun 2015 06:37:16 +0000 (08:37 +0200)]
bus/wishbone: remove size CSR from Cache (L2 size will be reported to the software as a constant)

9 years agomibuild/xilinx/ise: fix source and set source to False by default on Windows (tools...
Florent Kermarrec [Thu, 18 Jun 2015 22:52:39 +0000 (00:52 +0200)]
mibuild/xilinx/ise: fix source and set source to False by default on Windows (tools supposed to be in the PATH)

9 years agomibuild/xilinx/ise: simplify default_ise_path
Florent Kermarrec [Thu, 18 Jun 2015 22:40:05 +0000 (00:40 +0200)]
mibuild/xilinx/ise: simplify default_ise_path

9 years agoXilinx Platforms now use cmd.exe on Windows instead of bash to run scripts
William D. Jones [Thu, 18 Jun 2015 22:30:22 +0000 (00:30 +0200)]
Xilinx Platforms now use cmd.exe on Windows instead of bash to run scripts
(remove MSYS dependency)

9 years agoMinor improvements to wording
psmears [Thu, 18 Jun 2015 11:26:22 +0000 (12:26 +0100)]
Minor improvements to wording

9 years agowishbone: add Cache (from WB2LASMI)
Florent Kermarrec [Wed, 17 Jun 2015 13:31:49 +0000 (15:31 +0200)]
wishbone: add Cache (from WB2LASMI)

9 years agopipistrello: fix FPGA speed grade
Yann Sionneau [Sun, 14 Jun 2015 21:19:27 +0000 (23:19 +0200)]
pipistrello: fix FPGA speed grade

9 years agomigen/bus/wishbone: add UpConverter and Converter wrapper (also rewrite DownConverter)
Florent Kermarrec [Tue, 2 Jun 2015 17:29:38 +0000 (19:29 +0200)]
migen/bus/wishbone: add UpConverter and Converter wrapper (also rewrite DownConverter)

9 years agomigen/genlib/fsm: fix delayed_enter when delay is negative (can happen when delay...
Florent Kermarrec [Tue, 2 Jun 2015 17:26:42 +0000 (19:26 +0200)]
migen/genlib/fsm: fix delayed_enter when delay is negative (can happen when delay is generated from others parameters)

9 years agogenlib/cdc: add BusSynchronizer
Sebastien Bourdeauducq [Tue, 2 Jun 2015 09:40:42 +0000 (17:40 +0800)]
genlib/cdc: add BusSynchronizer

9 years agosetup.py: valid version number (fixes issue #12)
Sebastien Bourdeauducq [Thu, 28 May 2015 07:43:31 +0000 (15:43 +0800)]
setup.py: valid version number (fixes issue #12)

9 years agofhdl/verilog: add reserved keywords
Florent Kermarrec [Sat, 23 May 2015 12:01:08 +0000 (14:01 +0200)]
fhdl/verilog: add reserved keywords

9 years agomigen/genlib/record: add leave_out parameter to connect
Florent Kermarrec [Fri, 22 May 2015 22:22:13 +0000 (00:22 +0200)]
migen/genlib/record: add leave_out parameter to connect

Modules doing dataflow adaptation often need to connect most of the signals between endpoints except the one concerned by the adaptation.
This new parameter ease that by avoid manual connection of all signals.

9 years agoexample of instance usage
Guy Hutchison [Tue, 19 May 2015 17:14:31 +0000 (01:14 +0800)]
example of instance usage

9 years agovpi: avoid some code duplication between windows and linux
Florent Kermarrec [Wed, 13 May 2015 08:48:08 +0000 (10:48 +0200)]
vpi: avoid some code duplication between windows and linux

9 years agomigen/actorlib/spi: apply missing CSR renaming
Florent Kermarrec [Wed, 13 May 2015 08:17:31 +0000 (10:17 +0200)]
migen/actorlib/spi: apply missing CSR renaming

9 years agovpi: cleanup (thanks sb)
Florent Kermarrec [Wed, 13 May 2015 08:13:14 +0000 (10:13 +0200)]
vpi: cleanup (thanks sb)

9 years agovpi: fix and simplify windows simulation (ends of msg were ignored)
Florent Kermarrec [Tue, 12 May 2015 23:20:57 +0000 (01:20 +0200)]
vpi: fix and simplify windows simulation (ends of msg were ignored)

9 years agoMerge branch 'master' of https://github.com/m-labs/migen
Florent Kermarrec [Tue, 12 May 2015 14:16:24 +0000 (16:16 +0200)]
Merge branch 'master' of https://github.com/m-labs/migen

9 years agomigen/genlib/misc: replace Timeout with WaitTimer from artiq
Florent Kermarrec [Tue, 12 May 2015 13:45:16 +0000 (15:45 +0200)]
migen/genlib/misc: replace Timeout with WaitTimer from artiq

9 years agotravis: install conda dependencies after activating the virtual env
Yann Sionneau [Tue, 12 May 2015 12:06:16 +0000 (14:06 +0200)]
travis: install conda dependencies after activating the virtual env

9 years agotravis: get-anaconda.sh does not take args anymore
Yann Sionneau [Tue, 12 May 2015 11:58:08 +0000 (13:58 +0200)]
travis: get-anaconda.sh does not take args anymore

9 years agoWindows simulation support
William D. Jones [Sat, 9 May 2015 13:09:32 +0000 (21:09 +0800)]
Windows simulation support

9 years agoise: move -user_new_parser to xst_opt
Robert Jordens [Fri, 8 May 2015 00:18:56 +0000 (18:18 -0600)]
ise: move -user_new_parser to xst_opt

9 years agomibuild/platforms/pipistrello: add _n suffix to usb fifo pins
Florent Kermarrec [Fri, 1 May 2015 13:49:33 +0000 (15:49 +0200)]
mibuild/platforms/pipistrello: add _n suffix to usb fifo pins

9 years agomibuild/platforms/minispartan6: rename ftdi_fifo to usb_fifo and fix rd_n/wr_n swap
Florent Kermarrec [Fri, 1 May 2015 13:48:42 +0000 (15:48 +0200)]
mibuild/platforms/minispartan6: rename ftdi_fifo to usb_fifo and fix rd_n/wr_n swap

9 years agodoc: remove cordic
Sebastien Bourdeauducq [Fri, 1 May 2015 06:07:38 +0000 (14:07 +0800)]
doc: remove cordic

9 years agoadd examples tests
Alain Péteut [Thu, 30 Apr 2015 16:49:58 +0000 (00:49 +0800)]
add examples tests

9 years agomigen/actorlib/packet: add Packetizer and Depacketizer
Florent Kermarrec [Tue, 28 Apr 2015 16:44:05 +0000 (18:44 +0200)]
migen/actorlib/packet: add Packetizer and Depacketizer

9 years agomigen/genlib: avoid use of floating point in reverse_bytes
Florent Kermarrec [Mon, 27 Apr 2015 19:04:18 +0000 (21:04 +0200)]
migen/genlib: avoid use of floating point in reverse_bytes

9 years agomigen/actorlib: add packet.py to manage dataflow packets (Arbiter, Dispatcher, Header...
Florent Kermarrec [Mon, 27 Apr 2015 13:14:38 +0000 (15:14 +0200)]
migen/actorlib: add packet.py to manage dataflow packets (Arbiter, Dispatcher, Header definitions, Buffer)

9 years agomigen/actorlib/misc: add BufferizeEndpoints
Florent Kermarrec [Mon, 27 Apr 2015 13:12:01 +0000 (15:12 +0200)]
migen/actorlib/misc: add BufferizeEndpoints

BufferizeEndpoints provides an easy way improve timings of chained dataflow modules and avoid polluting code with internals buffers.

9 years agomigen/genlib/misc: add reverse_bytes
Florent Kermarrec [Mon, 27 Apr 2015 13:08:10 +0000 (15:08 +0200)]
migen/genlib/misc: add reverse_bytes

9 years agoAdd a command line option (-use_new_parser yes) to Xilinx XST to force use of the...
William D. Jones [Sat, 25 Apr 2015 12:29:08 +0000 (08:29 -0400)]
Add a command line option (-use_new_parser yes) to Xilinx XST to force use of the newer parser for older FPGAs.

9 years agomigen/test: for now desactivate test_generic_syntax (travis-ci's Verilator needs...
Florent Kermarrec [Fri, 24 Apr 2015 11:24:52 +0000 (13:24 +0200)]
migen/test: for now desactivate test_generic_syntax (travis-ci's Verilator needs to be upgraded?)

9 years agomigen/fhdl/verilog: _printheader/_printcomb, remove default value of arguments which...
Florent Kermarrec [Fri, 24 Apr 2015 10:54:08 +0000 (12:54 +0200)]
migen/fhdl/verilog: _printheader/_printcomb, remove default value of arguments which are not used in internal functions. (thanks sb)

9 years agomigen/fhdl: give explicit names to syntax specialization when asic_syntax is used
Florent Kermarrec [Fri, 24 Apr 2015 10:14:14 +0000 (12:14 +0200)]
migen/fhdl: give explicit names to syntax specialization when asic_syntax is used

9 years agomigen/test: rename asic_syntax to test_syntax and simplify
Florent Kermarrec [Fri, 24 Apr 2015 10:00:46 +0000 (12:00 +0200)]
migen/test: rename asic_syntax to test_syntax and simplify

9 years agotravis: add conda package generation and upload + build doc
Yann Sionneau [Tue, 21 Apr 2015 18:26:40 +0000 (20:26 +0200)]
travis: add conda package generation and upload + build doc

9 years agoAdd conda recipe for Migen
Yann Sionneau [Tue, 17 Mar 2015 16:58:45 +0000 (17:58 +0100)]
Add conda recipe for Migen

9 years agodoc: fix warnings during doc build
Yann Sionneau [Wed, 22 Apr 2015 12:31:42 +0000 (14:31 +0200)]
doc: fix warnings during doc build

9 years agotravis: install verilator
Guy Hutchison [Wed, 22 Apr 2015 04:29:59 +0000 (12:29 +0800)]
travis: install verilator

9 years agotest: add test for asic_syntax
Guy Hutchison [Wed, 22 Apr 2015 04:28:46 +0000 (12:28 +0800)]
test: add test for asic_syntax

9 years agoadd Travis CI badge
Alain Péteut [Tue, 21 Apr 2015 14:58:24 +0000 (16:58 +0200)]
add Travis CI badge

9 years agofhdl/verilog: add flag to produce ASIC-friendly output
Guy Hutchison [Tue, 21 Apr 2015 01:51:39 +0000 (09:51 +0800)]
fhdl/verilog: add flag to produce ASIC-friendly output

9 years agoFixing shadowing of global index function.
Tim 'mithro' Ansell [Sun, 19 Apr 2015 06:54:57 +0000 (16:54 +1000)]
Fixing shadowing of global index function.

Fixes the following warnings;
```
cc -Wall -O2  -fPIC -Wall -Wshadow -g -O2 -fstack-protector --param=ssp-buffer-size=4 -Wformat -Wformat-security -I/usr/include/iverilog -c  -o ipc.o ipc.c
ipc.c: In function ‘ipc_receive’:
ipc.c:98:17: warning: declaration of ‘index’ shadows a global declaration [-Wshadow]
ipc.c:113:17: warning: declaration of ‘index’ shadows a global declaration [-Wshadow]
```

Fixes https://github.com/m-labs/migen/issues/14

9 years agomibuild/altera: cleanup
Sebastien Bourdeauducq [Mon, 20 Apr 2015 09:17:34 +0000 (17:17 +0800)]
mibuild/altera: cleanup

9 years agoRevert "add I/O standard definitions to mibuild/altera"
Sebastien Bourdeauducq [Mon, 20 Apr 2015 08:22:32 +0000 (16:22 +0800)]
Revert "add I/O standard definitions to mibuild/altera"

This reverts commit a889b4106084cd781eb0faf2482a83acfea9700e.

9 years agoadd I/O standard definitions to mibuild/altera
Alain Péteut [Mon, 20 Apr 2015 08:08:47 +0000 (10:08 +0200)]
add I/O standard definitions to mibuild/altera

9 years agoadd differential in/out support to mibuild/altera
Alain Péteut [Mon, 20 Apr 2015 08:06:24 +0000 (10:06 +0200)]
add differential in/out support to mibuild/altera

9 years agosome PEP8 cosmetic
Alain Péteut [Mon, 20 Apr 2015 08:03:08 +0000 (10:03 +0200)]
some PEP8 cosmetic

9 years agoplatforms/kc705: add PCIe pins
Florent Kermarrec [Thu, 16 Apr 2015 22:51:16 +0000 (00:51 +0200)]
platforms/kc705: add PCIe pins

9 years agomibuild: add support for libraries, move .replace("\\", "/") to generic_platform...
Florent Kermarrec [Thu, 16 Apr 2015 11:07:28 +0000 (13:07 +0200)]
mibuild: add support for libraries, move .replace("\\", "/") to generic_platform.py and execute it only on Windows machines.

We need to support libraries when Migen is used as a wrapper on large VHDL designs using libraries.

9 years agotravis: disable email notification
Sebastien Bourdeauducq [Tue, 14 Apr 2015 15:45:33 +0000 (23:45 +0800)]
travis: disable email notification

9 years agotravis: add IRC notification
Sebastien Bourdeauducq [Tue, 14 Apr 2015 15:30:52 +0000 (23:30 +0800)]
travis: add IRC notification

9 years agoUsing a newer version of iverilog.
Tim 'mithro' Ansell [Tue, 14 Apr 2015 08:28:57 +0000 (18:28 +1000)]
Using a newer version of iverilog.

9 years agoMakefile now uses iverilog-vpi
Tim 'mithro' Ansell [Tue, 14 Apr 2015 08:28:56 +0000 (18:28 +1000)]
Makefile now uses iverilog-vpi

From `man iverilog-vpi`;
> iverilog-vpi is a tool to simplify the compilation of VPI modules for use
> with Icarus Verilog. It takes on the command line a list of C or C++ source
> files, and generates as output a linked VPI module.

Fixes https://github.com/m-labs/migen/issues/11

9 years agoAdding .egg-info to the .gitignore
Tim 'mithro' Ansell [Tue, 14 Apr 2015 08:28:55 +0000 (18:28 +1000)]
Adding .egg-info to the .gitignore

9 years agoAdding simple travis-ci build.
Tim 'mithro' Ansell [Tue, 14 Apr 2015 08:28:54 +0000 (18:28 +1000)]
Adding simple travis-ci build.

Fixes https://github.com/m-labs/migen/issues/10

9 years agoREADME: add link to online docs
Sebastien Bourdeauducq [Tue, 14 Apr 2015 15:08:21 +0000 (23:08 +0800)]
README: add link to online docs

9 years agoExpanding the install instructions a little.
Tim 'mithro' Ansell [Tue, 14 Apr 2015 08:24:28 +0000 (18:24 +1000)]
Expanding the install instructions a little.

This is based on the discussion at https://github.com/m-labs/misoc/issues/6

9 years agorevert fhdl/verilog: avoid reg initialization in printheader when reset is not an...
Florent Kermarrec [Mon, 13 Apr 2015 19:47:55 +0000 (21:47 +0200)]
revert fhdl/verilog: avoid reg initialization in printheader when reset is not an int. (sorry merge issue)

9 years agomibuild/lattice: adapt diamond to last Migen changes
Florent Kermarrec [Mon, 13 Apr 2015 19:40:58 +0000 (21:40 +0200)]
mibuild/lattice: adapt diamond to last Migen changes

9 years agoglobal: more pep8
Florent Kermarrec [Mon, 13 Apr 2015 19:33:44 +0000 (21:33 +0200)]
global: more pep8
we will have to continue the work... volunteers are welcome :)

9 years agoglobal: pep8 (E265)
Florent Kermarrec [Mon, 13 Apr 2015 19:22:46 +0000 (21:22 +0200)]
global: pep8 (E265)

9 years agoglobal: pep8 (E261, E271)
Florent Kermarrec [Mon, 13 Apr 2015 19:21:30 +0000 (21:21 +0200)]
global: pep8 (E261, E271)

9 years agoglobal: pep8 (E225)
Florent Kermarrec [Mon, 13 Apr 2015 19:11:13 +0000 (21:11 +0200)]
global: pep8 (E225)

9 years agoglobal: pep8 (E222)
Florent Kermarrec [Mon, 13 Apr 2015 18:55:21 +0000 (20:55 +0200)]
global: pep8 (E222)

9 years agoglobal: pep8 (E401)
Florent Kermarrec [Mon, 13 Apr 2015 18:54:19 +0000 (20:54 +0200)]
global: pep8 (E401)

9 years agoglobal: pep8 (E231)
Florent Kermarrec [Mon, 13 Apr 2015 18:50:03 +0000 (20:50 +0200)]
global: pep8 (E231)

9 years agoglobal: pep8 (E302)
Florent Kermarrec [Mon, 13 Apr 2015 18:45:35 +0000 (20:45 +0200)]
global: pep8 (E302)

9 years agoglobal: pep8 (replace tabs with spaces)
Florent Kermarrec [Mon, 13 Apr 2015 18:07:07 +0000 (20:07 +0200)]
global: pep8 (replace tabs with spaces)

9 years agoMerge branch 'master' of https://github.com/m-labs/migen
Florent Kermarrec [Mon, 13 Apr 2015 07:37:03 +0000 (09:37 +0200)]
Merge branch 'master' of https://github.com/m-labs/migen

9 years agosim: fix to support ConvOutput
Sebastien Bourdeauducq [Sun, 12 Apr 2015 06:06:57 +0000 (14:06 +0800)]
sim: fix to support ConvOutput

9 years agofhdl/verilog: avoid reg initialization in printheader when reset is not an int.
Florent Kermarrec [Fri, 10 Apr 2015 15:18:07 +0000 (17:18 +0200)]
fhdl/verilog: avoid reg initialization in printheader when reset is not an int.

We should be able to reset a signal with the value of another one. Without this change it's not possible to do so since synthesis tools do not support initializing a signal from another one.

9 years agoAdd example of hamming generator and checker instances
Guy Hutchison [Thu, 9 Apr 2015 00:24:09 +0000 (17:24 -0700)]
Add example of hamming generator and checker instances

--089e01294e809a874205133faa19
Content-Type: text/plain; charset=UTF-8

<div dir="ltr"><br></div>

9 years agostrace_tailor: make more generic, cleanup
Robert Jordens [Thu, 9 Apr 2015 21:17:19 +0000 (15:17 -0600)]
strace_tailor: make more generic, cleanup

9 years agoforgot other cordic files
Sebastien Bourdeauducq [Thu, 9 Apr 2015 04:00:20 +0000 (12:00 +0800)]
forgot other cordic files

9 years agointroduce conversion output object (prevents file IO in FHDL backends)
Sebastien Bourdeauducq [Wed, 8 Apr 2015 12:28:23 +0000 (20:28 +0800)]
introduce conversion output object (prevents file IO in FHDL backends)

9 years agomibuild/tools/write_to_file: use context manager
Sebastien Bourdeauducq [Wed, 8 Apr 2015 11:41:54 +0000 (19:41 +0800)]
mibuild/tools/write_to_file: use context manager

9 years agogenlib: remove cordic (will live in pdq2)
Sebastien Bourdeauducq [Wed, 8 Apr 2015 03:35:53 +0000 (11:35 +0800)]
genlib: remove cordic (will live in pdq2)

9 years agodecorators: remove deprecated semantics
Robert Jordens [Sun, 5 Apr 2015 09:49:07 +0000 (03:49 -0600)]
decorators: remove deprecated semantics

9 years agodecorators: fix stacklevel, export in std
Robert Jordens [Sun, 5 Apr 2015 09:49:06 +0000 (03:49 -0600)]
decorators: fix stacklevel, export in std

9 years agodecorators: fix ControlInserter
Robert Jordens [Sun, 5 Apr 2015 06:20:23 +0000 (00:20 -0600)]
decorators: fix ControlInserter

9 years agofhdl/visit: remove TransformModule
Sebastien Bourdeauducq [Sat, 4 Apr 2015 12:12:22 +0000 (20:12 +0800)]
fhdl/visit: remove TransformModule

9 years agodecorators: fix class/instance logic
Robert Jordens [Fri, 3 Apr 2015 20:55:20 +0000 (14:55 -0600)]
decorators: fix class/instance logic

9 years agofhdl/decorators: make the transform logic more idiomatic
Robert Jordens [Thu, 2 Apr 2015 20:28:19 +0000 (14:28 -0600)]
fhdl/decorators: make the transform logic more idiomatic

* the transformers work on classes and instances.
  you can now do just do:

    @ResetInserter()
    @ClockDomainRenamer({"sys": "new"})
    class Foo(Module):
        pass

  or:

    a = ResetInserter()(FooModule())

* the old usage semantics still work
* the old DecorateModule is deprecated,
  ModuleDecorator has been refactored into ModuleTransformer
  (because it not only decorates things)

9 years agovivado: support phys_opt
Robert Jordens [Fri, 3 Apr 2015 20:55:23 +0000 (14:55 -0600)]
vivado: support phys_opt

9 years agovivado: add support for pre_synthesis_commands
Robert Jordens [Fri, 3 Apr 2015 20:55:22 +0000 (14:55 -0600)]
vivado: add support for pre_synthesis_commands