Alyssa Rosenzweig [Fri, 21 Aug 2020 19:54:10 +0000 (15:54 -0400)]
panfrost: XMLify the rest of shader_meta
This contains a bit of everything, so just XML for this commit. The rest
of the series will be slowly moving over to this representation.
The one noteworthy addition is the rename of "No MSAA" to
"Single-sampled lines". This came about due to a buggy branch that
forgot to set this bit. Ths worked, with the caveat of the following
tests failing with a single-sampled framebuffer:
dEQP-GLES2.functional.rasterization.interpolation.basic.line_loop_wide
dEQP-GLES2.functional.rasterization.interpolation.basic.line_strip_wide
dEQP-GLES2.functional.rasterization.interpolation.basic.lines_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_loop_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.line_strip_wide
dEQP-GLES2.functional.rasterization.interpolation.projected.lines_wide
dEQP-GLES2.functional.rasterization.primitives.line_loop
dEQP-GLES2.functional.rasterization.primitives.line_loop_wide
dEQP-GLES2.functional.rasterization.primitives.line_strip
dEQP-GLES2.functional.rasterization.primitives.line_strip_wide
dEQP-GLES2.functional.rasterization.primitives.lines
dEQP-GLES2.functional.rasterization.primitives.lines_wide
That is, this bit controls the behaviour of line rasterization with
multisampling. This is required to implement the divergent behaviours
described in the OpenGL ES 3.2 specification sections 13.6.1 ("Basic
Line Segment Rasterization") and 13.6.4 ("Line Multisample
Rasterization"), where setting this bit corresponds to the former
(single-sampled) behaviour.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 18:35:35 +0000 (14:35 -0400)]
panfrost: Use preuploaded shader descriptors
For non-fragment shaders, we can just use the preuploaded BO as-is and
do no packing/copying at draw-time. Fragment shaders are still a bit of
an edge case, in having rasterizer/zsa/blend state in the same
descriptor, but now we can specialize that path further for
fragment-only.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 18:16:18 +0000 (14:16 -0400)]
panfrost: Upload shader descriptors at CSO create
Now that we've fixed all the implicit state dependencies, these don't
change after the variant is created.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 17:42:55 +0000 (13:42 -0400)]
panfrost: Allocate a state uploader
We'd like to uploader some descriptors at CSO time.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Mon, 24 Aug 2020 20:51:12 +0000 (16:51 -0400)]
panfrost: Ensure shader-db state is zero-initialized
Otherwise the next commit will invoke undefined behaviour.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 17:22:11 +0000 (13:22 -0400)]
panfrost: Simplify shaderless packing
Let's keep all the shader descriptor stuff together.
Note that the packing here can be constant folded entirely in any
reasonable compiler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 17:14:09 +0000 (13:14 -0400)]
panfrost: Prepack fragment properties/preload
This isn't as clean as vertex shaders, since some of this state is only
known at draw-time (e.g. some reasons we might disable early-Z). But we
can still pack as much as we can ahead-of-time and then OR together
what's left at draw-time.
Thank you to Kristian for this one crazy trick (blob developers hate
it! er...)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 16:34:24 +0000 (12:34 -0400)]
panfrost: Pack vertex properties when compiling
They only depend on shader properties so we can do all this work at CSO
create time, reducing draw-time overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 14:42:59 +0000 (10:42 -0400)]
panfrost: Derive UBO count from shader_info
Rather than checking against the bound constant buffers. Like
with num_textures, this eliminates a dependency of the shader descriptor
on the context, which matters especially for vertex/compute shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 14:34:06 +0000 (10:34 -0400)]
panfrost: XMLify beginning of shader descriptor
We have just enough abstracted now to pack this ahead-of-time, during
the CSO create, instead of at draw-time. But it's only a start.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 14:03:15 +0000 (10:03 -0400)]
panfrost: Derive texture/sampler_count from shader
This avoids a dependency of the shader descriptor on the texture/sampler
state, which simplifies state management. It also fixes pandecode
warnings where textures/samplers are specified but not referenced.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 13:36:14 +0000 (09:36 -0400)]
panfrost: Quiet pandecode error
The smallest job descriptor is smaller than 256, and with the
tighter packing, pandecode can sometimes error nowadays.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 13:22:34 +0000 (09:22 -0400)]
panfrost: Support SHADERLESS mode everywhere
Now that the missing bits on SFBD are identified, and we have a
reasonable way to pack the properties for Bifrost, we can probably do
this everywhere to generalize the optimization and drop the quirk.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 13:12:54 +0000 (09:12 -0400)]
panfrost: Identify additional SFBD flags
These are analogues to the flags we have in the blend structure on
T760+, which enables us to fix shaderless and sRGB operation on T720.
Closes #2771
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: a64599a303e ("panfrost: Pass the sampler view format when creating a tex descriptor")
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 00:42:32 +0000 (20:42 -0400)]
panfrost: XMLify Bifrost preload
There's a lot of code here since the meaning of this field changes
depending on shader state. The good news is that our careful handling
allows preload registers to be decoded now, which pandecode could not
previously do. Likewise, the cmdstream code to emit this is now much
more obvious.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 23:31:00 +0000 (19:31 -0400)]
panfrost: Group SFBD code tighter
Allows us to drop the redundant check by reordering, and will match the
conventions we'll use once the whole structure is XMLified.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 20:46:04 +0000 (16:46 -0400)]
panfrost: Drop redundant NULL check
ctx->blend is already dereferenced by this point anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 20:41:41 +0000 (16:41 -0400)]
panfrost: XMLify bifrost1
It's so poorly understood there's not much to do in this commit, sadly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 20:25:14 +0000 (16:25 -0400)]
panfrost: Remove midgard1 bitfield
It is now entirely XML, including for decoding. Woo!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 19:57:59 +0000 (15:57 -0400)]
panfrost: Simplify bind_blend_state
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 19:52:32 +0000 (15:52 -0400)]
panfrost: Fold work_count packing for blend shaders
It's annoying this is needed at all, but that's life for you.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 12:11:04 +0000 (08:11 -0400)]
panfrost: Use pack for shaderless
We'll need a more aggressive refactor for this soon, I think.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Thu, 20 Aug 2020 12:06:39 +0000 (08:06 -0400)]
panfrost: Use packs for fragment properties
A bit more complicated, since there are dependencies on other state (for
early-z and discard handling). We separate this cleanly to help defer
packing later.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 20:40:22 +0000 (16:40 -0400)]
panfrost: Pack compute Midgard properties
Now that we have XML for it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 20:32:26 +0000 (16:32 -0400)]
panfrost: XMLify Midgard properties
In a long journey to a full XML representation of mali_shader_meta,
let's start with the fourth word, containing some shader properties.
This is a translation from panfrost-job.h, with the exception of
widening the uniform buffer count field [1]
The other noteworthy change is combining the unknown 0x20 flag with the
WRITES_Z flag to form a 2-bit depth source. This papers over the fact
that the blob zeroes this field for non-fragment shaders. Given the
proximity, this is a reasonable guess and avoids an ugly "is_fragment"
bit.
[1] Justified by the increased limit advertised by the Vulkan blob
(maxDescriptorSetUniformBuffers on
https://vulkan.gpuinfo.org/displayreport.php?id=5602#limits). Not
actually supported in Panfrost right now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 19:53:23 +0000 (15:53 -0400)]
panfrost: Group SFBD state together
By proximity with the other fields.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 19:50:25 +0000 (15:50 -0400)]
panfrost: Clean up blend shader errata handling
The cases of SFBD blend shaders (which work normally) and MFBD blend
shaders (which need a bizarre errata workaround) are distinct. Let's
seperate them to make each a bit clearer.
Since this field is repurposed on Bifrost, this should fix bugs there
too (although blend shaders on Bifrost are currently todo).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 14:34:05 +0000 (10:34 -0400)]
panfrost: Rename shader emit functions
Now they handle everything in one go, so there's no init to speak of.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 14:25:32 +0000 (10:25 -0400)]
panfrost: Specialize compute vs frag shader init
In exchange for a bit of code duplication, we can streamline both
routines. A huge amount of the descriptor is unused for non-fragment
shaders, and even some of the parts that are used appear to have varying
meanings. Given we want to emit the descriptors atomically, this seems
like a reasonable tradeoff.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 14:13:59 +0000 (10:13 -0400)]
panfrost: Bake the initial tag into the shader pointer
No need to do this at draw-time.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 13:52:02 +0000 (09:52 -0400)]
panfrost: Clamp shader->uniform_count
Rather than passing the clamp out-of-band to be done at draw-time, just
handle it together in pan_assemble.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 13:48:40 +0000 (09:48 -0400)]
panfrost: Size UBO#0 accurately
We explicitly calculated its size as (sysvals + uniforms). We don't need
to check the shader metadata for that.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Wed, 19 Aug 2020 13:27:42 +0000 (09:27 -0400)]
panfrost: Combine frag_shader_meta_init functions
In order to pack a given structure atomically, we need to group state
together. Since this all affects shader_meta, we'll move it closer
together in the code. This unfortunately creates a "monster" function,
but it's still less code and better organized overall.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Tue, 18 Aug 2020 22:15:45 +0000 (18:15 -0400)]
panfrost: XMLify blend equation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Tue, 18 Aug 2020 21:51:22 +0000 (17:51 -0400)]
panfrost: Honour load_dest/opaque flags
Let's split them out and work out the metadata at CSO time.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Tue, 18 Aug 2020 21:50:39 +0000 (17:50 -0400)]
panfrost: Simplify make_fixed_blend_mode prototype
blend_rt is a bitfield so in practice it will be quite small, let's save
the indirection.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Tue, 18 Aug 2020 21:06:01 +0000 (17:06 -0400)]
panfrost: XMLify blend flags
Shared between Midgard/Bifrost. We get printing this way!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Tue, 18 Aug 2020 20:50:38 +0000 (16:50 -0400)]
panfrost: Separate shader/blend descriptor emits
They are different logic data structures, so let's not introduce a false
dependency.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Tue, 18 Aug 2020 20:43:38 +0000 (16:43 -0400)]
panfrost: Hoist blend finalize calls
To prepare for a split.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Sat, 22 Aug 2020 00:22:33 +0000 (20:22 -0400)]
panfrost: Decode nested structs correctly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 75cc5b8c292 ("panfrost: Adopt gen_pack_header.py via v3d")
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Alyssa Rosenzweig [Fri, 21 Aug 2020 13:31:43 +0000 (09:31 -0400)]
pan/decode: Drop legacy 32-bit job support
We already dropped support for this a long time ago, this is a vestigial
artefact that we missed.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>
Eric Engestrom [Tue, 21 Jan 2020 23:52:47 +0000 (23:52 +0000)]
scons: bump c++ standard to 14 to match meson
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1845
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3500>
Samuel Pitoiset [Tue, 25 Aug 2020 09:45:10 +0000 (11:45 +0200)]
radv: allocate the TMA BO into 32-bit addr space
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6453>
Samuel Pitoiset [Tue, 25 Aug 2020 09:42:32 +0000 (11:42 +0200)]
radv: align the TMA BO size to 256
The hardware requires 256 byte-aligned address.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6453>
Rohan Garg [Tue, 10 Mar 2020 17:52:28 +0000 (18:52 +0100)]
gitlab-ci: Test the traces from bgfx
bgfx is a corss-platform graphics API which ships with
a bunch of examples. Let's capture renderdoc traces of
these examples and test them.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4162>
Marcin Ślusarz [Mon, 24 Aug 2020 19:13:50 +0000 (21:13 +0200)]
mesa: fix formatting of messages printed using _mesa_log
... on BOTH _WIN32 and !_WIN32
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6443>
Lionel Landwerlin [Fri, 21 Aug 2020 20:13:06 +0000 (23:13 +0300)]
anv: fix transform feedback surface size
Non multiple 4 sizes are causing issue in particular < 4.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3450
Fixes: 36ee2fd61c8f ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6430>
Woody Chow [Wed, 19 Aug 2020 05:19:12 +0000 (14:19 +0900)]
st/mesa: Fix EGLImageTargetTexture2D for GL_TEXTURE_2D
Before this change, internalFormat was defaulted to GL_RGBA (
unsized internal format). Therefore, subsequent glTexSubImage2D
call with type != GL_UNSIGNED_BYTE, GL_UNSIGNED_SHORT_4_4_4_4 or
GL_UNSIGNED_SHORT_5_5_5_1 would give GL_INVALID_OPERATION.
This fixes
android.graphics.cts.BitmapColorSpaceTest#test16bitHardware
android.graphics.cts.ImageDecoderTest#testDecodeBitmap*
android.graphics.cts.BitmapTest#testNdkFormatsHardware
in CtsGraphicsTestCases
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6382>
Vinson Lee [Thu, 20 Aug 2020 01:56:19 +0000 (18:56 -0700)]
meson: Fix lmsensors warning message.
Fixes: 138c003d2273 ("meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6397>
Eric Anholt [Thu, 20 Aug 2020 23:43:16 +0000 (16:43 -0700)]
freedreno: Drop UNIFORM_BUFFER_OFFSET_ALIGNMENT to 32
This is the value exposed by the a3xx-a4xx drivers according to an
official Adreno OpenGL ES Developer guide I found, and also a report I saw
for a5xx while googling. Fixes renderdoc replay of a manhattan31 trace
captured on a Pixel 3a.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6416>
Daniel Schürmann [Thu, 18 Jun 2020 14:14:20 +0000 (15:14 +0100)]
nir,amd: remove trinary_minmax opcodes
These consist of the variations nir_op_{i|u|f}{min|max|med}3 which are either
lowered in the backend (LLVM) anyway or can be recombined by the backend (ACO).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6421>
Rob Clark [Fri, 21 Aug 2020 22:58:37 +0000 (15:58 -0700)]
freedreno: handle case of shadowing current render target
If you have a sequence where there is a single buffer associated with
the current render target, and then you end up shadowing it on the 3d
pipe (u_blitter), because of how we swap the new shadow and rsc before
the back-blit, you could end up confusing things into thinking that
the blitters framebuffer state is the same as the current framebuffer
state.
Re-organizing the sequence to swap after the blit is complicated when
also having to deal with CPU memcpy blit path, and the batch/rsc
accounting. So instead just detect this case and flush if we need to.
Fixes:
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6434>
Rob Clark [Fri, 21 Aug 2020 19:50:34 +0000 (12:50 -0700)]
freedreno: add debug helper to dump buffers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6434>
Rob Clark [Fri, 21 Aug 2020 14:52:33 +0000 (07:52 -0700)]
freedreno/a6xx: refactor debug logging
Break it out into a helper fxn, and cleanup the copy/pasta. Also, add
something so we can tell when src and/or dst are UBWC.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6434>
Marek Olšák [Sat, 22 Aug 2020 10:28:52 +0000 (06:28 -0400)]
gallium/tgsi: add helper tgsi_get_interp_mode
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Fri, 14 Aug 2020 05:32:00 +0000 (01:32 -0400)]
st/mesa: handle lowered IO in st_nir_assign_vs_in_locations
There are piglit failures without this.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Wed, 12 Aug 2020 15:09:43 +0000 (11:09 -0400)]
st/mesa: don't generate NIR for ARB_vp/fp if NIR is not preferred
Fixes: 5d0630e5043fc2 "st/mesa: call prog_to_nir sooner for ARB_fp"
Fixes: a3de63fbb3d63e "st/mesa: don't generate VS TGSI if NIR is enabled"
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Fri, 14 Aug 2020 05:30:49 +0000 (01:30 -0400)]
st/mesa: don't pass NIR to draw module if IO is lowered
The draw module can't handle it.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Thu, 13 Aug 2020 14:27:57 +0000 (10:27 -0400)]
nir: generate lowered IO in nir_lower_passthrough_edgeflags
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Thu, 13 Aug 2020 19:14:19 +0000 (15:14 -0400)]
nir: add interpolation qualifiers for color sysvals into shader_info
needed by radeonsi
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Fri, 14 Aug 2020 23:13:52 +0000 (19:13 -0400)]
nir: add shader_info::io_lowered
This will drive decisions in many NIR passes and st/mesa.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Fri, 14 Aug 2020 05:54:19 +0000 (01:54 -0400)]
nir: properly identify texcoords for lowered IO in nir_lower_drawpixels
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Fri, 14 Aug 2020 23:34:27 +0000 (19:34 -0400)]
nir: print IO semantics (v2)
v2: print GS streams readably
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Fri, 14 Aug 2020 23:33:50 +0000 (19:33 -0400)]
nir: update IO semantics in nir_io_add_const_offset_to_base
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Fri, 14 Aug 2020 23:31:46 +0000 (19:31 -0400)]
nir: gather all IO info from IO intrinsics
nir_io_add_const_offset_to_base will shrink num_slots, so it's better to
call it before nir_shader_gather_info.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Marek Olšák [Wed, 12 Aug 2020 03:48:12 +0000 (23:48 -0400)]
nir: save IO semantics in lowered IO intrinsics
This enables drivers and utils to get all IO information from intrinsics,
so that they don't have to walk the complex types of NIR variables to find
out other information about IO intrinsics.
NIR in/out variables can be removed after nir_lower_io. We could remove
the variables in the pass, but for now I just decided to remove
the variables in radeonsi before shaders are returned to st/mesa.
(st/mesa just needs adjustments to work without NIR in/out variables)
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>
Lionel Landwerlin [Mon, 24 Aug 2020 10:52:59 +0000 (13:52 +0300)]
intel/perf: fix raw query kernel metric selection
The raw query is meant to be used with MDAPI [1]. When using this
metric without this library, we usually selected the TestOa metric to
provide some default sensible values (instead of undefined).
Historically this TestOa metric lived in the kernel at ID=1. We
removed all metrics from the kernel in kernel commit
9aba9c188da136
("drm/i915/perf: remove generated code").
This fixes the Mesa code to use a valid metric set ID (1 could work
some of the time, but not guaranteed).
[1] : https://github.com/intel/metrics-discovery
v2: Store fallback metric at init time
v3: Drop TestOa lookout
v4: Skip the existing queries (Marcin)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: <mesa-stable@lists.freedesktop.org>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6438>
Lionel Landwerlin [Mon, 24 Aug 2020 13:42:42 +0000 (16:42 +0300)]
intel/perf: store query symbol name
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6438>
Eric Anholt [Fri, 21 Aug 2020 20:37:07 +0000 (13:37 -0700)]
nir/load_store_vectorizer: Clean up unit test swizzle assertions.
They're hard to write and read, so put together a little helper to clean
up both the code and the gtest output on failure.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6431>
Eric Anholt [Tue, 18 Aug 2020 22:45:02 +0000 (15:45 -0700)]
freedreno/ir3: Replace our custom vec4 UBO intrinsic with the shared lowering.
This gets us fewer comparisons in the shaders that we need to optimize
back out, and reduces backend code.
total instructions in shared programs:
11547270 ->
7219930 (-37.48%)
total full in shared programs: 334268 -> 319602 (-4.39%)
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>
Eric Anholt [Tue, 18 Aug 2020 18:38:41 +0000 (11:38 -0700)]
nir: Add a lowering pass for backends wanting load_ubo with vec4 offsets.
This is very common for backends -- r600, freedreno, and nir_to_tgsi all
needed versions of it. Make a common intrinsic to use for it with a
shared, slightly-tuned-from-ir3 lowering pass.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>
Eric Anholt [Fri, 21 Aug 2020 18:21:33 +0000 (11:21 -0700)]
nir: Add nir_[iu]shr_imm and nir_udiv_imm helpers and use them.
I was doing math manually in a lowering pass for converting a division to
a ushr, and this will let the pass be expressed more naturally.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>
Eric Anholt [Fri, 21 Aug 2020 18:15:24 +0000 (11:15 -0700)]
nir: Make the nir_builder *_imm helpers consistently handle bit size.
We always want to demote the y to the bit size of the ssa def, but also
want to sanity check that our input and our masking is big enough.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>
Timur Kristóf [Sat, 22 Aug 2020 18:45:54 +0000 (20:45 +0200)]
aco: Fix convert_to_SDWA when instruction has 3 operands.
Previously, when the instruction had 3 operands, this would cause
possible corruption because of writing to sdwa->sel[2].
This was noticed thanks to GCC 10's -Wstringop-overflow warning.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6436>
Timur Kristóf [Sat, 22 Aug 2020 18:41:45 +0000 (20:41 +0200)]
aco: Fix unused variable warning by adding ASSERTED.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6436>
Alyssa Rosenzweig [Thu, 20 Aug 2020 15:45:53 +0000 (11:45 -0400)]
r300: Use util_blend_factor_uses_dest
v2: Fix missing { and #include (trivial)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>
Alyssa Rosenzweig [Thu, 20 Aug 2020 15:35:39 +0000 (11:35 -0400)]
si: Use util_blend_factor_uses_dest
Driver-local copy is redundant.
v2: Fix missing #include (trivial)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>
Alyssa Rosenzweig [Thu, 20 Aug 2020 15:45:38 +0000 (11:45 -0400)]
gallium: Add util_blend_uses_dest helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>
Alyssa Rosenzweig [Tue, 18 Aug 2020 21:28:38 +0000 (17:28 -0400)]
gallium: Add util_blend_factor_uses_dest helper
Drivers may be able to optimize cases where blending is enabled but the
destination colour is not used. This helps detect that case.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>
Samuel Pitoiset [Tue, 18 Aug 2020 16:52:35 +0000 (18:52 +0200)]
radv: use the trap handler to detect faulty shaders/instructions
It should reliably report the faulty shader but the faulty instruction
is inacurate, especially for memory violations because it's reported
when the addr is processed. It will be improved by emitting more
wait-states.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Tue, 18 Aug 2020 06:49:11 +0000 (08:49 +0200)]
radv: enable the trap handler and configure the shader exceptions
When TRAP_PRESENT is not enabled, all traps and exceptions are ignored.
Only EXCP_EN.mem_viol is currently supported because the other
exceptions have to be tested/validated first.
EXCP_EN.mem_viol is used to detect any sort of invalid memory
access like VM fault. When a memory violation is reported, the
hw jumps to the trap handler.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Tue, 18 Aug 2020 16:51:46 +0000 (18:51 +0200)]
radv: add initial trap handler support with RADV_TRAP_HANDLER=1
A trap handler is used to handle shader exceptions like memory
violations, divide by zero etc. The trap handler shader code will
help to identify the faulty shader/instruction and to report
more information for better debugging.
This has only been tested on GFX8, though it should work on GFX6-GFX7.
It seems we need a different implemenation for GFX9+.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Tue, 18 Aug 2020 16:44:07 +0000 (18:44 +0200)]
radv: add a small interface for creating the trap handler shader
Similar to the GS copy shader except that NIR is unused because
the shader is written directly using ACO IR.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Fri, 21 Aug 2020 09:33:22 +0000 (11:33 +0200)]
aco: skip unnecessary compiler pass for the trap handler program
The shader is written by hands with assigned registers, so most of
the pass are unnecessary.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Tue, 18 Aug 2020 16:39:20 +0000 (18:39 +0200)]
aco: add a helper for building a trap handler shader
It's way easier to write a trap handler shader using ACO IR
instead of writing disassembly by hand + clrxasm + copy&paste.
This trap handler is quite simple for now, it just loads a
buffer descriptor from the TMA BO, it saves ttmp0-1 which
contain various info about the faulty instruction, and it
stores some hw registers about the wave/trap status.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Wed, 19 Aug 2020 07:41:42 +0000 (09:41 +0200)]
aco: validate that SMEM operands can use fixed registers
To fix a validation error when loading the scalar tma buffer
descriptor because it's not a temp but a fixed reg (tma_lo/tma_hi).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Tue, 18 Aug 2020 07:26:48 +0000 (09:26 +0200)]
aco: add TBA/TMA/TTMP0-11 physical registers definitions
The TBA/TMA scalar registers are only available on GFX6-GFX8.
On GFX9+, TBA/TMA addr are stored in hardware registers and
the number of TTMP scalar registers is thus increased by 4.
Just keep in mind that tba_lo is actually ttmp0. Best would
be to support ttmp registers in RA but that's more complicated.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Tue, 18 Aug 2020 12:54:51 +0000 (14:54 +0200)]
amd/registers: add some SQ_WAVE_* register definitions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Samuel Pitoiset [Tue, 18 Aug 2020 06:34:33 +0000 (08:34 +0200)]
amd/registers: add missing TBA registers on GFX6-GFX8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
Erik Faye-Lund [Fri, 10 Jan 2020 21:59:54 +0000 (22:59 +0100)]
nir: add iabs-lowering code
Microsoft's DXIL is based on LLVM, which doesn't have an integer ABS
opcode, but instead needs it lowered to NEG + MAX. We need to do this
with an option, to prevent an already existing optimization rule from
undoing this.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5211>
Eric Engestrom [Mon, 3 Aug 2020 23:31:52 +0000 (01:31 +0200)]
egl: drop invalid shebang
This file exports a variable that is then used in a python script,
but it can never be executed by itself, so having a shebang here
makes no sense.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6166>
Jason Ekstrand [Fri, 14 Aug 2020 20:48:59 +0000 (15:48 -0500)]
clover: Call clang with -O0 for the SPIR-V path
SPIRV-LLVM-Translator isn't really built for handling optimized LLVM IR.
It tends to fall over when, for instance, an optimization generates an
i96 type which isn't legal in SPIR-V. Pass -O0 to avoid these cases.
See https://github.com/KhronosGroup/SPIRV-LLVM-Translator/issues/203.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6432>
Jason Ekstrand [Thu, 13 Aug 2020 20:12:15 +0000 (15:12 -0500)]
clover/spirv: Don't call llvm::regularizeLlvmForSpirv
writeSpirv() already takes care of that, and calling it twice seems to
duplicate functions and cause problems when processing execution modes.
Fixes: 2043c5f37cf "clover/llvm: Add functions for compiling from..."
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6306>
Jason Ekstrand [Fri, 21 Aug 2020 04:59:54 +0000 (23:59 -0500)]
intel/nir: Allow splitting a single load into up to 32 loads
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
Jason Ekstrand [Wed, 19 Aug 2020 23:53:32 +0000 (18:53 -0500)]
intel/fs: Fix an assert in load_scratch
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
Jason Ekstrand [Fri, 21 Aug 2020 04:47:51 +0000 (23:47 -0500)]
iris: Always re-upload sysvals when we have kernel inputs
They can change on every dispatch and clover never gives us a heads up.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
Jason Ekstrand [Fri, 21 Aug 2020 16:31:18 +0000 (11:31 -0500)]
iris: Normalize all compute shaders to MESA_SHADER_COMPUTE
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
Jason Ekstrand [Sat, 15 Aug 2020 05:26:05 +0000 (00:26 -0500)]
iris: ref/unref the GLSL type singleton in screen_create/destroy
Otherwise, we can run into trouble if the driver is dynamically loaded
via pipe-loader.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
Jason Ekstrand [Wed, 19 Aug 2020 23:56:01 +0000 (18:56 -0500)]
iris: Stop advertising clover-only caps
Both of these are clover-only caps. We don't really support clover and,
even if we did, the number of address bits is wrong and we definitely
don't support the CL path for images.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
Jason Ekstrand [Thu, 20 Aug 2020 15:30:23 +0000 (10:30 -0500)]
iris: Stop advertising PIPE_SHADER_IR_NIR_SERIALIZED
This prevents clover from trying to initialize and crashing.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
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