dri/radeon: drop obsolete radeon_{dri,macros}.h headers

Both have been unused for at least a couple of years.
For example the last user of radeon_macros.h was removed with

commit 8c11f0a88300f7bc3f05a12789c781ba0f4b3cc6
Author: Eric Anholt <eric@anholt.net>
Date:   Fri Oct 14 13:27:02 2011 -0700

    radeon: Drop the legacy BO manager code.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

SCons: Rename dri2_query_renderer.c to dri_common_query_renderer.c.

Fix SCons build error introduced with commit
3fe7daec14282dc8e2f5c8cc547927e305009677.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>

glsl/linker: pass through the is_intrinsic flag

This flag was set to true for the atomic counter intrinsics, but it
never got plumbed through the linker, so by the time it got to the
backends it would always be set to the false. The current i965 backend
code doesn't use is_intrinsic, so this should not change any existing
code, but it's useful for codepaths that want to distinguish between
intrinsics and non-intrinsics without using strcmp.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>

docs: Update instructions for creating a release

This captures all of the steps I have been following in making releases for
the past year or so. This way, the instructions should be sound for anyone who
would like to take over the release process going forward.

llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS definition

This change will double cache size for branches which have a lower
LP_MAX_SHADER_VARIANTS limit (it will not do anything on master).
The reason is that nowadays shaders tend to be quite a bit larger than they
were (they were big when llvmpipe didn't have a fs loop, got much smaller with
that loop, and since then have gradually increased quite a bit though still
smaller than without the fs loop for various reasons - among them being d3d10
compliance, usage of 8-wide vectors, non-swizzled blend code). Thus effectively
less shaders would be cached (unless they were very small and the variant limit
was hit first). Also, since we're getting rid of the IR nowadays, the cached
shaders shouldn't need all that much memory actually.

docs: Add my notes on stable-branch patch criteria

This captures the set of rules I have been using for stable-branch management,
(starting with a discussion on the mesa-dev mailing list on July 2013, and
then refined through my own experience of performing stable-branch releases
since then).

Makefile: Switch from md5sums to sha256sums

We switched to these several stable releases ago, (since the MD5 algorithm has
been broken for some time), but only now did I get around to fixing this in
the Makefile rather than just performing this step manually.

CC: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

glx: Fix build since 679c2ef "glx/drisw: add support for DRI2rendererQueryExtension", when only building drisw renderer

v2:
- Move dri*_query_renderer_* into their respective dri*_priv.h headers
- Drop then unnneeded include of dri2.h from dri2_query_renderer.c
- Rename dri2_query_renderer.c as dri_common_query_renderer.c, as it's contents
now are used for more than dri[23]

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

Increment version to 10.4.0-devel

Now that the 10.3 branch has been created

radeonsi: add new SI pci ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org

radeonsi: add new CIK pci ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org

r600g: Fix flat/smooth shade state toggle

If only the flat/smooth shade state changed between
two render calls the prior code would miss updating the
hardware state.

Also add check for sprite coord, potentially same type
of issue otherwise for it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81967
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g/compute: Don't initialize vertex_buffer_state masks to 0x2

cs_vertex_buffer_state.enabled_mask and
cs_vertex_buffer_state.dirty_mask are both updated when
r600_set_constant_buffer() is called, so we don't need to manually
update these values.

This fixes a crash with OpenCL programs that have a kernel with no
arguments.

https://bugs.freedesktop.org/show_bug.cgi?id=82671

CC: "10.2" <mesa-stable@lists.freedesktop.org>

r600g/compute: Use the first parameter in evergreen_set_global_binding()

pipe-loader: Fix memory leak v2

v2:
  - Change driver_name to char*

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
CC: "10.2" <mesa-stable@lists.freedesktop.org>

radeon: Add work-around for missing Hainan support in clang < 3.6 v2

v2:
  - Add missing break.

https://bugs.freedesktop.org/show_bug.cgi?id=82709

CC: "10.2" <mesa-stable@lists.freedesktop.org>

st/clover: Fix build against LLVM SVN >= r215967 v2

v2: Tom Stellard
  - Properly destroy the Module

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965,meta: Stop unlocking the texture to try and prevent deadlocks.

Unlocking the texture is not safe: another thread could come in and grab
it.  Now that we use a recursive mutex, this should work.  This also fixes
texture lock deadlocks in the new meta fast clear path.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>

mesa: Use a recursive mutex for the texture lock.

This avoids problems with things like meta operations calling functions
that want to take the lock while the lock is already held.  Basically,
the point is to guard against API reentrancy across threads...not to
guard against ourselves.

Dave Airlie opposed this change, but it makes master usable again and no
one proposed a better solution.  We can revert this if/when someone
does.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>

glcpp: Fix glcpp-test-cr-lf "make check" test for Mac OS X

There were two problems with the way this script used sed on OS X:

  1. The OS X sed doesn't interpret "\r" in a replacement list as a
     carriage-return character, (instead it was inserting a literal
     'r' character).

     We fix this by putting an actual ^M character into the source of
     the script, (rather than a two-character escape sequence hoping
     for sed to do the right thing).

  2. When generating the test files with LF-CR ("\n\r") newlines, the
     OS X sed was adding an undesired final newline ("\n") at the end
     of the file. We avoid this by first using sed to add the ^M
     before the newlines, then using tr to swap the \r and \n
     characters. This way, sed never sees any lines ending with
     anything but \n, so it doesn't get confused and doesn't add any
     bogus extra newlines.

Tested-by: Vinson Lee <vlee@freedesktop.org>
Vinson's testing confirmed that this patch fixes FreeBSD as well.

glcpp: Use printf instead of "echo -n" in glcpp-test

I noticed that with /bin/sh on Mac OS X, "echo -n" does not work as
desired, (it actually prints "-n" rather than suppressing the final
newline). There is a /bin/echo that could be used (it actually works)
instead of the builtin echo.

But I decided it's more robust to just use printf rather than
hardcoding /bin/echo into the script.

i965/vec4: Allow reswizzling writemasks when swizzle is single-valued.

total instructions in shared programs: 4288033 -> 4266151 (-0.51%)
instructions in affected programs:     930915 -> 909033 (-2.35%)

Teach os_get_total_physical_memory about Cygwin

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

r300g: Fix path to test programs for out-of-tree builds

Fixes make check in that case.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

gallivm: Fix build with LLVM >= 3.6 r215967.

This LLVM 3.6 commit changed EngineBuilder constructor.

commit 3f4ed32b4398eaf4fe0080d8001ba01e6c2f43c8
Author: Rafael Espindola <rafael.espindola@gmail.com>
Date:   Tue Aug 19 04:04:25 2014 +0000

    Make it explicit that ExecutionEngine takes ownership of the modules.

    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215967 91177308-0d34-0410-b5e6-96231b3b80d8

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>

glsl: Use the without_array predicate in some more places

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>

i965: Flush the RC and TC before doing a fast clear resolve

The docs say "When performing a render target resolve, PIPE_CONTROL with end
of pipe sync must be delivered.", which doesn't actually tell us whether we
need to do it before or after.  Blorp did it before and after, and doing it
before certainly makes sense.  The resolve operation needs to read from the
MCS and if we don't flush the render cache it won't get up-to-date data.

On the other hand, doing it after should not be necessary, since we call
brw_render_cache_set_check_flush() after the resolve.

Fixes rendering corruption in kwin's cover switch effect and various steam
games.

Missing flush spotted by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>

docs: Import 10.2.6 release notes, add news item.

docs: Mark off ARB_conditional_render_inverted for i965

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965: Enable ARB_conditional_render_inverted on Gen6+.

The extension requires GL 3.0, so enable on just the generations
exposing that.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

mesa: Add support for inverted s/w conditional rendering

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965/vec4: Add a pass to reduce swizzles.

total instructions in shared programs: 4344280 -> 4288033 (-1.29%)
instructions in affected programs:     397468 -> 341221 (-14.15%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

vc4: Plumb the texture index from TGSI through to the sampler uniforms.

This commit and the last one fix ARB_fragment_program/sparse-samplers and
6 other tests.

vc4: Avoid a null-deref if a sampler index isn't used.

Part of fixing ARB_fragment_program/sparse-samplers

mesa: fix NULL pointer deref bug in _mesa_drawbuffers()

This is a follow-on fix to commit 39b40ad144.  Fixes a crash if the
user calls glDrawBuffers(0, NULL).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82814
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

r600g: Fix missing SET_TEXTURE_OFFSETS

SB needs a bit of special handling to handle
instructions without obvious side effects, to
avoid it deleting them.

Fixes failing non-const ARB_gpu_shader5
textureOffsets piglits with sb enabled.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

gallium/target: Add needed mesautil lib to haiku-softpipe

Acked-by: Brian Paul <brianp@vmware.com>

gallium/aux: Fill in Haiku get process name code

Acked-by: Brian Paul <brianp@vmware.com>

haiku/swrast: Add missing src include search path for missing util/macros.h

Acked-by: Brian Paul <brianp@vmware.com>

docs: Update status of ARB_conditional_render_inverted

Done for: nvc0, softpipe and llvmpipe

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

llvmpipe/softpipe: enable ARB_conditional_render_inverted

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

nvc0: Handle ARB_conditional_render_inverted and enable it

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

mesa/st: Support ARB_conditional_render_inverted modes

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTED

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

mesa: add ARB_conditional_render_inverted flags

Also add an extension bit so we can safely enable

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

glapi: add GL_ARB_conditional_render_inverted

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

ilo: fix PIPE_CAP_VIDEO_MEMORY

I changed Emil's patch in f921131a5cebc233749a86cdd44b409c0cecc4ef to report
raw values in the winsys, but forgot to convert the values to megabytes in the
pipe driver.

ilo: enable HiZ in more cases on GEN6

With layer offsetting killed, we no longer need to restrict HiZ to
non-mipmapped and non-arary depth buffers.

ilo: remove layer offsetting

Follow i965 to kill layer offsetting for GEN6.

ilo: migrate to ilo_layout

Embed an ilo_layout in ilo_texture, and remove now duplicated members.

ilo: add new resource layout code

Based on the old code, the new layout code describes the layout with the new,
well-documented, ilo_layout.  It also gains new features such as MCS support
and extended ARYSPC_LOD0 that i965 comes up with (see
6345a94a9b134b1321b3b290bacde228b12af415).

gallium/radeon: Do not use u_upload_mgr for buffer downloads

Instead create a staging texture with pipe_buffer_create and
PIPE_USAGE_STAGING.

u_upload_mgr sets the usage of its staging buffer to PIPE_USAGE_STREAM.
But since 150ac07b855b5c5f879bf6ce9ca421ccd1a6c938 CPU -> GPU streaming buffers
are created in VRAM. Therefore the staging texture (in VRAM) does not offer any
performance improvements for buffer downloads.

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for Cayman

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: bump PRIMGROUP_SIZE for some cases

Recommended by hw people.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: set PARTIAL_VS_WAVE(0) when appropriate

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2)

Nothing's changed for CIK here.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: simplify si_num_banks function

This makes it easier to use.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: use r600_draw_rectangle from r600g

Rectangles are easier than triangles for the rasterizer.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: save scissor state and sample mask for u_blitter

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: don't set CB_SHADER_MASK=1 if there are no color outputs

This hack isn't needed anymore because of the previous u_blitter commit.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

gallium/u_blitter: don't use an empty fragment shader if there's a colorbuffer

This is custom code used by some drivers.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium/util: handle PIPE_BUFFER in util_pipe_tex_to_tgsi_tex

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

rbug: only add textures to the list

rbug-gui cannot display buffers, so it's pointless to add them.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

rbug: fix a crash in sampler_view_destroy caused by incorrect context

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

rbug: send the actual number of layers to the client

This sends the correct value for array textures.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

rbug: implement streamout context functions

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

rbug: fix crash in set_vertex_buffers

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

rbug: remove contexts from the list properly

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()

... and store the value in intel_winsys_info/ilo_dev_info.

Suggested-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
olv: check for errors and report raw values

i965/cfg: Add a foreach_block_and_inst_safe macro.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/cfg: Add a foreach_inst_in_block_safe macro.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/cfg: Add a foreach_block_safe macro.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Pass a cfg pointer to generate_{code,assembly}.

The loop over all instructions is now two-fold, over all of the blocks
and all of the instructions in each block.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Add and use foreach_block macro.

Use this as an opportunity to rename 'block_num' to 'num'. block->num is
clear, and block->block_num has always been redundant.

i965/cfg: Embed link in bblock_t for main block list.

The next patch adds a foreach_block (block, cfg) macro, which works
better if it provides a direct bblock_t pointer, rather than a
bblock_link pointer that you have to use to find the actual block.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/fs: Optimize gl_FrontFacing calculation on Gen4/5.

Doesn't use fewer instructions, but it does avoid writing the flag
register and if we want to switch the representation of true for Gen4/5
in the future, we can just delete the AND instruction.

i965/fs: Optimize gl_FrontFacing calculation on Gen6+.

total instructions in shared programs: 4288650 -> 4282838 (-0.14%)
instructions in affected programs:     595018 -> 589206 (-0.98%)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Use ~0 to represent true on Gen >= 6.

total instructions in shared programs: 4292303 -> 4288650 (-0.09%)
instructions in affected programs:     299670 -> 296017 (-1.22%)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/fs: Optimize emit_bool_to_cond_code for logical exprs.

AND, OR, and XOR can generate the conditional code directly.

total instructions in shared programs: 4293335 -> 4292303 (-0.02%)
instructions in affected programs:     121408 -> 120376 (-0.85%)

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Use UniformBooleanTrue value for boolean literal true.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

glsl: Use UniformBooleanTrue value for uniform initializers.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: Upload boolean uniforms using UniformBooleanTrue.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Remove dead call to _mesa_associate_uniform_storage().

Dead since the call to _mesa_generate_parameters_list_for_uniforms
was removed in commit 12751ef2. So this was why all of that code that
was supposed to fix up the value of a uniform bool to wasn't happening.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mapi: Inline shared-glapi/tests/Makefile.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

mapi: Inline glapi/tests/Makefile.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

mapi: Inline glapi/Makefile.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

mapi: Inline es2api/Makefile.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

mapi: Inline es1api/Makefile.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

mapi: Inline shared-glapi/Makefile.

build: Let install-lib-links.mk handle .la files in subdirectories.

The next patches are going to combine some of the mapi subdirectories'
Makefiles into a single Makefile, giving better build parallelism.

lib_LTLIBRARIES will be set to something like

   lib_LTLIBRARIES = shared-glapi/libglapi.la es2api/libGLESv2.la

and the current code in install-lib-links.mk simply prepends .libs/ and
replaces the .la in order to create the filenames that it needs to ln/cp
into the LIBDIR. This doesn't work when the .la file is actually in a
subdirectory.

This patch fixes this and puts .libs/ in the right place.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

i965: Enable instruction compaction on Gen8+.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add support for compacting 3-src instructions on Gen8.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Add support for compacting 1- and 2-src instructions on Gen8.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen8: Add 3-src instruction compaction tables.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen8: Add instruction compaction tables.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Update JIP/UIP compaction code to operate on bytes.

JIP/UIP were previously in units of compacted instructions. On Gen8
they're in units of bytes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Reverse condition ordering to let us support other gens.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/disasm: Add CSEL.

mesa: fix copy and paste errors in glBindVertexBuffers

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>

nv50/ir: (trivial) initialize pointer to silence warning

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>