litex.git
12 years agoactorlib/control: use numbers of bits instead of maxima
Sebastien Bourdeauducq [Sun, 17 Jun 2012 16:29:57 +0000 (18:29 +0200)]
actorlib/control: use numbers of bits instead of maxima

12 years agoflow/plumbing: Combinator/Splitter should not inherit CombinatorialActor
Sebastien Bourdeauducq [Sun, 17 Jun 2012 11:45:18 +0000 (13:45 +0200)]
flow/plumbing: Combinator/Splitter should not inherit CombinatorialActor

12 years agoexamples/flow: Fibonacci demo
Sebastien Bourdeauducq [Sat, 16 Jun 2012 20:41:34 +0000 (22:41 +0200)]
examples/flow: Fibonacci demo

12 years agoflow/network: handle default endpoints correctly in _infer_plumbing_layout
Sebastien Bourdeauducq [Sat, 16 Jun 2012 20:41:15 +0000 (22:41 +0200)]
flow/network: handle default endpoints correctly in _infer_plumbing_layout

12 years agoflow/network: require ActorNode be passed to add_connection
Sebastien Bourdeauducq [Sat, 16 Jun 2012 20:40:26 +0000 (22:40 +0200)]
flow/network: require ActorNode be passed to add_connection

12 years agoflow/network: fix ActorNode default params
Sebastien Bourdeauducq [Sat, 16 Jun 2012 20:39:31 +0000 (22:39 +0200)]
flow/network: fix ActorNode default params

12 years agoflow/actor: fix busy signal generation for pipelined actors
Sebastien Bourdeauducq [Sat, 16 Jun 2012 20:38:45 +0000 (22:38 +0200)]
flow/actor: fix busy signal generation for pipelined actors

12 years agoflow/actor: add single_sink/single_source retrieval methods
Sebastien Bourdeauducq [Sat, 16 Jun 2012 20:38:16 +0000 (22:38 +0200)]
flow/actor: add single_sink/single_source retrieval methods

12 years agoexamples/flow/arithmetic: cleanup
Sebastien Bourdeauducq [Sat, 16 Jun 2012 20:37:25 +0000 (22:37 +0200)]
examples/flow/arithmetic: cleanup

12 years agoflow: insert splitters
Sebastien Bourdeauducq [Sat, 16 Jun 2012 19:23:42 +0000 (21:23 +0200)]
flow: insert splitters

12 years agoexamples/flow/arithmetic: simulate
Sebastien Bourdeauducq [Sat, 16 Jun 2012 17:23:59 +0000 (19:23 +0200)]
examples/flow/arithmetic: simulate

12 years agoflow: insert combinators and infer plumbing layout
Sebastien Bourdeauducq [Sat, 16 Jun 2012 15:30:54 +0000 (17:30 +0200)]
flow: insert combinators and infer plumbing layout

12 years agoAbstract actor graphs
Sebastien Bourdeauducq [Fri, 15 Jun 2012 15:52:19 +0000 (17:52 +0200)]
Abstract actor graphs

12 years agoactorlib: ASMI sequential reader
Sebastien Bourdeauducq [Tue, 12 Jun 2012 19:04:47 +0000 (21:04 +0200)]
actorlib: ASMI sequential reader

12 years agoexamples/dataflow/dma: refactor
Sebastien Bourdeauducq [Tue, 12 Jun 2012 17:55:57 +0000 (19:55 +0200)]
examples/dataflow/dma: refactor

12 years agofix SimActor get_fragment
Sebastien Bourdeauducq [Tue, 12 Jun 2012 15:52:08 +0000 (17:52 +0200)]
fix SimActor get_fragment

12 years agoReorganize examples folder
Sebastien Bourdeauducq [Tue, 12 Jun 2012 15:49:50 +0000 (17:49 +0200)]
Reorganize examples folder

12 years agoPureSimulable
Sebastien Bourdeauducq [Tue, 12 Jun 2012 15:08:56 +0000 (17:08 +0200)]
PureSimulable

12 years agoASMI simulation models
Sebastien Bourdeauducq [Tue, 12 Jun 2012 14:57:00 +0000 (16:57 +0200)]
ASMI simulation models

12 years agowishbone: base TargetModel class
Sebastien Bourdeauducq [Sun, 10 Jun 2012 15:05:10 +0000 (17:05 +0200)]
wishbone: base TargetModel class

12 years agobus/wishbone: target model
Sebastien Bourdeauducq [Sun, 10 Jun 2012 14:40:33 +0000 (16:40 +0200)]
bus/wishbone: target model

12 years agobus/wishbone/Tap: remove ack feature
Sebastien Bourdeauducq [Sun, 10 Jun 2012 10:46:24 +0000 (12:46 +0200)]
bus/wishbone/Tap: remove ack feature

12 years agoexamples/dataflow: only import nx when needed
Sebastien Bourdeauducq [Fri, 8 Jun 2012 20:54:04 +0000 (22:54 +0200)]
examples/dataflow: only import nx when needed

12 years agoflow/network: refactor graph
Sebastien Bourdeauducq [Fri, 8 Jun 2012 20:49:49 +0000 (22:49 +0200)]
flow/network: refactor graph

12 years agoflow/ala: fix typo
Sebastien Bourdeauducq [Fri, 8 Jun 2012 20:48:47 +0000 (22:48 +0200)]
flow/ala: fix typo

12 years agoactorlib: WB writer simulation OK
Sebastien Bourdeauducq [Fri, 8 Jun 2012 19:31:57 +0000 (21:31 +0200)]
actorlib: WB writer simulation OK

12 years agoactorlib: WB reader simulation OK
Sebastien Bourdeauducq [Fri, 8 Jun 2012 19:31:05 +0000 (21:31 +0200)]
actorlib: WB reader simulation OK

12 years agoUse super() instead of calling parent constructors directly
Sebastien Bourdeauducq [Fri, 8 Jun 2012 16:06:12 +0000 (18:06 +0200)]
Use super() instead of calling parent constructors directly

12 years agoactorlib/sim: use set instead of list to represent active transactions
Sebastien Bourdeauducq [Fri, 8 Jun 2012 15:56:52 +0000 (17:56 +0200)]
actorlib/sim: use set instead of list to represent active transactions

12 years agoactorlib: generator-based generic simulation actor
Sebastien Bourdeauducq [Fri, 8 Jun 2012 15:54:03 +0000 (17:54 +0200)]
actorlib: generator-based generic simulation actor

12 years agosim: multiread/multiwrite
Sebastien Bourdeauducq [Fri, 8 Jun 2012 15:52:32 +0000 (17:52 +0200)]
sim: multiread/multiwrite

12 years agocorelogic/record: better repr
Sebastien Bourdeauducq [Fri, 8 Jun 2012 15:49:31 +0000 (17:49 +0200)]
corelogic/record: better repr

12 years agoexamples/fir: print Verilog source
Sebastien Bourdeauducq [Fri, 8 Jun 2012 12:00:49 +0000 (14:00 +0200)]
examples/fir: print Verilog source

12 years agoexamples/fir: plot input and output signals
Sebastien Bourdeauducq [Thu, 7 Jun 2012 21:20:59 +0000 (23:20 +0200)]
examples/fir: plot input and output signals

12 years agoflow: generic parameter passing to Actor from sequential/pipelined
Sebastien Bourdeauducq [Thu, 7 Jun 2012 16:24:33 +0000 (18:24 +0200)]
flow: generic parameter passing to Actor from sequential/pipelined

12 years agoflow: fix actor repr
Sebastien Bourdeauducq [Thu, 7 Jun 2012 13:48:35 +0000 (15:48 +0200)]
flow: fix actor repr

12 years agoflow: refactor scheduling models
Sebastien Bourdeauducq [Thu, 7 Jun 2012 12:44:43 +0000 (14:44 +0200)]
flow: refactor scheduling models

12 years agobank/description: pad unaligned multi-word registers at the top
Sebastien Bourdeauducq [Mon, 21 May 2012 20:55:23 +0000 (22:55 +0200)]
bank/description: pad unaligned multi-word registers at the top

12 years agoAdd LICENSE file
Sebastien Bourdeauducq [Mon, 21 May 2012 17:56:23 +0000 (19:56 +0200)]
Add LICENSE file

12 years agobus/wishbone2asmi: fix cache tag size
Sebastien Bourdeauducq [Tue, 15 May 2012 13:18:03 +0000 (15:18 +0200)]
bus/wishbone2asmi: fix cache tag size

12 years agoasmi: dat_wm high to disable data write
Sebastien Bourdeauducq [Tue, 15 May 2012 12:41:54 +0000 (14:41 +0200)]
asmi: dat_wm high to disable data write

12 years agobus/asmibus/hub: hack to prevent comb loops
Sebastien Bourdeauducq [Mon, 30 Apr 2012 22:11:42 +0000 (17:11 -0500)]
bus/asmibus/hub: hack to prevent comb loops

12 years agofhdl/verilog: add option to display which comb blocks are run
Sebastien Bourdeauducq [Mon, 30 Apr 2012 21:38:40 +0000 (16:38 -0500)]
fhdl/verilog: add option to display which comb blocks are run

This is a debug hack to help find combinatorial loops in designs.

12 years agosim: pass extra keyword arguments to Verilog converter
Sebastien Bourdeauducq [Mon, 30 Apr 2012 21:38:17 +0000 (16:38 -0500)]
sim: pass extra keyword arguments to Verilog converter

12 years agofhdl: support len() on signals
Sebastien Bourdeauducq [Sun, 8 Apr 2012 16:06:22 +0000 (18:06 +0200)]
fhdl: support len() on signals

12 years agobank/csrgen: allow specifying existing CSR interface
Sebastien Bourdeauducq [Fri, 6 Apr 2012 12:59:09 +0000 (14:59 +0200)]
bank/csrgen: allow specifying existing CSR interface

12 years agofhdl: phase out pads
Sebastien Bourdeauducq [Mon, 2 Apr 2012 17:21:43 +0000 (19:21 +0200)]
fhdl: phase out pads

12 years agovpi: delete merged Icarus Verilog patch
Sebastien Bourdeauducq [Mon, 2 Apr 2012 17:11:32 +0000 (19:11 +0200)]
vpi: delete merged Icarus Verilog patch

12 years agofhdl/verilog: do not attempt to initialize instance and mem output signals
Sebastien Bourdeauducq [Mon, 2 Apr 2012 10:59:42 +0000 (12:59 +0200)]
fhdl/verilog: do not attempt to initialize instance and mem output signals

12 years agobus/dfi: reset active low signals to 1
Sebastien Bourdeauducq [Sun, 1 Apr 2012 15:43:24 +0000 (17:43 +0200)]
bus/dfi: reset active low signals to 1

12 years agosim/proxy: support lists
Sebastien Bourdeauducq [Sun, 1 Apr 2012 15:19:53 +0000 (17:19 +0200)]
sim/proxy: support lists

12 years agofhdl/verilog: initialize internal read-only signals with their reset values
Sebastien Bourdeauducq [Sun, 1 Apr 2012 14:39:11 +0000 (16:39 +0200)]
fhdl/verilog: initialize internal read-only signals with their reset values

12 years agocorelogic/roundrobin: handle correctly special case with 1 request source
Sebastien Bourdeauducq [Sat, 31 Mar 2012 16:01:40 +0000 (18:01 +0200)]
corelogic/roundrobin: handle correctly special case with 1 request source

12 years agobus/asmicon: initiator
Sebastien Bourdeauducq [Fri, 30 Mar 2012 20:16:31 +0000 (22:16 +0200)]
bus/asmicon: initiator

12 years agosim: proxy
Sebastien Bourdeauducq [Fri, 30 Mar 2012 14:40:26 +0000 (16:40 +0200)]
sim: proxy

12 years agoUpdate copyright notices
Sebastien Bourdeauducq [Fri, 23 Mar 2012 15:41:30 +0000 (16:41 +0100)]
Update copyright notices

12 years agocorelogic/fsm: typo
Sebastien Bourdeauducq [Sun, 18 Mar 2012 21:12:46 +0000 (22:12 +0100)]
corelogic/fsm: typo

12 years agocorelogic/fsm: delayed enters
Sebastien Bourdeauducq [Sat, 17 Mar 2012 23:09:40 +0000 (00:09 +0100)]
corelogic/fsm: delayed enters

12 years agocorelogic/roundrobin: CE switching
Sebastien Bourdeauducq [Fri, 16 Mar 2012 15:54:47 +0000 (16:54 +0100)]
corelogic/roundrobin: CE switching

12 years agocorelogic: convert timeline to function and move to misc
Sebastien Bourdeauducq [Thu, 15 Mar 2012 19:25:44 +0000 (20:25 +0100)]
corelogic: convert timeline to function and move to misc

12 years agobus/asmibus/hub: require finalization before get_slots
Sebastien Bourdeauducq [Wed, 14 Mar 2012 15:19:29 +0000 (16:19 +0100)]
bus/asmibus/hub: require finalization before get_slots

12 years agofhdl: export log2_int
Sebastien Bourdeauducq [Wed, 14 Mar 2012 11:19:42 +0000 (12:19 +0100)]
fhdl: export log2_int

12 years agosetup.py: simplify
Alain Péteut [Sat, 10 Mar 2012 19:01:14 +0000 (20:01 +0100)]
setup.py: simplify

Signed-off-by: Alain Péteut <alain.peteut@yahoo.com>
12 years agodoc: more examples and comments
Sebastien Bourdeauducq [Sat, 10 Mar 2012 18:38:39 +0000 (19:38 +0100)]
doc: more examples and comments

12 years agodoc: cosmetic changes (thanks sh4rm4 for reporting typos)
Sebastien Bourdeauducq [Sat, 10 Mar 2012 16:59:42 +0000 (17:59 +0100)]
doc: cosmetic changes (thanks sh4rm4 for reporting typos)

12 years agodoc: use script font
Sebastien Bourdeauducq [Fri, 9 Mar 2012 20:57:50 +0000 (21:57 +0100)]
doc: use script font

12 years agodoc: simulation
Sebastien Bourdeauducq [Fri, 9 Mar 2012 20:17:21 +0000 (21:17 +0100)]
doc: simulation

12 years agodoc: cosmetic changes (thanks rofl0r for reporting typos)
Sebastien Bourdeauducq [Fri, 9 Mar 2012 17:26:00 +0000 (18:26 +0100)]
doc: cosmetic changes (thanks rofl0r for reporting typos)

12 years agodoc: add logo
Sebastien Bourdeauducq [Fri, 9 Mar 2012 16:16:33 +0000 (17:16 +0100)]
doc: add logo

12 years agodoc: switch to sphinx
Sebastien Bourdeauducq [Fri, 9 Mar 2012 16:08:38 +0000 (17:08 +0100)]
doc: switch to sphinx

12 years agoexamples: FIR filter simulation
Sebastien Bourdeauducq [Thu, 8 Mar 2012 19:49:36 +0000 (20:49 +0100)]
examples: FIR filter simulation

12 years agofhdl: handle negative constants correctly
Sebastien Bourdeauducq [Thu, 8 Mar 2012 19:49:24 +0000 (20:49 +0100)]
fhdl: handle negative constants correctly

12 years agoexamples: remove outdated wb_intercon simulation
Sebastien Bourdeauducq [Thu, 8 Mar 2012 17:17:56 +0000 (18:17 +0100)]
examples: remove outdated wb_intercon simulation

12 years agovpi: support extra include directories
Sebastien Bourdeauducq [Thu, 8 Mar 2012 17:14:40 +0000 (18:14 +0100)]
vpi: support extra include directories

12 years agogitignore: update
Sebastien Bourdeauducq [Thu, 8 Mar 2012 17:14:19 +0000 (18:14 +0100)]
gitignore: update

12 years agobus: generic transaction model
Sebastien Bourdeauducq [Thu, 8 Mar 2012 17:14:06 +0000 (18:14 +0100)]
bus: generic transaction model

12 years agovpi: patch for Icarus Verilog
Sebastien Bourdeauducq [Thu, 8 Mar 2012 16:27:59 +0000 (17:27 +0100)]
vpi: patch for Icarus Verilog

12 years agoexamples: small cleanup
Sebastien Bourdeauducq [Thu, 8 Mar 2012 14:55:02 +0000 (15:55 +0100)]
examples: small cleanup

12 years agosim: fix zero encoding
Sebastien Bourdeauducq [Thu, 8 Mar 2012 14:34:08 +0000 (15:34 +0100)]
sim: fix zero encoding

12 years agosim: fix message debug formatting
Sebastien Bourdeauducq [Thu, 8 Mar 2012 14:27:35 +0000 (15:27 +0100)]
sim: fix message debug formatting

12 years agosim: make initialization cycle optional (selectable by function attribute)
Sebastien Bourdeauducq [Tue, 6 Mar 2012 18:43:59 +0000 (19:43 +0100)]
sim: make initialization cycle optional (selectable by function attribute)

12 years agosim: memory access
Sebastien Bourdeauducq [Tue, 6 Mar 2012 18:29:39 +0000 (19:29 +0100)]
sim: memory access

12 years agofhdl: register memory objects with namespace
Sebastien Bourdeauducq [Tue, 6 Mar 2012 17:33:44 +0000 (18:33 +0100)]
fhdl: register memory objects with namespace

12 years agosim: support for signed numbers
Sebastien Bourdeauducq [Tue, 6 Mar 2012 15:46:18 +0000 (16:46 +0100)]
sim: support for signed numbers

12 years agofhdl/verilog: fix signed constant conversion
Sebastien Bourdeauducq [Tue, 6 Mar 2012 15:45:44 +0000 (16:45 +0100)]
fhdl/verilog: fix signed constant conversion

12 years agovpi: install target
Sebastien Bourdeauducq [Tue, 6 Mar 2012 14:51:09 +0000 (15:51 +0100)]
vpi: install target

12 years agosim: VCD generation
Sebastien Bourdeauducq [Tue, 6 Mar 2012 14:26:04 +0000 (15:26 +0100)]
sim: VCD generation

12 years agosim: clean startup/shutdown
Sebastien Bourdeauducq [Tue, 6 Mar 2012 14:00:02 +0000 (15:00 +0100)]
sim: clean startup/shutdown

12 years agosim: remove temporary files and socket
Sebastien Bourdeauducq [Tue, 6 Mar 2012 13:20:26 +0000 (14:20 +0100)]
sim: remove temporary files and socket

12 years agofhdl/namer: do not reference objects with __del__ methods to avoid uncollectable...
Sebastien Bourdeauducq [Tue, 6 Mar 2012 13:18:22 +0000 (14:18 +0100)]
fhdl/namer: do not reference objects with __del__ methods to avoid uncollectable cycles

12 years agosim: remove default sockaddr
Sebastien Bourdeauducq [Tue, 6 Mar 2012 12:58:49 +0000 (13:58 +0100)]
sim: remove default sockaddr

12 years agofhdl: add simulation functions in fragment
Sebastien Bourdeauducq [Tue, 6 Mar 2012 12:58:22 +0000 (13:58 +0100)]
fhdl: add simulation functions in fragment

12 years agosim: basic functionality working
Sebastien Bourdeauducq [Mon, 5 Mar 2012 19:31:41 +0000 (20:31 +0100)]
sim: basic functionality working

12 years agosim: signal writes working
Sebastien Bourdeauducq [Mon, 5 Mar 2012 14:40:21 +0000 (15:40 +0100)]
sim: signal writes working

12 years agosim: cleanups
Sebastien Bourdeauducq [Sun, 4 Mar 2012 21:56:56 +0000 (22:56 +0100)]
sim: cleanups

12 years agosim: signal reads working
Sebastien Bourdeauducq [Sun, 4 Mar 2012 21:33:03 +0000 (22:33 +0100)]
sim: signal reads working

12 years agosim: compile VPI module
Sebastien Bourdeauducq [Sun, 4 Mar 2012 20:27:02 +0000 (21:27 +0100)]
sim: compile VPI module

12 years agosim: two way IPC working
Sebastien Bourdeauducq [Sun, 4 Mar 2012 18:17:03 +0000 (19:17 +0100)]
sim: two way IPC working

12 years agosim: IPC module (lacks str/int encoding)
Sebastien Bourdeauducq [Sat, 3 Mar 2012 17:55:38 +0000 (18:55 +0100)]
sim: IPC module (lacks str/int encoding)

12 years agoREADME: clarify license
Sebastien Bourdeauducq [Wed, 29 Feb 2012 19:30:08 +0000 (20:30 +0100)]
README: clarify license