Add DW_LANG_Rust

include/
* dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
DW_LANG_Rust_old>: New constants.

From-SVN: r235643

i386.md (unspec): Add UNSPEC_PROBE_STACK.

* config/i386/i386.md (unspec): Add UNSPEC_PROBE_STACK.
(probe_stack): New expander.
(probe_stack_<mode>): New insn pattern.

From-SVN: r235642

i386.md (operations with memory inputs setting flags peephole2): Remove uneeded REG_P checks.

* config/i386/i386.md
(operations with memory inputs setting flags peephole2):
Remove uneeded REG_P checks.  Cleanup pattern generation.

From-SVN: r235641

crt1.S: Remove SH5 support.

libgcc/
* config/sh/crt1.S: Remove SH5 support.
* config/sh/crti.S: Likewise.
* config/sh/crtn.S: Likewise.
* config/sh/lib1funcs-4-300.S: Likewise.
* config/sh/lib1funcs-Os-4-200.S: Likewise.
* config/sh/lib1funcs.S: Likewise.
* config/sh/linux-unwind.h: Likewise.
* config/sh/t-sh64: Delete.

From-SVN: r235640

tree-vect-loop.c (vect_transform_loop): Fix nb_iterations_upper_bound computation for vectorized loop.

gcc/

* tree-vect-loop.c (vect_transform_loop): Fix
nb_iterations_upper_bound computation for vectorized loop.

gcc/testsuite/

* gcc.target/i386/vect-unpack-2.c (avx512bw_test): Avoid
optimization of vector loop.
* gcc.target/i386/vect-unpack-3.c: New test.
* gcc.dg/vect/vect-nb-iter-ub-1.c: New test.
* gcc.dg/vect/vect-nb-iter-ub-2.c: New test.
* gcc.dg/vect/vect-nb-iter-ub-3.c: New test.

From-SVN: r235639

re PR c/70852 (ice in warn_for_memset)

PR c/70852
* c-common.c (warn_for_memset): Check domain before accessing it.

* gcc.dg/pr70852.c: New test.

From-SVN: r235638

re PR sanitizer/70342 (g++ -fsanitize=undefined never finishes compiling (>24h) in qtxmlpatterns test suite)

PR sanitizer/70342
* fold-const.c (tree_single_nonzero_warnv_p): For TARGET_EXPR, use
TARGET_EXPR_SLOT as a base.

* g++.dg/ubsan/null-7.C: New test.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r235637

arc.md (*loadqi_update): Replace use of 'rI' constraint with 'rCm2' constraints to limit possible...

2016-04-29  Andrew Burgess  <andrew.burgess@embecosm.com>

        * config/arc/arc.md (*loadqi_update): Replace use of 'rI'
        constraint with 'rCm2' constraints to limit possible immediate
        size.
        (*load_zeroextendqisi_update): Likewise.
        (*load_signextendqisi_update): Likewise.
        (*loadhi_update): Likewise.
        (*load_zeroextendhisi_update): Likewise.
        (*load_signextendhisi_update): Likewise.
        (*loadsi_update): Likewise.
        (*loadsf_update): Likewise.

From-SVN: r235636

predicates.md (constm1_operand): Fix comparison.

* config/i386/predicates.md (constm1_operand): Fix comparison.

From-SVN: r235635

[ARC] Handle FPX NaN within optimized floating point library.

gcc/
2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>

* testsuite/gcc.target/arc/ieee_eq.c: New test.

libgcc/
2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/ieee-754/eqdf2.S: Handle FPX NaN.

From-SVN: r235633

longlong.h (umul_ppmm): Remove SHMEDIA checks.

include/
* longlong.h (umul_ppmm): Remove SHMEDIA checks.
(__umulsidi3, count_leading_zeros): Remove SHMEDIA implementations.

gcc/
* common/config/sh/sh-common.c (sh_option_optimization_table): Remove
remaining SH5 related settings.
* config/sh/sh-protos.h (shmedia_cleanup_truncate,
shmedia_prepare_call_address): Delete.
* config/sh/sh.c (sh_print_operand, output_stack_adjust,
DWARF_CIE_DATA_ALIGNMENT, LOCAL_ALIGNMENT): Update comments.
* config/sh/sh.h (SUBTARGET_ASM_RELAX_SPEC,
UNSUPPORTED_SH2A): Remove m5 checks.
(sh_divide_strategy_e): Remove SH5 division strategies.
(TARGET_PTRMEMFUNC_VBIT_LOCATION): Remove and use default.
* config/sh/sh.md (divsf3): Reinstate define_expand pattern.

From-SVN: r235632

[ARC] Fix obsolete constraint.

include/
2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>

* longlong.h (add_ssaaaa): Replace obsolete 'J' constraint with
'Cal' constraint.
(sub_ddmmss): Likewise.

From-SVN: r235631

S/390: Improve documentation of s390_reload_costs.

gcc/ChangeLog:

2016-04-29  Dominik Vogt  <vogt@linux.vnet.ibm.com>

* config/s390/s390.c (s390_rtx_costs): Update documentation.

From-SVN: r235630

PR/69089: C++-11: Ingore "alignas(0)".

gcc/c-family/ChangeLog:

2016-04-29  Dominik Vogt  <vogt@linux.vnet.ibm.com>

PR/69089
* c-common.c (handle_aligned_attribute): Allow 0 as an argument to the
"aligned" attribute.

gcc/testsuite/ChangeLog:

2016-04-29  Dominik Vogt  <vogt@linux.vnet.ibm.com>

PR/69089
* g++.dg/cpp0x/alignas6.C: New test.

From-SVN: r235629

Clean up tests where a later dg-do completely overrides another.

The attached patch cleans up some (mostly unnecessary) dg-do
directives in the gcc.dg and gcc.target test cases.

gcc/testsuite/ChangeLog:

2016-04-29  Dominik Vogt  <vogt@linux.vnet.ibm.com>

* gcc/testsuite/gcc.dg/cpp/mac-dir-2.c: Remove pointless duplicate
dg-do.
* gcc/testsuite/gcc.dg/pr27003.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/cswtch.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-2.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-4.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-5.c: Likewise.
* gcc.target/arc/mxy.c: Likewise.
* gcc.target/arc/mswape.c: Likewise.
* gcc.target/arc/mrtsc.c: Likewise.
* gcc.target/arc/mcrc.c: Likewise.
* gcc.target/arc/mdsp-packa.c: Likewise.
* gcc.target/arc/mdvbf.c: Likewise.
* gcc.target/arc/mlock.c: Likewise.
* gcc.target/arc/mmac-24.c: Likewise.
* gcc.dg/spec-options.c: Switch order of the two "dg-do run".

From-SVN: r235628

S/390: Replace LDER with LDR.

For performance reasons it is important to write the full 64 bits of
an FPR target reg even when dealing with 32 bit values.  So we chose
lder over ler for 32 bit float register moves.  lder zero-extends the
32 bit value from the source reg to 64 bit in the target.  However,
since it actually doesn't matter whether we write the upper 32 bits
with zeros or with any other garbage we can also use ldr instead.  It
is bit shorter and therefore will do good for I-Cache usage.

gcc/ChangeLog:

2016-04-29  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

* config/s390/2964.md ("z13_unit_fxu", "z13_0"): Remove lder.
* config/s390/s390.md ("movsi_larl", "*movsi_esa", "mov<mode>"):
Change lder to ldr.
* config/s390/vector.md ("mov<mode>"): Likewise.

From-SVN: r235627

S/390: Memory constraint cleanup

This fixes an issue with the long displacement memory address
constraints S and T.  These were defined to only accept long
displacement addresses.  This is wrong since a memory constraint must
not reject an address with a 0 displacement.  Reload relies on being
able to turn an invalid memory address into a valid one by reloading
the address into a base register.  The S and T constraints would
reject such an address.

This isn't really a problem for the backend since we used the
constraints with that knowledge there but it is a problem for people
writing inline assemblies.

gcc/ChangeLog:

2016-04-29  Ulrich Weigand  <uweigand@de.ibm.com>

* config/s390/constraints.md ("U", "W"): Invoke
s390_mem_constraint with "ZR" and "ZT".
* config/s390/s390.c (s390_check_qrst_address): Reject invalid
addresses when using LRA.  Accept also short displacements for S
and T constraints.  Do not check for long displacement target for
S and T constraints.
(s390_mem_constraint): Remove handling of U and W constraints.
* config/s390/s390.md (various patterns): Remove the short
displacement constraints (Q and R) if a long displacement
constraint is present.  Add longdisp as required CPU capability.
* config/s390/vector.md: Likewise.
* config/s390/vx-builtins.md: Likewise.

From-SVN: r235626

avr-related reload fix from Senthil Kumar Selvaraj

PR target/60040
* reload1.c (reload): Call finish_spills before
restarting reload loop. Skip select_reload_regs
if update_eliminables_and_spill returns true.

testsuite/
PR target/60040
* gcc.target/avr/pr60040-1.c: New.
* gcc.target/avr/pr60040-2.c: New.

From-SVN: r235625

pr18589-10.c: Adjust.

2016-04-29  Richard Biener  <rguenther@suse.de>

* gcc.dg/tree-ssa/pr18589-10.c: Adjust.

From-SVN: r235624

[ARC] Fix unwanted match for sign extend 16-bit constant.

The combine pass may conclude umulhisi3_imm pattern can accept also sign
extended 16-bit constants. This patch prohibits the combine in considering
this pattern as suitable.

gcc/
2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.h (UNSIGNED_INT12, UNSIGNED_INT16): Define.
* config/arc/arc.md (umulhisi3): Use arc_short_operand predicate.
(umulhisi3_imm): Update predicates and constraint letters.
(umulhisi3_reg): Declare instruction as commutative.
* config/arc/constraints.md (J12, J16): New constraints.
* config/arc/predicates.md (short_unsigned_const_operand): New
predicate.
(arc_short_operand): Likewise.
* testsuite/gcc.target/arc/umulsihi3_z.c: New file.

From-SVN: r235623

re PR tree-optimization/13962 ([tree-ssa] make "fold" use alias information to optimize pointer comparisons)

2016-04-29  Richard Biener  <rguenther@suse.de>

PR tree-optimization/13962
PR tree-optimization/65686
* tree-ssa-alias.h (ptrs_compare_unequal): Declare.
* tree-ssa-alias.c (ptrs_compare_unequal): New function
using PTA to compare pointers.
* match.pd: Add pattern for pointer equality compare simplification
using ptrs_compare_unequal.

* gcc.dg/uninit-pr65686.c: New testcase.

From-SVN: r235622

stor-layout.c (layout_type): Do not build a pointer-to-element type for arrays.

2016-04-29  Richard Biener  <rguenther@suse.de>

* stor-layout.c (layout_type): Do not build a pointer-to-element
type for arrays.

From-SVN: r235621

i386.md (Load+RegOp to Mov+MemOp peephole2): Use SWI mode iterator.

* config/i386/i386.md (Load+RegOp to Mov+MemOp peephole2):
Use SWI mode iterator.  Use general_reg_operand predicate.
(Load+RegOp to Mov+MemOp peephole2 with vector regs): Split
peephole to MMX and SSE part.  Use mmx_reg_operand and sse_reg_operand
predicates.

From-SVN: r235620

Daily bump.

From-SVN: r235619

re PR middle-end/70843 (ICE in add_expr, at tree.c:7913)

PR middle-end/70843
* fold-const.c (operand_equal_p): Don't verify hash value equality
if arg0 == arg1.
* tree.c (inchash::add_expr): Handle STATEMENT_LIST.  Ignore BLOCK
and OMP_CLAUSE.

* gcc.dg/pr70843.c: New test.

From-SVN: r235615

c-array-notation.c (fix_builtin_array_notation_fn): Fix final argument to build_modify_expr in two cases.

2016-04-28  Andrew MacLeod  <amacleod@redhat.com>

* c-array-notation.c (fix_builtin_array_notation_fn): Fix final
argument to build_modify_expr in two cases.

From-SVN: r235614

compiler: Mark concurrent calls.

    If a call expression is executed in an independent goroutine via
    use of a Go statement, mark it as concurrent.

    Reviewed-on: https://go-review.googlesource.com/18700

From-SVN: r235608

re PR target/70858 (__builtin_ia32_bextr_u64 ICE with '-m32 -march=core-avx2')

PR target/70858
* config/i386/i386.c (bdesc_special_args): Add | OPTION_MASK_ISA_64BIT
to __builtin_ia32_lwpval64 and __builtin_ia32_lwpins64.
(bdesc_args): Add | OPTION_MASK_ISA_64BIT to __builtin_ia32_bextr_u64,
__builtin_ia32_bextri_u64, __builtin_ia32_bzhi_di,
__builtin_ia32_pdep_di and __builtin_ia32_pext_di.

* gcc.target/i386/pr70858.c: New test.

From-SVN: r235607

rs6000: Clean up rs6000_stack_info a bit

- Rename "info_ptr" to "info", as in all other routines;
- Don't set fields to 0, the whole struct already is set to 0;
- Fix formatting a bit.

* config/rs6000/rs6000.c (compute_save_world_info): Rename info_ptr
to info.  Don't initialize separate fields to 0.  Clean up
formatting a bit.

From-SVN: r235606

nps400-1.c: New file.

2016-04-28  Andrew Burgess  <andrew.burgess@embecosm.com>

        * gcc.target/arc/nps400-1.c: New file.

From-SVN: r235603

compiler: Export String_index_expression.

    Exports String_index_expression and adds the getter `string` that
    returns the underlying string.  This will be used to handle string
    indexing different from array indexing in escape analysis.

    Reviewed-on: https://go-review.googlesource.com/18545

From-SVN: r235602

i386.md (peephole2s for operations with memory inputs): Use SWI mode iterator.

* config/i386/i386.md (peephole2s for operations with memory inputs):
Use SWI mode iterator.
(peephole2s for operations with memory outputs): Ditto.
Do not check for stack checking probe.

(probe_stack): Remove expander.

From-SVN: r235601

arc.c (arc_print_operand): Print integer 'H' / 'L'

2016-04-28  Joern Rennecke  <joern.rennecke@embecosm.com>
            Andrew Burgess  <andrew.burgess@embecosm.com>
gcc:
        * config/arc/arc.c (arc_print_operand): Print integer 'H' / 'L'
gcc/testsuite:
        * gcc.target/arc/movh_cl-1.c: New file.

Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r235600

* gdbinit.in: Skip line-map.h.

From-SVN: r235598

Implement C++17 [[nodiscard]] attribute.

PR c++/38172
PR c++/54379
gcc/c-family/
* c-lex.c (c_common_has_attribute): Handle nodiscard.
gcc/cp/
* parser.c (cp_parser_std_attribute): Handle [[nodiscard]].
* tree.c (handle_nodiscard_attribute): New.
(cxx_attribute_table): Add [[nodiscard]].
* cvt.c (cp_get_fndecl_from_callee, cp_get_callee_fndecl): New.
(maybe_warn_nodiscard): New.
(convert_to_void): Call it.

From-SVN: r235597

cvt.c (cp_get_callee): New.

* cvt.c (cp_get_callee): New.

* constexpr.c (get_function_named_in_call): Use it.
* cxx-pretty-print.c (postfix_expression): Use it.
* except.c (check_noexcept_r): Use it.
* method.c (check_nontriv): Use it.
* tree.c (build_aggr_init_expr): Use it.
* cp-tree.h: Declare it.

From-SVN: r235596

arc.h (SYMBOL_FLAG_CMEM): Define.

2016-04-28  Joern Rennecke  <joern.rennecke@embecosm.com>
            Andrew Burgess  <andrew.burgess@embecosm.com>
gcc:
        * config/arc/arc.h (SYMBOL_FLAG_CMEM): Define.
        (TARGET_NPS_CMEM_DEFAULT): Provide default definition.
        * config/arc/arc.c (arc_address_cost): Return 0 for cmem_address.
        (arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated.
        * config/arc/arc.opt (mcmem): New option.
        * config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative,
        supply length for r/m alternative.
        (*extendqisi2_ac): Likewise.
        (*extendhisi2_i): Add r/Uex alternative, supply length for r/m and
        r/Uex alternative.
        (movqi_insn): Add r/Ucm and Ucm/?Rac alternatives.
        (movhi_insn): Likewise.
        (movsi_insn): Add r/Ucm,Ucm/w alternatives.
        (*zero_extendqihi2_i): Add r/Ucm alternative.
        (*zero_extendqisi2_ac): Likewise.
        (*zero_extendhisi2_i): Likewise.
        * config/arc/constraints.md (Uex): New memory constraint.
        (Ucm): New define_constraint.
        * config/arc/predicates.md (long_immediate_loadstore_operand):
        Return 0 for MEM with cmem_address address.
        (cmem_address_0): New predicates.
        (cmem_address_1): Likewise.
        (cmem_address_2): Likewise.
        (cmem_address): Likewise.
gcc/testsuite:
        * gcc.target/arc/cmem-1.c: New file.
        * gcc.target/arc/cmem-2.c: New file.
        * gcc.target/arc/cmem-3.c: New file.
        * gcc.target/arc/cmem-4.c: New file.
        * gcc.target/arc/cmem-5.c: New file.
        * gcc.target/arc/cmem-6.c: New file.
        * gcc.target/arc/cmem-7.c: New file.
        * gcc.target/arc/cmem-ld.inc: New file.
        * gcc.target/arc/cmem-st.inc: New file.

Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r235595

sbitmap: Remove popcount

In r193072 sbitmap_popcount was removed, so we cannot ask for the popcount
of an sbitmap anymore.  Nothing calls sbitmap_alloc_with_popcount either.
This patch removes everything else popcount-related from sbitmap.

* cfganal.c (bitmap_intersection_of_succs): Delete assert checking
dst->popcount.
(bitmap_intersection_of_preds): Ditto.
(bitmap_union_of_succs): Ditto.
(bitmap_union_of_preds): Ditto.
* sbitmap.c (do_popcount): Delete.
(BITMAP_DEBUGGING): Delete.
(sbitmap_verify_popcount): Delete.
(sbitmap_alloc): Don't initialize the popcount field.
(sbitmap_alloc_with_popcount): Delete.
(sbitmap_resize): Don't resize the popcount array.
(sbitmap_vector_alloc): Don't initialize the popcount field.
(bitmap_copy): Don't copy the popcount array.
(bitmap_clear): Don't clear the popcount array.
(bitmap_clear): Delete the popcount array handling.
(bitmap_ior_and_compl): Delete the popcount assert.
(bitmap_not): Ditto.
(bitmap_and_compl): Ditto.
(bitmap_and): Delete the popcount array handling.
(bitmap_xor): Ditto.
(bitmap_ior): Ditto.
(bitmap_or_and): Delete the popcount assert.
(bitmap_and_or): Ditto.
(popcount_table): Delete.
(sbitmap_elt_popcount): Delete.
* sbitmap.h (simple_bitmap_def): Delete the popcount field.
(bitmap_set_bit): Delete the popcount assert.
(bitmap_clear_bit): Ditto.
(sbitmap_free): Don't free the popcount array.
(sbitmap_alloc_with_popcount): Delete declaration.
(sbitmap_popcount): Ditto.

From-SVN: r235592

* ChangeLog: Remove duplicate entry.

From-SVN: r235591

arc.h (SYMBOL_FLAG_CMEM): Define.

2016-04-28  Joern Rennecke  <joern.rennecke@embecosm.com>
            Andrew Burgess  <andrew.burgess@embecosm.com>
gcc:
        * config/arc/arc.h (SYMBOL_FLAG_CMEM): Define.
        (TARGET_NPS_CMEM_DEFAULT): Provide default definition.
        * config/arc/arc.c (arc_address_cost): Return 0 for cmem_address.
        (arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated.
        * config/arc/arc.opt (mcmem): New option.
        * config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative,
        supply length for r/m alternative.
        (*extendqisi2_ac): Likewise.
        (*extendhisi2_i): Add r/Uex alternative, supply length for r/m and
        r/Uex alternative.
        (movqi_insn): Add r/Ucm and Ucm/?Rac alternatives.
        (movhi_insn): Likewise.
        (movsi_insn): Add r/Ucm,Ucm/w alternatives.
        (*zero_extendqihi2_i): Add r/Ucm alternative.
        (*zero_extendqisi2_ac): Likewise.
        (*zero_extendhisi2_i): Likewise.
        * config/arc/constraints.md (Uex): New memory constraint.
        (Ucm): New define_constraint.
        * config/arc/predicates.md (long_immediate_loadstore_operand):
        Return 0 for MEM with cmem_address address.
        (cmem_address_0): New predicates.
        (cmem_address_1): Likewise.
        (cmem_address_2): Likewise.
        (cmem_address): Likewise.
gcc/testsuite:
        * gcc.target/arc/cmem-1.c: New file.
        * gcc.target/arc/cmem-2.c: New file.
        * gcc.target/arc/cmem-3.c: New file.
        * gcc.target/arc/cmem-4.c: New file.
        * gcc.target/arc/cmem-5.c: New file.
        * gcc.target/arc/cmem-6.c: New file.
        * gcc.target/arc/cmem-7.c: New file.
        * gcc.target/arc/cmem-ld.inc: New file.
        * gcc.target/arc/cmem-st.inc: New file.

Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r235590

rs6000: Rename insn_chain_scanned_p to spe_insn_chain_scanned_p

This makes it clearer this field is only for SPE.

* config/rs6000/rs6000.c (machine_function): Rename
insn_chain_scanned_p to spe_insn_chain_scanned_p.
(rs6000_stack_info): Adjust.

From-SVN: r235588

constraints.md (Usd): Convert to define_constraint.

2016-04-28  Andrew Burgess  <andrew.burgess@embecosm.com>

        * config/arc/constraints.md (Usd): Convert to define_constraint.
        (Us<): Likewise.
        (Us>): Likewise.

From-SVN: r235587

re PR target/70821 (x86_64: __atomic_fetch_add/sub() uses XADD rather than DECL in some cases)

PR target/70821
* config/i386/sync.md (define_peephole2 *atomic_fetch_add_cmp<mode>):
Add new peephole2 where the first insn is *mov<mode>_or instead of
*mov<mode>_internal.

* gcc.target/i386/pr70821.c: New test.

From-SVN: r235586

tracer: Make bb_seen static

bb_seen is not used outside of tracer.c.

* tracer.c (bb_seen): Make static.

From-SVN: r235585

arc-common.c (arc_handle_option): Add NPS400 support, setup defaults.

2016-04-28  Andrew Burgess  <andrew.burgess@embecosm.com>

        * common/config/arc/arc-common.c (arc_handle_option): Add NPS400
        support, setup defaults.
        * config/arc/arc-opts.h (enum processor_type): Add NPS400.
        * config/arc/arc.c (arc_init): Add NPS400 support.
        * config/arc/arc.h (CPP_SPEC): Add NPS400 defines.
        (TARGET_ARC700): NPS400 is also an ARC700.
        * config/arc/arc.opt: Add NPS400 options to -mcpu=.

From-SVN: r235584

nds32: Fix casesi (PR70668)

Expanders do not have more elements in the operands array than declared
in the pattern.  So, we cannot use operands[5] here.  Instead just
declare and use another rtx.

PR target/70668
* config/nds32/nds32.md (casesi): Don't access the operands array
out of bounds.

From-SVN: r235583

i386.md (zeroing peephole2): Use general_reg_operand.

* config/i386/i386.md (zeroing peephole2): Use general_reg_operand.
(or $-1,reg peephole2): Ditto.
(strict_low_part zeroing peephole2): Use SWI12 mode iterator.

From-SVN: r235581

doc/extend.texi: Discourage use of the optimize attribute

* doc/extend.texi (Common Function Attributes) [optimize]:
Discourage use of the optimize attribute.

From-SVN: r235580

Forgotten gcc/java/ChangeLog entry.

From-SVN: r235579

This patch adds support for the signed and unsigned int versions of the...

This patch adds support for the signed and unsigned int versions of the
vec_adde altivec builtins from the Power Architecture 64-Bit ELF V2 ABI
OpenPOWER ABI for Linux Supplement (16 July 2015 Version 1.1). There are
many of the builtins that are missing and this is the first of a series
of patches to add them.

There aren't instructions for the int versions of vec_adde so the
output code is built from other built-ins that do have instructions
which in this case is just two vec_adds with a vec_and to ensure the
carry vector is comprised of only the values 0 or 1.

The new test cases are executable tests which verify that the generated
code produces expected values. C macros were used so that the same
test case could be used for both the signed and unsigned versions. An
extra executable test case is also included to ensure that the modified
support for the __int128 versions of vec_adde is not broken. The same
test case could not be used for both int and __int128 because of some
differences in loading and storing the vectors.

Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this ok for trunk?

[gcc]

2016-04-28  Bill Seurer  <seurer@linux.vnet.ibm.com>

* config/rs6000/rs6000-builtin.def (vec_adde): Change vec_adde to a
special case builtin.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove
ALTIVEC_BUILTIN_VEC_ADDE.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
support for ALTIVEC_BUILTIN_VEC_ADDE.
* config/rs6000/rs6000.c (altivec_init_builtins): Add definition
for __builtin_vec_adde.

[gcc/testsuite]

2016-04-28  Bill Seurer  <seurer@linux.vnet.ibm.com>

* gcc.target/powerpc/vec-adde.c: New test.
* gcc.target/powerpc/vec-adde-int128.c: New test.

From-SVN: r235577

i386.md (sse4_1_round<mode>2): Add avx512f alternative.

* config/i386/i386.md (sse4_1_round<mode>2): Add avx512f alternative.
* config/i386/sse.md (sse4_1_round<ssescalarmodesuffix>): Likewise.

* gcc.target/i386/avx-vround-1.c: New test.
* gcc.target/i386/avx-vround-2.c: New test.
* gcc.target/i386/avx512vl-vround-1.c: New test.
* gcc.target/i386/avx512vl-vround-2.c: New test.

From-SVN: r235576

Don't include minor version in GCJ ABI version (PR java/70839)

PR java/70839
* decl.c (parse_version): Remove minor handling.

From-SVN: r235575

Cilk Plus testsuite needs massive cleanup (PR testsuite/70595)

gcc:
PR testsuite/70595
* doc/sourcebuild.texi (Effective-Target Keywords, Other
attributes): Document cilkplus_runtime.

gcc/testsuite:
PR testsuite/70595
* lib/target-supports.exp (check_libcilkrts_available): Rename to ...
(check_effective_target_cilkplus_runtime): ... this.
* g++.dg/cilk-plus/cilk-plus.exp: Adapt to it.
* gcc.dg/cilk-plus/cilk-plus.exp: Likewise.

* c-c++-common/cilk-plus/CK/cilk-for-2.c: Remove dg-do target selector.
Require cilkplus_runtime.
Don't add -lcilkrts.
* c-c++-common/cilk-plus/CK/cilk-fors.c: Likewise.
* c-c++-common/cilk-plus/CK/cilk_for_grain.c: Likewise.
* c-c++-common/cilk-plus/CK/cilk_for_ptr_iter.c: Likewise.
* c-c++-common/cilk-plus/CK/fib.c: Likewise.
* c-c++-common/cilk-plus/CK/fib_init_expr_xy.c: Likewise.
* c-c++-common/cilk-plus/CK/fib_no_return.c: Likewise.
* c-c++-common/cilk-plus/CK/fib_no_sync.c: Likewise.
* c-c++-common/cilk-plus/CK/nested_cilk_for.c: Likewise.
* c-c++-common/cilk-plus/CK/pr60586.c: Likewise.
* c-c++-common/cilk-plus/CK/pr69826-1.c: Likewise.
* c-c++-common/cilk-plus/CK/pr69826-2.c: Likewise.
* c-c++-common/cilk-plus/CK/spawnee_inline.c: Likewise.
* c-c++-common/cilk-plus/CK/spawner_inline.c: Likewise.
* c-c++-common/cilk-plus/CK/spawning_arg.c: Likewise.
* c-c++-common/cilk-plus/CK/steal_check.c: Likewise.
* c-c++-common/cilk-plus/CK/varargs_test.c: Likewise.
* g++.dg/cilk-plus/CK/catch_exc.cc: Likewise.
* g++.dg/cilk-plus/CK/cilk-for-tplt.cc: Likewise.
* g++.dg/cilk-plus/CK/const_spawn.cc: Likewise.
* g++.dg/cilk-plus/CK/fib-opr-overload.cc: Likewise.
* g++.dg/cilk-plus/CK/fib-tplt.cc: Likewise.
* g++.dg/cilk-plus/CK/for1.cc: Likewise.
* g++.dg/cilk-plus/CK/lambda_spawns.cc: Likewise.
* g++.dg/cilk-plus/CK/lambda_spawns_tplt.cc: Likewise.
* g++.dg/cilk-plus/CK/pr60586.cc: Likewise.
* g++.dg/cilk-plus/CK/pr66326.cc: Likewise.
* g++.dg/cilk-plus/CK/stl_iter.cc: Likewise.
* g++.dg/cilk-plus/CK/stl_rev_iter.cc: Likewise.
* g++.dg/cilk-plus/CK/stl_test.cc: Likewise.

* c-c++-common/cilk-plus/CK/pr63307.c: Remove dg-do target selector.
* c-c++-common/cilk-plus/SE/ef_error3.c: Likewise.

* c-c++-common/cilk-plus/SE/ef_error2.c: Explain target selector.

* c-c++-common/cilk-plus/CK/test__cilk.c: Run if
cilkplus_runtime.

From-SVN: r235574

Update .po files.

gcc/po:
* be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po,
ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po,
zh_TW.po: Update.

libcpp/po:
* be.po, ca.po, da.po, de.po, el.po, eo.po, es.po, fi.po, fr.po,
id.po, ja.po, nl.po, pr_BR.po, ru.po, sr.po, sv.po, tr.po, uk.po,
vi.po, zh_CN.po, zh_TW.po: Update.

From-SVN: r235571

Verify that context of local DECLs is the current function

2016-04-28  Martin Jambor  <mjambor@suse.cz>

* tree-cfg.c (verify_expr): Verify that local declarations belong to
this function.  Call verify_expr on MEM_REFs and bases of other
handled_components.

From-SVN: r235570

[internal-fn.c][committed] Convert conditional compilation on WORD_REGISTER_OPERATIONS

* internal-fn.c (expand_arith_overflow): Convert preprocessor check
for WORD_REGISTER_OPERATIONS to runtime check.

From-SVN: r235569

[ARC] Pass mfpuda to assembler.

gcc/
2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.h (ASM_SPEC): Pass mfpuda to assembler.

From-SVN: r235568

[ARC] Fix FPX/FPUDA code gen when compiling for big-endian.

gcc/
2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (arc_process_double_reg_moves): Fix for
big-endian compilation.
(arc_rtx_costs): Fix high/low naming.
* config/arc/arc.md (addf3): Likewise.
(subdf3): Likewise.
(muldf3): Likewise.

From-SVN: r235567

re PR tree-optimization/70840 (revisit reassoc handling of pow / powi, amend match.pd for powi)

2016-04-28  Richard Biener  <rguenther@suse.de>

PR tree-optimization/70840
* match.pd: powi(-x, y) and powi(|x|,y) -> powi(x,y) if y is even;
Fix pow(copysign(x, y), z) -> pow(x, z) and add powi variant;
Mark x * pow(x,c) -> pow(x,c+1) commutative.
Add powi(x,y) * powi(z,y) -> powi(x*z,y).

From-SVN: r235566

libstdc++/70766 use std::addressof instead of operator&

PR libstdc++/70766
* include/bits/basic_ios.tcc (basic_ios::_M_cache_locale): Use
__addressof.
* include/bits/stream_iterator.h (istream_iterator, ostream_iterator):
Likewise.
* include/std/atomic (atomic<_Tp>): Likewise.
* include/std/shared_mutex (shared_lock): Likewise.
* testsuite/24_iterators/istream_iterator/70766.cc: New test.
* testsuite/24_iterators/ostream_iterator/70766.cc : New test.
* testsuite/29_atomics/atomic/60695.cc: Adjust dg-error line number.
* testsuite/29_atomics/atomic/70766.cc: New test.
* testsuite/30_threads/shared_lock/70766.cc: New test.

From-SVN: r235565

hashtable_policy.h (__detail::_Insert_base, [...]): Improve comments.

* include/bits/hashtable_policy.h (__detail::_Insert_base,
__detail::_Insert): Improve comments.

From-SVN: r235564

[AArch64] Define WORD_REGISTER_OPERATIONS to zero and comment why

* config/aarch64/aarch64.h (WORD_REGISTER_OPERATIONS): Define to 0
and explain why in a comment.

From-SVN: r235563

[ARC] Don't use drsub* instructions when selecting fpuda.

The double precision floating point assist instructions are not
implementing the reverse double subtract instruction (drsub) found in
the FPX extension.

gcc/
2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.md (cpu_facility): Add fpx variant.
(subdf3): Prohibit use reverse sub when assist operations option
is enabled.
* config/arc/fpx.md (subdf3_insn, *dsubh_peep2_insn): Allow drsub
instructions only when FPX is enabled.
        * testsuite/gcc.target/arc/trsub.c: New test.

From-SVN: r235562

i386.md (*fop_<mode>_1_mixed): Do not check for mult_operator when calculating "type" attribute.

* config/i386/i386.md (*fop_<mode>_1_mixed): Do not check for
mult_operator when calculating "type" attribute.
(*fop_<mode>_1_i387): Ditto.
(*fop_xf_1_i387): Ditto.
(x87 stack loads peephole2): Add "reg = op (mem, reg)" peephole2.
Use std::swap to swap operands.  Use RTL expressions to generate
converted pattern.

From-SVN: r235561

Replace AWK script with the python script.

* analyze_brprob: Remove.
* analyze_brprob.py: New file.

From-SVN: r235560

[ARC] Add TLS support.

gcc/
2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>
    Joern Rennecke  <joern.rennecke@embecosm.com>

* config/arc/arc-protos.h (arc_legitimize_pic_address): Remove
declaration.
(emit_pic_move): Remove.
(arc_eh_uses, insn_is_tls_gd_dispatch): Declare.
* config/arc/arc.c (emit_pic_move): Removed.
(TARGET_HAVE_TLS): Define.
(arc_conditional_register_usage): Test for arc_tp_regno.
(arc_print_operand, arc_print_operand_address): Handle TLS
unspecs.
(arc_needs_pcl_p): New function.
(arc_legitimate_pc_offset_p): Use arc_needs_pcl_p.
(arc_legitimate_pic_addr_p): Handle TLS unspecs.
(arc_raw_symbolic_reference_mentioned_p): Likewise.
(arc_get_tp, arc_emit_call_tls_get_addr): New function.
(arc_legitimize_tls_address): Likewise.
(DTPOFF_ZERO_SYM): Define.
(arc_legitimize_pic_address): Make it static, handle TLS cases.
(arc_output_pic_addr_const): Print TLS unspecs.
(prepare_pic_move): New function, replaces emit_pic_move.
(arc_legitimate_constant_p): Handle TLS unspecs.
(arc_legitimate_address_p): Likewise.
(arc_rewrite_small_data_p): Use assert for TLS constants.
(prepare_move_operands): Use prepare_pic_move.
(arc_legitimize_address): Legitimize tls addresses.
(arc_epilogue_uses): Check for arc_tp_regno.
(arc_eh_uses, insn_is_tls_gd_dispatch): New function.
* config/arc/arc.h [DEFAULT_LIBC != LIBC_UCLIBC] (EXTRA_SPECS):
Define.
[DEFAULT_LIBC != LIBC_UCLIBC] (ARC_TLS_EXTRA_START_SPEC):
Likewise.
[DEFAULT_LIBC != LIBC_UCLIBC] (STARTFILE_SPEC): Add
%(arc_tls_extra_start_spec).
(TARGET_CPU_CPP_BUILTINS): Define __ARC_TLS_REGNO__.
(REGNO_OK_FOR_BASE_P): Check for arc_tp_regno.
(EH_USES): Define.
(INSN_REFERENCES_ARE_DELAYED): Use insn_is_tls_gd_dispatch.
* config/arc/arc.md (UNSPEC_TLS_GD, UNSPEC_TLS_LD, UNSPEC_TLS_IE)
(UNSPEC_TLS_OFF): Add.
(R10_REG): Define.
(tls_load_tp_soft, tls_gd_load, tls_gd_get_addr, tls_gd_dispatch)
(get_thread_pointersi): New patterns.
* config/arc/arc.opt (mtp-regno): New option.
* config/arc/predicates.md (move_src_operand): Handle TLS symbols.
(move_dest_operand): Likewise.
* configure: Regenerate.
* configure.ac: Add arc*-*-* case to test for tls.
* doc/invoke.texi (ARC options): Document mtp-regno.

Co-Authored-By: Joern Rennecke <joern.rennecke@embecosm.com>
From-SVN: r235559

[ARC/LIBGCC] Add TLS support.

libgcc/
2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>
    Joern Rennecke  <joern.rennecke@embecosm.com>

* config/arc/crttls.S: New file.
* config/arc/t-arc: New rule.
* config.host (arc*-*-elf*, arc*-*-linux*): Add crttls.o.

Co-Authored-By: Joern Rennecke <joern.rennecke@embecosm.com>
From-SVN: r235558

re PR ada/70786 (Missing "not" breaks Ada.Text_IO.Get_Immediate(File, Item, Available))

PR ada/70786
* a-textio.adb (Get_Immediate): Add missing 'not' in expression.

From-SVN: r235554

[ARC] Add SIMD extensions for ARC HS

gcc/
2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (arc_vector_mode_supported_p): Add support for
the new ARC HS SIMD instructions.
(arc_preferred_simd_mode): New function.
(arc_autovectorize_vector_sizes): Likewise.
(TARGET_VECTORIZE_PREFERRED_SIMD_MODE)
(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Define.
(arc_init_reg_tables): Accept new ARC HS SIMD modes.
(arc_init_builtins): Add new SIMD builtin types.
(arc_split_move): Handle 64 bit vector moves.
* config/arc/arc.h (TARGET_PLUS_DMPY, TARGET_PLUS_MACD)
(TARGET_PLUS_QMACW): Define.
* config/arc/builtins.def (QMACH, QMACHU, QMPYH, QMPYHU, DMACH)
(DMACHU, DMPYH, DMPYHU, DMACWH, DMACWHU, VMAC2H, VMAC2HU, VMPY2H)
(VMPY2HU, VADDSUB2H, VSUBADD2H, VADDSUB, VSUBADD, VADDSUB4H)
(VSUBADD4H): New builtins.
* config/arc/simdext.md: Add new ARC HS SIMD instructions.
* testsuite/gcc.target/arc/builtin_simdarc.c: New file.

From-SVN: r235551

c-common.c (get_source_date_epoch): New function...

gcc/c-family/ChangeLog:

2016-04-28  Eduard Sanou  <dhole@openmailbox.org>
    Matthias Klose  <doko@debian.org>

* c-common.c (get_source_date_epoch): New function, gets the environment
variable SOURCE_DATE_EPOCH and parses it as long long with error
handling.
* c-common.h (get_source_date_epoch): Prototype.
* c-lex.c (c_lex_with_flags): set parse_in->source_date_epoch.

gcc/ChangeLog:

2016-04-28  Eduard Sanou  <dhole@openmailbox.org>
    Matthias Klose  <doko@debian.org>

* doc/cppenv.texi: Document SOURCE_DATE_EPOCH environment variable.

libcpp/ChangeLog:

2016-04-28  Eduard Sanou  <dhole@openmailbox.org>
    Matthias Klose  <doko@debian.org>

* include/cpplib.h (cpp_init_source_date_epoch): Prototype.
* init.c (cpp_init_source_date_epoch): New function.
* internal.h: Added source_date_epoch variable to struct
cpp_reader to store a reproducible date.
* macro.c (_cpp_builtin_macro_text): Set pfile->date timestamp from
pfile->source_date_epoch instead of localtime if source_date_epoch is
set, to be used for __DATE__ and __TIME__ macros to help reproducible
builds.

Co-Authored-By: Matthias Klose <doko@debian.org>
From-SVN: r235550

decl.c (parse_version): Don't encode the minor version in the abi version.

2016-04-28  Matthias Klose  <doko@ubuntu.com>

        * decl.c (parse_version): Don't encode the minor version in the abi
        version.

From-SVN: r235546

re PR tree-optimization/70777 (x*x pessimised to pow(x,2) with -Og -ffast-math)

2016-04-28  Richard Biener  <rguenther@suse.de>

PR middle-end/70777
* fold-const.c (fold_binary_loc): Remove x*x to pow(x,2.0)
canonicalization.

From-SVN: r235545

sh-common.c: Remove SH5 support.

gcc/
* common/config/sh/sh-common.c: Remove SH5 support.
* config/sh/constraints.md: Likewise.
* config/sh/config/sh/elf.h: Likewise.
* config/sh/linux.h: Likewise.
* config/sh/netbsd-elf.h: Likewise.
* config/sh/predicates.md: Likewise.
* config/sh/sh-c.c: Likewise.
* config/sh/sh-protos.h: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.h: Likewise.
* config/sh/sh.md: Likewise.
* config/sh/sh.opt: Likewise.
* config/sh/sync.md: Likewise.
* config/sh/sh64.h: Delete.
* config/sh/shmedia.h: Likewise.
* config/sh/shmedia.md: Likewise.
* config/sh/sshmedia.h: Likewise.
* config/sh/t-netbsd-sh5-64: Likewise.
* config/sh/t-sh64: Likewise.
* config/sh/ushmedia.h: Likewise.

From-SVN: r235544

Daily bump.

From-SVN: r235543

i386.md (sign_extend to memory peephole2s): Use general_reg_operand instead of register_operand predicate.

* config/i386/i386.md (sign_extend to memory peephole2s): Use
general_reg_operand instead of register_operand predicate.

From-SVN: r235539

params.def (MIN_PARTITION_SIZE): Set default value to 10000.

2016-04-27  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

* params.def (MIN_PARTITION_SIZE): Set default value to 10000.

From-SVN: r235538

match.pd: unsigned A - B > A --> A < B

2016-04-27  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* match.pd (A - B > A, A + B < A): New transformations.

gcc/testsuite/
* gcc.dg/tree-ssa/overflow-2.c: New testcase.
* gcc.dg/tree-ssa/minus-ovf.c: Likewise.

From-SVN: r235537

Reduce nesting of parentheses in conditionals generated by genattrtab

gcc/ChangeLog:

* genattrtab.c (write_test_expr): New parameter EMIT_PARENS
which defaults to true.  Emit an outer pair of parentheses only if
EMIT_PARENS.  When continuing a chain of && or || (or & or |),
don't emit parentheses for the right-hand operand.

From-SVN: r235536

* tree-ssa-dom.c (record_temporary_equivalences): Fix typo in comment.

From-SVN: r235535

re PR c++/69024 ([cilkpus] cilk_spawn is broken for initializations with implicit conversion operators defined)

PR c++/69024
PR c++/68997
* cilk.c (cilk_ignorable_spawn_rhs_op): Change to external linkage.
(cilk_recognize_spawn): Renamed from recognize_spawn and change to
external linkage.
(cilk_detect_and_unwrap): Corresponding changes.
(extract_free_variables): Don't extract free variables from
AGGR_INIT_EXPR slot.
* c-common.h (cilk_ignorable_spawn_rhs_op): Prototype.
(cilk_recognize_spawn): Likewise.

PR c++/69024
PR c++/68997
* cp-gimplify.c (cp_gimplify_expr): Call cilk_cp_detect_spawn_and_unwrap
instead of cilk_detect_spawn_and_unwrap.
* cp-cilkplus.c (is_conversion_operator_function_decl_p): New.
(find_spawn): New.
(cilk_cp_detect_spawn_and_unwrap): New.
* lambda.c: Include cp-cilkplus.h.
* parser.c: Include cp-cilkplus.h.
* cp-tree.h (cpp_validate_cilk_plus_loop): Move prototype into...
* cp-cilkpus.h: New file.

PR c++/69024
PR c++/68997
* g++.dg/cilk-plus/CK/pr68001.cc: Fix to not depend on broken
diagnostic.
* g++.dg/cilk-plus/CK/pr69024.cc: New test.
* g++.dg/cilk-plus/CK/pr68997.cc: New test.

Co-Authored-By: Jeff Law <law@redhat.com>
From-SVN: r235534

altivec.md (altivec_lvx_<mode>): Remove.

2016-04-27  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

* config/rs6000/altivec.md (altivec_lvx_<mode>): Remove.
(altivec_lvx_<mode>_internal): Document.
(altivec_lvx_<mode>_2op): New define_insn.
(altivec_lvx_<mode>_1op): Likewise.
(altivec_lvx_<mode>_2op_si): Likewise.
(altivec_lvx_<mode>_1op_si): Likewise.
(altivec_stvx_<mode>): Remove.
(altivec_stvx_<mode>_internal): Document.
(altivec_stvx_<mode>_2op): New define_insn.
(altivec_stvx_<mode>_1op): Likewise.
(altivec_stvx_<mode>_2op_si): Likewise.
(altivec_stvx_<mode>_1op_si): Likewise.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Expand vec_ld and vec_st during parsing.
* config/rs6000/rs6000.c (altivec_expand_lvx_be): Commentary
changes.
(altivec_expand_stvx_be): Likewise.
(altivec_expand_lv_builtin): Expand lvx built-ins to expose the
address-masking behavior in RTL.
(altivec_expand_stv_builtin): Expand stvx built-ins to expose the
address-masking behavior in RTL.
(altivec_expand_builtin): Change builtin code arguments for calls
to altivec_expand_stv_builtin and altivec_expand_lv_builtin.
(insn_is_swappable_p): Avoid incorrect swap optimization in the
presence of lvx/stvx patterns.
(alignment_with_canonical_addr): New function.
(alignment_mask): Likewise.
(find_alignment_op): Likewise.
(recombine_lvx_pattern): Likewise.
(recombine_stvx_pattern): Likewise.
(recombine_lvx_stvx_patterns): Likewise.
(rs6000_analyze_swaps): Perform a pre-pass to recognize lvx and
stvx patterns from expand.
* config/rs6000/vector.md (vector_altivec_load_<mode>): Use new
expansions.
(vector_altivec_store_<mode>): Likewise.

From-SVN: r235533

[AArch64] Replace insn to zero up SIMD registers

gcc/
* config/aarch64/aarch64.md
(*movhf_aarch64): Add "movi %0, #0" to zero up register and
remove the "fp" attributes.
(*movsf_aarch64): Add "movi %0, #0" to zero up register and
add the "simd" attributes.
(*movdf_aarch64): Likewise.
(*movtf_aarch64): Remove the "fp" attributes.
* testsuite/gcc.target/aarch64/fmovf-zero-reg.c: Update accordingly.
* testsuite/gcc.target/aarch64/fmovd-zero-reg.c: Likewise.

From-SVN: r235532

maybe_set_first_label_num can take an rtx_code_label *

The function maybe_set_first_label_num acts on a CODE_LABEL; we can
capture that in the type system.

gcc/ChangeLog:
* emit-rtl.c (maybe_set_first_label_num): Strengthen param from
rtx to rtx_code_label *.
* rtl.h (maybe_set_first_label_num): Likewise.

From-SVN: r235525

df: make df_problem instances "const"

The various struct df_problem instances are constant data; mark them
as such.

gcc/ChangeLog:
* df-core.c (df_add_problem): Make the problem param be const.
(df_remove_problem): Make local "problem" be const.
* df-problems.c (problem_RD): Make const.
(problem_LR): Likewise.
(problem_LIVE): Likewise.
(problem_MIR): Likewise.
(problem_CHAIN): Likewise.
(problem_WORD_LR): Likewise.
(problem_NOTE): Likewise.
(problem_MD): Likewise.
* df-scan.c (problem_SCAN): Likewise.
* df.h (struct df_problem): Make field "dependent_problem" be
const.
(struct dataflow): Likewise for field "problem".
(df_add_problem): Make param const.

From-SVN: r235524

i386.c (ix86_spill_class): Enable for TARGET_SSE2 when inter-unit moves to/from vector registers are enabled.

* config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 when
inter-unit moves to/from vector registers are enabled.  Do not disable
for TARGET_MMX.

From-SVN: r235523

Convert DF_SCAN etc from #define to an enum

Whilst debugging an issue in df, I noticed that there are
some #define constants that could be an enum (thus making them known
to gdb).

Convert them to a new enum, and update the "id" field of
struct df_problem.

gcc/ChangeLog:
* df.h (DF_SCAN, DF_LR, DF_LIVE, DF_RD, DF_CHAIN, DF_WORD_LR,
DF_NOTE, DF_MD, DF_MIR, DF_LAST_PROBLEM_PLUS1): Convert from
#define to...
(enum df_problem_id): ...this new enum.
(struct df_problem): Convert field "id" from "int" to
enum df_problem_id.

From-SVN: r235522

sem_aux.adb (Is_By_Reference_Type): Also return true for a tagged incomplete type without full view.

* sem_aux.adb (Is_By_Reference_Type): Also return true for a tagged
incomplete type without full view.
* sem_ch6.adb (Exchange_Limited_Views): Change into a function and
return the list of changes.
(Restore_Limited_Views): New procedure to undo the transformation made
by Exchange_Limited_Views.
(Analyze_Subprogram_Body_Helper): Adjust call to Exchange_Limited_Views
and call Restore_Limited_Views at the end, if need be.
(Possible_Freeze): Do not delay freezing because of incomplete types.
(Process_Formals): Remove kludges for class-wide types.
* types.h (By_Copy_Return): Delete.
* gcc-interface/ada-tree.h (TYPE_MAX_ALIGN): Move around.
(TYPE_DUMMY_IN_PROFILE_P): New macro.
* gcc-interface/gigi.h (update_profiles_with): Declare.
(finish_subprog_decl): Likewise.
(get_minimal_subprog_decl): Delete.
(create_subprog_type): Likewise.
(create_param_decl): Adjust prototype.
(create_subprog_decl): Likewise.
* gcc-interface/decl.c (defer_limited_with): Rename into...
(defer_limited_with_list): ...this.
(gnat_to_gnu_entity): Adjust to above renaming.
(finalize_from_limited_with): Likewise.
(tree_entity_vec_map): New structure.
(gt_pch_nx): New helpers.
(dummy_to_subprog_map): New hash table.
(gnat_to_gnu_param): Set the SLOC here.  Remove MECH parameter and
add FIRST parameter.  Deal with the mechanism here instead of...
Do not make read-only variant of types.  Simplify expressions.
In the by-ref case, test the mechanism before must_pass_by_ref
and also TYPE_IS_BY_REFERENCE_P before building the reference type.
(gnat_to_gnu_subprog_type): New static function extracted from...
Do not special-case the type_annotate_only mode.  Call
gnat_to_gnu_profile_type instead of gnat_to_gnu_type on return type.
Deal with dummy return types.  Likewise for parameter types.  Deal
with by-reference types explicitly and add a kludge for null procedures
with untagged incomplete types.  Remove assertion on the types and be
prepared for multiple elaboration of the declarations.  Skip the whole
CICO processing if the profile is incomplete.  Handle the completion of
a previously incomplete profile.
(gnat_to_gnu_entity) <E_Variable>: Rename local variable.
Adjust couple of calls to create_param_decl.
<E_Access_Subprogram_Type, E_Anonymous_Access_Subprogram_Type>:
Remove specific deferring code.
<E_Access_Type>: Also deal with E_Subprogram_Type designated type.
Simplify handling of dummy types and remove obsolete comment.
Constify a couple of variables.  Do not set TYPE_UNIVERSAL_ALIASING_P
on dummy types.
<E_Access_Subtype>: Tweak comment and simplify condition.
<E_Subprogram_Type>: ...here.  Call it and clean up handling.  Remove
obsolete comment and adjust call to gnat_to_gnu_param.  Adjust call to
create_subprog_decl.
<E_Incomplete_Type>: Add a couple of 'const' qualifiers and get rid of
inner break statements.  Tidy up condition guarding direct use of the
full view.
(get_minimal_subprog_decl): Delete.
(finalize_from_limited_with): Call update_profiles_with on dummy types
with TYPE_DUMMY_IN_PROFILE_P set.
(is_from_limited_with_of_main): Delete.
(associate_subprog_with_dummy_type): New function.
(update_profile): Likewise.
(update_profiles_with): Likewise.
(gnat_to_gnu_profile_type): Likewise.
(init_gnat_decl): Initialize dummy_to_subprog_map.
(destroy_gnat_decl): Destroy dummy_to_subprog_map.
* gcc-interface/misc.c (gnat_get_alias_set): Add guard for accessing
TYPE_UNIVERSAL_ALIASING_P.
(gnat_get_array_descr_info): Minor tweak.
* gcc-interface/trans.c (gigi): Adjust calls to create_subprog_decl.
(build_raise_check): Likewise.
(Compilation_Unit_to_gnu): Likewise.
(Identifier_to_gnu): Accept mismatches coming from a limited context.
(Attribute_to_gnu): Remove kludge for dispatch table entities.
(process_freeze_entity): Do not retrieve old definition if there is an
address clause on the entity.  Call update_profiles_with on dummy types
with TYPE_DUMMY_IN_PROFILE_P set.
* gcc-interface/utils.c (build_dummy_unc_pointer_types): Also set
TYPE_REFERENCE_TO to the fat pointer type.
(create_subprog_type): Delete.
(create_param_decl): Remove READONLY parameter.
(finish_subprog_decl): New function extracted from...
(create_subprog_decl): ...here.  Call it.  Remove CONST_FLAG and
VOLATILE_FLAG parameters and adjust.
(update_pointer_to): Also clear TYPE_REFERENCE_TO in the unconstrained
case.

From-SVN: r235521

Fix comment in rtl.def

Commit r210360 removed the first "i" field from the various instruction
nodes in rtx.def, moving it to an explicit "int insn_uid;" field
of the union "u2" within rtx_def.

Update the comment in rtl.def to reflect this change.  Also, fix
a stray apostrophe.

gcc/ChangeLog:
* rtl.def: Update comment for "things in the instruction chain" to
reflect the removal of the leading "i" field for INSN_UID in
r210360.  Fix bogus apostrophe.

From-SVN: r235520

i386.md (lea arith with mem operand + setcc peephole2): Set operator mode.

* config/i386/i386.md
(lea arith with mem operand + setcc peephole2): Set operator mode.

From-SVN: r235519

Extend STV pass to 64-bit mode

128-bit SSE load and store instructions can be used for load and store
of 128-bit integers if they are the only operations on 128-bit integers.
To convert load and store of 128-bit integers to 128-bit SSE load and
store, the original STV pass, which is designed to convert 64-bit integer
operations to SSE2 operations in 32-bit mode, is extended to 64-bit mode
in the following ways:

1. Class scalar_chain is turned into base class.  The 32-bit specific
member functions are moved to the new derived class, dimode_scalar_chain.
The new derived class, timode_scalar_chain, is added to convert oad and
store of 128-bit integers to 128-bit SSE load and store.
2. Add the 64-bit version of scalar_to_vector_candidate_p and
remove_non_convertible_regs.  Only TImode load and store are allowed
for conversion.  If one instruction on the chain of dependent
instructions aren't TImode load or store, the chain of instructions
won't be converted.
3. In 64-bit, we only convert from TImode to V1TImode, which have the
same size.  The difference is only vector registers are allowed in
TImode so that 128-bit SSE load and store instructions will be used
for load and store of 128-bit integers.
4. Put the 64-bit STV pass before the CSE pass so that instructions
changed or generated by the STV pass can be CSEed.

convert_scalars_to_vector calls free_dominance_info in 64-bit mode to
work around ICE in fwprop pass:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70807

when building libgcc on Linux/x86-64.

gcc/

PR target/70155
* config/i386/i386.c (scalar_to_vector_candidate_p): Renamed
to ...
(dimode_scalar_to_vector_candidate_p): This.
(timode_scalar_to_vector_candidate_p): New function.
(scalar_to_vector_candidate_p): Likewise.
(timode_check_non_convertible_regs): Likewise.
(timode_remove_non_convertible_regs): Likewise.
(remove_non_convertible_regs): Likewise.
(remove_non_convertible_regs): Renamed to ...
(dimode_remove_non_convertible_regs): This.
(scalar_chain::~scalar_chain): Make it virtual.
(scalar_chain::compute_convert_gain): Make it pure virtual.
(scalar_chain::mark_dual_mode_def): Likewise.
(scalar_chain::convert_insn): Likewise.
(scalar_chain::convert_registers): Likewise.
(scalar_chain::add_to_queue): Make it protected.
(scalar_chain::emit_conversion_insns): Likewise.
(scalar_chain::replace_with_subreg): Likewise.
(scalar_chain::replace_with_subreg_in_insn): Likewise.
(scalar_chain::convert_op): Likewise.
(scalar_chain::convert_reg): Likewise.
(scalar_chain::make_vector_copies): Likewise.
(scalar_chain::convert_registers): New pure virtual function.
(class dimode_scalar_chain): New class.
(class timode_scalar_chain): Likewise.
(scalar_chain::mark_dual_mode_def): Renamed to ...
(dimode_scalar_chain::mark_dual_mode_def): This.
(timode_scalar_chain::mark_dual_mode_def): New function.
(timode_scalar_chain::convert_insn): Likewise.
(dimode_scalar_chain::convert_registers): Likewise.
(scalar_chain::compute_convert_gain): Renamed to ...
(dimode_scalar_chain::compute_convert_gain): This.
(scalar_chain::replace_with_subreg): Renamed to ...
(dimode_scalar_chain::replace_with_subreg): This.
(scalar_chain::replace_with_subreg_in_insn): Renamed to ...
(dimode_scalar_chain::replace_with_subreg_in_insn): This.
(scalar_chain::make_vector_copies): Renamed to ...
(dimode_scalar_chain::make_vector_copies): This.
(scalar_chain::convert_reg): Renamed to ...
(dimode_scalar_chain::convert_reg ): This.
(scalar_chain::convert_op): Renamed to ...
(dimode_scalar_chain::convert_op): This.
(scalar_chain::convert_insn): Renamed to ...
(dimode_scalar_chain::convert_insn): This.
(scalar_chain::convert): Call convert_registers.
(convert_scalars_to_vector): Change to scalar_chain pointer to
use timode_scalar_chain in 64-bit mode and dimode_scalar_chain
in 32-bit mode.  Delete scalar_chain pointer.  Call
free_dominance_info in 64-bit mode.
(pass_stv::gate): Remove TARGET_64BIT check.
(ix86_option_override): Put the 64-bit STV pass before the CSE
pass.

gcc/testsuite/

PR target/70155
* gcc.target/i386/pr55247-2.c: Updated to check movti_internal
and movv1ti_internal patterns
* gcc.target/i386/pr70155-1.c: New test.
* gcc.target/i386/pr70155-2.c: Likewise.
* gcc.target/i386/pr70155-3.c: Likewise.
* gcc.target/i386/pr70155-4.c: Likewise.
* gcc.target/i386/pr70155-5.c: Likewise.
* gcc.target/i386/pr70155-6.c: Likewise.
* gcc.target/i386/pr70155-7.c: Likewise.
* gcc.target/i386/pr70155-8.c: Likewise.
* gcc.target/i386/pr70155-9.c: Likewise.
* gcc.target/i386/pr70155-10.c: Likewise.
* gcc.target/i386/pr70155-11.c: Likewise.
* gcc.target/i386/pr70155-12.c: Likewise.
* gcc.target/i386/pr70155-13.c: Likewise.
* gcc.target/i386/pr70155-14.c: Likewise.
* gcc.target/i386/pr70155-15.c: Likewise.
* gcc.target/i386/pr70155-16.c: Likewise.
* gcc.target/i386/pr70155-17.c: Likewise.
* gcc.target/i386/pr70155-18.c: Likewise.
* gcc.target/i386/pr70155-19.c: Likewise.
* gcc.target/i386/pr70155-20.c: Likewise.
* gcc.target/i386/pr70155-21.c: Likewise.
* gcc.target/i386/pr70155-22.c: Likewise.

From-SVN: r235518

Replace ".{5}" with ".{5,6}" in avx512vl-vmovdqa64-1.c

* gcc.target/i386/avx512vl-vmovdqa64-1.c: Replace ".{5}" with
".{5,6}".

From-SVN: r235516

DWARF: turn dw_loc_descr_node field into hash map for frame offset check

As discussed on
<https://gcc.gnu.org/ml/gcc-patches/2016-02/msg01708.html>, this change
removes a field in the dw_loc_descr_node structure so we can get rid of
the CHECKING_P macro usage.

This field was used to perform consistency checks for frame offset in
DWARF procedures. As a replacement, this commit turns the "visited
nodes" set in resolve_args_picking_1 into a map that remembers for each
dw_loc_descr_node the frame offset associated to it, so that the
consistency check is still operational.

Boostrapped and regtested on x86_64-linux.

2016-04-27  Pierre-Marie de Rodat  <derodat@adacore.com>

* dwarf2out.h (struct dw_loc_descr_node): Remove the
dw_loc_frame_offset field.
* dwarf2out.c (new_loc_descr): Likewise.
(resolve_args_picking_1): Turn the VISITED hash set into a
FRAME_OFFSET hash map. Use it to associate a frame offset to
visited nodes. Remove uses of the CHECKING_P macro.
(resolve_args_picking): Update call to resolve_args_picking_1.

From-SVN: r235515

tree-ssa-loop-ivopts.c (iv_ca_dump): Fix level of indentation.

* tree-ssa-loop-ivopts.c (iv_ca_dump): Fix level of indentation.
(free_loop_data): Release vuses of groups.

From-SVN: r235514

tree-ssa-loop-ivopts.c (struct iv): Use pointer to struct iv_use instead of redundant use_id and boolean have_use_for.

* tree-ssa-loop-ivopts.c (struct iv): Use pointer to struct iv_use
instead of redundant use_id and boolean have_use_for.
(struct iv_use): Change sub_id into group_id.  Remove field next.
Move fields: related_cands, n_map_members, cost_map and selected
to ...
(struct iv_group): ... here.  New structure.
(struct iv_common_cand): Use structure declaration directly.
(struct ivopts_data, iv_ca, iv_ca_delta): Rename fields.
(MAX_CONSIDERED_USES): Rename macro to ...
(MAX_CONSIDERED_GROUPS): ... here.
(n_iv_uses, iv_use, n_iv_cands, iv_cand): Delete.
(dump_iv, dump_use, dump_cand): Refactor format of dump information.
(dump_uses): Rename to ...
(dump_groups): ... here.  Update all uses.
(tree_ssa_iv_optimize_init, alloc_iv): Update all uses.
(find_induction_variables): Refactor format of dump information.
(record_sub_use): Delete.
(record_use): Update all uses.
(record_group): New function.
(record_group_use, find_interesting_uses_op): Call above functions.
Update all uses.
(find_interesting_uses_cond): Ditto.
(group_compare_offset): New function.
(split_all_small_groups): Rename to ...
(split_small_address_groups_p): ... here.  Update all uses.
(split_address_groups):  Update all uses.
(find_interesting_uses): Refactor format of dump information.
(add_candidate_1): Update all uses.  Remove redundant check on iv,
base and step.
(add_candidate, record_common_cand): Remove redundant assert.
(add_iv_candidate_for_biv): Update use.
(add_iv_candidate_derived_from_uses): Update all uses.
(add_iv_candidate_for_groups, record_important_candidates): Ditto.
(alloc_use_cost_map): Ditto.
(set_use_iv_cost, get_use_iv_cost): Rename to ...
(set_group_iv_cost, get_group_iv_cost): ... here.  Update all uses.
(determine_use_iv_cost_generic): Ditto.
(determine_group_iv_cost_generic): Ditto.
(determine_use_iv_cost_address): Ditto.
(determine_group_iv_cost_address): Ditto.
(determine_use_iv_cost_condition): Ditto.
(determine_group_iv_cost_cond): Ditto.
(determine_use_iv_cost): Ditto.
(determine_group_iv_cost): Ditto.
(set_autoinc_for_original_candidates): Update all uses.
(find_iv_candidates): Update all uses.  Refactor dump information.
(determine_use_iv_costs): Ditto.
(determine_iv_costs): Ditto.
(iv_ca_cand_for_use): Rename to ...
(iv_ca_cand_for_group): ... here.  Update all uses.
(iv_ca_add_use, iv_ca_add_group): Ditto.
(iv_ca_set_cp, iv_ca_cost, iv_ca_delta_add): Update all uses.
(iv_ca_delta_join, iv_ca_delta_reverse, iv_ca_delta_free): Ditto.
(iv_ca_new, iv_ca_dump, iv_ca_extend, iv_ca_narrow): Ditto.
(iv_ca_prune, cheaper_cost_with_cand, iv_ca_replace): Ditto.
(try_add_cand_for, try_improve_iv_set, find_optimal_iv_set): Ditto.
(create_new_iv, adjust_iv_update_pos): Ditto.
(rewrite_use_address): Delete.
(rewrite_use_address_1): Rename to ...
(rewrite_use_address): ... here.
(rewrite_use_compare): Update all uses.
(rewrite_use): Delete.
(rewrite_uses): Rename to ...
(rewrite_groups): ... here.  Update all uses.
(remove_unused_ivs, free_loop_data): Update all uses.
(tree_ssa_iv_optimize_finalize, tree_ssa_iv_optimize_loop): Ditto.

gcc/testsuite/ChangeLog
* gcc.dg/tree-ssa/pr64705.c: Revise check string.
* gcc.dg/tree-ssa/scev-9.c: Ditto.
* gcc.dg/tree-ssa/scev-10.c: Ditto.
* gcc.dg/tree-ssa/scev-11.c: Ditto.
* gcc.dg/tree-ssa/scev-12.c: Ditto.

From-SVN: r235513

[rtlanal.c] Convert conditional compilation on WORD_REGISTER_OPERATIONS

* rtlanal.c (nonzero_bits1): Convert preprocessor check
for WORD_REGISTER_OPERATIONS to runtime check.

From-SVN: r235512

re PR ipa/70760 (wrong generated code for std::make_unique with -fipa-pta)

2016-04-27  Richard Biener  <rguenther@suse.de>

PR ipa/70760
* tree-ssa-structalias.c (find_func_aliases_for_call): Use
aggregate_value_p to determine if a function result is
returned by reference.
(ipa_pta_execute): Functions having their address taken are
not automatically nonlocal.

* g++.dg/ipa/ipa-pta-2.C: New testcase.
* gcc.dg/ipa/ipa-pta-1.c: Adjust.

From-SVN: r235511

re PR sanitizer/70683 (-fcompare-debug bug with -fsanitize=address)

PR sanitizer/70683
* tree-core.h (enum operand_equal_flag): Add OEP_NO_HASH_CHECK.
* fold-const.c (operand_equal_p): If flag_checking and
OEP_NO_HASH_CHECK is not set in flag, recurse with OEP_NO_HASH_CHECK
and if it returns non-zero, assert iterative_hash_expr on both
args is the same.

From-SVN: r235507

constexpr.c (get_fundef_copy): Use the original function for non-recursive evaluations.

cp/
* constexpr.c (get_fundef_copy): Use the original function for
non-recursive evaluations.
(save_fundef_copy): Always expect a slot to be available.

testsuite/
* g++.dg/cpp0x/constexpr-recursion3.C: New.
* g++.dg/ubsan/pr63956.C: Adjust error location.

From-SVN: r235506

[multiple changes]

2016-04-27  Arnaud Charlet  <charlet@adacore.com>

* aa_util.adb, aa_util.ads: Removed, no longer used.

2016-04-27  Hristian Kirtchev  <kirtchev@adacore.com>

* sem_prag.adb (Analyze_Pragma): An object
renaming declaration resulting from the expansion of an object
declaration is a suitable context for pragma Ghost.

2016-04-27  Doug Rupp  <rupp@adacore.com>

* init.c: Refine last checkin so the only requirement is the
signaling compilation unit is compiled with the same mode as
the compilation unit containing the initial landing pad.

2016-04-27  Ed Schonberg  <schonberg@adacore.com>

* sem_ch13.adb (Valid_Default_Iterator): Better filter of illegal
specifications for Default_Iterator, including overloaded cases
where no interpretations are legal, and return types that are
not iterator types.

2016-04-27  Hristian Kirtchev  <kirtchev@adacore.com>

* exp_ch5.adb (Expand_N_Assignment_Statement): Do not install
an accessibility check when the left hand side of the assignment
denotes a container cursor.
* exp_util.ads, exp_util.adb (Find_Primitive_Operations): Removed.
* sem_ch4.adb (Find_Indexing_Operations): New routine.
(Try_Container_Indexing): Code cleanup.

From-SVN: r235505

[multiple changes]

2016-04-27  Arnaud Charlet  <charlet@adacore.com>

* sem_ch10.adb, sem_case.adb: Mark messages udner -gnatwr when needed.

2016-04-27  Hristian Kirtchev  <kirtchev@adacore.com>

* errout.adb, errutil.adb: Minor reformatting.

2016-04-27  Ed Schonberg  <schonberg@adacore.com>

* sem_ch13.adb (Analyze_Aspect_Specifications, case Pre/Post):
Check that the classwide version is illegal when the prefix is
an operation of an untagged synchronized type.

From-SVN: r235504