mesa.git
5 years agofreedreno/ir3: Use imul24 in offset calculations
Kristian H. Kristensen [Tue, 22 Oct 2019 23:37:35 +0000 (16:37 -0700)]
freedreno/ir3: Use imul24 in offset calculations

With the imul24 opcode in place, we can now use it for computing local
offsets (ie for ldlw/stlw).

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: Add ir3 intrinsics for tessellation
Kristian H. Kristensen [Tue, 22 Oct 2019 23:33:18 +0000 (16:33 -0700)]
freedreno/ir3: Add ir3 intrinsics for tessellation

These provide the iovas for system memory buffers used for
tessellation as well as a new HW specific system value.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno: Don't count primitives for patches
Kristian H. Kristensen [Tue, 22 Oct 2019 23:24:26 +0000 (16:24 -0700)]
freedreno: Don't count primitives for patches

The gallium helper doesn't like patches and we can't determine how
many primitives it gets tessellated into anyway.  On gens where we
have tessellation, we get the prim count from a HW counter so just
skip counting on the CPU.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: Add load and store intrinsics for global io
Kristian H. Kristensen [Tue, 22 Oct 2019 23:16:35 +0000 (16:16 -0700)]
freedreno/ir3: Add load and store intrinsics for global io

These intrinsics take a ivec2 for the 64 bit base address and a
integer offset.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: Emit link map as byte or dwords offsets as needed
Kristian H. Kristensen [Tue, 22 Oct 2019 23:07:45 +0000 (16:07 -0700)]
freedreno/ir3: Emit link map as byte or dwords offsets as needed

Stages that load inputs with ldlw (TCS, GS) need byte offsets, stages
that load with ldg (TES) need dwords offsets.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: Add register offset for STG/LDG
Kristian H. Kristensen [Tue, 22 Oct 2019 23:03:36 +0000 (16:03 -0700)]
freedreno/a6xx: Add register offset for STG/LDG

These instructions take a 64 bit iova as two conescutive registers and
a immediate offset.  This patch adds support for the offset to be a
single register, which is added to the 64 bit iova.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6x: Rename z/s formats
Kristian H. Kristensen [Thu, 31 Oct 2019 21:43:58 +0000 (14:43 -0700)]
freedreno/a6x: Rename z/s formats

What we call eRB6_Z24_UNORM_S8_UINT now is actually
RB6_Z24_UNORM_S8_UINT_AS_R8G8B8A8 and RB6_X8Z24_UNORM is actually
RB6_Z24_UNORM_S8_UINT.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: Fix layered texture type enum
Kristian H. Kristensen [Fri, 1 Nov 2019 22:16:44 +0000 (15:16 -0700)]
freedreno/a6xx: Fix layered texture type enum

2D array textures and 3D textures are different enum values after all.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno: Add nogmem debug option to force bypass rendering
Kristian H. Kristensen [Thu, 31 Oct 2019 21:21:32 +0000 (14:21 -0700)]
freedreno: Add nogmem debug option to force bypass rendering

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: Clear sysmem with CP_BLIT
Kristian H. Kristensen [Fri, 20 Sep 2019 00:13:34 +0000 (17:13 -0700)]
freedreno/a6xx: Clear sysmem with CP_BLIT

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: Fix primitive counters again
Kristian H. Kristensen [Thu, 31 Oct 2019 00:18:48 +0000 (17:18 -0700)]
freedreno/a6xx: Fix primitive counters again

We use one mechanism for (REG_A6XX_RBBM_PRIMCTR_8_LO)
PIPE_QUERY_PRIMITIVES_GENERATED, which counts all primitives that exit
the geometry pipeline, whether or not xfb is on.  Then for
PIPE_QUERY_PRIMITIVES_EMITTED, we use the CP_EVENT_WRITE subfunction
that writes out per-stream counts for generated and emitted, but only
when xfb is enabled.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/registers: Add comments about primitive counters
Kristian H. Kristensen [Thu, 31 Oct 2019 17:01:00 +0000 (10:01 -0700)]
freedreno/registers: Add comments about primitive counters

Adding comments about best guess at what the counters count.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/registers: Move SP_PRIMITIVE_CNTL and SP_VS_VPC_DST
Kristian H. Kristensen [Thu, 31 Oct 2019 17:02:12 +0000 (10:02 -0700)]
freedreno/registers: Move SP_PRIMITIVE_CNTL and SP_VS_VPC_DST

Move these two to be in order with the other VS regs.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/registers: Fix typo
Kristian H. Kristensen [Tue, 29 Oct 2019 19:19:28 +0000 (12:19 -0700)]
freedreno/registers: Fix typo

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agoaco: add Instruction::usesModifiers() and add more checks in the optimizer
Rhys Perry [Tue, 29 Oct 2019 13:59:59 +0000 (13:59 +0000)]
aco: add Instruction::usesModifiers() and add more checks in the optimizer

No pipeline-db changes.

v2: use early-exit for VOP3

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> (v1)
5 years agoradv: adjust loop unrolling heuristics for int64
Rhys Perry [Tue, 15 Oct 2019 19:43:39 +0000 (20:43 +0100)]
radv: adjust loop unrolling heuristics for int64

In particular, increase the cost of 64-bit integer division.

Fixes huge shaders with dEQP-VK.spirv_assembly.type.scalar.i64.mod_geom
, with ACO used for GS this creates shaders requiring a branch with
>32767 dword offset.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agolima: fix bo submit memory leak
Erico Nunes [Mon, 28 Oct 2019 19:02:38 +0000 (20:02 +0100)]
lima: fix bo submit memory leak

Fix memory leak on allocation for lima submit, reported by valgrind.

128 bytes in 1 blocks are definitely lost in loss record 38 of 84
   at 0x484A6E8: realloc (in /usr/lib/valgrind/vgpreload_memcheck-arm64-linux.so)
   by 0x58689C7: util_dynarray_ensure_cap (u_dynarray.h:91)
   by 0x5868BBB: util_dynarray_grow_bytes (u_dynarray.h:139)
   by 0x5868BBB: lima_submit_add_bo (lima_submit.c:113)
   by 0x585D7D3: lima_ctx_buff_va (lima_context.c:57)
   by 0x586378F: lima_pack_plbu_cmd (lima_draw.c:802)
   by 0x586378F: lima_draw_vbo (lima_draw.c:1351)
   by 0x5406A2F: u_vbuf_draw_vbo (u_vbuf.c:1184)
   by 0x55D0A57: st_draw_vbo (st_draw.c:268)
   by 0x55576CB: _mesa_draw_arrays (draw.c:374)
   by 0x55576CB: _mesa_draw_arrays (draw.c:351)
   by 0x43610B: Mesh::render_vbo() (mesh.cpp:583)
   by 0x415DBB: SceneBuild::draw() (scene-build.cpp:242)
   by 0x41131B: MainLoop::draw() (main-loop.cpp:133)
   by 0x411947: MainLoop::step() (main-loop.cpp:108)

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
5 years agolima: fix nir shader memory leak
Erico Nunes [Mon, 28 Oct 2019 18:59:54 +0000 (19:59 +0100)]
lima: fix nir shader memory leak

Fix memory leak on allocation for nir shader, reported by valgrind.

3,502 (480 direct, 3,022 indirect) bytes in 1 blocks are definitely lost in loss record 77 of 84
   at 0x48483F8: malloc (in /usr/lib/valgrind/vgpreload_memcheck-arm64-linux.so)
   by 0x5750817: ralloc_size (ralloc.c:119)
   by 0x5750977: rzalloc_size (ralloc.c:151)
   by 0x575C173: nir_shader_create (nir.c:45)
   by 0x5763ACB: nir_shader_clone (nir_clone.c:728)
   by 0x55D5003: st_create_fp_variant (st_program.c:1242)
   by 0x55D789F: st_get_fp_variant (st_program.c:1522)
   by 0x55D789F: st_get_fp_variant (st_program.c:1507)
   by 0x56400C3: st_update_fp (st_atom_shader.c:163)
   by 0x563D333: st_validate_state (st_atom.c:261)
   by 0x55D07CB: prepare_draw (st_draw.c:132)
   by 0x55D08DF: st_draw_vbo (st_draw.c:184)
   by 0x55576CB: _mesa_draw_arrays (draw.c:374)
   by 0x55576CB: _mesa_draw_arrays (draw.c:351)

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
5 years agoMeson: Remove lib prefix from graw and osmesa when building with Mingw.
Prodea Alexandru-Liviu [Thu, 7 Nov 2019 22:04:50 +0000 (22:04 +0000)]
Meson: Remove lib prefix from graw and osmesa when building with Mingw.
Also remove version sufix from osmesa swrast on Windows.

v2: Make sure we don't remove lib prefix on *nix platforms.

Signed-off-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Cc: "19.3" <mesa-stable@lists.freedesktop.org>
5 years agomesa: expose SPIR-V extensions in the Compatibility profile too
Marek Olšák [Wed, 6 Nov 2019 23:08:22 +0000 (18:08 -0500)]
mesa: expose SPIR-V extensions in the Compatibility profile too

We would like to have GL 4.6 Compatibility too.

The extensions don't support compatibility features, so no other changes
are needed.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
5 years agost_get_external_sampler_key: improve error message
Drew DeVault [Thu, 7 Nov 2019 17:47:28 +0000 (12:47 -0500)]
st_get_external_sampler_key: improve error message

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
5 years agomesa/st: Make st_pipe_format_to_mesa_format an effective no-op.
Eric Anholt [Fri, 6 Sep 2019 21:33:18 +0000 (14:33 -0700)]
mesa/st: Make st_pipe_format_to_mesa_format an effective no-op.

All callers other than the unit test just wanted to convert back from
a known-mesa-equivalent format, which is now a no-op.

v2: Fix assertion failure in iris GL startup with BGR565 by continuing
    to return MESA_FORMAT_NONE for non-Mesa formats.

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
5 years agomesa/st: Gut most of st_mesa_format_to_pipe_format().
Eric Anholt [Fri, 6 Sep 2019 21:29:10 +0000 (14:29 -0700)]
mesa/st: Gut most of st_mesa_format_to_pipe_format().

Now that MESA_FORMAT_x is just a PIPE_FORMAT_x define, we can strip
this function down to just the compression fallbacks.

v2: Restore the SRGB format for ASTC SRGB fallback case.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agomesa: Redefine MESA_FORMAT_* in terms of PIPE_FORMAT_*.
Eric Anholt [Fri, 6 Sep 2019 20:26:15 +0000 (13:26 -0700)]
mesa: Redefine MESA_FORMAT_* in terms of PIPE_FORMAT_*.

There are various places in Mesa where we would like to be able to
have a shared format enum between Mesa and gallium (NIR compiler's
image formats, for example, or mapping from gallium's formats to
mesa's and vice versa in st_format.c).  Rewriting all MESA_FORMAT to
PIPE_FORMAT would be disruptive and possibly more work than it's worth
(And I actually prefer MESA_FORMAT's name scheme), so for now just
make it so that there's one shared set of enum values.

The #defines here were generated by printing out from the
tests/st_format.c round-tripping loop, with the exception of 8888
formats where I hand-edited the #defines to point at the corresponding
gallium packed format define.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agomesa: Prepare for the MESA_FORMAT_* enum to be sparse.
Eric Anholt [Fri, 6 Sep 2019 21:09:37 +0000 (14:09 -0700)]
mesa: Prepare for the MESA_FORMAT_* enum to be sparse.

To redefine MESA_FORMAT in terms of PIPE_FORMAT enums, we need to fix
places where we iterated up to MESA_FORMAT_COUNT.  I use
_mesa_get_format_name(f) == NULL as the signal that it's not an enum
value with a MESA_FORMAT.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agomesa/st: Test round-tripping of all compressed formats.
Eric Anholt [Fri, 6 Sep 2019 20:33:56 +0000 (13:33 -0700)]
mesa/st: Test round-tripping of all compressed formats.

We checked round-tripping of formats without fallbacks, but weren't
setting the compression support flags in the mock context and thus
needed to skip testing those.  Just set all the flags and assert that
no fallbacks are triggered, so we get full test coverage.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agomesa: Stop defining a full separate format for RGBA_UINT8.
Eric Anholt [Thu, 29 Aug 2019 20:20:45 +0000 (13:20 -0700)]
mesa: Stop defining a full separate format for RGBA_UINT8.

We have packed formats for RGBA and ABGR already, so we can just
pack/unpack code.

v2: Rebase on endianness macro rename

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
5 years agogallium: Add equivalents of packed MESA_FORMAT_*UINT formats.
Eric Anholt [Mon, 19 Aug 2019 21:33:51 +0000 (14:33 -0700)]
gallium: Add equivalents of packed MESA_FORMAT_*UINT formats.

These are the last formats that MESA_FORMAT had and PIPE_FORMAT
didn't.  The .csv entries channel sizes and swizzles all came from the
corresponding UNORM format.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agogallium: Add an equivalent of MESA_FORMAT_BGR_UNORM8.
Eric Anholt [Mon, 19 Aug 2019 21:24:12 +0000 (14:24 -0700)]
gallium: Add an equivalent of MESA_FORMAT_BGR_UNORM8.

This is the last unorm format that MESA_FORMAT had and PIPE_FORMAT
didn't.  Note that it's an array format on gallium's side as well,
since it's a NPOT pixel size.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agogallium: Add some more channel orderings of packed formats.
Eric Anholt [Mon, 19 Aug 2019 20:58:23 +0000 (13:58 -0700)]
gallium: Add some more channel orderings of packed formats.

This covers everything that MESA_FORMAT had for packed unorm.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agogallium: Add defines for FXT1 texture compression.
Eric Anholt [Mon, 1 Jul 2019 19:39:55 +0000 (12:39 -0700)]
gallium: Add defines for FXT1 texture compression.

This texture compression is exposed by 830 and 915, and to make
MESA_FORMAT match PIPE_FORMAT defines I need a corresponding
PIPE_FORMAT.

v2: Set is_hand_written so we don't try to generate pack/unpack code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agomesa/st: Add mapping of MESA_FORMAT_RGB_SNORM16 to gallium.
Eric Anholt [Fri, 6 Sep 2019 23:30:26 +0000 (16:30 -0700)]
mesa/st: Add mapping of MESA_FORMAT_RGB_SNORM16 to gallium.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoradv/gfx10: fix primitive indices orientation for NGG GS
Samuel Pitoiset [Tue, 5 Nov 2019 11:04:57 +0000 (12:04 +0100)]
radv/gfx10: fix primitive indices orientation for NGG GS

The primitive indices have to be swapped to follow the drawing
order.

This fixes corruption with Overwatch when NGG GS is force enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoRevert "intel/blorp: Fix usage of uninitialized memory in key hashing"
Kenneth Graunke [Thu, 7 Nov 2019 17:26:37 +0000 (09:26 -0800)]
Revert "intel/blorp: Fix usage of uninitialized memory in key hashing"

This reverts commit 4432a2d14d80081d062f7939a950d65ea3a16eed.

Pretty much every SKQP test dies with this assertion:
skqp: ../src/mesa/drivers/dri/i965/brw_program_cache.c:102: hash_key: Assertion `item->key_size % 4 == 0' failed.

5 years agointel/blorp: Fix usage of uninitialized memory in key hashing
Danylo Piliaiev [Wed, 30 Oct 2019 14:14:06 +0000 (16:14 +0200)]
intel/blorp: Fix usage of uninitialized memory in key hashing

The automatically generated padding in structs contains
undefined values, force pack the structs to eliminate the
padding. Otherwise structs with the same values may generate
different hashes.

Valgrind output:

Conditional jump or move depends on uninitialised value(s)
 util_fast_urem32 (fast_urem_by_const.h:71)
 hash_table_search (hash_table.c:262)
 _mesa_hash_table_search (hash_table.c:296)
 anv_pipeline_cache_search_locked (anv_pipeline_cache.c:318)
 anv_pipeline_cache_search (anv_pipeline_cache.c:335)
 lookup_blorp_shader (anv_blorp.c:38)
 blorp_params_get_mcs_partial_resolve_kernel (blorp_clear.c:1112)
 blorp_mcs_partial_resolve (blorp_clear.c:1205)
 anv_image_mcs_op (anv_blorp.c:1742)
 anv_cmd_predicated_mcs_resolve (genX_cmd_buffer.c:774)
 transition_color_buffer (genX_cmd_buffer.c:1159)
 cmd_buffer_end_subpass (genX_cmd_buffer.c:4840)

Uninitialised value was created by a stack allocation
 blorp_params_get_mcs_partial_resolve_kernel (blorp_clear.c:1103)

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoosmesa/tests: Extend render test to cover other working cases
Dylan Baker [Thu, 31 Oct 2019 17:03:45 +0000 (10:03 -0700)]
osmesa/tests: Extend render test to cover other working cases

Only the GL_UNSIGNED_BYTE cases actually work, the rest all fail, but we
should test the working cases to ensure that they continue to work.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agogallium/osmesa: Convert osmesa test to gtest
Dylan Baker [Mon, 21 Oct 2019 20:08:32 +0000 (13:08 -0700)]
gallium/osmesa: Convert osmesa test to gtest

This uses a bunch of additional C++ features for niceness and safety.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agomeson: gtest needs pthreads
Dylan Baker [Mon, 21 Oct 2019 19:51:13 +0000 (12:51 -0700)]
meson: gtest needs pthreads

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agopanfrost: Pipe the GPU ID into compiler and disassembler
Tomeu Vizoso [Thu, 7 Nov 2019 07:27:53 +0000 (08:27 +0100)]
panfrost: Pipe the GPU ID into compiler and disassembler

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
5 years agoaco: workaround Tonga/Iceland hardware bug
Daniel Schürmann [Wed, 6 Nov 2019 17:25:15 +0000 (18:25 +0100)]
aco: workaround Tonga/Iceland hardware bug

The workaround got accidentally moved to the wrong place

Fixes: 08d510010b7586387e363460b98e6a45bbe97164 aco: increase accuracy of SGPR limits
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agopanfrost: Release the ctx->pipe_framebuffer ref
Boris Brezillon [Wed, 6 Nov 2019 14:52:45 +0000 (15:52 +0100)]
panfrost: Release the ctx->pipe_framebuffer ref

ctx->pipe_framebuffer contains the last bound FB state, let's release
resources pointed by this FB state when the context is destroyed.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Destroy the upload manager allocated in panfrost_create_context()
Boris Brezillon [Wed, 6 Nov 2019 14:49:43 +0000 (15:49 +0100)]
panfrost: Destroy the upload manager allocated in panfrost_create_context()

pipe->stream_uploader has been allocated with u_upload_create_default()
in panfrost_create_context(), let's destroy it in the context destroy
path.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agointel/gen_decoder: Fix unused-but-set-variable warning
Kai Wasserbäch [Sat, 28 Sep 2019 16:58:57 +0000 (18:58 +0200)]
intel/gen_decoder: Fix unused-but-set-variable warning

This commit fixes the following warning:
../src/intel/common/gen_decoder.c: In function ‘gen_spec_load_from_path’:
../src/intel/common/gen_decoder.c:741:11: warning: variable ‘len’ set but not used [-Wunused-but-set-variable]
  741 |    size_t len, filename_len = strlen(path) + 20;
      |           ^~~

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agonir: fix unused function warning in src/compiler/nir/nir.c
Kai Wasserbäch [Thu, 3 Oct 2019 20:49:27 +0000 (22:49 +0200)]
nir: fix unused function warning in src/compiler/nir/nir.c

This commit fixes the following warning:
../src/compiler/nir/nir.c:1827:1: warning: ‘dest_is_ssa’ defined but not used [-Wunused-function]
 1827 | dest_is_ssa(nir_dest *dest, void *_state)
      | ^~~~~~~~~~~

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: fix unused variable warning in find_and_update_previous_uniform_storage
Kai Wasserbäch [Sat, 28 Sep 2019 16:55:32 +0000 (18:55 +0200)]
nir: fix unused variable warning in find_and_update_previous_uniform_storage

This commit fixes the following warning:
../src/compiler/glsl/gl_nir_link_uniforms.c: In function ‘find_and_update_previous_uniform_storage’:
../src/compiler/glsl/gl_nir_link_uniforms.c:166:16: warning: unused variable ‘num_blks’ [-Wunused-variable]
  166 |       unsigned num_blks = nir_variable_is_in_ubo(var) ?
      |                ^~~~~~~~

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: fix unused variable warning in nir_lower_vars_to_explicit_types
Kai Wasserbäch [Sat, 28 Sep 2019 16:50:03 +0000 (18:50 +0200)]
nir: fix unused variable warning in nir_lower_vars_to_explicit_types

This commit fixes the following warning:
../src/compiler/nir/nir_lower_io.c: In function ‘nir_lower_vars_to_explicit_types’:
../src/compiler/nir/nir_lower_io.c:1435:22: warning: unused variable ‘supported’ [-Wunused-variable]
 1435 |    nir_variable_mode supported = nir_var_mem_shared | nir_var_shader_temp | nir_var_function_temp;
      |                      ^~~~~~~~~

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agogallium: dri2: Use index as plane number.
Lepton Wu [Sat, 2 Nov 2019 06:41:29 +0000 (23:41 -0700)]
gallium: dri2: Use index as plane number.

This fix wrong color when playing video under Android + virgl
configuration.

Fixes: 2decad495f3 ("gallium/dri2: Support images with multiple planes for modifiers")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Lepton Wu <lepton@chromium.org>
5 years agoanv: implement VK_KHR_separate_depth_stencil_layouts
Lionel Landwerlin [Thu, 4 Jul 2019 08:17:11 +0000 (11:17 +0300)]
anv: implement VK_KHR_separate_depth_stencil_layouts

v2: Use ternary to simplify code (Jason)

v3: Reorder switch cases to follow existing section ordering (Nanley)
    Add missing comment in cmd_buffer_end_subpass() about new layout (Nanley)

v4: Fix layout comparison for stencil case (Nanley)
    Update a few more comments (Nanley)
    Move VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR in color
    attachment case for future stencil-CCS support (Nanley)

v5: Missed comments update (Nanley)
    Updated relnotes.txt (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
5 years agoRevert "ci: Switch over to an autoscaling GKE cluster for builds."
Eric Anholt [Wed, 6 Nov 2019 19:14:14 +0000 (11:14 -0800)]
Revert "ci: Switch over to an autoscaling GKE cluster for builds."

This reverts commit c9df92bf795af878c38538c85f781291c78ec513.

It turns out that gitlab-runner uses kubernetes all wrong, spawning Pods
and sshing into them to run the script instead of Jobs containing the
script to run.  This means that when anything goes wrong with the pod
(autoscale, preemption, VM maintenance, cluster reconfiguration), the job
fails and only sometimes gets handled as a runner system failure.  Even
worse, due to bugs in either the runner or k8s itself, some classes of
timeout-related failure end up not being reported as failures, and the job
will incorrectly report success!

Disable using the "autoscale" cluster until we can do something else
(docker-machine instead of k8s, or the custom third-party k8s-native
runner).

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Daniel Stone <daniels@collabora.com>
5 years agopanfrost: Print the right zero field
Tomeu Vizoso [Wed, 6 Nov 2019 16:30:54 +0000 (17:30 +0100)]
panfrost: Print the right zero field

Copy paste error.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
5 years agodocs: update calendar, add news item and link release notes for 19.2.2
Dylan Baker [Wed, 6 Nov 2019 17:07:02 +0000 (09:07 -0800)]
docs: update calendar, add news item and link release notes for 19.2.2

5 years agodocs: add sha256 sum to 19.2.3 release notes
Dylan Baker [Wed, 6 Nov 2019 17:05:19 +0000 (09:05 -0800)]
docs: add sha256 sum to 19.2.3 release notes

5 years agodocs: add release notes for 19.2.3
Dylan Baker [Wed, 6 Nov 2019 16:19:42 +0000 (08:19 -0800)]
docs: add release notes for 19.2.3

5 years agopanfrost: Generate polygon list manually for SFBD
Tomeu Vizoso [Tue, 29 Oct 2019 14:42:03 +0000 (15:42 +0100)]
panfrost: Generate polygon list manually for SFBD

On clears without draws, the SFBD GPUs need for userspace to generate
the trivial polygon list.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Decode blend shaders for SFBD
Tomeu Vizoso [Tue, 5 Nov 2019 14:31:42 +0000 (15:31 +0100)]
panfrost: Decode blend shaders for SFBD

Also set MALI_HAS_BLEND_SHADER as needed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Take into account texture layers in SFBD
Tomeu Vizoso [Tue, 5 Nov 2019 10:21:47 +0000 (11:21 +0100)]
panfrost: Take into account texture layers in SFBD

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Rework format encoding on SFBD
Tomeu Vizoso [Wed, 30 Oct 2019 11:05:30 +0000 (12:05 +0100)]
panfrost: Rework format encoding on SFBD

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Set 0x10 bit on mali_shader_meta.unknown2_4 on T720
Tomeu Vizoso [Tue, 5 Nov 2019 15:25:27 +0000 (16:25 +0100)]
panfrost: Set 0x10 bit on mali_shader_meta.unknown2_4 on T720

Testing shows that it's needed.

Also remove ctx->is_t6xx as it was the last use of it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agopanfrost: Add checksum fields to SFBD descriptor
Tomeu Vizoso [Fri, 12 Jul 2019 10:38:50 +0000 (12:38 +0200)]
panfrost: Add checksum fields to SFBD descriptor

During tests on T720, these fields were discovered.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
5 years agozink: do advertize integer support in shaders
Erik Faye-Lund [Wed, 30 Oct 2019 10:25:00 +0000 (11:25 +0100)]
zink: do advertize integer support in shaders

This is supported, so let's correct this.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
5 years agozink/spirv: implement ball_fequal[2-4]
Erik Faye-Lund [Thu, 31 Oct 2019 12:21:53 +0000 (13:21 +0100)]
zink/spirv: implement ball_fequal[2-4]

5 years agozink/spirv: implement ball_iequal[2-4]
Erik Faye-Lund [Thu, 31 Oct 2019 12:20:26 +0000 (13:20 +0100)]
zink/spirv: implement ball_iequal[2-4]

5 years agozink/spirv: implement bany_inequal[2-4]
Erik Faye-Lund [Thu, 31 Oct 2019 12:12:53 +0000 (13:12 +0100)]
zink/spirv: implement bany_inequal[2-4]

5 years agozink/spirv: implement bany_fnequal[2-4]
Erik Faye-Lund [Thu, 31 Oct 2019 12:02:06 +0000 (13:02 +0100)]
zink/spirv: implement bany_fnequal[2-4]

5 years agozink/spirv: support loading bool constants
Erik Faye-Lund [Wed, 30 Oct 2019 14:37:42 +0000 (15:37 +0100)]
zink/spirv: support loading bool constants

Seems I missed this before; let's add support for this.

5 years agozink/spirv: drop temp-array for component-count
Erik Faye-Lund [Wed, 30 Oct 2019 14:33:14 +0000 (15:33 +0100)]
zink/spirv: drop temp-array for component-count

5 years agogitlab-ci: Don't build libdrm for ARM
Michel Dänzer [Tue, 5 Nov 2019 15:24:35 +0000 (16:24 +0100)]
gitlab-ci: Don't build libdrm for ARM

The Debian packages work fine. Saves a little bit of time and disk
space.

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agogitlab-ci: Use separate arm64 build/test docker images
Michel Dänzer [Mon, 4 Nov 2019 08:54:09 +0000 (09:54 +0100)]
gitlab-ci: Use separate arm64 build/test docker images

The image used for test jobs is only about 1/6 as big as before, which
may help avoid some issues with some of the test boards.

Inspired by https://gitlab.freedesktop.org/mesa/mesa/issues/2046 .

v2:
* Leave LIBDRM_VERSION at 2.4.99 (Daniel Stone)
* Delete more build artifacts from dEQP tree (Daniel Stone)
v3:
* Set LD_LIBRARY_PATH for ldd

Acked-by: Daniel Stone <daniels@collabora.com> # v2
Reviewed-by: Eric Anholt <eric@anholt.net> # Except for the ldd line
5 years agozink: use u_blitter when format-reinterpreting
Erik Faye-Lund [Fri, 1 Nov 2019 09:38:13 +0000 (10:38 +0100)]
zink: use u_blitter when format-reinterpreting

5 years agozink: always allow sampling of images
Erik Faye-Lund [Fri, 1 Nov 2019 09:37:08 +0000 (10:37 +0100)]
zink: always allow sampling of images

This is required if we're going to blit from/to it using u_blitter.

5 years agozink: transition resources before resolving
Erik Faye-Lund [Fri, 1 Nov 2019 09:36:30 +0000 (10:36 +0100)]
zink: transition resources before resolving

5 years agozink: disable fragment-shader texture-lod
Erik Faye-Lund [Thu, 31 Oct 2019 19:05:58 +0000 (20:05 +0100)]
zink: disable fragment-shader texture-lod

We don't support nir_texop_txd, which is required by this cap. So let's
disable it for now.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 8d46e35d16e ("zink: introduce opengl over vulkan")
5 years agozink: make sure src image is transfer-src-optimal
Duncan Hopkins [Wed, 30 Oct 2019 12:26:23 +0000 (13:26 +0100)]
zink: make sure src image is transfer-src-optimal

Fixes: d2bb63c8d4c ("zink: Use optimal layout instead of general. Reduces valid layer warnings. Fixes RADV image noise.")
5 years agozink: do not advertize coherent mapping
Erik Faye-Lund [Wed, 30 Oct 2019 10:18:58 +0000 (11:18 +0100)]
zink: do not advertize coherent mapping

We do not support them yet, so let's not pretend.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 8d46e35d16e ("zink: introduce opengl over vulkan")
5 years agozink: always allow mutating the format
Erik Faye-Lund [Tue, 29 Oct 2019 22:19:53 +0000 (23:19 +0100)]
zink: always allow mutating the format

There's no good way to know if a texture-view will be created, so we
just have to accept it for all resources.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 8d46e35d16e ("zink: introduce opengl over vulkan")
5 years agozink: use actual format for render-pass
Erik Faye-Lund [Tue, 29 Oct 2019 22:16:30 +0000 (23:16 +0100)]
zink: use actual format for render-pass

We should use the format derived from the image-view here, not from the
image itselt. Otherwise, we'll end up with incompatible render-passes.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 8d46e35d16e ("zink: introduce opengl over vulkan")
5 years agoradeonsi: fix shader disk cache key
Pierre-Eric Pelloux-Prayer [Mon, 4 Nov 2019 14:04:20 +0000 (15:04 +0100)]
radeonsi: fix shader disk cache key

Use unsigned values otherwise signed extension will produce a 64 bits value where
the 32 left-most bits are 1.

Fixes: 2afeed30101 ("radeonsi: tell the shader disk cache what IR is used")
5 years agoradv: implement VK_EXT_subgroup_size_control
Samuel Pitoiset [Thu, 31 Oct 2019 09:55:37 +0000 (10:55 +0100)]
radv: implement VK_EXT_subgroup_size_control

This extension allows to control the subgroup size by allowing a
varying subgroup size and also specifying a required subgroup size.

This implementation only allows to specify a required subgroup
size for compute shaders because there is some caveats with
other shader stages (eg. NGG with geometry shader). This
basically allows apps to use Wave32 for compute shaders.

This extension is enabled for all chips but only GFX10 supports
Wave32. ACO doesn't support it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: rely on shader's wavesize when computing NGG info
Samuel Pitoiset [Thu, 31 Oct 2019 10:16:24 +0000 (11:16 +0100)]
radv: rely on shader's wavesize when computing NGG info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: determine shaders wavesize at pipeline level
Samuel Pitoiset [Thu, 31 Oct 2019 09:06:43 +0000 (10:06 +0100)]
radv: determine shaders wavesize at pipeline level

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: hardcode the number of waves for the GFX6 LS-HS bug
Samuel Pitoiset [Thu, 31 Oct 2019 08:35:22 +0000 (09:35 +0100)]
radv: hardcode the number of waves for the GFX6 LS-HS bug

It's always 64.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv/gfx10: enable wave32 for compute based on shader's wavesize
Samuel Pitoiset [Thu, 31 Oct 2019 08:30:47 +0000 (09:30 +0100)]
radv/gfx10: enable wave32 for compute based on shader's wavesize

This will allow to change wavesize on-demand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agonir: fix packing of nir_variable
Samuel Pitoiset [Wed, 6 Nov 2019 07:31:25 +0000 (08:31 +0100)]
nir: fix packing of nir_variable

The maximum number of descriptor sets is indeed 32 but without
the sign bit.

The maximum number of bindings for RADV is way larger, keep it
as 32-bit.

Fixes: 96e6ef80d93 ("nir: pack the rest of nir_variable::data")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
5 years agoradv: fix 32-bit compiler warnings
Samuel Pitoiset [Thu, 31 Oct 2019 15:10:23 +0000 (16:10 +0100)]
radv: fix 32-bit compiler warnings

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2031
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: add a note about perftest/debug options
Samuel Pitoiset [Thu, 31 Oct 2019 15:52:30 +0000 (16:52 +0100)]
radv: add a note about perftest/debug options

Now that all environment variables are documented, it would be
appreciated if we can keep this up-to-date.

[skip ci]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agodocs: document all RADV environment variables
Samuel Pitoiset [Thu, 31 Oct 2019 15:51:13 +0000 (16:51 +0100)]
docs: document all RADV environment variables

Requested by https://gitlab.freedesktop.org/mesa/mesa/issues/2022

[skip ci]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agonir/serialize: pack nir_variable flags
Marek Olšák [Fri, 25 Oct 2019 18:33:04 +0000 (14:33 -0400)]
nir/serialize: pack nir_variable flags

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/serialize: store 32-bit object IDs instead of 64-bit
Marek Olšák [Fri, 25 Oct 2019 05:02:54 +0000 (01:02 -0400)]
nir/serialize: store 32-bit object IDs instead of 64-bit

That means we have only 30 bits for object IDs, because 2 bits are
sometimes used for something else.

This decrease the uncompressed shader size for the biggest Borderlands 2
shader from 33.6 KB to 23.2 KB. (31% decrease)

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/serialize: don't expand 16-bit variable state slots to 32 bits
Marek Olšák [Fri, 25 Oct 2019 16:01:27 +0000 (12:01 -0400)]
nir/serialize: don't expand 16-bit variable state slots to 32 bits

the swizzle also needs only 16 bits

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir: pack the rest of nir_variable::data
Marek Olšák [Fri, 25 Oct 2019 19:21:30 +0000 (15:21 -0400)]
nir: pack the rest of nir_variable::data

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agoradeonsi: keep serialized NIR instead of nir_shader in si_shader_selector
Marek Olšák [Sat, 2 Nov 2019 03:55:58 +0000 (23:55 -0400)]
radeonsi: keep serialized NIR instead of nir_shader in si_shader_selector

This decreases memory usage, because serialized NIR is more compact.

The main shader part is compiled from nir_shader.
Monolithic shader variants are compiled from nir_binary.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agoradeonsi: don't keep compute shader IR after compilation
Marek Olšák [Sat, 2 Nov 2019 01:37:47 +0000 (21:37 -0400)]
radeonsi: don't keep compute shader IR after compilation

not needed. We also need to free TGSI in the destroy function for the case
when an app is terminated and si_create_compute_state_async is never
executed because of util_queue_drop_job.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agoradeonsi: use IR SHA1 as the cache key for the in-memory shader cache
Marek Olšák [Sat, 2 Nov 2019 01:26:47 +0000 (21:26 -0400)]
radeonsi: use IR SHA1 as the cache key for the in-memory shader cache

instead of using whole IR binaries. This saves some memory.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agolima: add support for gl_PointSize
Vasily Khoruzhick [Sat, 2 Nov 2019 02:23:57 +0000 (19:23 -0700)]
lima: add support for gl_PointSize

GP handles gl_PointSize similar to gl_Position, i.e. it needs
separate buffer and it has special type in varying descriptors, also
for indexed draw we need to emit special PLBU command to pass
address of gl_PointSize buffer.

Blob also clamps gl_PointSize to 1 .. 100 (as well as line width),
so let's do the same.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
5 years agomesa/imports: let the build system detect strtok_r()
Eric Engestrom [Tue, 5 Nov 2019 00:13:27 +0000 (00:13 +0000)]
mesa/imports: let the build system detect strtok_r()

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2013
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agomeson: require `nm` again on Unix systems
Eric Engestrom [Tue, 29 Oct 2019 21:43:22 +0000 (21:43 +0000)]
meson: require `nm` again on Unix systems

This was made optional in ff9bf223c24143260a97 ("meson: make nm binary optional")
for Windows, but proper windows has been added and `nm` is now only used
on Unix systems.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviwed-by: Dylan Baker <dylan@pnwbakers>
5 years agomeson: add windows support to symbols checks
Eric Engestrom [Tue, 29 Oct 2019 21:42:16 +0000 (21:42 +0000)]
meson: add windows support to symbols checks

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviwed-by: Dylan Baker <dylan@pnwbakers>
5 years agomeson: move the generic symbols check arguments to a common variable
Eric Engestrom [Tue, 29 Oct 2019 21:32:05 +0000 (21:32 +0000)]
meson: move the generic symbols check arguments to a common variable

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviwed-by: Dylan Baker <dylan@pnwbakers>
5 years agomeson: add variable to control the symbols checks
Eric Engestrom [Tue, 29 Oct 2019 14:21:08 +0000 (14:21 +0000)]
meson: add variable to control the symbols checks

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviwed-by: Dylan Baker <dylan@pnwbakers>
5 years agomesa: fix call to _mesa_lookup_vao_err
Pierre-Eric Pelloux-Prayer [Tue, 5 Nov 2019 17:35:01 +0000 (18:35 +0100)]
mesa: fix call to _mesa_lookup_vao_err

Fixes: 3e842a0b0ea ("mesa: rework _mesa_lookup_vao_err to allow usage from EXT_dsa")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2055
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>