Clifford Wolf [Thu, 27 Jun 2019 08:59:12 +0000 (10:59 +0200)]
Add "pmux2shiftx -norange", fixes #1135
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 26 Jun 2019 17:06:10 +0000 (19:06 +0200)]
Merge pull request #1137 from mmicko/cell_sim_fix
Simulation model verilog fix
Miodrag Milanovic [Wed, 26 Jun 2019 16:34:34 +0000 (18:34 +0200)]
Simulation model verilog fix
Clifford Wolf [Wed, 26 Jun 2019 15:54:17 +0000 (17:54 +0200)]
Improve opt_clean handling of unused public wires
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 26 Jun 2019 15:42:00 +0000 (17:42 +0200)]
Improve BTOR2 handling of undriven wires
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 26 Jun 2019 09:09:43 +0000 (11:09 +0200)]
Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 26 Jun 2019 09:00:44 +0000 (11:00 +0200)]
Do not clean up buffer cells with "keep" attribute, closes #1128
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 26 Jun 2019 08:58:39 +0000 (10:58 +0200)]
Escape scope names starting with dollar sign in smtio.py
Signed-off-by: Clifford Wolf <clifford@clifford.at>
whitequark [Tue, 25 Jun 2019 16:37:36 +0000 (16:37 +0000)]
Add more ECP5 Diamond flip-flops.
This includes all I/O registers, and a few more regular FFs where it
was convenient.
Eddie Hung [Tue, 25 Jun 2019 15:43:58 +0000 (08:43 -0700)]
Add testcase from #335, fixed by #1130
Clifford Wolf [Tue, 25 Jun 2019 15:34:44 +0000 (17:34 +0200)]
Merge pull request #1130 from YosysHQ/eddie/fix710
memory_dff: walk through more than one mux for computing read enable
Eddie Hung [Tue, 25 Jun 2019 15:33:17 +0000 (08:33 -0700)]
Fix spacing
Eddie Hung [Tue, 25 Jun 2019 15:29:55 +0000 (08:29 -0700)]
Move only one consumer check outside of while loop
Eddie Hung [Tue, 25 Jun 2019 15:22:57 +0000 (08:22 -0700)]
Merge pull request #1129 from YosysHQ/eddie/ram32x1d
Add RAM32X1D support
Clifford Wolf [Tue, 25 Jun 2019 15:21:59 +0000 (17:21 +0200)]
Merge pull request #1075 from YosysHQ/eddie/muxpack
Add new "muxpack" command for packing chains of $mux cells
Eddie Hung [Tue, 25 Jun 2019 01:33:06 +0000 (18:33 -0700)]
Walk through as many muxes as exist for rd_en
Eddie Hung [Tue, 25 Jun 2019 01:32:58 +0000 (18:32 -0700)]
Add test
Eddie Hung [Mon, 24 Jun 2019 23:16:50 +0000 (16:16 -0700)]
Add RAM32X1D support
Clifford Wolf [Mon, 24 Jun 2019 06:52:12 +0000 (08:52 +0200)]
Merge pull request #1124 from mmicko/json_ports
Add upto and offset to JSON ports
Eddie Hung [Sat, 22 Jun 2019 21:40:55 +0000 (14:40 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/muxpack
Eddie Hung [Sat, 22 Jun 2019 03:30:24 +0000 (20:30 -0700)]
Add 'muxcover -dmux=<cost>' and '-nopartial' to CHANGELOG
Eddie Hung [Sat, 22 Jun 2019 00:13:41 +0000 (17:13 -0700)]
Merge pull request #1108 from YosysHQ/clifford/fix1091
Add support for partial matches to muxcover
Eddie Hung [Fri, 21 Jun 2019 19:31:14 +0000 (12:31 -0700)]
Cope with $reduce_or common in case
Eddie Hung [Fri, 21 Jun 2019 19:31:04 +0000 (12:31 -0700)]
Add more tests
Eddie Hung [Fri, 21 Jun 2019 19:13:00 +0000 (12:13 -0700)]
Fix testcase
Eddie Hung [Fri, 21 Jun 2019 18:52:51 +0000 (11:52 -0700)]
Fix spacing
Eddie Hung [Fri, 21 Jun 2019 18:52:28 +0000 (11:52 -0700)]
Add doc
Eddie Hung [Fri, 21 Jun 2019 18:45:53 +0000 (11:45 -0700)]
Add more muxpack tests, with overlapping entries
Eddie Hung [Fri, 21 Jun 2019 18:45:31 +0000 (11:45 -0700)]
Fix up ExclusiveDatabase with @cliffordwolf's help
Eddie Hung [Fri, 21 Jun 2019 18:17:19 +0000 (11:17 -0700)]
Merge branch 'master' into eddie/muxpack
Miodrag Milanovic [Fri, 21 Jun 2019 18:01:40 +0000 (20:01 +0200)]
Fix json formatting
Miodrag Milanovic [Fri, 21 Jun 2019 17:47:25 +0000 (19:47 +0200)]
Add upto and offset to JSON ports
Clifford Wolf [Fri, 21 Jun 2019 17:25:35 +0000 (19:25 +0200)]
Merge pull request #1123 from mmicko/fix_typo
Fix json frontend loading upto
Clifford Wolf [Fri, 21 Jun 2019 17:24:41 +0000 (19:24 +0200)]
Replace "muxcover -freedecode" with "muxcover -dmux=cost"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Miodrag Milanovic [Fri, 21 Jun 2019 17:09:34 +0000 (19:09 +0200)]
Fix typo
Eddie Hung [Fri, 21 Jun 2019 15:56:56 +0000 (08:56 -0700)]
Merge pull request #1085 from YosysHQ/eddie/shregmap_improve
Improve shregmap to handle case where first flop is common to two chains
Clifford Wolf [Fri, 21 Jun 2019 14:58:12 +0000 (16:58 +0200)]
Merge pull request #1122 from YosysHQ/clifford/jsonports
Added JSON upto and offset
Clifford Wolf [Fri, 21 Jun 2019 13:22:17 +0000 (15:22 +0200)]
Added JSON upto and offset
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Fri, 21 Jun 2019 13:07:39 +0000 (15:07 +0200)]
Merge pull request #1121 from YosysHQ/ecp5-ccu2c-inv
ecp5: Improve mapping of $alu when BI is used
David Shah [Fri, 21 Jun 2019 08:44:13 +0000 (09:44 +0100)]
ecp5: Improve mapping of $alu when BI is used
Signed-off-by: David Shah <dave@ds0.me>
Clifford Wolf [Fri, 21 Jun 2019 08:13:51 +0000 (10:13 +0200)]
Merge pull request #1117 from bwidawsk/more-home
Add a few more filename rewrites
Clifford Wolf [Fri, 21 Jun 2019 08:13:13 +0000 (10:13 +0200)]
Merge pull request #1119 from YosysHQ/eddie/fix1118
Make genvar a signed type
Clifford Wolf [Fri, 21 Jun 2019 08:12:32 +0000 (10:12 +0200)]
Merge pull request #1116 from YosysHQ/eddie/fix1115
Sign extend unsized 'bx and 'bz values
Clifford Wolf [Fri, 21 Jun 2019 08:02:10 +0000 (10:02 +0200)]
Add "muxcover -freedecode"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Fri, 21 Jun 2019 04:56:02 +0000 (21:56 -0700)]
Fix gcc invalidation behaviour for write_aiger
Clifford Wolf [Thu, 20 Jun 2019 09:30:27 +0000 (11:30 +0200)]
Improvements in muxcover
- Slightly under-estimate cost of decoder muxes
- Prefer larger muxes at tree root at same cost
- Don't double-count input cost for partial muxes
- Add debug log output
Eddie Hung [Wed, 19 Jun 2019 17:15:41 +0000 (10:15 -0700)]
Missing a `clean` and `opt_expr -mux_bool` in test
Eddie Hung [Wed, 19 Jun 2019 17:07:34 +0000 (10:07 -0700)]
Add test
Clifford Wolf [Wed, 19 Jun 2019 11:15:54 +0000 (13:15 +0200)]
Add support for partial matches to muxcover, fixes #1091
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Fri, 21 Jun 2019 00:03:05 +0000 (17:03 -0700)]
Actually, there might not be any harm in updating sigmap...
Eddie Hung [Thu, 20 Jun 2019 23:57:54 +0000 (16:57 -0700)]
Add comment as per @cliffordwolf
Eddie Hung [Thu, 20 Jun 2019 23:07:22 +0000 (16:07 -0700)]
Add test
Eddie Hung [Thu, 20 Jun 2019 23:04:12 +0000 (16:04 -0700)]
Make genvar a signed type
Eddie Hung [Thu, 20 Jun 2019 19:45:40 +0000 (12:45 -0700)]
Add CHANGELOG entry
Eddie Hung [Thu, 20 Jun 2019 19:43:59 +0000 (12:43 -0700)]
Extend sign extension tests
Eddie Hung [Thu, 20 Jun 2019 19:43:39 +0000 (12:43 -0700)]
Maintain "is_unsized" state of constants
Eddie Hung [Thu, 20 Jun 2019 19:40:05 +0000 (12:40 -0700)]
Revert "Fix sign extension when sign is 1'bx"
This reverts commit
0221f3e1c5b427678c5679027ee47ec7c0b8321d.
Ben Widawsky [Thu, 20 Jun 2019 17:27:59 +0000 (10:27 -0700)]
Add a few more filename rewrites
This now allows a full pipeline to work, something such as:
yosys -p "synth_ecp5 -json ~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v"
Otherwise, you will get something along the lines of:
ERROR: Can't open output file `~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v' for writing: No such file or directory
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Eddie Hung [Thu, 20 Jun 2019 17:15:04 +0000 (10:15 -0700)]
Remove leftover comment
Eddie Hung [Thu, 20 Jun 2019 17:10:43 +0000 (10:10 -0700)]
Add test
Eddie Hung [Thu, 20 Jun 2019 17:04:42 +0000 (10:04 -0700)]
Fix sign extension when sign is 1'bx
Clifford Wolf [Thu, 20 Jun 2019 13:34:52 +0000 (15:34 +0200)]
Fix typo, fixes #1095
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 20 Jun 2019 13:23:55 +0000 (15:23 +0200)]
Improve shregmap help message, fixes #1113
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 20 Jun 2019 12:27:57 +0000 (14:27 +0200)]
Update some .gitignore files
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 20 Jun 2019 10:23:07 +0000 (12:23 +0200)]
Fix typo
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 20 Jun 2019 10:06:58 +0000 (12:06 +0200)]
Merge branch 'towoe-unpacked_arrays'
Clifford Wolf [Thu, 20 Jun 2019 10:06:07 +0000 (12:06 +0200)]
Add proper test for SV-style arrays
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Thu, 20 Jun 2019 10:03:00 +0000 (12:03 +0200)]
Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towoe-unpacked_arrays
Eddie Hung [Wed, 19 Jun 2019 22:30:50 +0000 (15:30 -0700)]
Merge pull request #1111 from acw1251/help_summary_fixes
Fixed the help summary line for a few commands
acw1251 [Wed, 19 Jun 2019 20:39:46 +0000 (16:39 -0400)]
Fixed small typo in ice40_unlut help summary
acw1251 [Wed, 19 Jun 2019 19:27:04 +0000 (15:27 -0400)]
Fixed the help summary line for a few commands
Eddie Hung [Wed, 19 Jun 2019 16:51:11 +0000 (09:51 -0700)]
Fix bug in #1078, add entry to CHANGELOG
Clifford Wolf [Wed, 19 Jun 2019 15:25:39 +0000 (17:25 +0200)]
Merge pull request #1109 from YosysHQ/clifford/fix1106
Add "read_verilog -pwires" feature
Clifford Wolf [Wed, 19 Jun 2019 12:38:50 +0000 (14:38 +0200)]
Add "read_verilog -pwires" feature, closes #1106
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 19 Jun 2019 11:53:07 +0000 (13:53 +0200)]
Merge pull request #1105 from YosysHQ/clifford/fixlogicinit
Improve handling of initial/default values
Tobias Wölfel [Wed, 19 Jun 2019 10:47:48 +0000 (12:47 +0200)]
Unpacked array declaration using size
Allows fixed-sized array dimension specified by a single number.
This commit is based on the work from PeterCrozier
https://github.com/YosysHQ/yosys/pull/560.
But is split out of the original work.
Clifford Wolf [Wed, 19 Jun 2019 10:20:35 +0000 (12:20 +0200)]
Make tests/aiger less chatty
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 19 Jun 2019 10:12:08 +0000 (12:12 +0200)]
Add defvalue test, minor autotest fixes for .sv files
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 19 Jun 2019 09:49:20 +0000 (11:49 +0200)]
Use input default values in hierarchy pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 19 Jun 2019 09:37:11 +0000 (11:37 +0200)]
Add defaultvalue attribute
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 19 Jun 2019 09:25:11 +0000 (11:25 +0200)]
Fix handling of "logic" variables with initial value
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 19 Jun 2019 08:52:59 +0000 (10:52 +0200)]
Merge pull request #1100 from bwidawsk/home
Support ~ in filename parsing
Clifford Wolf [Wed, 19 Jun 2019 08:50:32 +0000 (10:50 +0200)]
Merge pull request #1104 from whitequark/case-semantics
Clarify switch/case semantics in RTLIL
whitequark [Wed, 19 Jun 2019 05:22:40 +0000 (05:22 +0000)]
Explain exact semantics of switch and case rules in the manual.
whitequark [Wed, 19 Jun 2019 05:22:13 +0000 (05:22 +0000)]
In RTLIL::Module::check(), check process invariants.
Ben Widawsky [Mon, 17 Jun 2019 21:45:48 +0000 (14:45 -0700)]
Support filename rewrite in backends
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Mon, 17 Jun 2019 21:45:11 +0000 (14:45 -0700)]
Support ~ for home directory
This is tested on Linux only
v2:
Wrap functioanlity in ifndef _WIN32 (eddiehung)
Find '~/' instead of '~' (cliffordwolf)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Eddie Hung [Tue, 18 Jun 2019 18:51:34 +0000 (11:51 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/muxpack
Clifford Wolf [Tue, 18 Jun 2019 14:52:08 +0000 (16:52 +0200)]
Merge pull request #1086 from udif/pr_elab_sys_tasks2
Fixed broken $error()/$info/$warning() on non-generate blocks (within always/initial blocks)
Clifford Wolf [Sun, 16 Jun 2019 21:12:03 +0000 (23:12 +0200)]
Add timescale and generated-by header to yosys-smtbmc MkVcd
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Serge Bazanski [Thu, 13 Jun 2019 10:14:37 +0000 (12:14 +0200)]
Merge pull request #829 from abdelrahmanhosny/master
Dockerfile for Yosys
Eddie Hung [Wed, 12 Jun 2019 15:34:06 +0000 (08:34 -0700)]
Add shregmap -tech xilinx test
Eddie Hung [Tue, 11 Jun 2019 23:05:42 +0000 (16:05 -0700)]
Revert "Try way that doesn't involve creating a new wire"
This reverts commit
2f427acc9ed23c77e89386f4fbf53ac580bf0f0b.
Eddie Hung [Tue, 11 Jun 2019 22:48:20 +0000 (15:48 -0700)]
Try way that doesn't involve creating a new wire
Udi Finkelstein [Mon, 10 Jun 2019 23:52:06 +0000 (02:52 +0300)]
Fixed brojen $error()/$info/$warning() on non-generate blocks
(within always/initial blocks)
Eddie Hung [Mon, 10 Jun 2019 23:16:40 +0000 (16:16 -0700)]
If d_bit already in sigbit_chain_next, create extra wire
Eddie Hung [Mon, 10 Jun 2019 23:16:26 +0000 (16:16 -0700)]
Add test
Eddie Hung [Mon, 10 Jun 2019 17:32:19 +0000 (10:32 -0700)]
Elaborate muxpack doc
Eddie Hung [Mon, 10 Jun 2019 17:28:40 +0000 (10:28 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/muxpack
Eddie Hung [Mon, 10 Jun 2019 17:27:55 +0000 (10:27 -0700)]
Add some more comments