mesa: Implement VertexArrayElementBuffer

v2: Add a doxygen comment.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>

mesa: Implement EnableVertexArrayAttrib

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>

mesa: Implement DisableVertexArrayAttrib

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>

mesa: Keep track of the last looked-up VAO

This saves the cost of repeated hash table lookups when the same
vertex array object is referenced in a sequence of calls such as:

    glVertexArrayAttribFormat(vao, ...);
    glVertexArrayAttribBinding(vao, ...);
    glEnableVertexArrayAttrib(vao, ...);
    ...

Note that VAO's are container objects that are not shared between
contexts.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>

mesa: Add _mesa_lookup_vao_err

This is a convenience function that generates GL_INVALID_OPERATION
when the array object doesn't exist.

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>

mesa: Implement CreateVertexArrays

v2: Update the documentation for gen_vertex_arrays().

Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>

i965/skl: In opt_sampler_eot always set destination register to null

opt_sampler_eot enables a direct write to framebuffer from a sample.
In order to do this the sample message needs to have a message header
so if there wasn't one already then the function adds one. In addition
the function sets the destination register to null because it's no
longer used. However it was only doing this in cases where it was
adding a message header. This patch just moves setting the destination
so that it happens even if there's a messge header. In practice this
doesn't seem to make any difference but it's a bit cleaner.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/fs: Set the header_size on LOAD_PAYLOAD in opt_sampler_eot

Commit 94ee908448 added a header size parameter to the function to
create the LOAD_PAYLOAD instruction. However this broke
opt_sampler_eot which manually constructs the instruction and so
wasn't setting the header_size. This ends up making the parameters for
the send message all have the wrong location and it all falls apart.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

docs: document the LIBGL_DRI3_DISABLE environment variable

Suggested-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>

docs: update ARB_vertex_attrib_64bit status

Add to GL3.txt and release notes.

Signed-off-by: Dave Airlie <airlied@redhat.com>

st/mesa:  add double input support including lowering (v3.1)

This takes a different approach to previously, we cannot index into the
inputMapping with anything but the mesa attribute index, so we can't use
the just add one to index trick, we need more info to add one to it
after we've mapped the input.

(Fixed copy propgation and cleaned up a little)

v2: drop float64 format check, just attr->Doubles.
merge enable patch.
v3: cleanup code a bit.
v3.1: minor review fixups (comment, newline) (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

mesa/vbo: add support for 64-bit vertex attributes. (v1)

This adds support in the vbo and array code to handle
double vertex attributes.

v0.2: merge code to handle doubles in vbo layer.
v1: don't use v0, merge api_array elt code.

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl: check total count of multi-slot double vertex attribs

The spec is vague all over the place about this, but this seems
to be the intent, we can probably make this optional later if
someone makes hw that cares and writes a driver.

Basically we need to double count some of the d types but
only for totalling not for slot number assignment.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl: track which program inputs are doubles

instead of doing the attempts at dual slot handling here,
let the backend do it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl: add ARB_vertex_attrib_64bit support. (v2)

Just more boilerplate stuff.

v2:
bad fallthrough on versioning,
this is my ugly but self contained solution (Ian)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

mesa: add ARB_vertex_attrib_64bit to extensions. (v2)

Just add the boilerplate bits.

v2: add to version.c

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

mapi: add GL_ARB_vertex_attrib_64bit support

This just adds the glapi bits.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: fix ir_assignment hack doing bad things for doubles

This hack for fixing gl_FragDepth apparantly caused a GLSL shader
outputting a single double to try and output a dvec4, but we hadn't
assigned outputs for the secondary bit.

This avoids going into the hack code for scalar doubles.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965/wm/gen6: Add option for disabling statistics collection

Normally this is always needed but for internal blits and clears
we need to be able to disable it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/wm/gen6: Refactor state setup

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Remove unused variables

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Change the order of conditions tested in if

Reduces the number of conditions tested in if to one in case of
non-integer formats. Makes no functional changes.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

nir: Allow feq/fne/ieq/ine to be optimized with inot.

instructions in affected programs:     380 -> 376 (-1.05%)
helped:                                2

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>

nir: Recognize (a < c || b < c) as min(a, b) < c.

... and (a >= c) || (b >= c) as max(a, b) >= c.

Similar to commit 97e6c1b9.

total instructions in shared programs: 6182276 -> 6182180 (-0.00%)
instructions in affected programs:     6400 -> 6304 (-1.50%)
helped:                                68
HURT:                                  4

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>

nir: Recognize trivial min/max.

No changes, but does prevent some regressions in the next commit.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>

nir: Recognize i2b(b2i(x)) as x.

Helps the same set of programs as the previous commit.

instructions in affected programs:     4490 -> 4346 (-3.21%)
helped:                                8

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>

nir: Recognize imul(b2i(a), b2i(b)) as a logical AND.

Four shaders in Unreal 4's Sun Temple are helped, and gain SIMD16
because we avoid an integer multiplication.

instructions in affected programs:     2353 -> 2245 (-4.59%)
helped:                                4
GAINED:                                4

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>

i965/sync: Implement DRI2_Fence extension

This enables EGL_KHR_fence_sync and EGL_KHR_wait_sync.

Below is the difference in piglit results, before and after this patch.
No regressions and several tests improve from 'skip' to 'pass'. Out of
EGL_KHR_fence_sync tests, two of the multithreaded tests skip; all other
tests pass.

  cmdline: piglit run -p gbm -t sync tests/quick.py
  mesa: master@1ac7db0
  piglit: 4069bec
  hw: Ivybridge

        | before after
  ------+-------------
   pass |     32    46
   fail |      0     0
  crash |      0     0
   skip |     35    21
  total |     67    67

v2:
  - Set fence->signalled = true in brw_fence_has_completed() too.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync'

I'm about to implement DRI2_Fenc in intel_syncobj.c.  To prevent
madness, we need to prefix functions for GL_ARB_sync with 'gl' and
functions for DRI2_Fence with 'dri'. Otherwise, the file will become
a jumble of similiarly named functions.

For example:
    old-name:      intel_client_wait_sync()
    new-name:      intel_gl_client_wait_sync()
    soon-to-come:  intel_dri_client_wait_sync()

I wrote this renaming commit separately from the commit that implements
DRI2_Fence because I wanted the latter diff to be reviewable.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i915/sync: Return early when calloc fails

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/sync: Return NULL when calloc fails

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i915/sync: Don't crash when deleting sync object

Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.

Bug found by code inspection.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/sync: Don't crash when deleting sync object

Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.

Bug found by code inspection.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

egl/dri2: Fix codestyle in a comment

Pointed out by Kenneth Graunke. Trivial fix.

glx: report which DRI version is used when in verbose debug mode

This should make it more obvious in bug reports while also removing
any sort of guesswork for developers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>

glapi: Add positional argument specifier.

Fix build error introduced with commit 1c5a57a "glapi/es3.1: Add support
for GLES versions > 3.0" with Python < 2.7.

  File "src/mapi/glapi/gen/gl_genexec.py", line 230, in <module>
    printer.Print(api)
  File "src/mapi/glapi/gen/gl_XML.py", line 120, in Print
    self.printBody(api)
  File "src/mapi/glapi/gen/gl_genexec.py", line 187, in printBody
    condition_parts.append('(ctx->API == API_OPENGLES2 && ctx->Version >= {})'.format(int(f.api_map['es2'] * 10)))
ValueError: zero length field name in format

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

nv50/ir: add SHL to the list of U32 opcodes

Having the wrong inferred type prevents a number of optimizations,
including constant propagation (since float immediates work differently
than integer immediates).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965: Sort extension enable lists

Sort by GEN, then sort by extension name.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

r600g: Fix Clang return-type build error.

Fix Clang return-type error introduced with commit
96f164f6f047833091eb98a73aa80c31dc94f962 "gallium: make
pipe_context::begin_query return a boolean".

  CC       r600_query.lo
r600_query.c:443:3: error: non-void function 'r600_begin_query' should return a value [-Wreturn-type]
                return;
                ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

i965/fs: Allow copy propagation on ATTR file registers.

This especially helps with NIR because we currently emit MOVs at the top
of the shader to copy from various ATTR registers to a giant VGRF array
of all inputs.  (This could potentially be done better, but since
there's only ever one write to each register, it should be trivial to
copy propagate away...)

With NIR - only vertex shaders:
total instructions in shared programs: 3129373 -> 2889581 (-7.66%)
instructions in affected programs:     3119717 -> 2879925 (-7.69%)
helped:                                20833

Without NIR - only vertex shaders:
total instructions in shared programs: 2745901 -> 2724483 (-0.78%)
instructions in affected programs:     693426 -> 672008 (-3.09%)
helped:                                3516

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

i965/fs_inst: Get rid of the effective_width field

The effective_width field was an ill-concieved hack to get around issues in
the LOAD_PAYLOAD instruction.  Now that the LOAD_PAYLOAD instruction is far
more sane, this field can die.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Rework the fs_visitor LOAD_PAYLOAD instruction

The newly reworked instruction is far more straightforward than the
original.  Before, the LOAD_PAYLOAD instruction was lowered by a the
complicated and broken-by-design pile of heuristics to try and guess
force_writemask_all, exec_size, and a number of other factors on the
sources.

Instead, we use the header_size on the instruction to denote which sources
are "header sources".  Header sources are required to be a single physical
hardware register that is copied verbatim.  The registers that follow are
considered the actual payload registers and have a width that correspond's
to the LOAD_PAYLOAD's exec_size and are treated as being per-channel.  This
gives us a fairly straightforward lowering:

 1) All header sources are copied directly using force_writemask_all and,
    since they are guaranteed to be a single register, there are no
    force_sechalf issues.

 2) All non-header sources are copied using the exact same force_sechalf
    and force_writemask_all modifiers as the LOAD_PAYLOAD operation itself.

 3) In order to accommodate older gens that need interleaved colors,
    lower_load_payload detects when the destination is a COMPR4 register
    and automatically interleaves the non-header sources.  The
    lower_load_payload pass does the right thing here regardless of whether
    or not the hardware actually supports COMPR4.

This patch commit itself is made up of a bunch of smaller changes squashed
together.  Individual change descriptions follow:

i965/fs: Rework fs_visitor::LOAD_PAYLOAD

   We rework LOAD_PAYLOAD to verify that all of the sources that count as
   headers are, indeed, exactly one register and that all of the non-header
   sources match the destination width.  We then take the exec_size for
   LOAD_PAYLOAD directly from the destination width.

i965/fs: Make destinations of load_payload have the appropreate width

i965/fs: Rework fs_visitor::lower_load_payload

   v2: Don't allow the saturate flag on LOAD_PAYLOAD instructions

i965/fs_cse: Support the new-style LOAD_PAYLOAD

i965/fs_inst::is_copy_payload: Support the new-style LOAD_PAYLOAD

i965/fs: Simplify setup_color_payload

   Previously, setup_color_payload was a a big helper function that did a
   lot of gen-specific special casing for setting up the color sources of
   the LOAD_PAYLOAD instruction.  Now that lower_load_payload is much more
   sane, most of that complexity isn't needed anymore.  Instead, we can do
   a simple fixup pass for color clamps and then just stash sources
   directly in the LOAD_PAYLOAD.  We can trust lower_load_payload to do the
   right thing with respect to COMPR4.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Make LOAD_PAYLOAD take a header size

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Make emit_single_fb_write take an explicit exec_size

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs_inst: Add an is_copy_payload helper

This commit adds a new is_copy_payload helper to fs_inst that takes the
place of the similarly named functions in cse and register coalesce.  The
two is_copy_payload functions in CSE and register coalesce were subtly
different and potentially subtly broken.  The new version unifies the two
and should be more correct.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Change header_present to header_size in backend_instruction

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs_cse: Factor out code to create copy instructions

v2: Get rid of the block parameter and make src a const reference

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Make half(fs_reg, unsigned) handle register files more explicitly

Previously, we had a special case for uniforms and immediates and then a
bunch of asserts for various other pessimal things.  This commit changes it
so that it explicitly does something on each register file.  Some of them
are disallowed and others are treated properly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Fix passing an immediate to half().

Immediates are generally uniform, they yield the same value to both
halves of any instruction.

Reviewed-by: Matt Turner <mattst88@gmail.com>

swrast: Build fix for darwin

Fixes regression from commit 64b1dc44495890cbc2c7c5509cb830264020998c

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90147
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
CC: Emil Velikov <emil.l.velikov@gmail.com>
CC: jon.turney@dronecode.org.uk
CC: ionic@macports.org

egl/dri2: Check return value of __DRI2fence::create_fence()

If it returns NULL, then return early with an error.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

draw: (trivial) fix out-of-bounds vector initialization

Was off-by-one. llvm says inserting an element with an index higher than the
number of elements yields undefined results. Previously such inserts were
ignored but as of llvm revision 235854 the vector gets replaced with undef,
causing failures.
This fixes piglit gl-3.2-layered-rendering-gl-layer, as mentioned in
https://llvm.org/bugs/show_bug.cgi?id=23424.

Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: mesa-stable@lists.freedesktop.org

main/queryobj: add GL_QUERY_TARGET support to GetQueryObjectiv()

This was missing from my patchset to support the query-related entry
points of Direct State Access.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>

ilo: silence a compiler warning

Silence

  ilo_query.c:120:7: warning: 'return' with no value, in function returning non-void

since commit 96f164f6.

mesa: support compute stage in _mesa_program_resource_prop

Increases pass rate of ES31-CTS.*program_interface_query* tests
when run with MESA_EXTENSION_OVERRIDE='GL_ARB_compute_shader'. Many
of the negative tests that happen to use compute stage in queries
start passing.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>

glsl: mark special built-in inputs referenced by vertex stage

Refactoring done on active attribute queries did not take in to
account special built-in inputs for the vertex stage. This commit
sets them referenced by vertex stage so that they get enumerated
properly.

Fixes Piglit test 'get-active-attrib-returns-all-inputs' failure.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90243
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>

relnotes: Note support for viewport arrays on i965/Gen6.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

i965/gen6: Enable ARB_viewport_array and AMD_vertex_shader_viewport_index

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen6: Upload all the SF viewports

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen6: Upload all the clip viewports

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen6: setup limits for ARB_viewport_array

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

st/mesa: fix pipe_query_result result initializer

Fixes MSVC build error.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

st/mesa: fix st_NewPerfMonitor() declaration

Was missing the context parameter.  Fixes MSVC warning.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl: add parens in shader_integer_mix() to silence compiler warning

Silences gcc warning:
builtin_functions.cpp:204:23: warning: suggest parentheses around '&&'
within '||' [-Wparentheses]

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

st/mesa: also try PIPE_FORMAT_R10G10B10A2_UNORM for GL_RGB10

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: all queries use an unsigned 64-bits integer by default

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>

nvc0: make begin_query return false when all MP counters are used

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Martin Peres <martin.peres@free.fr>

docs: mark GL_AMD_performance_monitor on nvc0 for the 10.6.0 release

Other drivers which want to enable this extension must expose groups of
GPU hardware performance counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

nvc0: define driver-specific query groups

This patch defines "Driver statistics" and "MP counters" groups, but
only the latter will be exposed through GL_AMD_performance_monitor.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

st/mesa: implement GL_AMD_performance_monitor

This is based on the original patch of Christoph Bumiller.

v2 (Samuel Pitoiset):
 - improve Gallium interface for this extension
 - rewrite some parts of the original code
 - fix compilation errors and piglit tests

v3:
 - only enable this extension when the underlying driver expose GPU counters
 - get rid of the ring buffer of queries

v4:
 - add a debug message when the maximum number of counters has been
   reached

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

gallium: make pipe_context::begin_query return a boolean

GL_AMD_performance_monitor must return an error when a monitoring
session cannot be started.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

gallium: replace pipe_driver_query_info::max_value by a union

This allows queries to return different numeric types.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

gallium: add new numeric types to pipe_query_result

This will be used by GL_AMD_performance_monitor.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

gallium: add new fields to pipe_driver_query_info

According to the spec of GL_AMD_performance_monitor, valid type values
returned are UNSIGNED_INT, UNSIGNED_INT64_AMD, PERCENTAGE_AMD, FLOAT.
This also introduces the new field group_id in order to categorize
queries into groups.

v2: add PIPE_DRIVER_QUERY_TYPE_BYTES

v3: fix incorrect query type for radeon and svga drivers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

gallium: add pipe_screen::get_driver_query_group_info

Driver queries are organized as a single hierarchy where queries are
categorized into groups. Each group has a list of queries and a maximum
number of queries that can be sampled. The list of available groups can
be obtained using pipe_screen::get_driver_query_group_info.

This will be used by GL_AMD_performance monitor.

v2: add group type (CPU/GPU)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@free.fr>

mesa: fix shininess check for ffvertex_prog v2

Switch to using VERT_BIT_GENERIC macro, as varying_vp_inputs is a
bitmask.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org

i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN7

On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.

v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
    Add code comments. re-word wrap the commit message.
    Add a complete bugzillia list.
    Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>

i965: Fix missing type in local variable declaration.

Trivial.  Fixes the following compiler warning (from GCC 5.1.0):

brw_context.c:629:10: warning: type defaults to ‘int’ in declaration
of ‘simd_size’ [-Wimplicit-int]

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Use same type for immediate, for compaction.

i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6

On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.

v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
    Add code comments. re-word wrap the commit message.
    Add a complete bugzillia list.
    Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>

i965: Remove end-of-thread SEND alignment code.

This was present in Eric's initial implementation of the compaction code
for Sandybridge (commit 077d01b6). There is no documentation saying this
is necessary, and removing it causes no regressions in piglit on any
platform.

i965: Add XRGB8888 format to intel_screen_make_configs

Some application, such as drm backend of weston, uses XRGB8888 config as
default. i965 doesn't provide this format, but before commit 65c8965d,
the drm platform of EGL takes ARGB8888 as XRGB8888. Now that commit
65c8965d makes EGL recognize format correctly so weston won't start
because it can't find XRGB8888. Add XRGB8888 format to i965 just as
other drivers do.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

nir: add nir_array.h to the sources list

Otherwise `make distcheck' will fail.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

glsl: don't lower fragdata array if the output data types don't match

Commit 7e414b58640aee6e243d337e72cea290c354f632 broke the gl_FragData array
into separate gl_FragData[i] variables, so drivers can eliminate useless
writes to gl_FragData improving their performance.

The problem occurs when GLSL IR code is linked in the following case:

* The FS output variable base data type does not match gl_FragData one (float
  vector)
* The FS output variable is replaced by gl_out_FragDataX because of commit
  7e414b58640aee6 with X from 0 to GL_MAX_DRAW_BUFFERS.

Then the FS output variable base data type is lost in the resulting GLSL IR,
making that the driver does a wrong assignment to gl_out_FragData components
because of unmatching data types.

This patch reverts the fragdata array lowering when the output var base data type
doesn't match gl_out_FragData, i.e., when output variable base data type is
not a float or a float vector.

This patch fixes 250 dEQP tests (tested in an Intel Haswell machine)

dEQP-GLES3.functional.fragment_out.random.* (22 failed tests)
dEQP-GLES3.functional.fragment_out.array.uint.* (120 failed tests)
dEQP-GLES3.functional.fragment_out.array.int.* (108 failed tests)

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/skl: Align compressed textures to four times the block size

On Skylake it is possible to choose your own alignment values for
compressed textures but they are expressed as a multiple of the block
size. The minimum alignment value we can use is 4 so we effectively
have to align to 4 times the block size. This patch makes it initially
set mt->align_[wh] to the large alignment value and then later divides
it by the block size so that it can be uploaded as part of the surface
state.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

egl: image_dma_buf_export - use KHR 64-bit type

After talking to Jon Leech he suggested this should be fine.

update spec to the version in the registry.

Signed-off-by: Dave Airlie <airlied@redhat.com>

glapi/es3.1: Add support for GLES versions > 3.0

Make the checks in the Python script and the generated code more generic
to support arbitrary GLES versions >= 2.0.

The updated dispatch_sanity.cpp test discovered this problem.  Without
this, the next patch would erroneously enable GLES 3.1 functions in GLES
2.0 and GLES 3.0.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl/es3.1: Allow misc ARB_gpu_shader5 built-ins in GLSL ES 3.10

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl/es3.1: Allow textureGather and textureGatherOffset in GLSL ES 3.10

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

glsl/es3.1: Allow enhnaced packing functions in GLSL ES 3.10

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

glsl/es3.1: Allow interger mix built-ins in GLSL ES 3.10

v2: Add missing lexer support.  Noticed by Tapani.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> [v1]

glsl/es3.1: Allow separate shader objects in GLSL ES 3.10

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

glsl/es3.1: Allow explicit uniform locations in GLSL ES 3.10

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

glsl/es3.1: Allow 3.10 ES shaders in a GLES 3.1 context

Currently no 3.10 ES features (beyond 3.00 ES) are enabled.  That will
come later.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

mesa/es3.1: Add _mesa_is_gles31 helper

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

docs/GL3: Update GLES 3.1 dependencies

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

glsl: Add glsl_parser_state::has_atomic_counters helper

v2: Change GL version from 400 to 420.  Noticed by Tapani and Ilia.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

mesa: Use bool in _mesa_is_ helpers instead of GLboolean

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

mesa: Trivial coding standards cleanups

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

mesa: Use bool instead of GLboolean

v2: Squash in whitespace fixes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>