Eddie Hung [Fri, 30 Aug 2019 21:35:05 +0000 (14:35 -0700)]
Add mul_unsigned test
Eddie Hung [Fri, 30 Aug 2019 21:00:40 +0000 (14:00 -0700)]
Missing dep for test_pmgen
Eddie Hung [Fri, 30 Aug 2019 20:26:19 +0000 (13:26 -0700)]
Merge remote-tracking branch 'origin/master' into xc7dsp
Eddie Hung [Fri, 30 Aug 2019 19:27:09 +0000 (12:27 -0700)]
Merge pull request #1340 from YosysHQ/eddie/abc_no_clean
abc9 to not call "clean" at end of run (often called outside)
Eddie Hung [Fri, 30 Aug 2019 18:02:10 +0000 (11:02 -0700)]
New pmgen requires explicit accept
Eddie Hung [Fri, 30 Aug 2019 17:54:22 +0000 (10:54 -0700)]
Merge pull request #1310 from SergeyDegtyar/master
Add new tests for ice40 architecture
Eddie Hung [Fri, 30 Aug 2019 17:32:03 +0000 (10:32 -0700)]
Merge pull request #1321 from YosysHQ/eddie/xilinx_srl
xilinx_srl pass for shift register extraction
Eddie Hung [Fri, 30 Aug 2019 17:27:07 +0000 (10:27 -0700)]
Format `-pwires`
Eddie Hung [Fri, 30 Aug 2019 16:50:20 +0000 (09:50 -0700)]
Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp
Eddie Hung [Fri, 30 Aug 2019 16:37:32 +0000 (09:37 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
SergeyDegtyar [Fri, 30 Aug 2019 13:01:36 +0000 (16:01 +0300)]
macc test fix
David Shah [Fri, 30 Aug 2019 12:57:15 +0000 (13:57 +0100)]
Merge branch 'master' into xc7dsp
David Shah [Fri, 30 Aug 2019 12:28:21 +0000 (13:28 +0100)]
Merge pull request #1343 from whitequark/diamond-ffs
Add/update every Diamond FF primitive
David Shah [Fri, 30 Aug 2019 12:25:55 +0000 (13:25 +0100)]
ecp5: Add simulation equivalence check for Diamond FF implementations
Signed-off-by: David Shah <dave@ds0.me>
SergeyDegtyar [Fri, 30 Aug 2019 12:22:46 +0000 (15:22 +0300)]
Fix macc test
SergeyDegtyar [Fri, 30 Aug 2019 11:17:03 +0000 (14:17 +0300)]
div_mod test fix
SergeyDegtyar [Fri, 30 Aug 2019 10:22:11 +0000 (13:22 +0300)]
fix div_mod test
whitequark [Fri, 30 Aug 2019 10:05:09 +0000 (10:05 +0000)]
ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.
whitequark [Fri, 30 Aug 2019 09:56:19 +0000 (09:56 +0000)]
ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives.
whitequark [Fri, 30 Aug 2019 09:54:48 +0000 (09:54 +0000)]
ecp5: add missing FD primitives.
whitequark [Fri, 30 Aug 2019 09:42:33 +0000 (09:42 +0000)]
ecp5: fix CEMUX on IFS/OFS primitives.
SergeyDegtyar [Fri, 30 Aug 2019 09:38:28 +0000 (12:38 +0300)]
Fix test for counter
Sergey [Fri, 30 Aug 2019 07:29:47 +0000 (10:29 +0300)]
Merge branch 'master' into master
SergeyDegtyar [Fri, 30 Aug 2019 06:45:33 +0000 (09:45 +0300)]
Add new tests.
SergeyDegtyar [Fri, 30 Aug 2019 06:17:32 +0000 (09:17 +0300)]
Remove unnecessary common.v(assertions for testbenches).
SergeyDegtyar [Fri, 30 Aug 2019 06:11:03 +0000 (09:11 +0300)]
Remove simulation from run-test.sh (unnecessary paths)
SergeyDegtyar [Fri, 30 Aug 2019 05:53:35 +0000 (08:53 +0300)]
Remove simulation from run-test.sh
Eddie Hung [Fri, 30 Aug 2019 05:10:45 +0000 (22:10 -0700)]
Merge pull request #1337 from YosysHQ/eddie/fix_carry_wrapper
Fix $__ICE40_CARRY_WRAPPER, restore abc9 functionality
Eddie Hung [Fri, 30 Aug 2019 00:24:48 +0000 (17:24 -0700)]
Nicer formatting
Eddie Hung [Fri, 30 Aug 2019 00:24:25 +0000 (17:24 -0700)]
parse_xaiger() to do "clean -purge"
Eddie Hung [Fri, 30 Aug 2019 00:24:03 +0000 (17:24 -0700)]
Output has priority over input when stitching in abc9
Eddie Hung [Thu, 29 Aug 2019 19:13:52 +0000 (12:13 -0700)]
Group abc_* attribute doc with other attributes
Eddie Hung [Thu, 29 Aug 2019 19:12:59 +0000 (12:12 -0700)]
abc9 to not call "clean" at end of run (often called outside)
Sergey [Thu, 29 Aug 2019 18:09:40 +0000 (21:09 +0300)]
Merge pull request #2 from YosysHQ/master
Pull from upstream
Sergey [Thu, 29 Aug 2019 18:07:34 +0000 (21:07 +0300)]
Merge pull request #3 from YosysHQ/Sergey/tests_ice40
Merge my changes to tests_ice40 branch
Eddie Hung [Thu, 29 Aug 2019 17:33:28 +0000 (10:33 -0700)]
Fix typo that's gone unnoticed for 5 months!?!
Eddie Hung [Thu, 29 Aug 2019 14:03:32 +0000 (07:03 -0700)]
Rename boxes too
Clifford Wolf [Thu, 29 Aug 2019 10:05:26 +0000 (12:05 +0200)]
Bump YOSYS_VER
Signed-off-by: Clifford Wolf <clifford@clifford.at>
SergeyDegtyar [Thu, 29 Aug 2019 07:49:46 +0000 (10:49 +0300)]
Add comments for examples from Lattice user guide
Eddie Hung [Thu, 29 Aug 2019 01:47:48 +0000 (18:47 -0700)]
Add run-test.sh too
Eddie Hung [Thu, 29 Aug 2019 01:45:09 +0000 (18:45 -0700)]
Do not overwrite LUT param
Eddie Hung [Thu, 29 Aug 2019 01:44:57 +0000 (18:44 -0700)]
Add SB_CARRY to ice40_opt test
Eddie Hung [Thu, 29 Aug 2019 01:34:32 +0000 (18:34 -0700)]
Add ice40_opt test
Eddie Hung [Thu, 29 Aug 2019 01:10:33 +0000 (18:10 -0700)]
Cleanup
Eddie Hung [Thu, 29 Aug 2019 00:25:54 +0000 (17:25 -0700)]
Trailing comma
Eddie Hung [Thu, 29 Aug 2019 00:25:05 +0000 (17:25 -0700)]
Adapt to $__ICE40_CARRY_WRAPPER
Eddie Hung [Thu, 29 Aug 2019 00:22:44 +0000 (17:22 -0700)]
Revert "Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with"
This reverts commit
2aedee1f0e0f6a6214241f51f5c12d4b67c3ef6f.
Eddie Hung [Thu, 29 Aug 2019 00:07:36 +0000 (17:07 -0700)]
Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with
CARRY_WRAPPER in the same way since I0 and I3 could be used
Eddie Hung [Thu, 29 Aug 2019 00:07:24 +0000 (17:07 -0700)]
Update box size and timings
Eddie Hung [Thu, 29 Aug 2019 00:07:07 +0000 (17:07 -0700)]
Update to new $__ICE40_CARRY_WRAPPER
Eddie Hung [Wed, 28 Aug 2019 22:31:55 +0000 (15:31 -0700)]
Account for D port being a constant
Eddie Hung [Wed, 28 Aug 2019 19:36:20 +0000 (12:36 -0700)]
Comment out *.sh used for testbenches as we have no more
Eddie Hung [Wed, 28 Aug 2019 19:36:06 +0000 (12:36 -0700)]
Merge pull request #1334 from YosysHQ/clifford/async2synclatch
Add $dlatch support to async2sync
Eddie Hung [Wed, 28 Aug 2019 19:30:35 +0000 (12:30 -0700)]
Use equiv for memory and dpram
Eddie Hung [Wed, 28 Aug 2019 19:21:15 +0000 (12:21 -0700)]
Use equiv_opt for latches
Eddie Hung [Wed, 28 Aug 2019 19:18:32 +0000 (12:18 -0700)]
Merge remote-tracking branch 'origin/clifford/async2synclatch' into Sergey/tests_ice40
Eddie Hung [Wed, 28 Aug 2019 18:06:11 +0000 (11:06 -0700)]
No need to replace Q of slice since $shiftx is autoremove-d
Eddie Hung [Wed, 28 Aug 2019 17:51:39 +0000 (10:51 -0700)]
Add (* clkbuf_sink *) to SRLC16E, reorder ports to match vendor
Eddie Hung [Wed, 28 Aug 2019 17:19:35 +0000 (10:19 -0700)]
More cleanup
Eddie Hung [Wed, 28 Aug 2019 17:11:09 +0000 (10:11 -0700)]
More cleanup
Eddie Hung [Wed, 28 Aug 2019 17:06:40 +0000 (10:06 -0700)]
Do not use default_params dict, hardcode default values, cleanup
Eddie Hung [Wed, 28 Aug 2019 16:55:34 +0000 (09:55 -0700)]
Add .gitignore
Eddie Hung [Wed, 28 Aug 2019 16:55:09 +0000 (09:55 -0700)]
Use test_pmgen for xilinx_srl
Eddie Hung [Wed, 28 Aug 2019 16:54:56 +0000 (09:54 -0700)]
Always generate if no match
Eddie Hung [Wed, 28 Aug 2019 16:27:03 +0000 (09:27 -0700)]
Rename test_pmgen arg xilinx_srl.{fixed,variable}
Eddie Hung [Wed, 28 Aug 2019 16:26:08 +0000 (09:26 -0700)]
Do not simplemap for variable test
Eddie Hung [Wed, 28 Aug 2019 16:24:19 +0000 (09:24 -0700)]
Add xilinx_srl test
Eddie Hung [Wed, 28 Aug 2019 16:21:03 +0000 (09:21 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
David Shah [Wed, 28 Aug 2019 11:44:02 +0000 (12:44 +0100)]
Merge pull request #1332 from YosysHQ/dave/ecp5gsr
ecp5: Add GSR and SGSR support
Clifford Wolf [Wed, 28 Aug 2019 08:35:47 +0000 (10:35 +0200)]
Merge pull request #1335 from YosysHQ/clifford/paramap
Add "paramap" pass
Clifford Wolf [Wed, 28 Aug 2019 08:06:42 +0000 (10:06 +0200)]
Fix typo
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 28 Aug 2019 08:03:27 +0000 (10:03 +0200)]
Add "paramap" pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Clifford Wolf [Wed, 28 Aug 2019 07:45:22 +0000 (09:45 +0200)]
Add $dlatch support to async2sync
Signed-off-by: Clifford Wolf <clifford@clifford.at>
SergeyDegtyar [Wed, 28 Aug 2019 06:49:58 +0000 (09:49 +0300)]
Revert "Add tests for ecp5"
This reverts commit
2270ead09fb4695442c66fe5c06445235f390f2b.
SergeyDegtyar [Wed, 28 Aug 2019 06:47:03 +0000 (09:47 +0300)]
Add tests for ecp5
Clifford Wolf [Tue, 27 Aug 2019 22:18:14 +0000 (00:18 +0200)]
Merge pull request #1325 from YosysHQ/eddie/sat_init
In sat: 'x' in init attr should be ignored
Marcin Kościelnicki [Tue, 27 Aug 2019 16:08:51 +0000 (18:08 +0200)]
xilinx: Add SRLC16E primitive.
Fixes #1331.
Eddie Hung [Tue, 27 Aug 2019 17:19:27 +0000 (10:19 -0700)]
Merge pull request #1292 from YosysHQ/mwk/xilinx_bufgmap
Add clock buffer insertion pass, improve iopadmap.
Eddie Hung [Tue, 27 Aug 2019 16:24:59 +0000 (09:24 -0700)]
Ignore all 1'bx in (* init *)
Eddie Hung [Tue, 27 Aug 2019 16:24:32 +0000 (09:24 -0700)]
Revert to using clean
SergeyDegtyar [Tue, 27 Aug 2019 15:28:05 +0000 (18:28 +0300)]
Revert "Add tests for ecp5 architecture."
This reverts commit
134d3fea909bae02f4f814e3d649658502b44b73.
Marcin Kościelnicki [Tue, 27 Aug 2019 15:26:47 +0000 (17:26 +0200)]
improve clkbuf_inhibit propagation upwards through hierarchy
SergeyDegtyar [Tue, 27 Aug 2019 15:12:18 +0000 (18:12 +0300)]
Add tests for ecp5 architecture.
David Shah [Tue, 27 Aug 2019 12:07:06 +0000 (13:07 +0100)]
ecp5: Add GSR support
Signed-off-by: David Shah <dave@ds0.me>
SergeyDegtyar [Tue, 27 Aug 2019 10:56:26 +0000 (13:56 +0300)]
Add tests for macc and rom;
Test cases from
https://www.latticesemi.com/-/media/LatticeSemi/Documents/UserManuals/EI/iCEcube201701UserGuide.ashx?document_id=52071;
In both cases synthesized only LUTs and DFFs.
Clifford Wolf [Tue, 27 Aug 2019 08:13:23 +0000 (10:13 +0200)]
Add "make bumpversion"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Tue, 27 Aug 2019 04:02:52 +0000 (21:02 -0700)]
Missing close bracket
Eddie Hung [Tue, 27 Aug 2019 00:52:57 +0000 (17:52 -0700)]
Revert "In sat: 'x' in init attr should not override constant"
This reverts commit
2b37a093e95036b267481b2dae2046278eef4040.
Eddie Hung [Tue, 27 Aug 2019 00:51:13 +0000 (17:51 -0700)]
Remove leftover header
Eddie Hung [Tue, 27 Aug 2019 00:49:08 +0000 (17:49 -0700)]
Improve xilinx_srl.fixed generate, add .variable generate
Eddie Hung [Tue, 27 Aug 2019 00:48:54 +0000 (17:48 -0700)]
Account for maxsubcnt overflowing
Eddie Hung [Tue, 27 Aug 2019 00:44:57 +0000 (17:44 -0700)]
Add xilinx_srl_pm.variable to test_pmgen
Eddie Hung [Mon, 26 Aug 2019 21:21:17 +0000 (14:21 -0700)]
Populate generate for xilinx_srl.fixed pattern
Eddie Hung [Mon, 26 Aug 2019 21:20:06 +0000 (14:20 -0700)]
Add xilinx_srl_fixed, fix typos
Eddie Hung [Mon, 26 Aug 2019 20:56:31 +0000 (13:56 -0700)]
Merge branch 'master' into eddie/xilinx_srl
Eddie Hung [Mon, 26 Aug 2019 20:45:16 +0000 (13:45 -0700)]
Improve tests to check that clkbuf is connected to expected
Eddie Hung [Mon, 26 Aug 2019 20:25:17 +0000 (13:25 -0700)]
Merge branch 'master' into mwk/xilinx_bufgmap
Eddie Hung [Mon, 26 Aug 2019 17:44:23 +0000 (10:44 -0700)]
Remove dupe in CHANGELOG, missing end quote
Clifford Wolf [Mon, 26 Aug 2019 09:11:47 +0000 (11:11 +0200)]
Merge tag 'yosys-0.9'
Clifford Wolf [Mon, 26 Aug 2019 08:37:53 +0000 (10:37 +0200)]
Yosys 0.9
Signed-off-by: Clifford Wolf <clifford@clifford.at>