Connor Abbott [Tue, 16 Jun 2020 09:44:23 +0000 (11:44 +0200)]
tu: Use the ir3 shader API
This will be necessary once we start compiling multiple variants due to
different const size limits, and it will also be necessary for properly
implementing the pipeline cache.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
Connor Abbott [Wed, 17 Jun 2020 11:02:49 +0000 (13:02 +0200)]
tu: Remove num_samp hack
Delete the variables so that ir3 thinks there are no samplers and
images instead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
Connor Abbott [Tue, 16 Jun 2020 12:02:24 +0000 (14:02 +0200)]
ir3: Pass reserved_user_consts to ir3_shader_from_nir()
ir3_shader_from_nir() calls ir3_optimize_nir(), which currently sets up
the const state. However, we need to know the number of user consts
reserved by the driver before setting up the const state, which means
that this information needs to be passed into ir3_shader_from_nir()
somehow rather than being set in the shader.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
Alyssa Rosenzweig [Fri, 12 Jun 2020 21:56:32 +0000 (17:56 -0400)]
pan/mdg: Reassociate adds for multiply-by-two
Only a single shader-db change it looks like, and not even from
scheduling, no fun.
instructions helped: shader31 MESA_SHADER_FRAGMENT: 64 -> 63 (-1.56%)
quadwords helped: shader31 MESA_SHADER_FRAGMENT: 66 -> 65 (-1.52%)
registers HURT: shader31 MESA_SHADER_FRAGMENT: 2 -> 3 (50.00%)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
Alyssa Rosenzweig [Fri, 12 Jun 2020 21:47:19 +0000 (17:47 -0400)]
pan/mdg: Canonicalize (x * 2.0) to (x + x)
This lets the previous commit kick in to schedule to either a multiply
or an add. GLES2 shader-db:
total instructions in shared programs: 50514 -> 50459 (-0.11%)
instructions in affected programs: 7436 -> 7381 (-0.74%)
helped: 14
HURT: 7
helped stats (abs) min: 2 max: 8 x̄: 5.00 x̃: 5
helped stats (rel) min: 0.95% max: 1.14% x̄: 1.07% x̃: 1.08%
HURT stats (abs) min: 2 max: 3 x̄: 2.14 x̃: 2
HURT stats (rel) min: 0.85% max: 8.57% x̄: 2.73% x̃: 1.26%
95% mean confidence interval for instructions value: -4.37 -0.87
95% mean confidence interval for instructions %-change: -0.91% 1.31%
Inconclusive result (%-change mean confidence interval includes 0).
total bundles in shared programs: 25680 -> 25573 (-0.42%)
bundles in affected programs: 6148 -> 6041 (-1.74%)
helped: 37
HURT: 7
helped stats (abs) min: 1 max: 9 x̄: 3.14 x̃: 2
helped stats (rel) min: 0.63% max: 8.33% x̄: 2.02% x̃: 2.13%
HURT stats (abs) min: 1 max: 2 x̄: 1.29 x̃: 1
HURT stats (rel) min: 0.88% max: 11.11% x̄: 3.92% x̃: 1.30%
95% mean confidence interval for bundles value: -3.32 -1.54
95% mean confidence interval for bundles %-change: -2.00% -0.14%
Bundles are helped.
total quadwords in shared programs: 40887 -> 40815 (-0.18%)
quadwords in affected programs: 14203 -> 14131 (-0.51%)
helped: 61
HURT: 2
helped stats (abs) min: 1 max: 4 x̄: 1.21 x̃: 1
helped stats (rel) min: 0.16% max: 11.11% x̄: 1.11% x̃: 0.57%
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 2.86% max: 4.00% x̄: 3.43% x̃: 3.43%
95% mean confidence interval for quadwords value: -1.32 -0.96
95% mean confidence interval for quadwords %-change: -1.46% -0.48%
Quadwords are helped.
total registers in shared programs: 3916 -> 3913 (-0.08%)
registers in affected programs: 46 -> 43 (-6.52%)
helped: 5
HURT: 1
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 10.00% max: 33.33% x̄: 14.89% x̃: 10.00%
HURT stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for registers value: -1.79 0.79
95% mean confidence interval for registers %-change: -33.51% 25.37%
Inconclusive result (value mean confidence interval includes 0).
total threads in shared programs: 2455 -> 2454 (-0.04%)
threads in affected programs: 5 -> 4 (-20.00%)
helped: 1
HURT: 1
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
total loops in shared programs: 6 -> 6 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0
total spills in shared programs: 168 -> 168 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0
total fills in shared programs: 186 -> 186 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
Alyssa Rosenzweig [Fri, 12 Jun 2020 21:24:02 +0000 (17:24 -0400)]
pan/mdg: Allow scheduling "x + x" to multipliers
One of the neat things with Midgard's wacky VLIW... on VADD/SADD this is
(x + x) literally, on VMUL/SMUL/VLUT this is (x * 2.0) where the 2.0 is
exactly representable in FP16 so it fits nicely as an inline constant.
So we don't need to restrict its scheduling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
Alyssa Rosenzweig [Fri, 12 Jun 2020 21:08:19 +0000 (17:08 -0400)]
pan/mdg: Factor out unit check
We'd like to do something a bit more complicated.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>
Rhys Perry [Tue, 16 Jun 2020 18:13:34 +0000 (19:13 +0100)]
aco: fix sub-dword opsel/sdwa checks
These should all check if the operand has a regclass. The opsel check
should also be skipped post-RA.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5504>
Rhys Perry [Tue, 16 Jun 2020 18:13:04 +0000 (19:13 +0100)]
aco: fix validation error from vgpr spill/restore code
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5504>
Jonathan Marek [Tue, 16 Jun 2020 23:12:07 +0000 (19:12 -0400)]
turnip: fix cubic filtering with CmdBlitImage
This fixes the newly added cubic blit_image tests for A650, by falling back
to the 3D path and setting the filter correctly.
Note: there are still failures with the texture filtering tests.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>
Jonathan Marek [Tue, 16 Jun 2020 23:07:41 +0000 (19:07 -0400)]
turnip: fix 3D path always being used for CmdBlitImage
This change accidentally made it into
72d7df40a5e5b50, and started causing
blit_image flakes (because of the issue fixed in the previous patch)
Fixes: 72d7df40a5e5b50 ("turnip: add layered 3D path clear for CmdClearAttachments")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>
Jonathan Marek [Tue, 16 Jun 2020 22:54:47 +0000 (18:54 -0400)]
turnip: set VFD_INDEX_OFFSET in 3D clear/blit path
This was missing an causing flakes when used after a test that set it to
a non-zero value.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>
Samuel Pitoiset [Tue, 16 Jun 2020 07:08:02 +0000 (09:08 +0200)]
spirv: do not set num_components for non-vectorized mbcnt_amd intrinsic
Fixes: 167fa2887f0 ("nir/validate: validate intr->num_components")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5493>
Timothy Arceri [Mon, 15 Jun 2020 23:35:09 +0000 (09:35 +1000)]
st_glsl_to_nir: fix potential use after free
When updating the shader info used by GL for the API we must
remember to make sure to restore the pointers to its own name
and label strings. There are a number of ways in which the nir
copy of these strings can be freed before GL is finished with
them.
Fixes: 36be8c2fcf94 ("st/glsl_to_nir: use nir_shader_gather_info()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2875
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5488>
Timothy Arceri [Mon, 15 Jun 2020 04:25:21 +0000 (14:25 +1000)]
glsl: small optimisation fix for uniform array resizing
The fix in the previous patch removed an erronous attempt to skip
resizing variable types in each stage. Now that has been removed
iterating over each shader stage is no longer required here.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5487>
Timothy Arceri [Mon, 15 Jun 2020 04:03:59 +0000 (14:03 +1000)]
glsl: fix uniform array resizing in the nir linker
The initial support tried to match uniform variables from different
shaders based on the variables pointer. This will obviously never
work, instead here we use the variables name whcih also means we
must disable this optimisation for spirv.
Using the base variable name works because when collecting uniform
references we never iterate past the first array dimension, and
only support resizing 1D arrays (we also don't support resizing
arrays inside structs).
We also drop the resized bool as we can't skip processing the var
just because is was resized in another shader, we must resize
the var in all shaders.
Fixes: a34cc97ca3e1 ("glsl: when NIR linker enable use it to resize uniform arrays")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3130
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5487>
Iván Briano [Thu, 21 May 2020 20:47:24 +0000 (13:47 -0700)]
anv: Add VK_EXT_custom_border_color to relnotes
Missed it on
5425968d2e46eb3311a75f4bf7bedb1d9dd59459
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
Iván Briano [Wed, 20 May 2020 21:36:49 +0000 (14:36 -0700)]
anv: enable VK_EXT_pipeline_creation_cache_control
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
Iván Briano [Wed, 20 May 2020 19:38:46 +0000 (12:38 -0700)]
anv: implement VK_PIPELINE_CREATE_FAIL_ON_PIPELINE_COMPILE_REQUIRED_BIT_EXT
v2:
* Set pPipeline to NULL in the corresponding
graphics/compute_create_pipeline function.
* Keep current ANV behavior of bailing on the first real error.
v3:
* Don't return early if the pipeline succeeded.
v:4(5?):
* Simplify return conditions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
Iván Briano [Wed, 20 May 2020 19:30:46 +0000 (12:30 -0700)]
anv: support externally synchronized pipeline caches
Implement the VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT
bits of the VK_EXT_pipeline_creation_cache_control extension.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>
Sagar Ghuge [Mon, 8 Jun 2020 22:35:29 +0000 (15:35 -0700)]
intel/compiler: Remove unnecessary optimization for MUL
2 source instruction only support immediate for src1 operand, so no
point in adding optimization condition for src0 oprand.
v2:
- Update commit message and don't remove ADD optimization (Matt Turner)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5341>
Sagar Ghuge [Fri, 29 May 2020 23:44:42 +0000 (16:44 -0700)]
intel/compiler: Optimize integer add with 0 into mov
Kaby Lake
total instructions in shared programs: 326560 -> 323616 (-0.90%)
instructions in affected programs: 178062 -> 175118 (-1.65%)
helped: 129
HURT: 0
helped stats (abs) min: 1 max: 118 x̄: 22.82 x̃: 8
helped stats (rel) min: 0.35% max: 6.56% x̄: 2.57% x̃: 2.47%
95% mean confidence interval for instructions value: -27.71 -17.93
95% mean confidence interval for instructions %-change: -2.81% -2.32%
Instructions are helped.
total cycles in shared programs:
43741127 ->
45397851 (3.79%)
cycles in affected programs:
40880261 ->
42536985 (4.05%)
helped: 94
HURT: 34
helped stats (abs) min: 5 max: 6160 x̄: 598.91 x̃: 45
helped stats (rel) min: 0.20% max: 34.86% x̄: 2.52% x̃: 1.09%
HURT stats (abs) min: 1 max: 76198 x̄: 50383.00 x̃: 69677
HURT stats (rel) min: 0.07% max: 48.41% x̄: 15.65% x̃: 6.49%
95% mean confidence interval for cycles value: 8023.10 17863.21
95% mean confidence interval for cycles %-change: <.01% 4.60%
Cycles are HURT.
total spills in shared programs: 1086 -> 978 (-9.94%)
spills in affected programs: 897 -> 789 (-12.04%)
helped: 24
HURT: 0
total fills in shared programs: 1686 -> 1584 (-6.05%)
fills in affected programs: 1371 -> 1269 (-7.44%)
helped: 24
HURT: 0
v2:
- Use brw_reg_type_is_integer (Matt Turner)
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5341>
Jan Beich [Sat, 30 May 2020 22:41:48 +0000 (22:41 +0000)]
meson: unbreak sysctl.h detection on BSDs
Code:
#include <sys/sysctl.h>
Compiler stdout:
Compiler stderr:
In file included from testfile.c:1:
/usr/include/sys/sysctl.h:1184:40: error: unknown type name 'size_t'
int sysctl(const int *, u_int, void *, size_t *, const void *, size_t);
^
/usr/include/sys/sysctl.h:1185:40: error: unknown type name 'size_t'
int sysctlbyname(const char *, void *, size_t *, const void *, size_t);
^
/usr/include/sys/sysctl.h:1186:42: error: unknown type name 'size_t'
int sysctlnametomib(const char *, int *, size_t *);
^
3 errors generated.
Checking if "sys/sysctl.h" compiles: NO
<https://gitlab.freedesktop.org/mesa/drm/-/commit/
1f8ada802391>
<https://gitlab.freedesktop.org/mesa/drm/-/commit/
4083e8f2c659>
Reviewed-by: Niclas Zeising <zeising@daemonic.se>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5462>
Eric Anholt [Tue, 16 Jun 2020 19:23:16 +0000 (12:23 -0700)]
docs: Add dri-devel to the mailing lists and drop the DRI wiki link.
The DRI wiki is a wasteland at this point, let's just fold the one bit of
useful information in here.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5507>
Jan Beich [Tue, 2 Jun 2020 00:28:09 +0000 (00:28 +0000)]
util: enable futex usage on BSDs after
7dc2f4788288
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5460>
Rob Clark [Wed, 1 Apr 2020 22:37:34 +0000 (15:37 -0700)]
freedreno/ir3: add post-scheduler cp pass
A pass to eliminate extra mov's from an array. We need to do this after
scheduling so we know that there are not any potentially conflicting
array writes between the original `mov` and it's use(s).
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2124
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Thu, 14 May 2020 16:31:32 +0000 (09:31 -0700)]
freedreno/ir3/cp: extract valid_flags
We'll also need this in the postsched-cp pass.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Fri, 12 Jun 2020 21:56:42 +0000 (14:56 -0700)]
freedreno/ir3: delay test support for vectorish instructions
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Fri, 15 May 2020 19:03:56 +0000 (12:03 -0700)]
freedreno/ir3: add helpers to move instructions
A bit cleaner than open coding the list manipulation. Plus I want to
use it in the next patch, rather than adding more open coded list
futzing.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Wed, 11 Mar 2020 22:06:51 +0000 (15:06 -0700)]
freedreno/ir3/delay: calculate delay properly for (rptN)'d instructions
When a sequence of same instruction is encoded with repeat flag,
destination registers are written on successive cycles. Teach the
delay calculation about this.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Fri, 12 Jun 2020 21:08:23 +0000 (14:08 -0700)]
freedreno/ir3: add test for delay slot calculation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Tue, 10 Mar 2020 23:07:40 +0000 (16:07 -0700)]
freedreno/ir3/print: print (r) flag
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Tue, 10 Mar 2020 23:01:30 +0000 (16:01 -0700)]
freedreno/ir3/legalize: don't allow (nopN) if (rptN)
These two encodings are mutually exclusive. If the instruction is a
vector(ish) `(rptN)` instruction, then we can't fold a `(nopN)` post-
delay into it.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Wed, 13 May 2020 16:54:57 +0000 (09:54 -0700)]
freedreno/a6xx: emit shader names in debug builds
To simplify mapping a shader in a cmdstream trace back to glsl.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Wed, 13 May 2020 16:53:43 +0000 (09:53 -0700)]
freedreno: splitup emit_string_marker
So that we can use it internally to emit string markers into a specified
rb.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Sun, 7 Jun 2020 18:14:18 +0000 (11:14 -0700)]
freedreno/ir3/cp: properly handle already-folded RELATIV
In the `try_swap_mad_two_srcs()` case, valid_flags() gets called both
for the src that we want to try to fold, and for the other src that we
are trying to swap to make that possible. It can happen in the 2nd case
that a RELATIV src has already been folded. Since `ssa()` returns non-
null in both the `IR3_REG_SSA` and `IR3_REG_ARRAY` cases (in the later
case, it is the dependent array access that the current instruction
cannot be moved ahead of), we need to explicitly check that the src
reg we are looking at is still an SSA src.
Reported-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Sun, 7 Jun 2020 18:11:23 +0000 (11:11 -0700)]
freedreno/ir3/validate: also check instr->address
Verify that instructions which have a relative src and/or dest, have
`instr->address`.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Mon, 25 May 2020 19:08:03 +0000 (12:08 -0700)]
freedreno/sched: reset delay counters at start of block
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Rob Clark [Mon, 11 May 2020 16:15:50 +0000 (09:15 -0700)]
freedreno/log-parser: fix compute times
We also need to clear the table of compute times at the end of the
frame, otherwise results shown will include all the compute jobs since
the beginning of the trace.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>
Eric Anholt [Mon, 15 Jun 2020 19:02:10 +0000 (12:02 -0700)]
docs: Replace ancient swrast conformance docs with more current information.
I don't think Mesa 4.0 swrast conformance is relevant at this point, just
point people to the current Khronos list. Also, add some more information
on submitting results.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5482>
Erik Faye-Lund [Mon, 15 Jun 2020 10:31:34 +0000 (12:31 +0200)]
docs/relnotes: update internal references
This time, let's use proper Sphinx roles for the referenes, so we can
reference documents and inline refs.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5471>
Erik Faye-Lund [Mon, 15 Jun 2020 10:31:36 +0000 (12:31 +0200)]
docs: update internal references
This time, let's use proper Sphinx roles for the referenes, so we can
reference documents and inline refs.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5471>
Lionel Landwerlin [Mon, 8 Jun 2020 17:33:14 +0000 (20:33 +0300)]
anv: add an option to disable secondary command buffer calls
Those are currently hurting Felix' ability to look at the batches.
We can probably detect this in the aubinator but that's a bit more
work than falling back to the previous behavior.
v2: Condition VK_KHR_performance_query to not using this variable (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5391>
Jason Ekstrand [Sat, 13 Jun 2020 15:51:01 +0000 (10:51 -0500)]
nir/intrinsics: Put the _intel intrinsics together at the end
All the other driver-specific intrinsics are at the end of the file so
Intel's should go there too.
Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5503>
Dave Airlie [Mon, 15 Jun 2020 22:33:34 +0000 (08:33 +1000)]
softpipe: change vendor name to something more generic.
For consistency with the llvmpipe driver.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>
Dave Airlie [Mon, 15 Jun 2020 22:32:57 +0000 (08:32 +1000)]
llvmpipe: change vendor to be more generic.
If submitting for conformance it is probably better to have a generic
name for vendor here.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>
Dave Airlie [Mon, 15 Jun 2020 21:22:40 +0000 (07:22 +1000)]
virgl: change vendor id to reflect reality more.
virgl vendor id should probably be little more generic now.
I think I picked this becuase the virtio pci id space was under
RH's name and they did pay for it, but at this point I think it's
better to just use something generic.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>
Jason Ekstrand [Sat, 13 Jun 2020 18:57:32 +0000 (13:57 -0500)]
anv: Add anv_pipeline_init/finish helpers
This cleans up pipline create/destroy a bit after the compute/gfx split.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5457>
Jason Ekstrand [Tue, 16 Jun 2020 15:50:19 +0000 (10:50 -0500)]
anv: Add an anv_batch_set_storage helper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5457>
Jan Beich [Sat, 30 May 2020 22:37:45 +0000 (22:37 +0000)]
anv,iris: unbreak on BSDs after
812cf5f522ab,
abf8aed68047
../src/intel/vulkan/anv_gem.c:31:10: fatal error: 'linux/sync_file.h' file not found
#include <linux/sync_file.h>
^~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/iris/iris_fence.c:29:10: fatal error: 'linux/sync_file.h' file not found
#include <linux/sync_file.h>
^~~~~~~~~~~~~~~~~~~
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5463>
Jan Beich [Mon, 15 Jun 2020 17:55:51 +0000 (17:55 +0000)]
drm-uapi: Add sync_file.h
Based on <linux/sync_file.h> with BSD portability conditional.
At least FreeBSD supports SYNC_IOC_* via LinuxKPI in DRM.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5463>
Daniel Schürmann [Tue, 16 Jun 2020 09:03:52 +0000 (10:03 +0100)]
aco: don't allow SGPRs on logical phis
aco_validate() is called after phi lowering, now.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5496>
Daniel Schürmann [Tue, 16 Jun 2020 09:03:00 +0000 (10:03 +0100)]
aco: reorder calls to aco_validate() and cleanup aco_compile_shader()
The first call of aco_validate should happen after phi lowering.
Otherwise, subdword restrictions might be violated
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5496>
Icecream95 [Thu, 14 May 2020 03:58:04 +0000 (15:58 +1200)]
panfrost: Implement ARB_depth_clamp
This significantly improves the quality of shadows in OpenMW.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5453>
Icecream95 [Thu, 14 May 2020 03:54:09 +0000 (15:54 +1200)]
panfrost: Clean up panfrost_frag_meta_rasterizer_update
Create a pointer to ctx->rasterizer->base so it isn't repeatedly
referred to.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5453>
Rohan Garg [Mon, 15 Jun 2020 10:25:56 +0000 (12:25 +0200)]
iris: Fix documentation for _iris_batch_flush
_iris_batch_flush has no in_fence and out_fence parameters
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5470>
Erik Faye-Lund [Mon, 3 Feb 2020 16:41:46 +0000 (17:41 +0100)]
zink: expose GLSL 1.30
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5479>
Erik Faye-Lund [Thu, 30 Jan 2020 21:23:39 +0000 (22:23 +0100)]
zink: enable cull-distance if supported
This is already implemented, and we just need to flip the switch to turn
it on.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5479>
Erik Faye-Lund [Thu, 11 Jun 2020 11:03:22 +0000 (13:03 +0200)]
gallium/hud: don't use user vertex buffers
This gains back some performance lost in the previous commit, by
bypassing u_vbuf.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5417>
Erik Faye-Lund [Wed, 10 Jun 2020 17:56:49 +0000 (19:56 +0200)]
Revert "gallium/hud: don't use user vertex buffers"
The approach taken in this commit only works on drivers that expose
the PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT capability. For drivers
that don't, the buffer has been unmapped by the time we get to
hud_draw_colored_prims, leading to crashes.
It's not easy to fix the code, but drivers that do support coherent
mapping will most likely do the right think themseleves, so let's just
go back to using user-buffers here.
This reverts commit
4fe1fd4df40ac91b2783e3604fd81e6a6faf0cd2.
Fixes: 4fe1fd4df40 ("gallium/hud: don't use user vertex buffers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3106
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5417>
Rob Clark [Mon, 8 Jun 2020 16:52:28 +0000 (09:52 -0700)]
nir/validate: validate intr->num_components
Validate that num_components is only set for vectorized instructions, to
prevent other nir passes or driver backends from mistakenly relying on
num_components for non-vectorized instructions.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Jose Maria Casanova Crespo [Sat, 13 Jun 2020 23:48:39 +0000 (01:48 +0200)]
vc4: don't relay on intr->num_components for non-vectorized intrinsics
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Rob Clark [Thu, 11 Jun 2020 00:27:08 +0000 (17:27 -0700)]
v3d: don't use intr->num_components for non-vectorized intrinsics
Squashed-in-fix-from: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Rob Clark [Tue, 9 Jun 2020 15:35:26 +0000 (08:35 -0700)]
spriv: don't set num_components for non-vectorised intrinsics
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Rob Clark [Mon, 8 Jun 2020 21:02:16 +0000 (14:02 -0700)]
nir/lower-atomics-to-ssbo: don't set num_components
Of the possible intrinsics generated, only load_ssbo is vectorized (and
store_ssbo is never generated)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Rob Clark [Mon, 8 Jun 2020 18:52:14 +0000 (11:52 -0700)]
nir/builder: don't set intr->num_components
The "load-sysval" intrinsics are not vectorized.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Rob Clark [Mon, 8 Jun 2020 19:35:18 +0000 (12:35 -0700)]
radv: don't set num_components for non-vectorized intrinsics
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Rob Clark [Sat, 6 Jun 2020 01:25:50 +0000 (18:25 -0700)]
freedreno/ir3: don't rely on intr->num_components
It is better to use `nir_intrinsic_dest_components()` which also handles
the case of intrinsics with a fixed number of dest components.
Somehow this starts showing up with a nir_serialize round-trip with
shader-cache. But we really shouldn't have been relying on
`intr->num_components` directly.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>
Dave Airlie [Tue, 16 Jun 2020 01:02:23 +0000 (11:02 +1000)]
mesa/gles3: add support for GL_EXT_shader_group_vote
This is the GLES equivalent to ARB_shader_group_vote.
Passes: KHR-GLES31.core.shader_group_vote.*
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5490>
Dave Airlie [Mon, 15 Jun 2020 00:16:06 +0000 (10:16 +1000)]
gallivm/cache: don't require a null terminator for cache data.
Fixes crashes seen with
./bin/egl_ext_device_base
since cache support was added.
Fixes: 4962d3e10733 ("gallivm: add cache interface to mcjit")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3118
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5467>
Alyssa Rosenzweig [Thu, 4 Jun 2020 21:36:16 +0000 (17:36 -0400)]
panfrost: Simplify AFBC format check
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5484>
Alyssa Rosenzweig [Thu, 4 Jun 2020 21:35:40 +0000 (17:35 -0400)]
panfrost: Enable AFBC for RGB565
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5484>
Alyssa Rosenzweig [Mon, 15 Jun 2020 16:42:40 +0000 (12:42 -0400)]
panfrost: Correctly calculate tiled stride
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: bde19c0e7ba ("panfrost: Fix tiled texture "stride"s on Bifrost")
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
Alyssa Rosenzweig [Mon, 15 Jun 2020 16:37:40 +0000 (12:37 -0400)]
panfrost: Fix level_2
We're not sure what this is but I've always seen it equal to levels.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
Alyssa Rosenzweig [Mon, 15 Jun 2020 13:23:27 +0000 (09:23 -0400)]
panfrost: Update sampler view in Bifrost path
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: fafc305600c ("panfrost: Create a new sampler view bo when the layout changes")
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
Alyssa Rosenzweig [Mon, 15 Jun 2020 13:20:39 +0000 (09:20 -0400)]
panfrost: Merge bifrost_bo/midgard_bo
The content is difference but a BO is a BO. Let's reduce code repition
between Midgard and Bifrost paths.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>
Dave Airlie [Tue, 9 Jun 2020 00:41:58 +0000 (10:41 +1000)]
llvmpipe/setup: add planes for draw regions if no scissor.
Some tests were using a 1x1 fb bound, with a 2x2 viewport,
and all 4 pixels were getting rendered. Test if the fb bounds
need planes added or not.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3101
v2: add lines support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5394>
Jonathan Marek [Sun, 14 Jun 2020 23:21:45 +0000 (19:21 -0400)]
turnip: simplify stage2 helpers
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5455>
Jonathan Marek [Sat, 13 Jun 2020 17:52:45 +0000 (13:52 -0400)]
turnip: remove duplicated stage2opcode and stage2shaderdb
Reduce 3 copies of this same logic into a single one.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5455>
Rhys Perry [Thu, 11 Jun 2020 13:06:32 +0000 (14:06 +0100)]
aco: fix encoding of certain s_setreg_imm32_b32 instructions
If the mode is too small, the operand will be an inline constant and the
literal dword won't be written.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Thu, 11 Jun 2020 13:22:13 +0000 (14:22 +0100)]
aco: improve check for moving temporaries out of fixed definitions
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Thu, 11 Jun 2020 13:05:48 +0000 (14:05 +0100)]
aco: allow GFX9 partial writes with instructions which use opsel
Some instructions such as v_mad_f16 can do partial writes on GFX9.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Tue, 19 May 2020 12:41:43 +0000 (13:41 +0100)]
aco: add more opcodes to can_swap_operands
fossil-db (Navi, fp16 enabled):
Totals from 310 (0.24% of 127638) affected shaders:
CodeSize:
1290508 ->
1289716 (-0.06%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Samuel Pitoiset [Thu, 9 Apr 2020 14:41:00 +0000 (16:41 +0200)]
aco: allow to swap operands for some 16-bit float instructions
No fossil-db changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Tue, 19 May 2020 10:45:12 +0000 (11:45 +0100)]
aco: validate sub-dword pseudo instructions
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Fri, 15 May 2020 19:26:39 +0000 (20:26 +0100)]
aco: optimize 16-bit and 64-bit float comparisons
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Mon, 18 May 2020 18:42:40 +0000 (19:42 +0100)]
aco: copy-propagate constants through p_extract_vector/p_split_vector
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4388 -> 4392 (+0.09%)
VMEM: 465 -> 458 (-1.51%)
Copies: 54 -> 55 (+1.85%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Fri, 15 May 2020 15:28:03 +0000 (16:28 +0100)]
aco: improve 8/16-bit constants
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4540 -> 4388 (-3.35%)
Instrs: 861 -> 830 (-3.60%)
Cycles: 3444 -> 3320 (-3.60%)
VMEM: 489 -> 465 (-4.91%)
SMEM: 107 -> 110 (+2.80%)
SClause: 31 -> 30 (-3.23%)
Copies: 58 -> 54 (-6.90%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Mon, 15 Jun 2020 13:30:34 +0000 (14:30 +0100)]
aco: use 32-bit inline constants for 16-bit integer instructions
See https://reviews.llvm.org/D81841
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Mon, 15 Jun 2020 13:21:03 +0000 (14:21 +0100)]
aco: fix half_pi constant for 16-bit fsin/fcos
This worked because the optimizer didn't consider that the 16-bit
instruction would interpret the inline constant differently. This will
change in the next commit.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Mon, 18 May 2020 14:26:58 +0000 (15:26 +0100)]
aco: improve sub-dword check for sgpr/constant propagation
p_create_vector can have sub-dword operands with a v1 definition.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Fri, 15 May 2020 14:12:33 +0000 (15:12 +0100)]
aco: create 16-bit input and output modifiers
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4552 -> 4540 (-0.26%)
Instrs: 863 -> 861 (-0.23%)
Cycles: 3452 -> 3444 (-0.23%)
VMEM: 490 -> 489 (-0.20%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Tue, 19 May 2020 12:24:45 +0000 (13:24 +0100)]
aco: update comment about preserving fp16/fp64 denormals
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Thu, 14 May 2020 20:09:36 +0000 (21:09 +0100)]
aco: create 16-bit mad/fma
fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4868 -> 4552 (-6.49%)
Instrs: 956 -> 863 (-9.73%)
Cycles: 3824 -> 3452 (-9.73%)
VMEM: 504 -> 490 (-2.78%)
SMEM: 109 -> 107 (-1.83%)
VClause: 19 -> 20 (+5.26%)
Copies: 54 -> 58 (+7.41%)
PreVGPRs: 43 -> 41 (-4.65%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Fri, 15 May 2020 13:03:15 +0000 (14:03 +0100)]
aco: try to use fma instead of mad when denormals are enabled
v_mad_f32 doesn't support denormals but v_fma_f32 does.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Fri, 15 May 2020 13:24:12 +0000 (14:24 +0100)]
aco: create mads when signed zeros should be preserved
This check was added because I thought v_mad_f32 didn't preserve the
signess of zero, but I can't reproduce that and this isn't mentioned
anywhere in LLVM.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Fri, 15 May 2020 12:58:20 +0000 (13:58 +0100)]
aco: add and set precise flag
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Thu, 11 Jun 2020 13:35:13 +0000 (14:35 +0100)]
aco: use p_as_uniform in emit_vop1_instruction
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Tue, 19 May 2020 10:53:44 +0000 (11:53 +0100)]
aco: improve code for f2{i,u}{8,16}
Use sub-dword definitions so that the RA can use SDWA
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
Rhys Perry [Tue, 19 May 2020 12:26:21 +0000 (13:26 +0100)]
aco: use num_opcodes instead of last_opcode
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>