Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 18:06:28 +0000 (19:06 +0100)]
detect if add arg2 is greater than 7 and ignore it for poly1305 tracking.
this allows narrowing down of some data for test purposes
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 10:53:26 +0000 (11:53 +0100)]
add an intercept (on all poly1305-donna.py math primitives)
but only do a report on ADD and ADDLO, for now
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 10:04:42 +0000 (11:04 +0100)]
add link to poly1305-design (really good)
Luke Kenneth Casson Leighton [Sun, 24 Sep 2023 10:00:11 +0000 (11:00 +0100)]
allow intercept on dsrd (rename DSRD) in poly13005-donna.py
Luke Kenneth Casson Leighton [Sat, 23 Sep 2023 15:00:05 +0000 (16:00 +0100)]
provide intercepts of 64/128-bit math primitives that still look
like poly1305-donna-64bit.h
Luke Kenneth Casson Leighton [Sat, 23 Sep 2023 13:41:02 +0000 (14:41 +0100)]
convert all use of "+" to ADD(a,b) in order to prepare to intercept
it and make a note of any "carry-roll-over" in poly1305-donna.py
Jacob Lifshay [Sat, 23 Sep 2023 01:25:21 +0000 (18:25 -0700)]
switch UTF-8 validation tests to use MemMMap so it gets some testing
Jacob Lifshay [Sat, 23 Sep 2023 01:23:22 +0000 (18:23 -0700)]
add MemMMap class
https://bugs.libre-soc.org/show_bug.cgi?id=1173
Jacob Lifshay [Fri, 22 Sep 2023 22:40:30 +0000 (15:40 -0700)]
split out most Mem methods into MemCommon base class
Jacob Lifshay [Fri, 22 Sep 2023 22:10:14 +0000 (15:10 -0700)]
format mem.py
Dmitry Selyutin [Fri, 22 Sep 2023 18:31:16 +0000 (21:31 +0300)]
syscalls: fix syscall arguments
Dmitry Selyutin [Fri, 22 Sep 2023 18:30:22 +0000 (21:30 +0300)]
syscalls: introduce syscall arguments length
Dmitry Selyutin [Fri, 22 Sep 2023 18:10:25 +0000 (21:10 +0300)]
syscalls: fix sys_ni_syscall call
Dmitry Selyutin [Fri, 22 Sep 2023 18:08:57 +0000 (21:08 +0300)]
syscalls: fix default table path
Jacob Lifshay [Wed, 20 Sep 2023 22:45:54 +0000 (15:45 -0700)]
make scalar EXTRA2 encoding match between tables and algorithms
corresponding libreriscv.git commit:
7a232bcca2
Fixes: https://bugs.libre-soc.org/show_bug.cgi?id=1161
Jacob Lifshay [Wed, 20 Sep 2023 22:23:58 +0000 (15:23 -0700)]
format code
Jacob Lifshay [Wed, 20 Sep 2023 22:22:06 +0000 (15:22 -0700)]
Revert "fix PowerDecoder2 to properly decode scalar EXTRA2"
Luke wants all changes to EXTRA2/3 decoding to be in one commit, restore to original state
This reverts commit
630dfa6c8b6633d66d1a41368dfad927754846ed.
Dmitry Selyutin [Thu, 21 Sep 2023 21:31:11 +0000 (00:31 +0300)]
syscalls: support ppc/ppc64 ecall generators
Dmitry Selyutin [Thu, 21 Sep 2023 21:27:47 +0000 (00:27 +0300)]
syscalls: introduce ecall generator
Dmitry Selyutin [Thu, 21 Sep 2023 21:27:22 +0000 (00:27 +0300)]
syscalls: canonicalize entries
Dmitry Selyutin [Thu, 21 Sep 2023 19:12:52 +0000 (22:12 +0300)]
syscalls: reorder generic entries
Dmitry Selyutin [Thu, 21 Sep 2023 17:53:37 +0000 (20:53 +0300)]
syscalls: introduce generation mode
Dmitry Selyutin [Thu, 21 Sep 2023 17:39:52 +0000 (20:39 +0300)]
syscalls: support RISC-V architectures
Jacob Lifshay [Wed, 20 Sep 2023 23:42:40 +0000 (16:42 -0700)]
use setuptools-scm from debian instead of pip
Dmitry Selyutin [Wed, 20 Sep 2023 22:44:31 +0000 (01:44 +0300)]
syscalls: support generic system calls
Dmitry Selyutin [Tue, 19 Sep 2023 21:56:23 +0000 (00:56 +0300)]
syscalls: introduce Syscall class
Dmitry Selyutin [Tue, 19 Sep 2023 18:48:13 +0000 (21:48 +0300)]
syscalls: fix ctypes syscall
Dmitry Selyutin [Tue, 19 Sep 2023 17:13:21 +0000 (20:13 +0300)]
syscalls: support identifiers iteration
Dmitry Selyutin [Tue, 19 Sep 2023 17:14:20 +0000 (20:14 +0300)]
syscalls: support identifiers lookup
Dmitry Selyutin [Tue, 19 Sep 2023 17:23:44 +0000 (20:23 +0300)]
syscalls: adjust syscall name
Luke Kenneth Casson Leighton [Tue, 26 Sep 2023 15:08:42 +0000 (16:08 +0100)]
add english language description for lbzupx
Shriya Sharma [Tue, 26 Sep 2023 11:03:33 +0000 (12:03 +0100)]
Added brackets for lwax instruction
Shriya Sharma [Tue, 26 Sep 2023 11:02:40 +0000 (12:02 +0100)]
Added brackets for lhzx instruction
Shriya Sharma [Tue, 26 Sep 2023 11:02:17 +0000 (12:02 +0100)]
Added brackets for lhzx instruction
Shriya Sharma [Tue, 26 Sep 2023 11:00:30 +0000 (12:00 +0100)]
Added english language description, spaces and brackets for lq instruction
Shriya Sharma [Tue, 26 Sep 2023 10:57:42 +0000 (11:57 +0100)]
Added english language description, spaces and brackets for ldux instruction
Shriya Sharma [Tue, 26 Sep 2023 10:56:23 +0000 (11:56 +0100)]
Added english language description, spaces and brackets for ldu instruction
Shriya Sharma [Tue, 26 Sep 2023 10:55:08 +0000 (11:55 +0100)]
Added english language description, spaces and brackets for ldx instruction
Shriya Sharma [Tue, 26 Sep 2023 10:54:19 +0000 (11:54 +0100)]
Added english language description, spaces and brackets for ld instruction
Shriya Sharma [Tue, 26 Sep 2023 10:52:57 +0000 (11:52 +0100)]
Added english language description, spaces and brackets for lwaux instruction
Shriya Sharma [Tue, 26 Sep 2023 10:42:22 +0000 (11:42 +0100)]
Added english language description, spaces and brackets for lwax instruction
Shriya Sharma [Tue, 26 Sep 2023 10:41:22 +0000 (11:41 +0100)]
Added english language description, spaces and brackets for lwa instruction
Shriya Sharma [Tue, 26 Sep 2023 10:34:14 +0000 (11:34 +0100)]
Added english language description, spaces and brackets for lwzux instruction
Shriya Sharma [Tue, 26 Sep 2023 10:32:45 +0000 (11:32 +0100)]
Added english language description, spaces and brackets for lwzu instruction
Shriya Sharma [Tue, 26 Sep 2023 10:31:02 +0000 (11:31 +0100)]
Added english language description, spaces and brackets for lwzx instruction
Shriya Sharma [Tue, 26 Sep 2023 10:29:47 +0000 (11:29 +0100)]
Added brackets for lhaux instruction
Shriya Sharma [Tue, 26 Sep 2023 10:28:50 +0000 (11:28 +0100)]
Added english language description, spaces and brackets for lwz instruction
Shriya Sharma [Tue, 26 Sep 2023 10:27:04 +0000 (11:27 +0100)]
Added english language description, spaces and brackets for lhax instruction
Shriya Sharma [Tue, 26 Sep 2023 10:24:57 +0000 (11:24 +0100)]
Added brackets for lha instruction
Shriya Sharma [Tue, 26 Sep 2023 10:23:34 +0000 (11:23 +0100)]
Added english language description, spaces and brackets for lha instruction
Shriya Sharma [Tue, 26 Sep 2023 10:22:11 +0000 (11:22 +0100)]
Added english language description, spaces and brackets for lhzx instruction
Shriya Sharma [Tue, 26 Sep 2023 10:20:28 +0000 (11:20 +0100)]
Added english language description, spaces and brackets for lhz instruction
Shriya Sharma [Tue, 26 Sep 2023 10:18:21 +0000 (11:18 +0100)]
Added english language description, spaces and brackets for lbzx instruction
Luke Kenneth Casson Leighton [Mon, 25 Sep 2023 17:40:51 +0000 (18:40 +0100)]
add lbzup english description based on lbzu
Shriya Sharma [Mon, 25 Sep 2023 17:36:48 +0000 (18:36 +0100)]
Added english language description, spaces and brackets for lhaux instruction
Shriya Sharma [Mon, 25 Sep 2023 17:33:52 +0000 (18:33 +0100)]
Added english language description, spaces and brackets for lhau instruction
Shriya Sharma [Mon, 25 Sep 2023 17:29:29 +0000 (18:29 +0100)]
Added english language description, spaces and brackets for lhzux instruction
Shriya Sharma [Mon, 25 Sep 2023 17:22:51 +0000 (18:22 +0100)]
Added spaces and brackets for lhzu instruction
Luke Kenneth Casson Leighton [Mon, 25 Sep 2023 17:19:36 +0000 (18:19 +0100)]
indent lbz instruction description
Shriya Sharma [Mon, 25 Sep 2023 17:20:01 +0000 (18:20 +0100)]
Added spaces and brackets for lbzux instruction
Luke Kenneth Casson Leighton [Mon, 25 Sep 2023 17:15:35 +0000 (18:15 +0100)]
indent text of lbzu description
Luke Kenneth Casson Leighton [Mon, 25 Sep 2023 16:57:19 +0000 (17:57 +0100)]
whitespace additions on lbzu to make more like PDF,
also added brackets around regs
Shriya Sharma [Tue, 19 Sep 2023 15:44:56 +0000 (16:44 +0100)]
Added english description for lhzu instruction
Shriya Sharma [Tue, 19 Sep 2023 15:42:48 +0000 (16:42 +0100)]
Added english description for lhzu instruction
Shriya Sharma [Tue, 19 Sep 2023 15:40:30 +0000 (16:40 +0100)]
Added english description for lbzu instruction
Shriya Sharma [Tue, 19 Sep 2023 15:37:20 +0000 (16:37 +0100)]
Added english description for lbzux instruction
Shriya Sharma [Tue, 19 Sep 2023 15:30:46 +0000 (16:30 +0100)]
Added english description to lbz instruction
Jacob Lifshay [Tue, 19 Sep 2023 00:55:16 +0000 (17:55 -0700)]
fix bug I noticed while reading git history
Dmitry Selyutin [Mon, 18 Sep 2023 20:24:27 +0000 (23:24 +0300)]
syscalls: refactor calls chain
Dmitry Selyutin [Mon, 18 Sep 2023 19:38:43 +0000 (22:38 +0300)]
syscalls: refactor dispatcher call arguments
Dmitry Selyutin [Mon, 18 Sep 2023 19:22:07 +0000 (22:22 +0300)]
syscalls: introduce dispatcher class
Dmitry Selyutin [Mon, 18 Sep 2023 18:59:39 +0000 (21:59 +0300)]
syscalls: generate proper name
Dmitry Selyutin [Mon, 18 Sep 2023 14:44:31 +0000 (17:44 +0300)]
syscalls: refactor module hierarchy
Luke Kenneth Casson Leighton [Mon, 18 Sep 2023 14:42:50 +0000 (15:42 +0100)]
add python-based implementation of dsrd to poly1305-donna.py
and also fix "5" bug. somehow managed to put a const "4" instead of 5
Luke Kenneth Casson Leighton [Sun, 17 Sep 2023 18:42:22 +0000 (19:42 +0100)]
illustrate the intermediary step of converting poly1305-donna.py
to a form that is "reasonably close" to how the SVP64 assembler,
using REMAP Indexed, would work.
https://bugs.libre-soc.org/show_bug.cgi?id=1157#c3 for details
Dmitry Selyutin [Sun, 17 Sep 2023 18:31:53 +0000 (21:31 +0300)]
Revert "syscalls: commit a couple of autogenerated tables"
This reverts commit
48ec1783c5f7cc64629fba65575db2d3881e8026.
Dmitry Selyutin [Sun, 17 Sep 2023 18:00:32 +0000 (21:00 +0300)]
syscalls: commit a couple of autogenerated tables
Dmitry Selyutin [Sun, 17 Sep 2023 17:49:47 +0000 (20:49 +0300)]
syscalls/lscmg: introduce Linux syscalls mapping generator
Luke Kenneth Casson Leighton [Sun, 17 Sep 2023 17:24:31 +0000 (18:24 +0100)]
first revision port of https://github.com/floodyberry/poly1305-donna
to python3
Luke Kenneth Casson Leighton [Sun, 17 Sep 2023 12:31:40 +0000 (13:31 +0100)]
make the poly1305 quick example identical to the poly1305-donna one
Luke Kenneth Casson Leighton [Sun, 17 Sep 2023 12:20:57 +0000 (13:20 +0100)]
add a quick usage demo to poly1305.py, to serve later as a check
Luke Kenneth Casson Leighton [Sun, 17 Sep 2023 12:13:57 +0000 (13:13 +0100)]
add implementation of poly1305 pure python
by Hubert Kario, LGPLv2.1 licensed
Luke Kenneth Casson Leighton [Sat, 16 Sep 2023 10:43:45 +0000 (11:43 +0100)]
add code-comments to chacha20 svp64 unit test
Konstantinos Margaritis [Sun, 17 Sep 2023 09:26:29 +0000 (09:26 +0000)]
remove OpenSSL dependency, use own SHA512 hash
Luke Kenneth Casson Leighton [Sat, 16 Sep 2023 09:56:59 +0000 (10:56 +0100)]
add links copyright and funding notice to svp64 chacha20 test
Jacob Lifshay [Fri, 15 Sep 2023 21:21:00 +0000 (14:21 -0700)]
fix PowerDecoder2 to properly decode scalar EXTRA2
https://bugs.libre-soc.org/show_bug.cgi?id=1161
Jacob Lifshay [Fri, 15 Sep 2023 21:20:09 +0000 (14:20 -0700)]
add tests for checking if the simulator and assembler agree on SVP64 encodings
Jacob Lifshay [Fri, 15 Sep 2023 03:07:18 +0000 (20:07 -0700)]
change registers used to avoid r13-31 which are reserved/nonvolatile
broken -- blocked on https://bugs.libre-soc.org/show_bug.cgi?id=1161
Jacob Lifshay [Fri, 15 Sep 2023 03:06:59 +0000 (20:06 -0700)]
pass in stack pointer
Jacob Lifshay [Fri, 15 Sep 2023 03:04:55 +0000 (20:04 -0700)]
log more register read/writes to LogKind.InstrInOuts
Jacob Lifshay [Fri, 15 Sep 2023 00:28:42 +0000 (17:28 -0700)]
add copyright stuff
[skip ci]
Andrey Miroshnikov [Thu, 14 Sep 2023 16:12:08 +0000 (16:12 +0000)]
syscall_cases: Added link to ABI and write manpage
Andrey Miroshnikov [Thu, 14 Sep 2023 16:09:42 +0000 (16:09 +0000)]
syscall_cases: Add license, copyright, NLnet message.
Konstantinos Margaritis [Thu, 14 Sep 2023 11:56:53 +0000 (11:56 +0000)]
WIP: Initial attempt to port
ed25519 to SVP64
Konstantinos Margaritis [Thu, 14 Sep 2023 11:54:51 +0000 (11:54 +0000)]
Need to zero homeIsaDir before use
Konstantinos Margaritis [Thu, 7 Sep 2023 17:50:00 +0000 (17:50 +0000)]
add .gitignore files
Jacob Lifshay [Thu, 14 Sep 2023 06:24:12 +0000 (23:24 -0700)]
add SVP64 256x256->512-bit multiply
Jacob Lifshay [Thu, 14 Sep 2023 06:22:33 +0000 (23:22 -0700)]
generalize assemble() fn so other test cases can easily use it
Andrey Miroshnikov [Wed, 13 Sep 2023 18:45:54 +0000 (18:45 +0000)]
syscall_cases: Aded expected values for SRR0/1, MSR, NIA. Failing.
Andrey Miroshnikov [Tue, 12 Sep 2023 13:32:43 +0000 (13:32 +0000)]
Adding syscall ISACaller test case (not working yet).