util/u_queue: really use futex-based fences

The relevant define changed in the final revision of the simple mutex
patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

util/u_queue: fix timeout handling in util_queue_fence_wait_timeout

Fixes: e3a8013de8ca ("util/u_queue: add util_queue_fence_wait_timeout")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: use asynchronous flushes in st_finish

With threaded gallium, the driver may currently be running in another
thread. In that case, we will execute all remaining commands in that
thread instead of syncing, which should be better for cache locality.

Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: implement st_server_wait_sync properly

Asynchronous flushes require a proper implementation of
st_server_wait_sync, because we could have the following with
threaded Gallium:

 Context 1 app     Context 1 driver         Context 2
 -------------     ----------------         ---------
 f = glFenceSync
 glFlush
 <-- app sync -->                           <-- app sync -->
                                            glWaitSync(f)
                                            .. draw calls ..
                   pipe_context::flush
                     for glFenceSync
                   pipe_context::flush
                     for glFlush

Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

u_threaded_gallium: remove synchronization in fence_server_sync

The whole point of fence_server_sync is that it can be used to
avoid waiting in the application thread.

Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

amd: build addrlib with C++11

It is required for LLVM anyway.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103658
Fixes: 7f33e94e43a6 ("amd/addrlib: update to latest version")
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi/gfx9: fix VM fault with fetched instance divisors

We need to account for SGPR locations in merged shaders.

This case is exercised by KHR-GL45.enhanced_layouts.vertex_attrib_locations

Fixes: 79c2e7388c7f ("radeonsi/gfx9: use SPI_SHADER_USER_DATA_COMMON")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radv: use a 16 bytes array for the sampled/storage image descriptors

This allows to update them with only one memcpy().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: do not add the query pool BO to the list in vkCmdEndQuery()

As per the spec, the query identified by queryPool and query
must currently be active. Applications have to call vkCmdBeginQuery()
before, and thus the query pool BO will already be in the list.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: only load needed depth clear regs for fast depth clears

Similar to how the driver sets the depth clear regs after a
fast depth clear. Most of the time, this will copy a 32-bit reg
instead of a 64-bit reg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: do not add the image BO in radv_set_depth_clear_regs()

For the fast path, radv_fill_buffer() ensures that the BO is
already in the list. For the slow path, the depth surface is
part of the framebuffer which means the BO is added to the list
when the framebuffer is emitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: remove useless assertion in emit_depthstencil_clear()

Already checked in emit_clear().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: remove useless check in radv_set_depth_clear_regs()

aspects can't be zero and there is an assertion that ensures
it's not in emit_clear().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

docs/features: mark some r600 extensions supported

These just looked to be missed when this file was updated.

Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl: Catch subscripted calls to undeclared subroutines

generate_array_index fails to check whether the target of a subroutine
call exists in the AST, potentially passing around null ir_rvalue
pointers eventuating in abort/segfault.

Fixes: fd01840c0bd3 ("glsl: add AoA support to subroutines")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100438

broadcom/vc5: Fix up integer texture handling.

The original spec I had didn't expose integer textures and suggested that
you use unfiltered floats.  Now there are proper formats for them.

Fixes 16- and 32-bit texwrap integer tests in piglit, and
dEQP-GLES3.functional.fbo.completeness.renderable.renderbuffer.color0.rgb10_a2ui.

broadcom/vc5: Fix simulator assertion failures about color RT clears.

When we tried to clear color while storing depth, it assertion failed
about basically not having enough information to decide which color RT to
clear.  It turns out the STORE_GENERAL picks the buffer according to the
color buffer being stored, or all of them if NONE.  If you're doing depth,
it doesn't know which to pick.

freedreno/ir3: add texture gather support

Signed-off-by: Rob Clark <robdclark@gmail.com>

etnaviv: enable full overwrite when no color buffer is present

The OVERWRITE bit disables destination fetches, which is exactly what
we want when there is no valid color buffer bound.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>

i965: Stop including brw_cfg.h in brw_disasm_info.h

The brw_disasm_info header is included by certain tools in order to get
shader assembly from binaries so it's a semi-external header.  Including
brw_cfg.h also pulls in brw_shader.h so you end up getting quite a bit
of our back-end compiler internals.  Instead, make the couple of forward
declarations we need and make the header more stand-alone.  This fixes
the meson build.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: 4f82b17287194ca7d10816f6cfe4712a3e0a03fc

i965: Mark BOs as external when we export their handle

Almost all of our BO export paths were already properly marked the BO as
external and added it to the handle table.  Most export use-cases go
through a prime fd or flink where we have a brw_bo export helper that
does the right thing.  The one missing one happens when you call
queryImage and ask for __DRI_IMAGE_ATTRIB_HANDLE.  We just grabbed the
gem handle out of the BO (because it's really easy to do that) and
handed it off to the client; what could go wrong?  As it turns out, this
path is used by basically every compositor that wants to turn around and
call drmModeAddFB2 on it so it can hand it off to display.  The result,
as of 4b1e70cc57d7ff5f465544644b2180dee1490cee, is that we no longer set
MOCS_PTE on those surfaces and the kernel's attempts to disable caching
fail and we scanout gets corruption.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103759
Fixes: 4b1e70cc57d7ff5f465544644b2180dee1490cee
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

i965/bufmgr: Add a helper to mark a BO as external

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

i965: Correct disasm_info usage in eu_validate test

Fixes: 4f82b1728719 ("i965: Rewrite disassembly annotation code")
Cc: Matt Turner <mattst88@gmail.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

broadcom/vc5: Set up the padded height at surface creation time.

This centralizes the calculation in the surface, instead of in each
load/store.

broadcom/vc5: Ensure that there is always a TLB write.

This should fix some GPU hangs in our (currently always single-threaded)
fragment shaders, and definitely fixes assertion failures in simulation.

broadcom/vc5: Fix clear color for swap_color_rb render targets.

Fixes dEQP-GLES3.functional.depth_stencil_clear.depth.*

broadcom/vc5: Fix pasteo in front stencil ref value setup.

Fixes piglit masked-clear.

broadcom/vc5: Fix colormasking when we need to swap r/b colors.

Fixes part of piglit masked-clear.

broadcom/vc5: Enable the Z min/max clipping planes.

broadcom/vc5: Fix driver for new PIPE_SHADER_CAP_MAX_HW_ATOMIC_*.

r300: add PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* switch cases

To silence compiler warnings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

tgsi: s/uint/enum pipe_shader_type/

Roland Scheidegger <sroland@vmware.com>

tgsi: bump tgsi_opcode_info::output_mode size to 4 bits

To avoid problems with MSVC.  And verify size with ASSERT_BITFIELD_SIZE().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>

i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.

This apparently causes hangs on Broadwell, so let's back it out for now.
I think there are other PIPE_CONTROL workarounds that we're missing.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103787

egl: Convert int to attrib in eglGetPlatformDisplay

... because converting attrib to int truncates, and that's bad.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

docs: update features for freedreno

Just comparing glxinfo and features.txt, and it seems features.txt is
fairly out of date.  The a5xx specific features (compute/images/atomics/
etc) are recent.

Signed-off-by: Rob Clark <robdclark@gmail.com>

i965: Rename intel_asm_annotation -> brw_disasm_info

It was the only file named intel_* in the compiler.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Rewrite disassembly annotation code

The old code used an array to store each "instruction group" (the new,
better name than the old overloaded "annotation"), and required a
memmove() to shift elements over in the array when we needed to split a
group so that we could add an error message. This was confusing and
difficult to get right, not the least of which was  because the array
has a tail sentinel not included in .ann_count.

Instead use a linked list, a data structure made for efficient
insertion.

Acked-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Simplify annotation_insert_error()

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move common code out of #ifdef

I'm going to change the call in a later patch and with the difference in
indentation level it wasn't immediately obvious that the calls were
identical.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Remove DWord length from MI_FLUSH_DW definition

Fixes: 6165fda59b8 ("i965: Program DWord Length in MI_FLUSH_DW")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

anv/cmd_buffer: Take bo_offset into account in fast clear state addresses

Otherwise, if the image is not bound to the start of the buffer, we're
going to be reading and writing its fast clear state in the wrong spot.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org

anv/cmd_buffer: Advance the address when initializing clear colors

Found by inspection

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: mesa-stable@lists.freedesktop.org

radeon/video: enable encode support for raven

Enable h.264 encode for vcn hardware (raven)

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeonsi: enable vcn encode

Enable vcn encode by creating radeon_encoder for vcn.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add create encoder

Add implementation for create_encoder interface for vcn encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add encode get feedback

Add implementation for get_feedback interface for vcn encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add encode destroy

Add implementation for destroy interface for vcn encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add encode end frame

Add implementation for end_frame interface for vcn encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add encode bitstream

Add implementation for encode_bitstream interface for vcn encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add encode begin frame

Add implementation for begin_frame interface for vcn encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add encode header implementations

Implement encoding of sps, pps, and silce headers using the newly added h.264
header coding descriptors functions based on h.264 specs.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add encode header algorithms

Since bitstream headers, e.g. sps, pps, slice, are encoded in driver side, we
need to add corresponding algorithms that required to generate those headers.
According to h.264 specs, signed/unsigned interger Exp-Golomb-coded syntax
element with left bit first (code_se and code_ue) and unsigned integer using
n bits (code_fixed_bits) descriptors function are needed. Therefore, adding
those algorithms and related variables and output algorithms here.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add ib implementations

Implement required ibs and command buffer submission interfaces for vcn encode

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add common encode part

Add a skeleton pipe video interface and encode ib interface for video encode
on vcn hardware. Add function defines and structures for vcn encode. Update
Makefile.sources and meson.build with newly added files.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

st/va: implement poc type

pic_order_cnt_type is a required variable when encoding both sps and
slice header, therefore we need to get this value from st, e.g. vaapi
interface, and then pass it to radeon driver for encoding headers.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

vl: add poc type

Different from vce encoding, vcn encoding requires driver side to encode
bitstream header, such as pps, sps and slice header. pic_order_cnt_type
is a required variable when encoding both sps and slice header, therefore
we need to add this new variable here, and hold the value passed from st,
e.g. vaapi interface

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

winsys/amdgpu: add vcn enc cs support

New cs support is needed for vcn encode

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/common: add vcn enc ip info query

New ip info query is needed for vcn encode

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/winsys: add vcn enc ring type

New ring type is needed for vcn encode

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

radeon/vcn: add vcn encode interface

Add a new header file for vcn encode interface

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

gallium/aux/util/u_surface.c: Silence warnings and remove unneeded MAYBE_UNUSED

 * Explicitely convert values to int in comparison.
 * Remove one MAYBE_UNUSED that is actually not needed.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_debug_image.c: Silence warnings -Wunused-param

Decorate the according parameters with UNUSED.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_debug_flush.c: Silence warnings -Wunused-param

Decorate the unused parameters with UNUSED.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_debug.c: Silence warnings -Wunused-param

Silence warnings by decoration the parameters with UNUSED.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_format_table.py: Add UNUSED decoration to the generated function headers

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_async_debug.c: Fix -Wtype-limits warning.

Use size_t instread of unsigned for new_max. realloc later expects
size_t as parameter anyway.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/os/os_thread.h: Silence -Wunused-param.

With --disable-debug a parameter is not used. Silence this
warning by fake-using it.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_debug_refcnt.h: Fix -Wunused-param warnings

Annotate the according parameters accordingly.

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_blit.c: Fix -Wunused-param warnings

Annotate the parameters accordingly.

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
v1: Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

src/util/simple_mtx.h: Fix two -Wunused-param warnings.

Decorate the parameters accordingly with "UNUSED" or "MAYBE_UNUSED" (for
the param that is used in debug mode, but not in release mode).

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

mesa/main/texcompress_s3tc_tmp.h: Fix two -Wparam-unused warnings.

Decorate the params accordingly with "UNUSED".

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_transfer.c: Fix some -Wunused-param warnings.

Decorate the params with "UNUSED" accordingly.

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_threaded_context.c: Fix some -Wunused-param warnings.

Decorate the params accordingly with UNUSED or MAYBE_UNUSED (for params
that are used in debug mode).

v2: move *UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_surface.c: Silence a -Wsign-compare warning.

Explicitely convert one value to compare.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_pstipple.c: Fix one -Wsign-compare warning in ?: construct.

Silence the warning by making the conversion to int explicit.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_mm.c: Fix one -Wparam-unused warning.

Decorate the unused param accordingly with "UNUSED".

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_format_yuv.c: Fix a number of -Wunused-param warnings.

Decorate the params accordingly with "UNUSED".

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_format_rgtc.c: Fix a number of -Wunused-param warnings

Decorate the params accordingly with "UNUSED".

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_format_other.c: Fix various -Wunused-param warnings

Decorate the unused params with "UNUSED".

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_format_latc.c: Fix various -Wunused-param warnings, (v2)

Decorate the unused params with "UNUSED".

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_format_etc.c: Fix eight -Wunused-param warnings (v2)

Decorate the parameters accordingly with "UNUSED".

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_format.c: Fix one -Wunused-param warning

This warning was issued only in release mode. Fix it by fake-using the
parameter.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_dump_state.c: Fix two -Wunused-paramter warnings

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_dump_defines.c: Fix -Wcompare-unsigned warning

u_bit_scan may return -1 that then may be interpreted as (unsigned)-1 in
the following comparison, since num_names is unsigned. Convert the latter to
be int as well.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/aux/util/u_debug_stack.c: Silence -Wunused-result warning

asprintf is decorated with the attrbute "warn_unused_result", and if the
function call fails, the pointer "temp" will be undefined, but since it is
used later it should contain some usable value.
Test return value of asprintf and assign some save value to "temp" if
the call failed.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_debug_describe.c: Silence an -Wunused-param warning

Annotate the unused parameter.

v2: move UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

gallium/aux/util/u_blitter.c: Silence some warnings

* Annotate three parameters that are not used in release mode.
* explicitely convert an int to unsigned in an ?: construct.

v2: move MAYBE_UNUSED decoration in front of parameter declaration

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)

freedreno/a5xx: stencil texturing support

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx/gmem: fix z32/s8 restore/resolve

BLIT_ZS mode is used for either combined z24/s8 or z32 in which case
BLIT_S mode is used for separate stencil.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx/gmem: move ZS restore tiling hack

Code motion to simplify next patch.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: update generated headers

svga: add missing PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* cases

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Acked-by: Dave Airlie <airlied@redhat.com>

glsl: s/unsigned/glsl_base_type/ in glsl type code (v2)

Declare glsl_type::sampled_type as glsl_base_type as we do for the
base_type field.  And make base_type a bitfield to save a few bytes.

Update glsl_type constructor to take glsl_base_type instead of unsigned
and pass GLSL_TYPE_VOID instead of zero.

No Piglit regressions with llvmpipe.

v2:
- Declare both base_type and sampled_type as 8-bit fields
- Use the new ASSERT_BITFIELD_SIZE() macro.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

util/tgsi: use ASSERT_BITFIELD_SIZE() to check opcode field size

I've noticed at least two places where we store the TGSI opcode in
an unsigned:8 bitfield.  We're at 249 opcodes now.  If we hit 256 we'll
need to grow those bitfields.  Use the new ASSERT_BITFIELD_SIZE() macro
to detect that.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: use enum types instead of int/unsigned (v3)

Use the proper enum types for various variables.  Makes life in gdb
a little nicer.  Note that the size of enum bitfields must be one
larger so the high bit is always zero (for MSVC).

v2: also increase size of image_format bitfield, per Eric Engestrom.
v3: use the new ASSERT_BITFIELD_SIZE() macro

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

util: add new ASSERT_BITFIELD_SIZE() macro (v3)

For checking that bitfields are large enough to hold the largest
expected value.

v2: move into existing util/macros.h header where STATIC_ASSERT() lives.
v3: add MAYBE_UNUSED to variable declaration

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

st/mesa: don't move ssbo after atomic buffers if we support hw atomics

There is no need to have these overlap if we support hw atomics.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965: Upload invariant state once at the start of the batch on Gen4-5.

We want to emit invariant state at the start of a render batch.  In the
past, this more or less happened: a new batch flagged BRW_NEW_CONTEXT
(because we don't have hardware contexts), which triggered the
brw_invariant_state atom.  So, it would be emitted before any 3D
drawing.  (Technically, there might be some BLT commands in the batch
because Gen4-5 have a single combined render/BLT ring, but that should
be harmless).

With the advent of BLORP, this broke.  The first item in a batch might
be a BLORP operation, which bypasses the normal draw upload path.  So,
we need to ensure invariant state happens first.  To do that, we just
upload it when creating a new batch.  On Gen6+ we'd need to worry about
whether it's a RENDER or BLT batch, but because we have a combined ring,
this approach should work fine on Gen4-5.

Seems to fix GPU hangs when playing hardware accelerated video with
mpv -hwdec=vaapi on Ironlake.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103529
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

docs: update features/relnotes for r600 shader image support. (v2)

v2: update GLES

Signed-off-by: Dave Airlie <airlied@redhat.com>