mesa.git
9 years agovk/meta: Add required renderpass to pipeline
Chad Versace [Mon, 19 Oct 2015 15:44:38 +0000 (08:44 -0700)]
vk/meta: Add required renderpass to pipeline

The Vulkan spec (20 Oct 2015, git-aa308cb) requires that
VkGraphicsPipelineCreateInfo::renderPass be a valid handle. To satisfy
that, define a static dummy render pass used for all meta operations.

9 years agovk/meta: Add required multisample state to pipeline
Chad Versace [Mon, 19 Oct 2015 15:37:03 +0000 (08:37 -0700)]
vk/meta: Add required multisample state to pipeline

The Vulkan spec (20 Oct 2015, git-aa308cb) requires that
VkGraphicsPipelineCreateInfo::pMultisampleState not be NULL.

9 years agoanv/compiler: Remove irrelevant wm key setup
Jason Ekstrand [Mon, 19 Oct 2015 23:59:29 +0000 (16:59 -0700)]
anv/compiler: Remove irrelevant wm key setup

Most of this applies to Iron Lake and prior only.  While we're at it, we
get rid of the legacy GL shading model code.

9 years agoanv/compiler: Get rid of legacy shader key setup
Jason Ekstrand [Mon, 19 Oct 2015 23:45:11 +0000 (16:45 -0700)]
anv/compiler: Get rid of legacy shader key setup

Most of the shader key setup we did was for pre-Sandybridge and the stuff
for SNB+ wasn't in the key setup.  That stuff still isn't there but at
least we've left ourselves notes for now.

9 years agoanv/compiler: Delete legacy clipping code
Jason Ekstrand [Mon, 19 Oct 2015 23:26:16 +0000 (16:26 -0700)]
anv/compiler: Delete legacy clipping code

This is a Vulkan driver.  We don't need legacy clipping stuff and, even if
we did, we don't plan on supporting pre-Sandybridge anyway.

9 years agoanv/compiler: Remove unneeded wm prog data setup
Jason Ekstrand [Mon, 19 Oct 2015 23:17:38 +0000 (16:17 -0700)]
anv/compiler: Remove unneeded wm prog data setup

As of upstream mesa changes, brw_compile_fs does this for us so there's no
need to have the code in the Vulkan driver anymore.

9 years agonir/spirv: Use the new nir_variable helpers
Jason Ekstrand [Mon, 19 Oct 2015 23:08:23 +0000 (16:08 -0700)]
nir/spirv: Use the new nir_variable helpers

9 years agonir/spirv: Handle builtins in OpAccessChain
Jason Ekstrand [Mon, 19 Oct 2015 22:50:45 +0000 (15:50 -0700)]
nir/spirv: Handle builtins in OpAccessChain

Previously, we were trying to handle them later when loading.  However, at
that point, you've already lost information and it's harder to handle
certain corner-cases.  In particular, if you have a shader that does

gl_PerVertex.gl_Position.x = foo

we have trouble because we see the .x and we don't know that we're in
gl_Position.  If we, instead, handle it in OpAccessChain, we have all the
information we need and we can silently re-direct it to the appropreate
variable.  This also lets us delete some code which is a nice side-effect.

9 years agoMerge remote-tracking branch 'mesa-public/master' into vulkan
Jason Ekstrand [Mon, 19 Oct 2015 18:15:32 +0000 (11:15 -0700)]
Merge remote-tracking branch 'mesa-public/master' into vulkan

9 years agoi965/fs: Localize variables' scopes.
Matt Turner [Thu, 15 Oct 2015 23:01:11 +0000 (16:01 -0700)]
i965/fs: Localize variables' scopes.

9 years agoi965/fs: Consider type mismatches in saturate propagation.
Matt Turner [Wed, 14 Oct 2015 09:23:25 +0000 (02:23 -0700)]
i965/fs: Consider type mismatches in saturate propagation.

NIR considers bcsel to produce and consume unsigned types, leading to
SEL instructions operating on unsigned types when the data is really
floating-point. Previous to this patch, saturate propagation would
happily transform

   (+f0) sel      g20:UD, g30:UD, g40:UD
         mov.sat  g50:F,  g20:F

into

   (+f0) sel.sat  g20:UD, g30:UD, g40:UD
         mov      g50:F,  g20:F

But since the meaning of .sat is dependent on the type of the
destination register, this is not valid.

Instead, allow saturate propagation to change the types of dest/source
on instructions that are simply copying data in order to propagate the
saturate modifier.

Fixes bad code gen in 158 programs.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoi965: Extract can_change_source_types() functions.
Matt Turner [Wed, 14 Oct 2015 09:12:09 +0000 (02:12 -0700)]
i965: Extract can_change_source_types() functions.

Make them members of fs_inst/vec4_instruction for use elsewhere.

Also fix the fs version to check that dst.type == src[1].type and for
!saturate.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoi965/vs: Move URB entry_size and read_length calculations to compile_vs
Jason Ekstrand [Thu, 15 Oct 2015 18:39:06 +0000 (11:39 -0700)]
i965/vs: Move URB entry_size and read_length calculations to compile_vs

Reviewed-By: Eduardo Lima Mitev <elima@igalia.com>
9 years agoi965: Move the entire compiler API into a single file
Jason Ekstrand [Fri, 9 Oct 2015 00:09:54 +0000 (17:09 -0700)]
i965: Move the entire compiler API into a single file

At this point, the compiler API has been substantially simplified.  In the
spirit of Kristian's making a compiler library, this commit makes a single
header file that contains, more-or-less, the entire compiler API.

There's still a bit of cleanup to do particularly in the area of geometry
shaders.  However, this gets us much closer to having a separate compiler.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965: Rename brw_foo_emit to brw_compile_foo
Jason Ekstrand [Thu, 8 Oct 2015 23:20:34 +0000 (16:20 -0700)]
i965: Rename brw_foo_emit to brw_compile_foo

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/fs: Move some of the prog_data setup into brw_wm_emit
Jason Ekstrand [Thu, 8 Oct 2015 23:01:44 +0000 (16:01 -0700)]
i965/fs: Move some of the prog_data setup into brw_wm_emit

This commit moves the common/modern stuff.  Some legacy stuff such as
setting use_alt_mode was left because it needs to know whether or not we're
an ARB program.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/cs: Rework cs_emit to take a nir_shader and a brw_compiler
Jason Ekstrand [Thu, 8 Oct 2015 22:28:26 +0000 (15:28 -0700)]
i965/cs: Rework cs_emit to take a nir_shader and a brw_compiler

This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/gs: Rework gs_emit to take a nir_shader and a brw_compiler
Jason Ekstrand [Thu, 8 Oct 2015 21:39:56 +0000 (14:39 -0700)]
i965/gs: Rework gs_emit to take a nir_shader and a brw_compiler

This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.  Unfortunately, we still
have to pass in the gl_shader_program for gen6 because it's needed for
transform feedback.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/vs: Rework vs_emit to take a nir_shader and a brw_compiler
Jason Ekstrand [Thu, 8 Oct 2015 20:53:33 +0000 (13:53 -0700)]
i965/vs: Rework vs_emit to take a nir_shader and a brw_compiler

This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.

v2 (Jason Ekstrand):
   - Patch use_legacy_snorm_formula through as a function argument rather
     than trying to go through the shader key.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/fs: Rework wm_fs_emit to take a nir_shader and a brw_compiler
Jason Ekstrand [Tue, 6 Oct 2015 02:27:28 +0000 (19:27 -0700)]
i965/fs: Rework wm_fs_emit to take a nir_shader and a brw_compiler

This commit removes all dependence on GL state by getting rid of the
brw_context parameter and the GL data structures.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965: Use a const nir_shader in backend_shader
Jason Ekstrand [Tue, 6 Oct 2015 02:26:02 +0000 (19:26 -0700)]
i965: Use a const nir_shader in backend_shader

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/vec4: Remove gl_program and gl_shader_program from the generator
Jason Ekstrand [Tue, 6 Oct 2015 00:41:46 +0000 (17:41 -0700)]
i965/vec4: Remove gl_program and gl_shader_program from the generator

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/fs: Remove the gl_program from the generator
Jason Ekstrand [Mon, 5 Oct 2015 23:01:33 +0000 (16:01 -0700)]
i965/fs: Remove the gl_program from the generator

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agonir/info: Add a few bits of info for fragment shaders
Jason Ekstrand [Thu, 8 Oct 2015 22:47:09 +0000 (15:47 -0700)]
nir/info: Add a few bits of info for fragment shaders

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agonir/info: Add compute shader local size to nir_shader_info
Jason Ekstrand [Thu, 8 Oct 2015 22:02:25 +0000 (15:02 -0700)]
nir/info: Add compute shader local size to nir_shader_info

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agonir/info: Move the GS info into a stage-specific info union
Jason Ekstrand [Thu, 8 Oct 2015 22:36:51 +0000 (15:36 -0700)]
nir/info: Move the GS info into a stage-specific info union

This way we can have other stage-specific info without consuming too much
extra space.  While we're at it, we make sure that the geometry info is
only set if we're actually a goemetry shader.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agomesa: Move gl_frag_depth_layout from mtypes.h to shader_enums.h
Jason Ekstrand [Thu, 8 Oct 2015 22:59:56 +0000 (15:59 -0700)]
mesa: Move gl_frag_depth_layout from mtypes.h to shader_enums.h

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agonir: Add a label to nir_shader_info
Jason Ekstrand [Mon, 5 Oct 2015 23:54:36 +0000 (16:54 -0700)]
nir: Add a label to nir_shader_info

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoi965/asm: Explicitly use a nir_instr for IR annotations
Jason Ekstrand [Mon, 5 Oct 2015 22:49:34 +0000 (15:49 -0700)]
i965/asm: Explicitly use a nir_instr for IR annotations

Now that everything goes through NIR, we don't need this to be a void
pointer anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
9 years agoscons: Build nir/glsl_types.cpp once.
Jose Fonseca [Mon, 19 Oct 2015 13:29:28 +0000 (14:29 +0100)]
scons: Build nir/glsl_types.cpp once.

Undoes early hacks, and ensures nir/glsl_types.cpp is built once, and
only once.

The root problem is that SCons doesn't know about NIR nor any source
file in the NIR_FILES source list.

Tested with libgl-gdi and libgl-xlib scons targets.

Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agosvga: fix incorrect round-down arithmetic
Brian Paul [Mon, 19 Oct 2015 14:41:37 +0000 (08:41 -0600)]
svga: fix incorrect round-down arithmetic

Spotted by Roland.  Luckily, this code should never really be hit
since the const buffer size and offset should already be multiples
of 16.  I could probably add more assertions to that effect, but
let's just fix the arithmetic for now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
9 years agoglsl: fix segfault when indirect indexing a buffer variable which is an array
Samuel Iglesias Gonsalvez [Mon, 19 Oct 2015 08:37:14 +0000 (10:37 +0200)]
glsl: fix segfault when indirect indexing a buffer variable which is an array

Fixes a regression added by bb5aeb854915ba67abc56257f830d002c956439e.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
9 years agost/va: Added support for NV12 to IYUV conversion in vlVaGetImage
Indrajit Das [Fri, 16 Oct 2015 06:48:45 +0000 (12:18 +0530)]
st/va: Added support for NV12 to IYUV conversion in vlVaGetImage

Reviewed-by: Christian König <christian.koenig@amd.com>
9 years agost/va: Used correct parameter to derive the value of the "h" variable in vlVaCreateImage
Indrajit Das [Thu, 15 Oct 2015 10:12:43 +0000 (15:42 +0530)]
st/va: Used correct parameter to derive the value of the "h" variable in vlVaCreateImage

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agoglsl_to_tgsi: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocks
Iago Toral Quiroga [Fri, 16 Oct 2015 09:43:18 +0000 (11:43 +0200)]
glsl_to_tgsi: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocks

The latter holds both UBOs and SSBOs, but here we only want UBOs.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
9 years agost/mesa: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocks
Iago Toral Quiroga [Fri, 16 Oct 2015 09:40:52 +0000 (11:40 +0200)]
st/mesa: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocks

The latter holds both UBOs and SSBOs, but here we only want UBOs.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
9 years agoi965: Do not use NumBufferInterfaceBlocks
Iago Toral Quiroga [Fri, 16 Oct 2015 09:31:46 +0000 (11:31 +0200)]
i965: Do not use NumBufferInterfaceBlocks

This is the only place in the driver where we use this. Since we now work
with separate index spaces, always use NumUniformBlocks and
NumShaderStorageBlocks instead of NumBufferInterfaceBlocks to be more
consistent with the rest of the code.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
9 years agomain: GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH is about UBOS, not SSBOs
Iago Toral Quiroga [Fri, 16 Oct 2015 09:27:43 +0000 (11:27 +0200)]
main: GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH is about UBOS, not SSBOs

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
9 years agomain: Use NumUniformBlocks to count UBOs
Iago Toral Quiroga [Fri, 16 Oct 2015 09:16:46 +0000 (11:16 +0200)]
main: Use NumUniformBlocks to count UBOs

Now that we have separate index spaces for UBOs and SSBOs we do not need
to iterate through BufferInterfaceBlocks any more, we can just take the
UBO count directly from NumUniformBlocks.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
9 years agoilo: set VME for 3DSTATE_PS
Chia-I Wu [Fri, 16 Oct 2015 14:53:05 +0000 (22:53 +0800)]
ilo: set VME for 3DSTATE_PS

When the bit is not set, we can see sampling artifacts on triangle edges when
the mip filter is not GEN6_MIPFILTER_NONE.

9 years agoilo: ignore prefer_linear_threshold when zero
Chia-I Wu [Fri, 16 Oct 2015 08:19:30 +0000 (16:19 +0800)]
ilo: ignore prefer_linear_threshold when zero

This was the intended behavior but it did not work as intended until now.

9 years agoilo: remove some unused kernel params
Chia-I Wu [Fri, 16 Oct 2015 01:50:12 +0000 (09:50 +0800)]
ilo: remove some unused kernel params

9 years agoilo: remove unused ilo_shader_get_type()
Chia-I Wu [Fri, 16 Oct 2015 01:46:25 +0000 (09:46 +0800)]
ilo: remove unused ilo_shader_get_type()

9 years agoilo: remove u_debug.h inclusion from ilo_core.h
Chia-I Wu [Tue, 13 Oct 2015 06:09:24 +0000 (14:09 +0800)]
ilo: remove u_debug.h inclusion from ilo_core.h

Move it to ilo_debug.h.

9 years agoilo: remove u_memory.h inclusion from ilo_core.h
Chia-I Wu [Tue, 13 Oct 2015 06:05:41 +0000 (14:05 +0800)]
ilo: remove u_memory.h inclusion from ilo_core.h

We do not make allocations generally in the core.

9 years agonvc0: do not bind input params at compute state init on Fermi
Samuel Pitoiset [Sat, 17 Oct 2015 15:33:14 +0000 (17:33 +0200)]
nvc0: do not bind input params at compute state init on Fermi

It looks like binding a constant buffer on compute overwrites the 3D
state. To avoid that, we already re-bind all the 3D constant buffers
after launching a compute grid but this is not enough.

Binding the constant buffer of input parameters for the compute state at
initialization corrupts the 3D constant buffers, and it's just useless
to bind it because this is not needed until we really launch a grid.

This fixes some piglit regressions related to interpolation tests
introduced in "nvc0: enable compute support by default on Fermi".

Fixes: 00d6186 (nvc0: enable compute support by default on Fermi)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agoi965/vs: Drop hack that created NIR for fixed function vertex programs.
Kenneth Graunke [Thu, 15 Oct 2015 22:34:06 +0000 (15:34 -0700)]
i965/vs: Drop hack that created NIR for fixed function vertex programs.

Marek made core Mesa call ProgramStringNotify(), which solves this
properly.  The hack is no longer needed.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
9 years agoi965/nir: Switch on shader stage in nir_lower_outputs().
Kenneth Graunke [Thu, 15 Oct 2015 22:17:19 +0000 (15:17 -0700)]
i965/nir: Switch on shader stage in nir_lower_outputs().

VS, GS, and FS continue doing the same thing they did before.  We can
simplify the FS code a bit because it is always scalar.

Compute shaders now assert that there are no outputs instead of doing
a loop over 0 outputs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoradeonsi: don't use the AMDGPU intrinsic for CMP
Marek Olšák [Sat, 10 Oct 2015 20:43:19 +0000 (22:43 +0200)]
radeonsi: don't use the AMDGPU intrinsic for CMP

No difference according to shader-db.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
9 years agoradeonsi: use LRP from gallivm
Marek Olšák [Sat, 10 Oct 2015 20:19:19 +0000 (22:19 +0200)]
radeonsi: use LRP from gallivm

Totals:
SGPRS: 344552 -> 344368 (-0.05 %)
VGPRS: 197132 -> 197552 (0.21 %)
Code Size: 7375376 -> 7366304 (-0.12 %) bytes
LDS: 91 -> 91 (0.00 %) blocks
Scratch: 1679360 -> 1615872 (-3.78 %) bytes per wave

Totals from affected shaders:
SGPRS: 47736 -> 47552 (-0.39 %)
VGPRS: 27952 -> 28372 (1.50 %)
Code Size: 1392724 -> 1383652 (-0.65 %) bytes
LDS: 39 -> 39 (0.00 %) blocks
Scratch: 513024 -> 449536 (-12.38 %) bytes per wave

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: don't emit AMDGPU intrinsics for integer abs, min, max
Marek Olšák [Sat, 10 Oct 2015 19:27:24 +0000 (21:27 +0200)]
radeonsi: don't emit AMDGPU intrinsics for integer abs, min, max

No difference according to shader-db. (with the new S_ABS_I32 pattern)

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
9 years agoradeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNC
Marek Olšák [Sat, 10 Oct 2015 17:59:57 +0000 (19:59 +0200)]
radeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNC

No difference according to shader-db.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
9 years agoradeonsi: initialize output, temp, and address registers to "undef"
Marek Olšák [Sat, 10 Oct 2015 00:40:20 +0000 (02:40 +0200)]
radeonsi: initialize output, temp, and address registers to "undef"

This removes "v_mov v0, 0" which typically occurs before exports.

Totals:
SGPRS: 345216 -> 344552 (-0.19 %)
VGPRS: 197684 -> 197132 (-0.28 %)
Code Size: 7390408 -> 7375376 (-0.20 %) bytes
LDS: 91 -> 91 (0.00 %) blocks
Scratch: 1842176 -> 1679360 (-8.84 %) bytes per wave

Totals from affected shaders:
SGPRS: 101336 -> 100672 (-0.66 %)
VGPRS: 53920 -> 53368 (-1.02 %)
Code Size: 2170176 -> 2155144 (-0.69 %) bytes
LDS: 2 -> 2 (0.00 %) blocks
Scratch: 1015808 -> 852992 (-16.03 %) bytes per wave

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
9 years agogallivm: implement the correct version of LRP
Marek Olšák [Sat, 10 Oct 2015 20:05:58 +0000 (22:05 +0200)]
gallivm: implement the correct version of LRP

The previous version has precision issues. This can be a problem
with tessellation. Sadly, I can't find the article where I read it
anymore. I'm not sure if the unsafe-fp-math flag would be enough to revert
this.

v2: added the comment

9 years agogallivm: set correct opcode info from unary/binary/ternary emits
Marek Olšák [Sat, 10 Oct 2015 19:24:28 +0000 (21:24 +0200)]
gallivm: set correct opcode info from unary/binary/ternary emits

and clear the emit_data structure.

The new radeonsi min/max opcode implementation requires this.

(it looks good according to Roland S.)

9 years agoradeonsi: implement vertex color clamping
Marek Olšák [Wed, 7 Oct 2015 00:36:38 +0000 (02:36 +0200)]
radeonsi: implement vertex color clamping

This is only supported in the compatibility profile (without GS and tess).

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: implement fragment color clamping
Marek Olšák [Tue, 6 Oct 2015 23:47:00 +0000 (01:47 +0200)]
radeonsi: implement fragment color clamping

using the shader key for now.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: clean up other scratch buffer functions
Marek Olšák [Thu, 8 Oct 2015 23:37:57 +0000 (01:37 +0200)]
radeonsi: clean up other scratch buffer functions

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: clean up copy-pasted scratch buffer updates
Marek Olšák [Thu, 8 Oct 2015 23:35:32 +0000 (01:35 +0200)]
radeonsi: clean up copy-pasted scratch buffer updates

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: unify shader create functions
Marek Olšák [Thu, 8 Oct 2015 23:14:12 +0000 (01:14 +0200)]
radeonsi: unify shader create functions

The shader specifies the processor type, so use that instead.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: unify shader delete functions
Marek Olšák [Thu, 8 Oct 2015 23:08:42 +0000 (01:08 +0200)]
radeonsi: unify shader delete functions

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: fix a GS copy shader leak
Marek Olšák [Thu, 8 Oct 2015 22:54:17 +0000 (00:54 +0200)]
radeonsi: fix a GS copy shader leak

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: remove an unused ctx parameter in si_shader_destroy
Marek Olšák [Thu, 8 Oct 2015 22:49:13 +0000 (00:49 +0200)]
radeonsi: remove an unused ctx parameter in si_shader_destroy

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: print export_prim_id from the shader key
Marek Olšák [Thu, 8 Oct 2015 22:20:30 +0000 (00:20 +0200)]
radeonsi: print export_prim_id from the shader key

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: disable NaNs for LS and HS
Marek Olšák [Thu, 8 Oct 2015 20:23:18 +0000 (22:23 +0200)]
radeonsi: disable NaNs for LS and HS

They're disabled for all other shaders except compute, but I forgot
to do this for tess stages.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agoradeonsi: clean up si_llvm_init_export_args
Marek Olšák [Tue, 6 Oct 2015 23:28:18 +0000 (01:28 +0200)]
radeonsi: clean up si_llvm_init_export_args

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agotgsi: move pipe_shader_from_tgsi_processor function to util
Marek Olšák [Thu, 8 Oct 2015 23:11:31 +0000 (01:11 +0200)]
tgsi: move pipe_shader_from_tgsi_processor function to util

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agomesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()
Brian Paul [Wed, 14 Oct 2015 15:08:50 +0000 (09:08 -0600)]
mesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()

Changing the matrix mode alone has no effect on rendering and does
not need to trigger a flush or state validation.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
9 years agost/mesa: fix clip state dependencies
Marek Olšák [Sat, 17 Oct 2015 12:20:01 +0000 (14:20 +0200)]
st/mesa: fix clip state dependencies

This allows removing FLUSH_VERTICES in MatrixMode.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agoanv/pipeline: Remove the ViewportState finishme
Jason Ekstrand [Sat, 17 Oct 2015 17:35:27 +0000 (10:35 -0700)]
anv/pipeline: Remove the ViewportState finishme

We should be doing everything we need to with the viewport state

9 years agogallium/hud: fix possible NULL pointer dereference
Marek Olšák [Sat, 17 Oct 2015 17:05:46 +0000 (19:05 +0200)]
gallium/hud: fix possible NULL pointer dereference

Trivial.

9 years agoscons: fix MSVC, MinGW build
Brian Paul [Sat, 17 Oct 2015 16:02:04 +0000 (10:02 -0600)]
scons: fix MSVC, MinGW build

Duplicate the glsl_types_hack.cpp work-around from the libgl-xlib target.

9 years agoanv: Add support for immutable descriptors
Jason Ekstrand [Sat, 17 Oct 2015 15:17:00 +0000 (08:17 -0700)]
anv: Add support for immutable descriptors

9 years agobuild: fix make-check after a6a6a71
Rob Clark [Sat, 17 Oct 2015 13:49:19 +0000 (09:49 -0400)]
build: fix make-check after a6a6a71

   commit a6a6a71092ba912803ae2b47eb56e3afdf36feb5
   Author:     Rob Clark <robclark@freedesktop.org>
   AuthorDate: Sat Oct 10 14:13:50 2015 -0400

       glsl: (mostly) remove libglsl_util

Was a bit too ambitious on removal of libglsl_util.. it is still needed
by some of the tests.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
9 years agobuild: fix out-of-tree build after b9b40ef
Rob Clark [Sat, 17 Oct 2015 13:28:23 +0000 (09:28 -0400)]
build: fix out-of-tree build after b9b40ef

   commit b9b40ef9b7644ea24768bc8b7464b1719efe99bf
   Author:     Rob Clark <robclark@freedesktop.org>
   AuthorDate: Sat Oct 10 13:55:07 2015 -0400

       nir: remove dependency on glsl

broke things for i965 out of tree build.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
9 years agonvc0: add support for performance monitoring metrics on Fermi
Samuel Pitoiset [Sun, 11 Oct 2015 09:23:54 +0000 (11:23 +0200)]
nvc0: add support for performance monitoring metrics on Fermi

As explained in the CUDA toolkit documentation, "a metric is a
characteristic of an application that is calculated from one or more
event values."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agoanv: Add facilities for dumping an image to a file
Jason Ekstrand [Sat, 17 Oct 2015 03:01:45 +0000 (20:01 -0700)]
anv: Add facilities for dumping an image to a file

The ability to dump an arbitrary miplevel or array slice of an anv_image to
a file is very useful for debugging.  Nothing inside of the driver calls
this right now, but it's very useful to call from GDB.

9 years agoglsl: (mostly) remove libglsl_util
Rob Clark [Sat, 10 Oct 2015 18:13:50 +0000 (14:13 -0400)]
glsl: (mostly) remove libglsl_util

Now that NIR does not depend on glsl, we can (mostly[*]) get rid of the
libglsl_util hack.

[*] glsl_compiler is the one remaining user of libglsl_util

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
9 years agonir: remove dependency on glsl
Rob Clark [Sat, 10 Oct 2015 17:55:07 +0000 (13:55 -0400)]
nir: remove dependency on glsl

Move glsl_types into NIR, now that the dependency on glsl_symbol_table
has been split out.

Possibly makes sense to rename things at this point, but if we do that
I'd like to keep it split out into a separate patch to make git history
easier to follow (IMHO).

v2: fix android build
v3: I f***ing hate scons.. but at least it builds

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
9 years agoglsl: move half<->float convertion to util
Rob Clark [Sat, 10 Oct 2015 17:26:03 +0000 (13:26 -0400)]
glsl: move half<->float convertion to util

Needed in NIR too, so move out of mesa/main/imports.c

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
9 years agoglsl: move builtin vector types to glsl_types.cpp
Rob Clark [Sat, 10 Oct 2015 16:39:57 +0000 (12:39 -0400)]
glsl: move builtin vector types to glsl_types.cpp

First step at untangling NIR's dependency on glsl_types without bringing
in the dependency on glsl_symbol_table.  The builtin types are now in
glsl_types (which will end up in NIR), but adding them to the symbol-
table stays in builtin_types.cpp (which will not be part of NIR).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
9 years agoglsl: couple shader_enums cleanups
Rob Clark [Fri, 9 Oct 2015 20:27:45 +0000 (16:27 -0400)]
glsl: couple shader_enums cleanups

Add missing enum to gl_system_value_name() and move VARYING_SLOT_MAX /
FRAG_RESULT_MAX / etc into shader_enums.h as suggested by Emil.

v2: add STATIC_ASSERT()'s

Reported-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
9 years agoanv/pipeline: Rework dynamic state handling
Jason Ekstrand [Fri, 16 Oct 2015 19:04:13 +0000 (12:04 -0700)]
anv/pipeline: Rework dynamic state handling

Aparently, we had the dynamic state array in the pipeline backwards.
Instead of enabling the bits in the pipeline, it disables them and marks
them as "dynamic".

9 years agoglsl: initialise record array count to 1
Timothy Arceri [Thu, 15 Oct 2015 03:10:35 +0000 (14:10 +1100)]
glsl: initialise record array count to 1

This was only being done in one of the two process methods.

Fixes an issue with samplers using the array size of a previous record.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
9 years agonir: add atomic lowering support for AoA
Timothy Arceri [Wed, 22 Jul 2015 22:32:00 +0000 (08:32 +1000)]
nir: add atomic lowering support for AoA

Cc: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agonir: wrapper for glsl_type arrays_of_arrays_size()
Timothy Arceri [Wed, 22 Jul 2015 22:31:59 +0000 (08:31 +1000)]
nir: wrapper for glsl_type arrays_of_arrays_size()

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoconfigure: show which gallium drivers/sts are built
Ilia Mirkin [Wed, 14 Oct 2015 19:49:58 +0000 (15:49 -0400)]
configure: show which gallium drivers/sts are built

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
9 years agotgsi: initialize ctx.file in tgsi_dump_instruction()
Brian Paul [Fri, 16 Oct 2015 20:31:22 +0000 (14:31 -0600)]
tgsi: initialize ctx.file in tgsi_dump_instruction()

Fixes segfault because of uninitialized file pointer.
Trivial.

9 years agonvc0: add a note about MP counters on GF100/GF110
Samuel Pitoiset [Fri, 16 Oct 2015 08:21:44 +0000 (10:21 +0200)]
nvc0: add a note about MP counters on GF100/GF110

MP counters on GF100/GF110 (compute capability 2.0) are buggy
because there is a context-switch problem that we need to fix.
Results might be wrong sometimes, be careful!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: add MP counters variants for GF100/GF110
Samuel Pitoiset [Tue, 13 Oct 2015 23:15:43 +0000 (01:15 +0200)]
nvc0: add MP counters variants for GF100/GF110

GF100 and GF110 chipsets are compute capability 2.0, while the other
Fermi chipsets are compute capability 2.1. That's why, some MP counters
are different between these chipsets and we need to handle variants.

Signed-off-by: Samuel Pitoiet <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: move SW/HW queries info to their respective files
Samuel Pitoiset [Tue, 13 Oct 2015 20:16:23 +0000 (22:16 +0200)]
nvc0: move SW/HW queries info to their respective files

This will help for handling HW SM queries variants on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: enable compute support by default on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 14:53:18 +0000 (16:53 +0200)]
nvc0: enable compute support by default on Fermi

Compute support was not enabled by default because weird effects
on 3D state happened, but I can't reproduce them anymore.

This also enables MP performance counters by default on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: allow only one active query for the MP counters group
Samuel Pitoiset [Mon, 28 Sep 2015 15:29:37 +0000 (17:29 +0200)]
nvc0: allow only one active query for the MP counters group

Because we can't expose the number of hardware counters needed for each
different query, we don't want to allow more than one active query
simultaneously to avoid failure when the maximum number of counters
is reached. Note that these groups of GPU counters are currently only
used by AMD_performance_monitor.

Like for Kepler, this limits the maximum number of active queries
to 1 on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: read MP counters of all GPCs on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 14:10:19 +0000 (16:10 +0200)]
nvc0: read MP counters of all GPCs on Fermi

When a card has more than one GPC, the grid used by the compute
kernel which reads MP performance counters seems to be too small.
The consequence is that the kernel is not launched on all TPCs.

Increasing the grid size using the number of GPCs now launches
enough blocks and we can read MP performance counters of all TPCs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: store the number of GPCs to nvc0_screen
Samuel Pitoiset [Tue, 6 Oct 2015 20:24:31 +0000 (22:24 +0200)]
nvc0: store the number of GPCs to nvc0_screen

NOUVEAU_GETPARAM_GRAPH_UNITS param returns the number of GPCs, the total
number of TPCs and the number of ROP units. Note that when the DRM
version is too old the default number of GPCs is fixed to 4.

This will be used to launch the compute kernel which is used to read MP
performance counters over all GPCs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: fix unaligned mem access when reading MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:22:20 +0000 (11:22 +0200)]
nvc0: fix unaligned mem access when reading MP counters on Fermi

Memory access have to be aligned to 128-bits. Note that this
doesn't happen when the card only has TPC.

This patch fixes the following dmesg fail:

gr: GPC0/TPC1/MP trap: global 00000004 [MULTIPLE_WARP_ERRORS] warp 000f
[UNALIGNED_MEM_ACCESS]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: fix monitoring multiple MP counters queries on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:18:45 +0000 (11:18 +0200)]
nvc0: fix monitoring multiple MP counters queries on Fermi

For strange reasons, the signal id depends on the slot selected on Fermi
but not on Kepler. Fortunately, the signal ids are just offseted by the
slot id!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: fix queries which use multiple MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:14:31 +0000 (11:14 +0200)]
nvc0: fix queries which use multiple MP counters on Fermi

Queries which use more than one MP counters was misconfigured and
computing the final result was also wrong because sources need to
be configured on different hardware counters instead.

According to the blob, computing the result is now as follows:

FOR  i..n
val += ctr[i] * pow(2, i)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: allow to use 8 MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:01:56 +0000 (11:01 +0200)]
nvc0: allow to use 8 MP counters on Fermi

On Fermi, we have one domain of 8 MP counters while we have
two domains of 4 MP counters on Kepler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
9 years agonvc0: fix sequence field init for MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 13:33:23 +0000 (15:33 +0200)]
nvc0: fix sequence field init for MP counters on Fermi

Sequence fields are located at MP[i] + 0x20 in the buffer object.
This is used to check if result is available for MP[i].

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>