Introduce gcc_qsort

* sort.cc: New file.
* system.h [!CHECKING_P] (qsort): Redirect to gcc_qsort.
* vec.c (qsort_chk): Use gcc_qsort.
* Makefile.in (OBJS-libcommon): Add sort.o.
(build/sort.o): New target.  Use it...
(BUILD_RTL): ... here, and...
(build/gencfn-macros): ... here, and...
(build/genmatch): ... here.

From-SVN: r260216

[NDS32] Implment n15 pipeline.

gcc/
* config.gcc (nds32*-*-*): Check that n15 is valid to --with-cpu.
* config/nds32/nds32-graywolf.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_GRAYWOLF.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n15
pipeline.
* config/nds32/nds32-protos.h: More declarations for n15 pipeline.
* config/nds32/nds32-utils.c: More implementations for n15 pipeline.
* config/nds32/nds32.md (pipeline_model): Add graywolf.
* config/nds32/nds32.opt (mcpu): Support n15 pipeline cpus.
* config/nds32/pipelines.md: Include n15 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260214

re PR fortran/63529 (Bad error and ICE with Cray Pointers in Modules)

2018-05-13  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/63529
* gfortran.texi: Clarify documentation for Cray pointer and
assumed-sized array.

From-SVN: r260213

[NDS32] Implment n12/n13 pipeline.

gcc/
* config.gcc (nds32*-*-*): Check that n12/n13 are valid to --with-cpu.
* config/nds32/nds32-n13.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N12 and CPU_N13.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n12/n13
pipeline.
* config/nds32/nds32-protos.h: More declarations for n12/n13 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n13.
* config/nds32/nds32.opt (mcpu): Support n12/n13 pipeline cpus.
* config/nds32/pipelines.md: Include n13 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260212

re PR fortran/85742 (sizeof allocatable arrays returning wrong value)

2018-05-13  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/85742
* trans-types.c (gfc_get_dtype_rank_type): Reorder evaluation
of 'size'. If the element type is a pointer use the size of the
TREE_TYPE of the type, unless it is VOID_TYPE. In this latter
case, set the size to zero.

2018-05-13  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/85742
* gfortran.dg/assumed_type_9.f90 : New test.

From-SVN: r260211

gfortran.h: Remove prototype.

2018-05-13  Steven G. Kargl  <kargl@gcc.gnu.org>

* gfortran.h: Remove prototype.
* symbol.c (gfc_new_undo_checkpoint): Remove unused function.

From-SVN: r260210

re PR libstdc++/80165 (Constexpr tuple of variant doesn't work)

PR libstdc++/80165
* testsuite/20_util/variant/80165.cc: New.

From-SVN: r260209

[NDS32] Implment n10 pipeline.

gcc/
* config.gcc (nds32*-*-*): Check that n10/d10 are valid to --with-cpu.
* config/nds32/nds32-n10.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N10.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n10
pipeline.
* config/nds32/nds32-protos.h: More declarations for n10 pipeline.
* config/nds32/nds32-utils.c: More implementations for n10 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n10.
* config/nds32/nds32.opt (mcpu): Support n10 pipeline cpus.
* config/nds32/pipelines.md: Include n10 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260207

[NDS32] Add DSP extension instructions.

gcc/
* config.gcc (nds32be-*-*): Handle --with-ext-dsp.
* config/nds32/constants.md (unspec_element, unspec_volatile_element):
Add enum values for DSP extension instructions.
* config/nds32/constraints.md (Iu06, IU06, CVp5, CVs5, CVs2, CVhi):
New constraints.
* config/nds32/iterators.md (shifts, shiftrt, sat_plus, all_plus,
sat_minus, all_minus, plus_minus, extend, sumax, sumin, sumin_max):
New code iterators.
(su, zs, uk, opcode, add_rsub, add_sub): New code attributes.
* config/nds32/nds32-dspext.md: New file for DSP implementation.
* config/nds32/nds32-intrinsic.c: Implementation of DSP extension.
* config/nds32/nds32-intrinsic.md: Likewise.
* config/nds32/nds32_intrinsic.h: Likewise.
* config/nds32/nds32-md-auxiliary.c: Likewise.
* config/nds32/nds32-memory-manipulation.c: Consider DSP extension.
* config/nds32/nds32-predicates.c (const_vector_to_hwint): New.
(nds32_valid_CVp5_p, nds32_valid_CVs5_p): New.
(nds32_valid_CVs2_p, nds32_valid_CVhi_p): New.
* config/nds32/nds32-protos.h: New declarations for DSP extension.
* config/nds32/nds32-utils.c (extract_mac_non_acc_rtx): New case
TYPE_DMAC in switch statement.
* config/nds32/nds32.c: New checking and implementation for DSP
extension instructions.
* config/nds32/nds32.h: Likewise.
* config/nds32/nds32.md: Likewise.
* config/nds32/nds32.opt (mhw-abs, mext-dsp): New options.
* config/nds32/predicates.md: Implement new predicates for DSP
extension.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r260206

Daily bump.

From-SVN: r260205

Daily bump.

From-SVN: r260194

rs6000.md (mov<mode>_softfloat, FMOVE32): Reformat alternatives and attributes so it is easier to identify which...

2018-05-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.md (mov<mode>_softfloat, FMOVE32):
Reformat alternatives and attributes so it is easier to identify
which constraints/attributes go with which instruction.
(mov<mode>_hardfloat32, FMOVE64): Likewise.
(mov<mode>_softfloat32, FMOVE64): Likewise.
(mov<mode>_hardfloat64, FMOVE64): Likewise.
(mov<mode>_softfloat64, FMOVE64): Likewise.

From-SVN: r260190

re PR fortran/85542 (ICE in check_inquiry, at fortran/expr.c:2426)

2018-05-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85542
* expr.c (check_inquiry): Avoid NULL pointer dereference.

2018-05-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85542
* gfortran.dg/pr85542.f90: New test.

From-SVN: r260182

...and actually resture the *new* testcase.

From-SVN: r260172

Restore the testcase that was clobbered by the recent PR83140 patches.

* libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions
/02_assoc_legendre/check_value.cc

From-SVN: r260168

extend.texi (PowerPC Built-in Functions): Rename this subsection.

gcc/ChangeLog:

2018-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

* doc/extend.texi (PowerPC Built-in Functions): Rename this
subsection.
(Basic PowerPC Built-in Functions): The new name of the
subsection previously known as "PowerPC Built-in Functions".
(Basic PowerPC Built-in Functions Available on all Configurations):
New subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.05): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.06): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.07): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 3.0): Likewise.

From-SVN: r260167

Check is_single_const in intersect_with_plats

2018-05-11  Martin Jambor  <mjambor@suse.cz>

PR ipa/85655
* ipa-cp.c (intersect_with_plats): Check that the lattice contains
single const.

testsuite/
* g++.dg/lto/pr85655_0.C: New test.

From-SVN: r260165

[arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products deriving from its capabilities

My patch last year to automate passing the be8 flag to the linker had
a nasty flaw in that I forgot entirely that the ARMv6-M architecture
did not derive its capabilities directly from the ARMv6 capability
list, but was a new group of capabilities (since it needs to leave out
the ARM -- notm -- feature bit).  The feature list defined was thus
missing the be8 bit.  Furthermore, any product derived from that
feature group consequently lacked the be8 feature as well and this
included all ARMv7 and ARMv8 parts.

The fix is embarrassingly simple...

PR target/85733
* config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature.

From-SVN: r260162

i386-common.c (OPTION_MASK_ISA_WAITPKG_SET, [...]): New defines.

2018-05-11  Sebastian Peryt  <sebastian.peryt@intel.com>

gcc/

        * common/config/i386/i386-common.c (OPTION_MASK_ISA_WAITPKG_SET,
        OPTION_MASK_ISA_WAITPKG_UNSET): New defines.
        (ix86_handle_option): Handle -mwaitpkg.
        * config.gcc: New header.
        * config/i386/cpuid.h (bit_WAITPKG): New bit.
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect -mwaitpkg.
        * config/i386/i386-builtin-types.def ((UINT8, UNSIGNED, UINT64)): New
        function type.
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        OPTION_MASK_ISA_WAITPKG.
        * config/i386/i386.c (ix86_target_string): Add -mwaitpkg.
        (ix86_option_override_internal): Add PTA_WAITPKG.
        (ix86_valid_target_attribute_inner_p): Add -mwaitpkg.
        (enum ix86_builtins): Add IX86_BUILTIN_UMONITOR, IX86_BUILTIN_UMWAIT,
        IX86_BUILTIN_TPAUSE.
        (ix86_init_mmx_sse_builtins): Define __builtin_ia32_umonitor,
        __builtin_ia32_umwait and __builtin_ia32_tpause.
        (ix86_expand_builtin): Expand IX86_BUILTIN_UMONITOR,
        IX86_BUILTIN_UMWAIT, IX86_BUILTIN_TPAUSE.
        * config/i386/i386.h (TARGET_WAITPKG, TARGET_WAITPKG_P): New.
        * config/i386/i386.md (UNSPECV_UMWAIT, UNSPECV_UMONITOR,
        UNSPECV_TPAUSE): New.
        (umwait, umwait_rex64, umonitor_<mode>, tpause, tpause_rex64): New.
        * config/i386/i386.opt: Add -mwaitpkg.
        * config/i386/waitpkgintrin.h: New file.
        * config/i386/x86intrin.h: New header.
        * doc/invoke.texi: Add -mwaitpkg.

gcc/testsuite/

        * gcc.target/i386/tpause-1.c: New test.
        * gcc.target/i386/umonitor-1.c: New test.

From-SVN: r260161

[arm] PR target/85606 prefer armv6s-m for armv6-m parts

When Arm introduced ARMv6-M there were two variants, ARMv6-M and
ARMv6S-M.  The two differed only in support for the SVC instruction.
Later on SVC was then made a mandatory part of ARMv6-M and the
ARMv6S-M name was dropped.  GCC and GAS, however still recognize both
names and at least some versions of GAS still distinguish between the
two.

To address this, this patch changes the architecture for the ARMv6-m
cortex parts (m0, m0plus, m1 and the variants will small multiply
units) to use the ARMv6S-M name in conjunction with the assembler.
This avoids problems with them rejecting code that was previously
accepted with older versions of GCC where we did not pass an explicit
architecture string through to the compiler when using -mcpu on the
command line.

PR target/85606
* config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now
equivalent.
(cortex-m0): Use armv6s-m isa.
(cortex-m0plus): Likewise.
(cortex-m1): Likewise.
(cortex-m0.small-multiply): Likewise.
(cortex-m0plus.small-multiply): Likewise.
(cortex-m1.small-multiply): Likewise.

From-SVN: r260157

re PR c/85696 (OpenMP with variably modified and default(none) won't compile)

PR c/85696
* c-omp.c (c_omp_predetermined_sharing): Return
OMP_CLAUSE_DEFAULT_SHARED for artificial vars with integral type.

* cp-tree.h (cxx_omp_predetermined_sharing_1): New prototype.
* cp-gimplify.c (cxx_omp_predetermined_sharing): New wrapper around
cxx_omp_predetermined_sharing_1.  Rename old function to ...
(cxx_omp_predetermined_sharing_1): ... this.
* semantics.c (finish_omp_clauses): Use cxx_omp_predetermined_sharing_1
instead of cxx_omp_predetermined_sharing.

* c-c++-common/gomp/pr85696.c: New test.

From-SVN: r260156

re PR tree-optimization/85692 (Two source permute not used for vector initialization)

PR tree-optimization/85692
* tree-ssa-forwprop.c (simplify_vector_constructor): Try two
source permute as well.

* gcc.target/i386/pr85692.c: New test.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r260155

Support LLVM style of no_sanitize attribute (PR sanitizer/85556).

2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
* doc/extend.texi: Document LLVM style format for no_sanitize
attribute.
2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
* c-attribs.c (handle_no_sanitize_attribute): Iterate all
TREE_LIST values.
2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
* c-c++-common/ubsan/attrib-6.c: New test.

From-SVN: r260154

decl.c (cp_finish_decl): Don't instantiate auto variable.

* decl.c (cp_finish_decl): Don't instantiate auto variable.

(check_static_variable_definition): Allow auto.
* constexpr.c (ensure_literal_type_for_constexpr_object): Likewise.

From-SVN: r260150

correct changelog!

2018-05-10  Edward Smith-Rowland  <3dw4rd@verizon.net>

PR libstdc++/83140 - assoc_legendre returns negated value when m is odd
* include/tr1/legendre_function.tcc (__assoc_legendre_p): Add __phase
argument defaulted to +1.  Doxy comments on same.
* testsuite/special_functions/02_assoc_legendre/
check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
02_assoc_legendre/check_value.cc: Regen.

From-SVN: r260149

Daily bump.

From-SVN: r260147

re PR fortran/85687 (ICE in gfc_sym_identifier, at fortran/trans-decl.c:351)

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85687
* check.c (gfc_check_rank): Check that the argument is a data object.

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85687
* gfortran.dg/pr85687.f90: new test.

From-SVN: r260141

rs6000.c (mode_supports_dq_form): Rename mode_supports_vsx_dform_quad to mode_supports_dq_form.

2018-05-10  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (mode_supports_dq_form): Rename
mode_supports_vsx_dform_quad to mode_supports_dq_form.
(mode_supports_vsx_dform_quad): Likewise.
(mode_supports_vmx_dform): Move these functions to be next to the
other mode_supports functions.
(mode_supports_dq_form): Likewise.
(quad_address_p): Change calls of mode_supports_vsx_dform_quad to
mode_supports_dq_form.
(reg_offset_addressing_ok_p): Likewise.
(offsettable_ok_by_alignment): Likewise.
(rs6000_legitimate_offset_address_p): Likewise.
(legitimate_lo_sum_address_p): Likewise.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_secondary_reload_inner): Likewise.
(rs6000_preferred_reload_class): Likewise.
(rs6000_output_move_128bit): Likewise.

From-SVN: r260140

re PR fortran/85521 (ICE in gfc_resolve_character_array_constructor, at fortran/array.c:2049)

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85521
* array.c (gfc_resolve_character_array_constructor): Substrings
with upper bound smaller than lower bound are zero length strings.

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85521
* gfortran.dg/pr85521_1.f90: New test.
* gfortran.dg/pr85521_2.f90: New test.

From-SVN: r260139

re PR fortran/70870 (Segmentation violation in gfc_assign_data_value)

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/70870
* data.c (gfc_assign_data_value): Check that a data object does
not also have default initialization.

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/70870
* gfortran.dg/pr70870_1.f90: New test.

From-SVN: r260138

* gcc.target/i386/xgetsetbv.c: Fix whitespace.

From-SVN: r260137

i386.c (ix86_expand_builtin): Generate SImode target register for null target.

* config/i386/i386.c (ix86_expand_builtin) <case IX86_BUILTIN_RDPID>:
Generate SImode target register for null target.
<case IX86_BUILTIN_XGETBV>: Ditto.
<case IX86_BUILTIN_XSETBV>: Optimize LSHIFTRT generation.
* config/i386/xsaveintrin.h (_xgetbv): Add missing return.

testsuite/ChangeLog:

* gcc.target/i386/xgetsetbv.c: Check also variable arguments.

From-SVN: r260135

rs6000.md (prefetch): Generate ISA 2.06 instructions dcbtt and dcbtstt if operands[2] is 0.

gcc/ChangeLog:

2018-05-10  Carl Love  <cel@us.ibm.com>

* config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions
dcbtt and dcbtstt if operands[2] is 0.

From-SVN: r260134

cp-tree.h (DECL_CONSTRUCTOR_P): Use DECL_CXX_CONSTRUCTOR_P.

* cp-tree.h (DECL_CONSTRUCTOR_P): Use DECL_CXX_CONSTRUCTOR_P.

(DECL_DESTRUCTOR_P): Use DECL_CXX_DESTRUCTOR_P.

From-SVN: r260133

Document Dual ABI for std::ios_base::failure

* doc/xml/faq.xml: Link to C++17 status. Add note to outdated answer.
* doc/xml/manual/debug_mode.xml: Add array and forward_list to list
of C++11 containers with Debug Mode support.
* doc/xml/manual/using.xml: Document Dual ABI for ios_base::failure.
* doc/html/*: Regenerate.

From-SVN: r260129

regex_compiler.h (_S_cache_size): Change from function to variable.

* include/bits/regex_compiler.h (_S_cache_size): Change from
function to variable.

From-SVN: r260128

Core issue 2310 - conversion to base of incomplete type.

* class.c (build_base_path): Check COMPLETE_TYPE_P for source type.

From-SVN: r260127

CWG 2267 - list-initialization of reference temporary

* call.c (reference_binding): List-initializing a reference
temporary is copy-list-initialization.

From-SVN: r260126

* parser.c (cp_parser_class_head): Use num_template_headers_for_class.

From-SVN: r260125

Make sure we aren't trying to do a nested instantiation in template context.

* pt.c (instantiate_decl): Make sure we aren't trying to do a nested
instantiation in template context.

From-SVN: r260124

* class.c (vbase_has_user_provided_move_assign): Use user_provided_p.

From-SVN: r260123

* lambda.c (lambda_expr_this_capture): Improve logic.

From-SVN: r260122

decl.c (make_typename_type): s/parameters/arguments/.

* decl.c (make_typename_type): s/parameters/arguments/.

* parser.c (cp_parser_nested_name_specifier_opt): Likewise.
* pt.c (make_pack_expansion): Correct error message.

From-SVN: r260121

re PR fortran/85735 (f951 crashes on empty input)

PR fortran/85735
* options.c (gfc_post_options): Set main_input_filename.

From-SVN: r260120

re PR c++/85662 ("error: non-constant condition for static assertion" from __builtin_offsetof in C++)

PR c++/85662
* c-common.h (fold_offsetof_1): Removed.
(fold_offsetof): Add TYPE argument defaulted to size_type_node and
CTX argument defaulted to ERROR_MARK.
* c-common.c (fold_offsetof_1): Renamed to ...
(fold_offsetof): ... this.  Remove wrapper function.  Add TYPE
argument, convert the pointer constant to TYPE and use size_binop
with PLUS_EXPR instead of fold_build_pointer_plus if type is not
a pointer type.  Adjust recursive calls.

* c-fold.c (c_fully_fold_internal): Use fold_offsetof rather than
fold_offsetof_1, pass TREE_TYPE (expr) as TYPE to it and drop the
fold_convert_loc.
* c-typeck.c (build_unary_op): Use fold_offsetof rather than
fold_offsetof_1, pass argtype as TYPE to it and drop the
fold_convert_loc.

* cp-gimplify.c (cp_fold): Use fold_offsetof rather than
fold_offsetof_1, pass TREE_TYPE (x) as TYPE to it and drop the
fold_convert.

* g++.dg/ext/offsetof2.C: New test.

From-SVN: r260119

re PR tree-optimization/85693 (Generation of SAD (Sum of Absolute Difference) instruction)

PR target/85693
* config/i386/sse.md (usadv64qi): New expander.

From-SVN: r260117

re PR fortran/54613 ([F08] Add FINDLOC plus support MAXLOC/MINLOC with KIND=/BACK=)

2018-05-10  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/54613
* intrinsic.texi: Document BACK for MINLOC and MAXLOC.

From-SVN: r260116

PR libstdc++/83140 - assoc_legendre returns negated value when m is odd

2018-05-10  Edward Smith-Rowland  <3dw4rd@verizon.net>

PR libstdc++/83140 - assoc_legendre returns negated value when m is odd
* include/tr1/legendre_function.tcc (__assoc_legendre_p): Add __phase
argument defaulted to +1.  Doxy comments on same.
* testsuite/special_functions/02_assoc_legendre/
check_assoc_legendre.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
02_assoc_legendre/check_tr1_assoc_legendre.cc: Regen.

From-SVN: r260115

PR libstdc++/85729 add linkage specifications to headers

PR libstdc++/85729
* include/bits/c++config.h (__replacement_assert): Add linkage
specification.
* include/bits/std_abs.h: Add comment to closing brace of block.
* include/c_global/cstddef: Add linkage specification.
* include/c_global/cstring: Likewise.
* include/c_global/cwchar: Likewise.

From-SVN: r260114

re PR fortran/68846 (Pointer function as LValue doesn't work when the assignment regards a dummy argument.)

2018-05-10  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/68846
PR fortran/70864
* resolve.c (get_temp_from_expr): The temporary must not have
dummy or intent attributes.

2018-05-10  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/68846
* gfortran.dg/temporary_3.f90 : New test.

PR fortran/70864
* gfortran.dg/temporary_2.f90 : New test.

From-SVN: r260113

Improve boostrap-ubsan config (PR bootstrap/64914).

2018-05-10  Martin Liska  <mliska@suse.cz>

PR bootstrap/64914
* bootstrap-ubsan.mk: Define UBSAN_BOOTSTRAP.
2018-05-10  Martin Liska  <mliska@suse.cz>

PR bootstrap/64914
* md5.c: Use strict alignment with UBSAN_BOOTSTRAP.

From-SVN: r260112

rs6000: Remove -maltivec={be,le}

This removes the -maltivec=be and -maltivec=le options.  Those were
deprecated in GCC 8.

Altivec will keep working on both BE and LE; it is just the BE-vectors-
on-LE that is removed (the other way around was never supported).

The main change is replacing VECTOR_ELT_ORDER_BIG by BYTES_BIG_ENDIAN
(and then simplifying).

* config/rs6000/altivec.md (altivec_vmrghb, altivec_vmrghh,
altivec_vmrghw, altivec_vmrglb, altivec_vmrglh, altivec_vmrglw): Remove
-maltivec=be support.
(vec_widen_umult_even_v16qi, vec_widen_smult_even_v16qi,
vec_widen_umult_even_v8hi, vec_widen_smult_even_v8hi,
vec_widen_umult_even_v4si, vec_widen_smult_even_v4si,
vec_widen_umult_odd_v16qi, vec_widen_smult_odd_v16qi,
vec_widen_umult_odd_v8hi, vec_widen_smult_odd_v8hi,
vec_widen_umult_odd_v4si, vec_widen_smult_odd_v4si, altivec_vpkpx,
altivec_vpks<VI_char>ss, altivec_vpks<VI_char>us,
altivec_vpku<VI_char>us, altivec_vpku<VI_char>um, altivec_vsum2sws,
altivec_vsumsws): Adjust.
(altivec_vspltb *altivec_vspltb_internal, altivec_vsplth,
*altivec_vsplth_internal, altivec_vspltw, *altivec_vspltw_internal,
altivec_vspltsf, *altivec_vspltsf_internal): Remove -maltivec=be
support.
(altivec_vperm_<mode>, altivec_vperm_<mode>_uns,
altivec_vupkhs<VU_char>, altivec_vupkls<VU_char>, altivec_vupkhpx,
altivec_vupklpx, altivec_lvsl, altivec_lvsr): Adjust.
(altivec_lve<VI_char>x): Delete expand.
(*altivec_lve<VI_char>x_internal): Rename to...
(altivec_lve<VI_char>x): ... this.
(altivec_lvxl_<mode>): Delete expand.
(*altivec_lvxl_<mode>_internal): Rename to ...
(altivec_lvxl_<mode>): ... this.
(altivec_stvxl_<mode>): Delete expand.
(*altivec_stvxl_<mode>_internal): Rename to ...
(altivec_stvxl_<mode>): ... this.
(altivec_stve<VI_char>x): Delete expand.
(*altivec_stve<VI_char>x_internal): Rename to ...
(altivec_stve<VI_char>x): ... this.
(doublee<mode>2, unsdoubleev4si2, doubleo<mode>2, unsdoubleov4si2,
doubleh<mode>2, unsdoublehv4si2, doublel<mode>2, unsdoublelv4si2,
reduc_plus_scal_<mode>): Adjust.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Adjust
comment.
(rs6000_cpu_cpp_builtins): Adjust.
(altivec_resolve_overloaded_builtin): Remove -maltivec=be support.
* config/rs6000/rs6000-protos.h (altivec_expand_lvx_be,
altivec_expand_stvx_be, altivec_expand_stvex_be): Delete.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Remove
-maltivec=be support.
(rs6000_split_vec_extract_var): Adjust.
(rs6000_split_v4si_init): Adjust.
(swap_selector_for_mode): Delete.
(altivec_expand_lvx_be, altivec_expand_stvx_be,
altivec_expand_stvex_be): Delete.
(altivec_expand_lv_builtin, altivec_expand_stv_builtin): Remove
-maltivec=be support.
(rs6000_gimple_fold_builtin): Ditto.
(rs6000_generate_float2_double_code, rs6000_generate_float2_code):
Adjust.
* config/rs6000/rs6000.h (VECTOR_ELT_ORDER_BIG): Delete.
(TARGET_DIRECT_MOVE_64BIT): Adjust.
* config/rs6000/rs6000.md (split for extendsidi2 for vectors): Adjust.
* config/rs6000/rs6000.opt (maltivec=le, maltivec=be): Delete.
* config/rs6000/vsx.md (floate<mode>, unsfloatev2di, floato<mode>,
unsfloatov2di, vsignedo_v2df, vsignede_v2df, vunsignedo_v2df,
vunsignede_v2df, vsx_extract_<mode>_p9, *vsx_extract_si,
*vsx_extract_<mode>_p8, *vsx_extract_si_<uns>float_df,
*vsx_extract_si_<uns>float_<mode>, vsx_set_<mode>_p9, vsx_set_v4sf_p9,
*vsx_insert_extract_v4sf_p9, *vsx_insert_extract_v4sf_p9_2, and an
anonymous split): Adjust.
(vsx_mergel_<mode>, vsx_mergeh_<mode>): Remove -maltivec=be support.
(vsx_xxspltd_<mode>, extract4b, insert4b): Adjust.

gcc/testsuite/
* gcc.dg/vmx/extract-be-order.c: Delete testcase.
* gcc.dg/vmx/extract-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/insert-be-order.c: Delete testcase.
* gcc.dg/vmx/insert-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/ld-be-order.c: Delete testcase.
* gcc.dg/vmx/ld-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/lde-be-order.c: Delete testcase.
* gcc.dg/vmx/ldl-be-order.c: Delete testcase.
* gcc.dg/vmx/ldl-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/merge-be-order.c: Delete testcase.
* gcc.dg/vmx/merge-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/mult-even-odd-be-order.c: Delete testcase.
* gcc.dg/vmx/pack-be-order.c: Delete testcase.
* gcc.dg/vmx/perm-be-order.c: Delete testcase.
* gcc.dg/vmx/splat-be-order.c: Delete testcase.
* gcc.dg/vmx/splat-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/st-be-order.c: Delete testcase.
* gcc.dg/vmx/st-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/ste-be-order.c: Delete testcase.
* gcc.dg/vmx/stl-be-order.c: Delete testcase.
* gcc.dg/vmx/stl-vsx-be-order.c: Delete testcase.
* gcc.dg/vmx/sum2s-be-order.c: Delete testcase.
* gcc.dg/vmx/unpack-be-order.c: Delete testcase.
* gcc.dg/vmx/vsums-be-order.c: Delete testcase.
* gcc.target/powerpc/vec-setup-be-double.c: Delete testcase.
* gcc.target/powerpc/vec-setup-be-long.c: Delete testcase.
* gcc.target/powerpc/vec-setup.h: Remove -maltivec=be support.

From-SVN: r260109

configure.ac (gcc_gxx_include_dir_add_sysroot): Set it to 1 only when --with-gxx-include-dir is also specified.

* configure.ac (gcc_gxx_include_dir_add_sysroot): Set it to 1 only
when --with-gxx-include-dir is also specified.
* configure: Regenerate.

From-SVN: r260108

re PR tree-optimization/85699 (gcc.dg/nextafter-2.c fail)

PR tree-optimization/85699
* gcc.dg/nextafter-1.c (NO_LONG_DOUBLE): Define if not defined.  Use
!NO_LONG_DOUBLE instead of __LDBL_MANT_DIG__ != 106.
* gcc.dg/nextafter-2.c: Include stdlib.h.  For glibc < 2.24 define
NO_LONG_DOUBLE to 1 before including nextafter-1.c.

From-SVN: r260107

re PR c++/85400 (invalid Local Dynamic TLS relaxation for symbol defined in method)

PR c++/85400
cp/
* decl2.c (adjust_var_decl_tls_model): New static function.
(comdat_linkage): Call it on a variable.
(maybe_make_one_only): Likewise.
c-family/
* c-attribs.c (handle_visibility_attribute): Do not set no_add_attrs.

From-SVN: r260106

Daily bump.

From-SVN: r260104

go/build, cmd/go: update to match recent changes to gc

    Several recent changes to the gc version of cmd/go improve the
    gofrontend support. These changes are partially copies of existing
    gofrontend differences, and partially new code. This CL makes the
    gofrontend match the upstream code.

    The changes included here come from:
        https://golang.org/cl/111575
        https://golang.org/cl/111595
        https://golang.org/cl/111635
        https://golang.org/cl/111636

    For the record, the following recent gc changes are based on code
    already present in the gofrontend repo:
        https://golang.org/cl/110915
        https://golang.org/cl/111615

    For the record, a gc change, partially based on earlier gofrontend
    work, also with new gc code, was already copied to gofrontend repo in
    CL 111099:
        https://golang.org/cl/111097

    This moves the generated list of standard library packages from
    cmd/go/internal/load to go/build.

    Reviewed-on: https://go-review.googlesource.com/112475

gotools/:
* Makefile.am (check-go-tool): Don't copy zstdpkglist.go.
* Makefile.in: Rebuild.

From-SVN: r260097

RISC-V: Add with-multilib-list support.

gcc/
PR target/84797
* config.gcc (riscv*-*-*): Handle --with-multilib-list.
* config/riscv/t-withmultilib: New.
* config/riscv/withmultilib.h: New.
* doc/install.texi: Document RISC-V --with-multilib-list support.

From-SVN: r260096

safe_iterator.h (_Safe_iterator<>::_M_constant()): Rename in...

2018-05-09  François Dumont  <fdumont@gcc.gnu.org>

* include/debug/safe_iterator.h (_Safe_iterator<>::_M_constant()):
Rename in...
(_Safe_iterator<>::_S_constant()): ...that.
* include/debug/safe_local_iterator.h
(_Safe_local_iterator<>::_M_constant()): Rename in...
(_Safe_local_iterator<>::_S_constant()): ...that.
* include/debug/formatter.h: Remove bits/cpp_type_traits.h include.
(_Iterator_state::__rbegin): New.
(_Iterator_state::__rmiddle): New.
(_Iterator_state::__rend): New.
(_Parameter::_Parameter(const _Safe_iterator<>&, const char*,
_Is_iterator)): Use _Safe_iterator<>::_S_constant. Grab normal underlying
iterator type.
(_Parameter::_Parameter(const _Safe_local_iterator<>&, const char*,
_Is_iterator)): Likewise.
(_Parameter::_S_reverse_state(_Iterator_state)): New.
        (_Parameter(__gnu_cxx::__normal_iterator<> const&, const char*,
_Is_iterator)): New.
(_Parameter(std::reverse_iterator<> const&, const char*,
_Is_iterator)): New.
(_Parameter(std::reverse_iterator<_Safe_iterator<>> const&,
const char*, _Is_iterator)): New.
(_Parameter(std::move_iterator<> const&, const char*, _Is_iterator):
New.
(_Parameter(std::move_iterator<_Safe_iterator<>> const&, const char*,
_Is_iterator)): New.
* testsuite/24_iterators/move_iterator/debug_neg.cc: New.
* testsuite/24_iterators/normal_iterator/debug_neg.cc: New.
* testsuite/24_iterators/reverse_iterator/debug_neg.cc: New.

From-SVN: r260093

re PR c++/85713 (ICE in dependent_type_p, at cp/pt.c:24582 on valid code)

2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/85713
* g++.dg/cpp1y/lambda-generic-85713.C: New.

From-SVN: r260092

builtins-8-runnable.c: New builtin test file.

gcc/testsuite/ChangeLog:

2018-05-09 Carl Love  <cel@us.ibm.com>
* gcc.target/powerpc/builtins-8-runnable.c: New builtin test file.

From-SVN: r260090

re PR c++/85713 (ICE in dependent_type_p, at cp/pt.c:24582 on valid code)

/cp
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/85713
Revert:
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84588
* parser.c (cp_parser_parameter_declaration_list): When the
entire parameter-declaration-list is erroneous maybe call
abort_fully_implicit_template.

/testsuite
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/85713
Revert:
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84588
* g++.dg/cpp1y/pr84588.C: New.

From-SVN: r260087

re PR c++/85713 (ICE in dependent_type_p, at cp/pt.c:24582 on valid code)

/cp
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/85713
Revert:
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84588
* parser.c (cp_parser_parameter_declaration_list): When the
entire parameter-declaration-list is erroneous maybe call
abort_fully_implicit_template.

/testsuite
2018-05-09  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/85713
Revert:
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84588
* g++.dg/cpp1y/pr84588.C: New.

From-SVN: r260086

[openacc, libgomp] Use GOMP_ASYNC_SYNC in GOACC_declare

2018-05-09  Tom de Vries  <tom@codesourcery.com>

PR libgomp/82901
* oacc-parallel.c (GOACC_declare): Use GOMP_ASYNC_SYNC as async argument
to GOACC_enter_exit_data.

From-SVN: r260085

Add ax_pthread.m4 for use in binutils-gdb

config/
* ax_pthread.m4: Add file

From-SVN: r260083

* gcc.target/aarch64/sve/vcond_6.c: Add missing brace.

From-SVN: r260082

[openacc] Factor out async argument utility functions

2018-05-09  Tom de Vries  <tom@codesourcery.com>

PR libgomp/83792
* oacc-int.h (async_valid_stream_id_p, async_valid_p)
(async_synchronous_p): New function.
* oacc-async.c (acc_async_test, acc_wait, acc_wait_all_async): Use
async_valid_p.
* oacc-cuda.c (acc_get_cuda_stream, acc_set_cuda_stream): Use
async_valid_stream_id_p.
* oacc-mem.c (gomp_acc_remove_pointer): Use async_synchronous_p.
* oacc-parallel.c (GOACC_parallel_keyed): Same.

From-SVN: r260081

Make std::function tolerate semantically non-CopyConstructible objects

To satisfy the CopyConstructible requirement a callable object stored in
a std::function must behave the same when copied from a const or
non-const source. If copying a non-const object doesn't produce an
equivalent copy then the behaviour is undefined. But we can make our
std::function more tolerant of such objects by ensuring we always copy
from a const lvalue.

Additionally use an if constexpr statement in the _M_get_pointer
function to avoid unnecessary instantiations in the discarded branch.

* include/bits/std_function.h (_Base_manager::_M_get_pointer):
Use constexpr if in C++17 mode.
(_Base_manager::_M_clone(_Any_data&, const _Any_data&, true_type)):
Copy from const object.
* testsuite/20_util/function/cons/non_copyconstructible.cc: New.

From-SVN: r260080

tree-vect-slp.c (vect_bb_slp_scalar_cost): Fill a cost vector.

2018-05-09  Richard Biener  <rguenther@suse.de>

* tree-vect-slp.c (vect_bb_slp_scalar_cost): Fill a cost
vector.
(vect_bb_vectorization_profitable_p): Adjust.  Compute
actual scalar cost using the cost vector and the add_stmt_cost
machinery.

From-SVN: r260078

rs6000: Give an argument to every REG_CFA_REGISTER (PR85645)

The one for the prologue mflr did not have any value set, which means
use the SET that is in the insn pattern.  This works fine, except when
some late pass decides to replace the SET_SRC -- this changes the
meaning of the REG_CFA_REGISTER!  Such passes should not do these
things, but let's be more explicit here, for extra robustness.  It
could be argued that this defaulting is a design misfeature (it does
not save much space either, etc.)

PR rtl-optimization/85645
* config/rs6000/rs6000.c (rs6000_emit_prologue_components): Put a SET
in the REG_CFA_REGISTER note for LR, don't leave it empty.

From-SVN: r260077

shrink-wrap: Improve spread_components (PR85645)

In the testcase for PR85645 we do a pretty dumb placement of the
prologue/epilogue for the LR component: we place an epilogue for LR
before a control flow split where one of the branches clobbers LR
eventually, and the other does not.  The branch that does clobber it
will need a prologue again some time later.  Because saving and
restoring LR is a two step process---it needs to be moved via a GPR---
the backend emits CFI directives so that we get correct unwind
information.  But both regcprop and regrename do not properly handle
such CFI directives leading to ICEs.

Now, neither of the two branches needs to have LR restored at all,
because both of the branches end up in an infinite loop.

This patch makes spread_component return a boolean saying if anything
was changed, and if so, it is called again.  This obviously is finite
(there is a finite number of basic blocks, each with a finite number
of components, and spread_components can only assign more components
to a block, never less).  I also instrumented the code, and on a
bootstrap+regtest spread_components made changes a maximum of two
times.  Interestingly though it made changes on two iterations in
a third of the cases it did anything at all!

PR rtl-optimization/85645
* shrink-wrap.c (spread_components): Return a boolean saying if
anything was changed.
(try_shrink_wrapping_separate): Iterate spread_components until
nothing changes anymore.

From-SVN: r260076

regrename: Don't rename the dest of a REG_CFA_REGISTER (PR85645)

We should never change the destination of a REG_CFA_REGISTER, just
like for insns with a REG_CFA_RESTORE, because we need to have the
same control flow information on all branches that join.  It is very
doubtful that renaming the scratch registers used for prologue/epilogue
will help anything either.

PR rtl-optimization/85645
* regrename.c (build_def_use): Also kill the chains that include the
destination of a REG_CFA_REGISTER note.

From-SVN: r260075

regcprop: Avoid REG_CFA_REGISTER notes (PR85645)

Changing a SET that has a REG_CFA_REGISTER note is wrong if we are
changing the SET_DEST, or if the REG_CFA_REGISTER has nil as its
argument, and maybe some other cases.  It's never really useful to
propagate into such an instruction, so let's just bail whenever we
see such a note.

PR rtl-optimization/85645
*  regcprop.c (copyprop_hardreg_forward_1): Don't propagate into an
insn that has a REG_CFA_REGISTER note.

From-SVN: r260074

Add clobbers around IFN_LOAD/STORE_LANES

We build up the input to IFN_STORE_LANES one vector at a time.
In RTL, each of these vector assignments becomes a write to
subregs of the form (subreg:VEC (reg:AGGR R)), where R is the
eventual input to the store lanes instruction.  The problem is
that RTL isn't very good at tracking liveness when things are
initialised piecemeal by subregs, so R tends to end up being
live on all paths from the entry block to the store.  This in
turn leads to unnecessary spilling around calls, as well as to
excess register pressure in vector loops.

This patch adds gimple clobbers to indicate the liveness of the
IFN_STORE_LANES variable and makes sure that gimple clobbers are
expanded to rtl clobbers where useful.  For consistency it also
uses clobbers to mark the point at which an IFN_LOAD_LANES
variable is no longer needed.

2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* cfgexpand.c (expand_clobber): New function.
(expand_gimple_stmt_1): Use it.
* tree-vect-stmts.c (vect_clobber_variable): New function,
split out from...
(vectorizable_simd_clone_call): ...here.
(vectorizable_store): Emit a clobber either side of an
IFN_STORE_LANES sequence.
(vectorizable_load): Emit a clobber after an IFN_LOAD_LANES sequence.

gcc/testsuite/
* gcc.target/aarch64/store_lane_spill_1.c: New test.
* gcc.target/aarch64/sve/store_lane_spill_1.c: Likewise.

From-SVN: r260073

[nvptx] Make trap insn noreturn

2018-05-09  Tom de Vries  <tom@codesourcery.com>

PR target/85626
* config/nvptx/nvptx.md (define_insn "trap", define_insn "trap_if_true")
(define_insn "trap_if_false"): Add exit after trap.

From-SVN: r260072

re PR rtl-optimization/85638 (build failure for Ada runtime with SJLJ exceptions on x86)

PR rtl-optimization/85638
* bb-reorder.c: Include common/common-target.h.
(create_forwarder_block): New function extracted from...
(fix_up_crossing_landing_pad): ...here.  Rename into...
(dw2_fix_up_crossing_landing_pad): ...this.
(sjlj_fix_up_crossing_landing_pad): New function.
(find_rarely_executed_basic_blocks_and_crossing_edges): In SJLJ mode,
call sjlj_fix_up_crossing_landing_pad if there are incoming EH edges
from both partitions and exit the loop after one iteration.

From-SVN: r260070

PR c++/85706 - class deduction under decltype

* pt.c (for_each_template_parm_r): Handle DECLTYPE_TYPE.  Clear
*walk_subtrees whether or not we walked into the operand.
(type_uses_auto): Only look at deduced contexts.

From-SVN: r260066

revert: extend.texi (PowerPC Built-in Functions): Rename this subsection.

2018-05-08  Kelvin Nilsen  <kelvin@gcc.gnu.org>

Revert:
* doc/extend.texi (PowerPC Built-in Functions): Rename this
subsection.
(Basic PowerPC Built-in Functions): The new name of the
subsection previously known as "PowerPC Built-in Functions".
(Basic PowerPC Built-in Functions Available on all Configurations):
New subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.05): New
subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.06): New
subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.07): New
subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 3.0): New
subsubsection.

From-SVN: r260065

Daily bump.

From-SVN: r260063

* de.po, sv.po: Update.

From-SVN: r260057

[PATCH] RISC-V: Use new linker emulations for glibc ABI.

gcc/
* config/riscv/linux.h (MUSL_ABI_SUFFIX): Delete unnecessary backslash.
(LD_EMUL_SUFFIX): New.
(LINK_SPEC): Use it.

From-SVN: r260056

builtins-8-p9-runnable.c: Add new test file.

gcc/testsuite/ChangeLog:

2018-05-08  Carl Love  <cel@us.ibm.com>
* gcc.target/powerpc/builtins-8-p9-runnable.c: Add new test file.

From-SVN: r260055

debug.cc [...]: Include execinfo.h.

2018-05-08  François Dumont  <fdumont@gcc.gnu.org>

* src/c++11/debug.cc [_GLIBCXX_HAVE_EXECINFO_H]: Include execinfo.h.
[_GLIBCXX_HAVE_EXECINFO_H](_Error_formatter::_M_error): Render
backtrace.

From-SVN: r260054

macros.h (__glibcxx_check_valid_range_at): New.

2018-05-08  François Dumont  <fdumont@gcc.gnu.org>

* include/debug/macros.h (__glibcxx_check_valid_range_at): New.
* include/debug/functions.h (__check_valid_range): Use latter.
* include/debug/macros.h (__glibcxx_check_valid_constructor_range): New,
use latter.
* include/debug/deque
(deque::deque<_Iter>(_Iter, _Iter, const _Alloc&)): Use latter.
* include/debug/forward_list
(forward_list::forward_list<_Iter>(_Iter, _Iter, const _Alloc&)):
Likewise.
* include/debug/list
(list::list<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
* include/debug/list
(list::list<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
* include/debug/map.h
(map::map<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
(map::map<_Iter>(_Iter, _Iter, const _Compare&, const _Alloc&)):
Likewise.
* include/debug/multimap.h
(multimap::multimap<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
(multimap::multimap<_Iter>(_Iter, _Iter, const _Compare&,
const _Alloc&)): Likewise.
* include/debug/set.h
(set::set<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
(set::set<_Iter>(_Iter, _Iter, const _Compare&, const _Alloc&)):
Likewise.
* include/debug/multiset.h
(multiset::multiset<_Iter>(_Iter, _Iter, const _Alloc&)): Likewise.
(multiset::multiset<_Iter>(_Iter, _Iter, const _Compare&,
const _Alloc&)): Likewise.
* include/debug/string
(basic_string::basic_string<_Iter>(_Iter, _Iter, const _Alloc&)):
Likewise.
* include/debug/unordered_map
(unordered_map::unordered_map<_Iter>(_Iter, _Iter, const _Alloc&)):
Likewise.
(unordered_multimap::unordered_multimap<_Iter>(_Iter, _Iter,
const _Alloc&)): Likewise.
* include/debug/unordered_set
(unordered_set::unordered_set<_Iter>(_Iter, _Iter, const _Alloc&)):
Likewise.
(unordered_multiset::unordered_multiset<_Iter>(_Iter, _Iter,
const _Alloc&)): Likewise.
* include/debug/vector
(vector::vector<_Iter>(_Iter, _Iter, const _Alloc&)): Use latter.

From-SVN: r260053

formatter.h (_Error_formatter::_M_function): New.

2018-05-08  François Dumont  <fdumont@gcc.gnu.org>

* include/debug/formatter.h (_Error_formatter::_M_function): New.
(_Error_formatter(const char*, unsigned int)): Adapt.
(_Error_formatter::_M_at): Rename in...
(_Error_formatter::_S_at): ...that and adapt.
* include/debug/macros.h (_GLIBCXX_DEBUG_VERIFY_AT_F): New.
(_GLIBCXX_DEBUG_VERIFY_AT, _GLIBCXX_DEBUG_VERIFY): Adapt.
* src/c++11/debug.cc (_Error_formatter::_M_error): Render _M_function
when available.

From-SVN: r260052

re PR c++/84588 (internal compiler error: Segmentation fault (contains_struct_check()))

/cp
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84588
* parser.c (cp_parser_parameter_declaration_list): When the
entire parameter-declaration-list is erroneous maybe call
abort_fully_implicit_template.

/testsuite
2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/84588
* g++.dg/cpp1y/pr84588.C: New.

From-SVN: r260050

re PR c++/85695 (if constexpr misevaluates typedefed type value)

PR c++/85695
* semantics.c (finish_if_stmt_cond): See through typedefs.

* g++.dg/cpp1z/constexpr-if22.C: New test.

From-SVN: r260049

extend.texi (PowerPC Built-in Functions): Rename this subsection.

gcc/ChangeLog:

2018-05-08  Kelvin Nilsen  <kelvin@gcc.gnu.org>

* doc/extend.texi (PowerPC Built-in Functions): Rename this
subsection.
(Basic PowerPC Built-in Functions): The new name of the
subsection previously known as "PowerPC Built-in Functions".
(Basic PowerPC Built-in Functions Available on all Configurations):
New subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.05): New
subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.06): New
subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.07): New
subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 3.0): New
subsubsection.

From-SVN: r260048

re PR tree-optimization/85693 (Generation of SAD (Sum of Absolute Difference) instruction)

PR target/85693
* gcc.target/i386/pr85693.c: New test.

From-SVN: r260047

Make std::regex automata use non-debug vector in Debug Mode

* include/bits/regex_automaton.h (_NFA_base::_M_paren_stack, _NFA):
Use normal std::vector even in Debug Mode.

From-SVN: r260046

re PR target/85683 (GCC 8 stopped using RMW (Read Modify Write) instructions on x86[_64])

PR target/85683
* config/i386/i386.md: Add peepholes for mem {+,-,&,|,^}= x; mem != 0
after cmpelim optimization.

* gcc.target/i386/pr49095.c: Add -masm=att to dg-options.  Add
scan-assembler-times checking that except for [fh]*xor other functions
don't use any load instructions.

From-SVN: r260045

PR libstdc++/85672 #undef _GLIBCXX_USE_FLOAT128 when not supported

Restore the behaviour in GCC 8 and earlier where _GLIBCXX_USE_FLOAT128
is not defined when configure detects support is missing. This avoids
having three states where the macro is either 1, 0, or undefined.

PR libstdc++/85672
* include/Makefile.am [!ENABLE_FLOAT128]: Change c++config.h entry
to #undef _GLIBCXX_USE_FLOAT128 instead of defining it to zero.
* include/Makefile.in: Regenerate.
* include/bits/c++config (_GLIBCXX_USE_FLOAT128): Move definition
within conditional block.

From-SVN: r260043

config.gcc: Support "goldmont".

2018-05-08  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

* config.gcc: Support "goldmont".
* config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont".
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_GOLDMONT.
* config/i386/i386.c (m_GOLDMONT): Define.
(processor_target_table): Add "goldmont".
(PTA_GOLDMONT): Define.
(ix86_lea_outperforms): Add TARGET_GOLDMONT.
(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT.
(fold_builtin_cpu): Add M_INTEL_GOLDMONT.
(fold_builtin_cpu): Add "goldmont".
(ix86_add_stmt_cost): Add TARGET_GOLDMONT.
(ix86_option_override_internal): Add "goldmont".
* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT.
(processor_type): Add PROCESSOR_GOLDMONT.
* config/i386/i386.md: Add CPU "glm".
* config/i386/glm.md: New file.
* config/i386/x86-tune.def: Add m_GOLDMONT.
* doc/invoke.texi: Add goldmont as x86 -march=/-mtune= CPU type.

libgcc/
* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT.
* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont.

gcc/testsuite/

* gcc.target/i386/builtin_target.c: Test goldmont.
* gcc.target/i386/funcspec-56.inc: Tests for arch=goldmont and
arch=silvermont.

From-SVN: r260042

re PR target/85572 (faster code for absolute value of __v2di)

PR target/85572
* config/i386/i386.c (ix86_expand_sse2_abs): Handle E_V2DImode and
E_V4DImode.
* config/i386/sse.md (abs<mode>2): Use VI_AVX2 iterator instead of
VI1248_AVX512VL_AVX512BW.  Handle V2DImode and V4DImode if not
TARGET_AVX512VL using ix86_expand_sse2_abs.  Formatting fixes.

* g++.dg/other/sse2-pr85572-1.C: New test.
* g++.dg/other/sse2-pr85572-2.C: New test.
* g++.dg/other/sse4-pr85572-1.C: New test.
* g++.dg/other/avx2-pr85572-1.C: New test.

From-SVN: r260041

re PR target/85317 (missing constant propagation on _mm(256)_movemask_*)

PR target/85317
* config/i386/i386.c (ix86_fold_builtin): Handle
IX86_BUILTIN_{,P}MOVMSK{PS,PD,B}{,128,256}.

* gcc.target/i386/pr85317.c: New test.
* gcc.target/i386/avx2-vpmovmskb-2.c (avx2_test): Add asm volatile
optimization barrier to avoid optimizing away the expected insn.

From-SVN: r260040

re PR target/85480 (zero extension from xmm to zmm via _mm512_insert???x? not optimized)

PR target/85480
* config/i386/sse.md (ssequaterinsnmode): New mode attribute.
(*<extract_type>_vinsert<shuffletype><extract_suf>_0): New pattern.

* gcc.target/i386/avx512dq-pr85480-1.c: New test.
* gcc.target/i386/avx512dq-pr85480-2.c: New test.

From-SVN: r260039

Move C++ SVE tests to g++.target/aarch64/sve

2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
* g++.dg/other/sve_const_pred_1.C: Rename to...
* g++.target/aarch64/sve/const_pred_1.C: ...this.  Remove aarch64
target selectors and explicit -march options.
* g++.dg/other/sve_const_pred_2.C: Rename to...
* g++.target/aarch64/sve/const_pred_2.C: ...this and adjust likewise.
* g++.dg/other/sve_const_pred_3.C: Rename to...
* g++.target/aarch64/sve/const_pred_3.C: ...this and adjust likewise.
* g++.dg/other/sve_const_pred_4.C: Rename to...
* g++.target/aarch64/sve/const_pred_4.C: ...this and adjust likewise.
* g++.dg/other/sve_tls_2.C: Rename to...
* g++.target/aarch64/sve/tls_2.C: ...this and adjust likewise.
* g++.dg/other/sve_vcond_1.C: Rename to...
* g++.target/aarch64/sve/vcond_1.C: ...this and adjust likewise.
* g++.dg/other/sve_vcond_1_run.C: Rename to...
* g++.target/aarch64/sve/vcond_1_run.C: ...this and adjust likewise.

From-SVN: r260038

Tighten condition in vect/pr85586.c (PR 85654)

2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
PR testsuite/85586
* gcc.dg/vect/pr85586.c: Restrict LOOP VECTORIZED test to
!vect_no_align.

From-SVN: r260036

re PR c++/57429 (Dependent function call with one visible declaration, deleted)

2018-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/57429
* g++.dg/cpp0x/deleted14.C: New.

From-SVN: r260035

Backport of RISC-V support for libffi

* configure.host: Add RISC-V support.
* Makefile.am: Likewise.
* Makefile.in: Regenerate.
* src/riscv/ffi.c, src/riscv/ffitarget.h, src/riscv/sysv.S: New
files.

From-SVN: r260033