Emil Velikov [Tue, 7 Jul 2015 13:13:33 +0000 (14:13 +0100)]
i915: remove unused driFd variable
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Mon, 6 Jul 2015 08:42:01 +0000 (09:42 +0100)]
i965: bump libdrm requirement to 2.4.61 and drop in-tree workaround
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Emil Velikov [Mon, 13 Jul 2015 19:01:39 +0000 (20:01 +0100)]
bugzilla_mesa.sh: sort the bugs list by number
v2: Use change sed/sort based on Ilia's suggestion.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 30 Jun 2015 13:37:19 +0000 (14:37 +0100)]
radeonsi: directly include radeon/* headers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Mon, 29 Jun 2015 13:03:22 +0000 (14:03 +0100)]
auxiliary/vl: use loader_open_device() over open()
The former handles O_CLOEXEC (and the lack of it) appropriately.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Mon, 29 Jun 2015 13:01:39 +0000 (14:01 +0100)]
pipe-loader: use loader_open_device() rather than open()
The former handles O_CLOEXEC (and the lack of it) appropriately.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Mon, 29 Jun 2015 12:28:33 +0000 (13:28 +0100)]
pipe-loader: remove pipe_loader_sw_probe_xlib
It was only useful for st/egl, although I've never got to merging the
pipe-loader and inline-helpers before it was removed. There are no users
for it ATM.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Mon, 29 Jun 2015 12:08:06 +0000 (13:08 +0100)]
automake: remove empty GALLIUM_PIPE_LOADER_LIBS
Cc: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Mon, 29 Jun 2015 12:02:21 +0000 (13:02 +0100)]
automake: pipe-loader: remove the 'client' pipe-loader
Was only around as opencl's pipe-loader wanted to link against xcb in
some cases.
Cc: Rob Clark <robclark@freedesktop.org>
Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Mon, 29 Jun 2015 11:44:44 +0000 (12:44 +0100)]
pipe-loader: remove pipe_loader_drm_probe_fd() x_auth argument
No longer used by anyone, as of last commit.
Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Tue, 30 Jun 2015 14:53:27 +0000 (15:53 +0100)]
pipe-loader: simplify pipe_loader_drm_probe
Do not iterate and (attempt to) open the render device, if we're over
the requested number of devices.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Mon, 29 Jun 2015 11:36:45 +0000 (12:36 +0100)]
pipe-loader: drop support for non-render node devices
Render nodes have been around for quite some time. Removing support via
the master/primary node allows us to clean up the conditional
compilation and simplify the build greatly.
For example currently we the pipe-loader, which explicitly links against
xcb and friends (for X auth) if found at compile-time. That
would cause problems as one will be forced to use X/xcb, even if it's a
headless system that is used for opencl.
v2: Clarify the linking topic in the commit message.
Cc: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Dave Airlie [Mon, 13 Jul 2015 08:11:20 +0000 (09:11 +0100)]
radeonsi: direct emit intrinsic for DFRAC.
Michel reported this still failed, and this fixed it
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 1 Jul 2015 03:58:24 +0000 (04:58 +0100)]
radeonsi: ARB_gpu_shader_fp64 + ARB_vertex_attrib_64bit support.
This adds the translation from TGSI to AMDGPU llvm backend, for the
64-bit opcodes. The backend pretty much handles everything for us
fine. There is one patch required for SI DFRAC support, that I know
off.
[airlied: fixed missing comma, updated relnotes]
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Guillaume Desmottes [Fri, 17 Apr 2015 13:13:36 +0000 (15:13 +0200)]
loader: don't leak udev_enumerate
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Guillaume Desmottes [Fri, 17 Apr 2015 13:13:35 +0000 (15:13 +0200)]
dri3_open: don't leak the reply
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90073
Signed-off-by: Guillaume Desmottes <guillaume.desmottes@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Rhys Kidd [Sat, 27 Jun 2015 03:14:38 +0000 (13:14 +1000)]
doxygen: Remove doxygen_sqlite3.db with 'make clean'
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Rhys Kidd [Sat, 27 Jun 2015 03:14:37 +0000 (13:14 +1000)]
doxygen: Add doxygen_sqlite3.db to .gitignore
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 11 Jul 2015 19:36:44 +0000 (20:36 +0100)]
docs: add news item and link release notes for mesa 10.6.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 11 Jul 2015 19:33:16 +0000 (20:33 +0100)]
docs: Add sha256 checksums for the 10.6.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
89cbd91b17989ec7eb1cb93ac427a84dca56cd79)
Emil Velikov [Sat, 11 Jul 2015 18:46:49 +0000 (19:46 +0100)]
Add release notes for the 10.6.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
9643cce94c8a1938e3342fb83d025a1e5c2aa79b)
Dave Airlie [Wed, 1 Jul 2015 05:31:13 +0000 (06:31 +0100)]
tgsi: add DFMA to the opcode infer functions.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 9 Jul 2015 05:49:56 +0000 (15:49 +1000)]
r600g: move sampler/ubo index registers before temp reg
temp_reg needs to be last, as we increment things
away from it, otherwise on cayman some tests were overwriting
the index regs.
Fixes 2 piglit with ARB_gpu_shader5 forced on cayman.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 9 Jul 2015 05:22:09 +0000 (15:22 +1000)]
r600g: fix sampler/ubo indexing on cayman
Cayman needs a different method to upload the CF IDX0/1
This fixes 31 piglits when ARB_gpu_shader5 is forced on
with cayman.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Fri, 10 Jul 2015 20:42:18 +0000 (16:42 -0400)]
nv50, nvc0: enable at least one color RT if alphatest is enabled
Fixes the following piglits:
fbo-alphatest-nocolor
fbo-alphatest-nocolor-ff
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Thu, 25 Jun 2015 17:08:06 +0000 (10:08 -0700)]
i965: Remove special case for layered drawbuffer attachments.
When binding a layered texture, the layer is already 0. There's no need
to special case this.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Thu, 25 Jun 2015 16:17:38 +0000 (09:17 -0700)]
i965/gen6: Set up layer constraints properly for depth buffers.
This ports over Chris Forbes' equivalent fixes in gen7_misc_state.c
from commit
77d55ef4819436ebbf9786a1e720ec00707bbb19.
No Piglit changes on Sandybridge.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Kenneth Graunke [Thu, 23 Apr 2015 00:46:08 +0000 (17:46 -0700)]
i965: Label the repclear shader "meta repclear" rather than "meta clear".
Color clears can be performed via two separate shaders - one is the
generic "meta clear" shader (in meta.c); the other is the i965 specific
"repclear" shader (in brw_meta_fast_clear.c).
Giving them separate names makes them distinguishable when reading
INTEL_DEBUG=shader_time output.
v2: Call it "meta repclear", as suggested by Jason.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Thu, 2 Jul 2015 00:01:54 +0000 (17:01 -0700)]
i965: Fix indentation in emit_control_data_bits().
The last patch left the code indented too far.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Thu, 2 Jul 2015 00:01:24 +0000 (17:01 -0700)]
i965/gs: Move vertex_count != 0 check up a level; skip one caller.
Paul's original code had emit_control_data_bits() skip the URB write if
vertex_count was 0. This meant wrapping every control data write in a
conditional write.
We accumulate control data bits in a single UD (32-bit) register. For
simple shaders that don't emit many vertices, the control data header
will be <= 32-bits long, so we only need to write it once at the end of
the shader.
For shaders with larger headers, we write out batches of control data
bits at EmitVertex(), when (vertex_count * bits_per_vertex) % 32 == 0.
On the first EmitVertex() call, the above expression will evaluate to
true simply because vertex_count == 0. But we want to avoid emitting
the control data bits, because we haven't accumulated 32-bits worth yet.
In other words, the vertex_count != 0 check is really only necessary in
the EmitVertex() batching case, not the end-of-thread case.
This saves a CMP/IF/ENDIF in every shader that uses EndPrimitive() or
multiple streams. The only downside is that a shader which emits no
vertices at all will execute an additional URB write---but such shaders
are pointless and not worth optimizing.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Timothy Arceri [Wed, 8 Jul 2015 11:26:02 +0000 (21:26 +1000)]
glsl: use set rather than old hash table for ir_validate
When the new hash table implementation was added to Mesa it claimed to be much
faster, see commits
35fd61bd99c1 and
72e55bb6888ff.
The set implementation follows the same implementation strategy so this should
be faster and there was no need to store a data field.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Chad Versace [Fri, 10 Jul 2015 01:46:21 +0000 (18:46 -0700)]
mesa: Fix generation of git_sha1.h.tmp for gitlinks
Don't assume that $(top_srcdir)/.git is a directory. It may be a
gitlink file [1] if $(top_srcdir) is a submodule checkout or a linked
worktree [2].
[1] A "gitlink" is a text file that specifies the real location of
the gitdir.
[2] Linked worktrees are a new feature in Git 2.5.
Cc: "10.6, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Rob Clark [Thu, 2 Jul 2015 22:07:27 +0000 (18:07 -0400)]
freedreno/a4xx: occlusion query support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 9 Jul 2015 22:14:36 +0000 (18:14 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 6 Jul 2015 00:17:56 +0000 (20:17 -0400)]
freedreno/ir3/sched: fixup new instr's block
If we split addr/pred, the original instruction could have originated
from a different block. If we don't fixup the block ptr we hit asserts
later (in debug builds).
NOTE: perhaps we don't want to try to preserve addr/pred reg's across
block boundaries.. this at least needs some thought in case addr/pred
writes end up inside a conditional block..
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 5 Jul 2015 23:53:10 +0000 (19:53 -0400)]
freedreno/ir3/ra: fix failed assert for a0/p0
The address and predicate register are special, they don't get assigned
in RA. So do a better job of ignoring them rather than hitting later
asserts.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 5 Jul 2015 22:23:25 +0000 (18:23 -0400)]
freedreno/ir3: shader-db traces
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 2 Jul 2015 22:15:43 +0000 (18:15 -0400)]
freedreno: fix crash in fd_invalidate_resource()
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 8 Jul 2015 18:51:46 +0000 (14:51 -0400)]
vc4: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush(). So driver
should use fence_ref() which will unref the old fence if not NULL.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Rob Clark [Wed, 8 Jul 2015 18:51:10 +0000 (14:51 -0400)]
ilo: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush(). So driver
should use fence_ref() which will unref the old fence if not NULL.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Rob Clark [Wed, 8 Jul 2015 18:48:01 +0000 (14:48 -0400)]
freedreno: unref old fence
Some, but not all, state trackers will explicitly unref (and set to
NULL) the previous *fence before calling pipe->flush(). So driver
should use fence_ref() which will unref the old fence if not NULL.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 8 Jul 2015 19:00:51 +0000 (15:00 -0400)]
gallium: clarify reference counting for fence
Nowhere was it spelled out that the state tracker may expect the pipe
driver to unref the old fence.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rob Clark [Wed, 8 Jul 2015 17:30:22 +0000 (13:30 -0400)]
xa: don't leak fences
XA was never unref'ing last_fence in the various call paths to
pipe->flush(). Add this to xa_context_flush() and update the other
open-coded calls to pipe->flush() to use xa_context_flush() instead.
This fixes a memory leak reported with xf86-video-freedreno.
Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Kenneth Graunke [Mon, 29 Jun 2015 04:16:29 +0000 (21:16 -0700)]
i965/vs: Get rid of brw_vs_compile completely.
After tearing it out another level or two, and just passing the key and
vp directly, we can finally remove this struct. It also eliminates a
pointless memcpy() of the key.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Kenneth Graunke [Tue, 30 Jun 2015 05:07:37 +0000 (22:07 -0700)]
i965/vs: Remove 'c'/vs_compile from vec4_vs_visitor.
At this point, the brw_vs_compile structure only contains the key and
gl_vertex_program pointer. We may as well pass and store them directly;
it's simpler and more convenient (key-> instead of vs_compile->key...).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Kenneth Graunke [Mon, 29 Jun 2015 04:02:15 +0000 (21:02 -0700)]
i965/vec4: Move c->last_scratch into vec4_visitor.
Nothing outside of vec4_visitor uses it, so we may as well keep it
internal.
Commit
db9c915abcc5ad78d2d11d0e732f04cc94631350 for the vec4 backend.
(The empty class will be going away soon.)
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Kenneth Graunke [Mon, 29 Jun 2015 03:55:25 +0000 (20:55 -0700)]
i965/vec4: Move total_scratch calculation into the visitor.
This is more consistent with how we do it in the FS backend, and reduces
a tiny bit of duplication. It'll also allow for a bit more tidying.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Kenneth Graunke [Mon, 29 Jun 2015 03:45:47 +0000 (20:45 -0700)]
i965/vec4: Move perf_debug about register spilling into the visitor.
This patch makes us only issue the performance warning about register
spilling if we actually spilled registers. We also use scratch space
for indirect addressing and the like.
This is basically commit
c51163b0cf7aff0375b1a5ea4cb3da9d9e164044 for
the vec4 backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Kenneth Graunke [Tue, 30 Jun 2015 04:58:47 +0000 (21:58 -0700)]
i965/vec4: Plumb log_data through so the backend_shader field gets set.
Jason plumbed this through a while back in the FS backend, but
apparently we were just passing NULL in the vec4 backend.
This patch passes brw in as intended.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Kenneth Graunke [Thu, 12 Mar 2015 17:43:23 +0000 (10:43 -0700)]
i965: Switch on shader stage in nir_setup_outputs().
Adding new shader stages to a switch statement is less confusing than an
if-else-if ladder where all but the first case are fragment shader
specific (but don't claim to be).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Brian Paul [Thu, 9 Jul 2015 22:58:04 +0000 (16:58 -0600)]
tgsi: whitespace fixes in tgsi_parse.c
Trivial.
Brian Paul [Thu, 9 Jul 2015 00:05:27 +0000 (18:05 -0600)]
gallium: fix comment typo in p_shader_tokens.h
Brian Paul [Wed, 8 Jul 2015 21:56:15 +0000 (15:56 -0600)]
gallium/docs: s/treaded/treated/ typo in tgsi.rst
Trivial.
Matt Turner [Wed, 8 Jul 2015 06:33:57 +0000 (23:33 -0700)]
util: Don't link to SHA1 library if shader-cache is disabled.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 8 Jul 2015 01:51:30 +0000 (18:51 -0700)]
i965: Set brw->batch.emit only #ifdef DEBUG.
It's only used inside #ifdef DEBUG. Cuts ~1.7k of .text, and more
importantly prevents a larger code size regression in the next commit
when the .used field is replaced and calculated on demand.
text data bss dec hex filename
4945468 195152 26192
5166812 4ed6dc i965_dri.so before
4943740 195152 26192
5165084 4ed01c i965_dri.so after
And surround the emit and total fields with #ifdef DEBUG to prevent
such mistakes from happening again.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Ben Widawsky [Thu, 9 Jul 2015 17:35:19 +0000 (10:35 -0700)]
i965/hsw: Implement end of batch workaround
This patch can cause an infinite recursion if the previous patch titled, "i965:
Track finished batch state" isn't present (backporters take notice).
v2: Sent out the wrong patch originally. This patches switches the order of
flushes, doing the generic flush before the CC_STATE, and the required
workaround flush afterwards
v3: Only perform workaround for render ring
Add text to the BATCH_RESERVE comments
v4 (By Ken): Rebase; update citation to mention PRM and Wa name; combine two
blocks.
http://otc-mesa-ci.jf.intel.com/job/bwidawsk/171/
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Christian König [Mon, 29 Jun 2015 08:19:36 +0000 (10:19 +0200)]
st/vdpau: fix mixer size checks
We need to check what the 3D pipe is able to handle for the mixer, not what
the decoder is able to decode. This fixes output of resolutions like 720x1280.
Signed-off-by: Christian König <christian.koenig@amd.com>
CC: mesa-stable@lists.freedesktop.org
Christian König [Fri, 29 May 2015 13:10:31 +0000 (15:10 +0200)]
vl: cleanup video buffer private when the decoder is destroyed
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=90728
Signed-off-by: Christian König <christian.koenig@amd.com>
CC: mesa-stable@lists.freedesktop.org
Samuel Pitoiset [Mon, 6 Jul 2015 21:34:23 +0000 (23:34 +0200)]
nv50: avoid segfault with enabled but unbound vertex attrib
Before validating vertex arrays we need to check if a VBO is present.
Checking if vb->buffer is not NULL fixes the issue.
Fixes the following piglit test:
gl-3.1-vao-broken-attrib
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Mon, 6 Jul 2015 20:06:08 +0000 (22:06 +0200)]
nvc0: fix wrong use of BLIT_SRC_Y_INT for 2D texture copy
According to nv50, this should be src->ms_y instead of src->ms_x. This
code is here since 2012, so it's probably a typo error which has never
been detected since a long time. I didn't do a full piglit run to check
if it fixes some other weird issues.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Wed, 8 Jul 2015 08:57:00 +0000 (01:57 -0700)]
nir: Fix comment above nir_convert_from_ssa() prototype.
Connor renamed the parameter, inverting the sense.
Update the comment accordingly.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Julien Isorce [Thu, 18 Jun 2015 05:53:52 +0000 (06:53 +0100)]
egl/dri2: load libglapi.0.dylib on osx
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90903
Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Julien Isorce [Thu, 2 Jul 2015 22:10:38 +0000 (23:10 +0100)]
egl: use unix defines on osx with clang
I also created an bug in Khronos 's bugzilla as you suggested:
https://www.khronos.org/bugzilla/show_bug.cgi?id=1356
I'll let you know if I get feedback from this bug or else where.
Patch with updated error messages:
[PATCH] eglplatform: treat __APPLE__ the same way as __unix__ to handle X11 types
CC eglapi.lo
./egldisplay.h:258:19: error: unknown type name 'Display'
_eglGetX11Display(Display *native_display, const EGLint *attrib_list);
eglapi.c:290:4: error: array size is negative
STATIC_ASSERT(sizeof(void*) == sizeof(nativeDisplay));
eglapi.c:291:25: warning: cast to 'void *' from smaller integer type
'EGLNativeDisplayType' (aka 'int') [-Wint-to-void-pointer-cast]
native_display_ptr = (void*) nativeDisplay;
eglapi.c:307:32: error: use of undeclared identifier 'Display'
dpy = _eglGetX11Display((Display*) native_display, attrib_list);
eglapi.c:776:35: error: use of undeclared identifier 'Window'
native_window = (void*) (* (Window*) native_window);
eglapi.c:847:35: error: use of undeclared identifier 'Pixmap'
native_pixmap = (void*) (* (Pixmap*) native_pixmap);
Bugzilla Mesa: https://bugs.freedesktop.org/show_bug.cgi?id=90249
Bugzilla Khronos: https://www.khronos.org/bugzilla/show_bug.cgi?id=1356
Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Julien Isorce [Tue, 30 Jun 2015 23:33:14 +0000 (00:33 +0100)]
darwin: Suppress type conversion warnings for GLhandleARB
This patch and its description are inspired from Jose Fonseca
explanations and suggestions.
With this patch the following logic applies and only if __APPLE__:
When building mesa, GLhandleARB is defined as unsigned long and
at some point casted to GLuint in gl fuction implementations.
These exact points are where these errors and warnings appear.
When building an application GLhandleARB is defined as void*.
Later when calling a gl function, for example glBindAttribLocationARB,
it will be dispatched to _mesa_BindAttribLocation. So internally
void* will be treated as unsigned long which has the same size.
So the same truncation happens when casting it to GLuint.
Same when GLhandleARB appears as return value.
For mesa it will be GLuint -> unsigned long.
For an application it will be GLuint -> unsigned long -> void*.
Note that the value will be preserved when casting back to GLuint.
When GLhandleARB appears as a pointer there are also separate
entry-points, i.e. _mesa_FuncNameARB. So the same logic can
be applied.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66346
Signed-off-by: Julien Isorce <julien.isorce@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Varad Gautam [Sat, 27 Jun 2015 06:02:26 +0000 (11:32 +0530)]
android: freedreno: add missing components to the build
Freedreno requires {a4xx,ir3}_SOURCES and NIR to build.
Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Chris Wilson [Fri, 1 May 2015 10:25:20 +0000 (11:25 +0100)]
i965: Move pipecontrol workaround bo to brw_pipe_control
With the exception of gen8, the sole user of the workaround bo are for
emitting pipe controls. Move it out of the purview of the batchbuffer
and into the pipecontrol.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Chris Wilson [Wed, 10 Jun 2015 07:28:13 +0000 (08:28 +0100)]
loader: Look for any version of currently linked libudev.so
Since there was an ABI break and linking twice against libudev.so.0 and
libudev.so.1 causes the application to quickly crash, we first check if
the application is currently linked against libudev before dlopening a
local handle. However for backwards/forwards compatability, we need to
inspect the application for current linkage against all known versions
first. Not doing so causes a crash when both libraries are present and
so mesa chooses libudev.so.1 but the application was linked against
libudev.so.0.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Emil Velikov:
I'm ever so slightly conserned that RTLD_NOLOAD is not part of the POSIX
standard, thus it's missing on some platforms (*BSD seems ok, while
Solaris, MacOS are not).
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Chris Wilson [Wed, 29 Apr 2015 12:32:38 +0000 (13:32 +0100)]
i965: Query whether we have kernel support for the TIMESTAMP register once
Move the query for the TIMESTAMP register from context init to the
screen, so that it is only queried once for all contexts.
On 32bit systems, some old kernels trigger a hw bug resulting in the
TIMESTAMP register being shifted and the low 32bits always zero. Detect
this by repeating the read a few times and check the register is
incrementing every 80ns as expected and not stuck on zero (as would be
the case with the buggy kernel/hw.).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Wed, 8 Jul 2015 03:05:45 +0000 (23:05 -0400)]
nvc0: turn sample counts off during blit
Fixes the following piglits:
occlusion_query_meta_fragments
occlusion_query_meta_no_fragments
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Timothy Arceri [Tue, 7 Jul 2015 23:20:40 +0000 (09:20 +1000)]
mesa: use implementation specified MAX_VERTEX_ATTRIBS rather than hardcoded value
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Thu, 2 Jul 2015 03:13:00 +0000 (20:13 -0700)]
i965/vs: Fix matNxM vertex attributes where M != 4.
Matrix vertex attributes have their columns padded out to vec4s, which
I was failing to account for. Scalar NIR expects them to be packed,
however.
Fixes 1256 dEQP tests on Broadwell.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Marek Olšák [Tue, 7 Jul 2015 16:28:31 +0000 (18:28 +0200)]
st/dri: don't set PIPE_BIND_SCANOUT for MSAA surfaces
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91231
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Tue, 7 Jul 2015 19:17:01 +0000 (13:17 -0600)]
gallium/hud: display percentages with % suffix
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Tue, 7 Jul 2015 15:15:59 +0000 (09:15 -0600)]
gallium/hud: add PIPE_DRIVER_QUERY_TYPE_MICROSECONDS for HUD
This allows drivers to report queries in units of microseconds and
have the HUD display "us" (microseconds), "ms" (milliseconds) or "s"
(seconds) on the graph.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Tue, 7 Jul 2015 15:13:02 +0000 (09:13 -0600)]
gallium/hud: replace byte units flag with pipe_driver_query_type
Instead of using a boolean 'is bytes' value, use the pipe_driver_query_type
enum type. This will let is add support for time values in the next patch.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Mon, 6 Jul 2015 21:28:59 +0000 (15:28 -0600)]
gallium/os: minor whitespace fixes in os_time.h
Trivial.
Francisco Jerez [Mon, 6 Jul 2015 15:55:26 +0000 (18:55 +0300)]
i965/gen4-5: Enable 16-wide dispatch on shaders with control flow.
This was probably disabled due to a combination of several bugs in the
generator code (fixed earlier in this series) and a misunderstanding
of the hardware spec. The documentation for most control flow
instructions mentions among other restrictions:
"Instruction compression is not allowed."
This however doesn't have any implications on 16 wide not being
supported, because none of the control flow instructions have
multi-register operands (control flow instructions are not compressed
on more recent hardware either, except maybe SNB's IF with inline
compare). In fact Gen4-5 had 16-wide control flow masks and stacks,
and the spec mentions in several places that control flow instructions
push and pop 16 channels worth of data -- Otherwise there doesn't seem
to be any indication that it shouldn't work.
Causes no piglit regressions, and gives the following shader-db
results on ILK:
total instructions in shared programs:
4711384 ->
4711384 (0.00%)
instructions in affected programs: 0 -> 0
helped: 0
HURT: 0
GAINED: 1215
LOST: 0
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Mon, 6 Jul 2015 16:11:54 +0000 (19:11 +0300)]
i965/gen4-5: Program the execution size correctly for DO/WHILE instructions.
From the hardware docs for the DO instruction:
"Execution size is ignored for this instruction."
My observation on ILK hardware contradicts the spec though, channels
over the execution size of a DO instruction won't enter the loop, and
channels over the execution size of a WHILE instruction will exit the
loop after the first iteration -- The latter is consistent with the
spec though, there's no claim about the execution size being ignored
for the WHILE instruction so it's not completely unexpected that it
has an influence on the evaluation of EMask.
The execute_size argument of brw_DO() shouldn't have any effect on
Gen6 and newer hardware. On Gen4-5 WHILE instructions inherit the
execution size from the matching DO, so this patch should fix them
too. The execution size of BREAK and CONT instructions was already
being set correctly.
Fixes some 50 piglit tests on Gen4-5 when forced to run shaders with
conditional and loop instructions 16-wide,
e.g. shaders/glsl-fs-continue-inside-do-while.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Mon, 6 Jul 2015 15:23:57 +0000 (18:23 +0300)]
i965/gen4-5: Set ENDIF dst and src0 fields to the null register.
The hardware docs don't mention explicitly what these fields should
be, but I've verified experimentally on ILK that using a GRF as
destination causes the register to be corrupted when the execution
size of an ENDIF instruction is higher than 8 -- and because the
destination we were using was g0, eventually a hang.
Fixes some 150 piglit tests on Gen4-5 when forced to run shaders with
if conditionals 16-wide, e.g. shaders/glsl-fs-sampler-numbering-3.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Michel Dänzer [Mon, 6 Jul 2015 08:23:07 +0000 (17:23 +0900)]
radeonsi: Use param export count from si_llvm_export_vs in si_shader_vs
This eliminates the error prone logic in si_shader_vs recalculating this
value.
It also fixes TGSI_SEMANTIC_CLIPDIST outputs incorrectly not being
counted for VS exports. They need to be counted because they are passed
to the pixel shader as parameters as well.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91193
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Matt Turner [Thu, 25 Jun 2015 23:57:20 +0000 (16:57 -0700)]
mesa: Convert some asserts into STATIC_ASSERT.
Reviewed-by: Chad Versace <chad.versace@intel.com>
Roland Scheidegger [Sat, 4 Jul 2015 01:03:33 +0000 (03:03 +0200)]
gallivm: fix lp_build_compare_ext
The expansion should always be to the same width as the input arguments
no matter what, since these functions should work with any bit width of
the arguments (the sext is a no-op on any sane simd architecture).
Thus, fix the caller expecting differently.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=91222
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Kenneth Graunke [Mon, 6 Jul 2015 18:04:19 +0000 (11:04 -0700)]
mesa: Add a MUST_CHECK macro for __attribute__((warn_unused_result)).
In the kernel, this is called __must_check; all our attribute macros in
Mesa appear to be uppercase, so I went with that.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Neil Roberts [Sat, 4 Jul 2015 21:40:59 +0000 (22:40 +0100)]
glsl: Make sure not to dereference NULL
In this bit of code point_five can be NULL if the expression is not a
constant. This fixes it to match the pattern of the rest of the chunk
of code so that it checks for NULLs.
Cc: Matt Turner <mattst88@gmail.com>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Neil Roberts [Sat, 4 Jul 2015 21:40:58 +0000 (22:40 +0100)]
glsl: Add missing check for whether an expression is an add operation
There is a piece of code that is trying to match expressions of the
form (mul (floor (add (abs x) 0.5) (sign x))). However the check for
the add expression wasn't checking whether it had the expected
operation. It looks like this was just an oversight because it doesn't
match the pattern for the rest of the code snippet. The existing line
to check whether add_expr!=NULL was added as part of a coverity fix in
3384179f.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91226
Cc: Matt Turner <mattst88@gmail.com>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Wed, 4 Mar 2015 23:46:57 +0000 (15:46 -0800)]
i965: Reserve more batch space to accomodate Gen6 perfmonitors.
Ben noticed that I said each PIPE_CONTROL was 4 DWords, but it's
actually 5 DWords on Gen6-7. We've been reserving insufficient space
for performance monitoring on Sandybridge, which means it would likely
break if you used that functionality. (Thankfully, no one does...)
Also, the existing number of 146 was the result of me flubbing up the
arithmetic: it should have actually been 140.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Neil Roberts [Fri, 3 Jul 2015 12:15:21 +0000 (13:15 +0100)]
i965/skl: Set the pulls bary bit in 3DSTATE_PS_EXTRA
On Gen9+ there is a new bit in 3DSTATE_PS_EXTRA that must be set if
the shader sends a message to the pixel interpolator. This fixes the
interpolateAt* tests on SKL, apart from interpolateatsample-nonconst
but that is not implemented anywhere so it's not a regression.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.6 10.5" <mesa-stable@lists.freedesktop.org>
Marek Olšák [Fri, 26 Jun 2015 17:01:04 +0000 (19:01 +0200)]
winsys/radeon: use os_wait_until_zero in radeon_bo_set_tiling
Marek Olšák [Sat, 27 Jun 2015 12:03:46 +0000 (14:03 +0200)]
radeonsi: don't flush an empty IB if the only thing we need is a fence
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 26 Jun 2015 22:05:26 +0000 (00:05 +0200)]
gallium/os: add conversion and wait functions for absolute timeouts
Absolute timeouts are used with the amdgpu kernel driver.
It also makes waiting for several variables and fences at the same time
easier (the timeout doesn't have to be recalculated after every wait call).
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 25 Jun 2015 18:39:34 +0000 (20:39 +0200)]
gallium/os: add os_wait_until_zero (v2)
This will be used by radeon and amdgpu winsyses.
Copied from the amdgpu winsys.
v2: use volatile and p_atomic_read
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 26 Jun 2015 17:01:23 +0000 (19:01 +0200)]
gallium/radeon: mark the gpu load thread stop trigger as volatile
Marek Olšák [Sat, 27 Jun 2015 11:57:06 +0000 (13:57 +0200)]
st/mesa: if a fence isn't returned, assume it's signalled
The reason might be that no commands have been submitted before the flush
and the GPU is idle.
Marek Olšák [Fri, 26 Jun 2015 14:34:31 +0000 (16:34 +0200)]
gallium: remove redundant pipe_context::fence_signalled
fence_finish(timeout=0) does the same thing
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 26 Jun 2015 14:28:53 +0000 (16:28 +0200)]
gallium: use fence_finish instead of fence_signalled in state trackers
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 26 Jun 2015 11:13:16 +0000 (13:13 +0200)]
gallium: handle fence_finish timeout in various drivers
I copied what fence_signalled does.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 26 Jun 2015 11:19:45 +0000 (13:19 +0200)]
gallium/docs: remove out-of-date document about D3D11 features
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 24 Jun 2015 09:58:50 +0000 (11:58 +0200)]
radeonsi: fix a hang with DrawTransformFeedback on 4 SE chips
Cc: 10.6 10.5 <mesa-stable@lists.freedesktop.org>
Acked-by: Christian König <christain.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Sat, 4 Jul 2015 11:53:22 +0000 (12:53 +0100)]
docs: add news item and link release notes for mesa 10.5.9
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 4 Jul 2015 11:48:39 +0000 (12:48 +0100)]
docs: Add sha256sums for the 10.5.9 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
4a0bd3dcff3c07965828e648e14d89314d262169)