mesa.git
6 years agomesa: fix incorrect type when allocating arrays
Andres Rodriguez [Wed, 7 Feb 2018 19:38:52 +0000 (14:38 -0500)]
mesa: fix incorrect type when allocating arrays

The array members are have type 'struct gl_buffer_object *'

Found by coverity.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
6 years agou_blit,u_simple_shaders: add shader to convert from xrbias format
Roland Scheidegger [Wed, 7 Feb 2018 04:18:17 +0000 (05:18 +0100)]
u_blit,u_simple_shaders: add shader to convert from xrbias format

We need this to handle some oddball dx10 format
(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM). What you can do with this
format is very limited, hence we don't want to add it as a gallium
format (we could not express the properties of this format as
ordinary format properties neither, so like all special formats
it would need specific code for handling it in any case).
While here, also nuke the array for different shaders for different
writemasks, as it was not actually used (always full masks are
passed in for generating shaders).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
6 years agou_simple_shaders: fix mask handling in util_make_fragment_tex_shader_writemask
Roland Scheidegger [Wed, 7 Feb 2018 04:03:42 +0000 (05:03 +0100)]
u_simple_shaders: fix mask handling in util_make_fragment_tex_shader_writemask

The writemask handling was busted, since writing defaults to output
meant they got overwritten by the tex sampling anyway. Albeit the
affected components were undefined, so maybe with some luck it
still would have worked with some drivers - if not could as well
kill it... (This would have affected u_blitter but not u_blit since
the latter always used xyzw mask.)

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agoautotools: Only build libmesa-st-tests-common.a for tests.
Bas Nieuwenhuizen [Fri, 2 Feb 2018 15:59:23 +0000 (16:59 +0100)]
autotools: Only build libmesa-st-tests-common.a for tests.

We don't need the library if we don't build tests, and building
it adds a dependency on gtest which adds a dependency on cxxabi.h.

Fixes: 6569b33b6e "mesa/st/tests: unify MockCodeLine* classes"
Reviewed-By: Gert Wollny <gw.fossdev@gmail.com>
6 years agoi965: add __DRI2_BLOB support and set cache functions
Tapani Pälli [Wed, 17 Jan 2018 09:43:59 +0000 (11:43 +0200)]
i965: add __DRI2_BLOB support and set cache functions

v2: adjust to change that moved cache from ctx to screen

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agodisk cache: add callback functionality
Tapani Pälli [Wed, 7 Feb 2018 06:13:00 +0000 (08:13 +0200)]
disk cache: add callback functionality

v2: add disk_cache_has_key, disk_cache_put_key support
    using blob cache (Nicolai, Jordan)

v3: rename set_cb as put_cb to match existing naming (Timothy)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agodisk cache: initialize cache path and index only when used
Tapani Pälli [Mon, 22 Jan 2018 09:55:06 +0000 (11:55 +0200)]
disk cache: initialize cache path and index only when used

This patch makes disk_cache initialize path and index lazily so
that we can utilize disk_cache without a path using callback
functionality introduced by next patch.

v2: unmap mmap and destroy queue only if index_mmap exists

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoglsl/tests: changes to test_disk_cache_create test
Tapani Pälli [Thu, 1 Feb 2018 07:08:52 +0000 (09:08 +0200)]
glsl/tests: changes to test_disk_cache_create test

Next patch will allow disk_cache instance to be created without
path set for it, modify some test cases that assume disk_cache
creation to fail with invalid path. Creation should succeed but
simple put/get test fail.

v2: leave tests as is but check that both cache struct exists
    and try simple put/get that should fail with invalid path set
    (Emil)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoglsl/tests: move utility functions in cache_test
Tapani Pälli [Tue, 30 Jan 2018 09:42:55 +0000 (11:42 +0200)]
glsl/tests: move utility functions in cache_test

Patch moves functions higher so that we can utilize them from
test_disk_cache_create which is modified by next patch.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoegl: add support for EGL_ANDROID_blob_cache
Tapani Pälli [Thu, 28 Dec 2017 08:51:11 +0000 (10:51 +0200)]
egl: add support for EGL_ANDROID_blob_cache

v2: cleanup, move callbacks to _egl_display struct (Emil Velikov)
    adapt to earlier ctx->screen changes

v3: remove useless checking, add _eglSetFuncName (Emil Velikov)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v2)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agodri: add interface for EGL_ANDROID_blob_cache extension
Tapani Pälli [Thu, 28 Dec 2017 07:27:24 +0000 (09:27 +0200)]
dri: add interface for EGL_ANDROID_blob_cache extension

v2: move from __DRIcontext to __DRIscreen (Emil Velikov)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoac/nir: use new pknorm_i16/u16 and pk_i16/u16 LLVM intrinsics
Samuel Pitoiset [Tue, 6 Feb 2018 21:06:11 +0000 (22:06 +0100)]
ac/nir: use new pknorm_i16/u16 and pk_i16/u16 LLVM intrinsics

Ported from RadeonSI.

Only one F1 2017 shader is affected, code size decreased
from 532 to 488 on both Polaris10 and Vega10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoac/nir: avoid loading unused VS input components
Samuel Pitoiset [Thu, 1 Feb 2018 10:35:06 +0000 (11:35 +0100)]
ac/nir: avoid loading unused VS input components

Polaris10:
Totals from affected shaders:
SGPRS: 122840 -> 120984 (-1.51 %)
VGPRS: 78812 -> 78440 (-0.47 %)
Spilled SGPRs: 177 -> 129 (-27.12 %)
Code Size: 2950028 -> 2941276 (-0.30 %) bytes
Max Waves: 17899 -> 17976 (0.43 %)

Vega10:
Totals from affected shaders:
SGPRS: 117144 -> 115776 (-1.17 %)
VGPRS: 77580 -> 77532 (-0.06 %)
Spilled SGPRs: 0 -> 152 (0.00 %)
Code Size: 3352656 -> 3347860 (-0.14 %) bytes
Max Waves: 19756 -> 19866 (0.56 %)

This increases SGPRs spilling a bit with Talos, but I have
some other ideas that might reduce it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoac/shader: scan vertex inputs usage mask
Samuel Pitoiset [Thu, 1 Feb 2018 10:32:32 +0000 (11:32 +0100)]
ac/shader: scan vertex inputs usage mask

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoi965: allocate a SGVS element when VertexID or InstanceID are read
Iago Toral Quiroga [Thu, 4 Jan 2018 02:55:13 +0000 (03:55 +0100)]
i965: allocate a SGVS element when VertexID or InstanceID are read

Although on gen8+ platforms we can in theory use 3DSTATE_VF_SGVS
to put these beyond the last vertex element it seems that we still
need to allocate the SVGS element, otherwise we have observed cases
where we end up reading garbage. Specifically, the CTS test mentioned
below was flaky with a fail rate of ~1% on some gen9+ platforms caused
by reading garbage for the gl_InstanceID value. The flakyness goes
away as soon as we start allocating the SVGS element.

v2:
  - Do this for gen8+, not just gen9+, and pull the boolean
    outside the #if block (Jason)

Fixes flaky test:
KHR-GL45.vertex_attrib_64bit.limits_test

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104335
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoglapi: fix check_table test for non-shared glapi with meson
Dylan Baker [Mon, 20 Nov 2017 22:55:13 +0000 (14:55 -0800)]
glapi: fix check_table test for non-shared glapi with meson

v2: - Add glapitable_h generated source to requirements

Fixes: 3218056e0eb3 ("meson: Build i965 and dri stack")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (v1)
6 years agoglapi: Don't search through subdirs from glapitable.h
Dylan Baker [Mon, 20 Nov 2017 22:54:30 +0000 (14:54 -0800)]
glapi: Don't search through subdirs from glapitable.h

Because meson won't put it in that folder.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agostate_tracker: Don't build st-renumerate-test without shared glapi
Dylan Baker [Mon, 20 Nov 2017 22:53:09 +0000 (14:53 -0800)]
state_tracker: Don't build st-renumerate-test without shared glapi

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoglapi: remove APPLE extensions from test
Dylan Baker [Mon, 20 Nov 2017 22:39:27 +0000 (14:39 -0800)]
glapi: remove APPLE extensions from test

Fixes: 7009955281260fbb ("mesa: Remove GL_APPLE_vertex_array_object stubs")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
6 years agoglapi/check_table: Remove 'extern "C"' block
Dylan Baker [Mon, 20 Nov 2017 18:05:25 +0000 (10:05 -0800)]
glapi/check_table: Remove 'extern "C"' block

Using 'extern "C"' around includes is always incorrect, as the header may
contain C++ symbols (as it does in this case), which means it cannot use
C linkage. In this case the header has a template in it, which obviously
cannot be linked with C linkage rules.

Fixes: a29ad2b421b75a1727b ("mesa/tests: Add tests for the generated dispatch table")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agomeson: fix test source name for static glapi
Dylan Baker [Wed, 8 Nov 2017 00:00:34 +0000 (16:00 -0800)]
meson: fix test source name for static glapi

fixes: 43a6e84927e3 ("meson: build mesa test.")
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoglapi: don't walk backwards for includes
Dylan Baker [Tue, 7 Nov 2017 17:40:06 +0000 (09:40 -0800)]
glapi: don't walk backwards for includes

Instead just set the proper -I flags and include it from a more standard
path. In this case we'll add -Isrc/mesa (which is common), and #include
main/foo.h.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agomesa: rename gl_vertex_array_object::_VertexAttrib -> _VertexArray
Brian Paul [Mon, 5 Feb 2018 16:33:58 +0000 (09:33 -0700)]
mesa: rename gl_vertex_array_object::_VertexAttrib -> _VertexArray

Since the type is gl_vertex_array.  Update comment to explain that
these arrays are only used by the VBO module.

Also rename some local variables in _mesa_update_vao_derived_arrays().

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
6 years agomesa: minor whitespace fixes, line wrapping in texcompress.c
Brian Paul [Tue, 6 Feb 2018 22:12:58 +0000 (15:12 -0700)]
mesa: minor whitespace fixes, line wrapping in texcompress.c

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
6 years agomesa: simplify _mesa_get_compressed_formats()
Brian Paul [Tue, 6 Feb 2018 16:55:13 +0000 (09:55 -0700)]
mesa: simplify _mesa_get_compressed_formats()

Instead of testing for formats==NULL everywhere, just point formats at
a dummy array which will be discarded.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
6 years agoutil: remove redundant check for the __clang__ macro
Vlad Golovkin [Tue, 6 Feb 2018 13:48:00 +0000 (06:48 -0700)]
util: remove redundant check for the __clang__ macro

Clang defines __GNUC__ macro, so one doesn't need to check __clang__
macro in this particular case.

v2: added comment as per Brian Paul's suggestion

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agost/mesa: use st_access_flags_to_transfer_flags() helper in more places
Brian Paul [Fri, 2 Feb 2018 16:21:44 +0000 (09:21 -0700)]
st/mesa: use st_access_flags_to_transfer_flags() helper in more places

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agost/mesa: refactor st_bufferobj_map_range()
Brian Paul [Fri, 2 Feb 2018 15:54:19 +0000 (08:54 -0700)]
st/mesa: refactor st_bufferobj_map_range()

Use a new helper function, st_access_flags_to_transfer_flags(), to
convert the GL_MAP_x flags to PIPE_TRANSFER_x flags.

We'll be able to use this function in a couple other places.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agost/mesa: refactor bufferobj_data()
Brian Paul [Fri, 2 Feb 2018 15:38:50 +0000 (08:38 -0700)]
st/mesa: refactor bufferobj_data()

Split out some of the code into three new helper functions:
buffer_target_to_bind_flags(), storage_flags_to_buffer_flags(),
buffer_usage() to make the code more managable.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradv: run nir_opt_shrink_load
Samuel Pitoiset [Mon, 29 Jan 2018 16:19:18 +0000 (17:19 +0100)]
radv: run nir_opt_shrink_load

LLVM can't shrink loads.

Polaris10:
Totals from affected shaders:
SGPRS: 62528 -> 59955 (-4.11 %)
VGPRS: 44708 -> 44616 (-0.21 %)
Spilled SGPRs: 16 -> 8 (-50.00 %)
Code Size: 1355504 -> 1355172 (-0.02 %) bytes
Max Waves: 11710 -> 11670 (-0.34 %)

Vega10:
Totals from affected shaders:
SGPRS: 51448 -> 50371 (-2.09 %)
VGPRS: 39140 -> 39048 (-0.24 %)
Spilled SGPRs: 16 -> 16 (0.00 %)
Code Size: 1307188 -> 1304296 (-0.22 %) bytes
Max Waves: 11312 -> 11292 (-0.18 %)

This reduces SGPRs spilling in MadMax, and it also reduces
number of SGPRs in DOW3 and F12017. The number of waves slightly
decreases in F1 but I don't see any performance changes after
benchmarking it. Talos and Serious Sam are not affected because
they don't use any push constants.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agonir: add nir_opt_shrink_load pass
Samuel Pitoiset [Mon, 29 Jan 2018 16:19:00 +0000 (17:19 +0100)]
nir: add nir_opt_shrink_load pass

This is a very simple pass that just shrinks load_push_constant
intrinsics when some components are unused. For now, it can just
shrink vec4 to vec3, vec3 to vec2 and so on.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradeonsi/nir: add nir support for compiling compute shaders
Timothy Arceri [Thu, 1 Feb 2018 23:09:47 +0000 (10:09 +1100)]
radeonsi/nir: add nir support for compiling compute shaders

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoac/radeonsi: add num_work_groups to the abi
Timothy Arceri [Fri, 2 Feb 2018 03:33:06 +0000 (14:33 +1100)]
ac/radeonsi: add num_work_groups to the abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoac: implement nir_intrinsic_shader_clock
Timothy Arceri [Fri, 2 Feb 2018 02:55:25 +0000 (13:55 +1100)]
ac: implement nir_intrinsic_shader_clock

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoac/radeonsi: create ac_build_shader_clock() helper
Timothy Arceri [Fri, 2 Feb 2018 02:54:48 +0000 (13:54 +1100)]
ac/radeonsi: create ac_build_shader_clock() helper

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoac/radeonsi: add load_local_group_size() to the abi
Timothy Arceri [Fri, 2 Feb 2018 02:14:41 +0000 (13:14 +1100)]
ac/radeonsi: add load_local_group_size() to the abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradeonsi: add get_block_size() helper
Timothy Arceri [Fri, 2 Feb 2018 02:06:02 +0000 (13:06 +1100)]
radeonsi: add get_block_size() helper

This will be reused by the nir backend in a later patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoac: don't call emit_outputs() for compute
Timothy Arceri [Thu, 1 Feb 2018 23:24:16 +0000 (10:24 +1100)]
ac: don't call emit_outputs() for compute

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoac/radeonsi: add local_invocation_ids to the abi
Timothy Arceri [Thu, 1 Feb 2018 23:23:46 +0000 (10:23 +1100)]
ac/radeonsi: add local_invocation_ids to the abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoac/radeonsi: add workgroup_ids to the abi
Timothy Arceri [Thu, 1 Feb 2018 23:08:52 +0000 (10:08 +1100)]
ac/radeonsi: add workgroup_ids to the abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradeonsi/nir: gather some compute info in si_nir_scan_shader()
Timothy Arceri [Thu, 1 Feb 2018 23:07:47 +0000 (10:07 +1100)]
radeonsi/nir: gather some compute info in si_nir_scan_shader()

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradeonsi/nir: always set input_usage_mask as using all components
Timothy Arceri [Mon, 5 Feb 2018 22:52:47 +0000 (09:52 +1100)]
radeonsi/nir: always set input_usage_mask as using all components

This fixes a regression for now, in the future we should gather
the used components properly.

V2: just set for VS and correctly handle doubles

Fixes: be973ed21f6e "radeonsi: load the right number of components for VS inputs and TBOs"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoi965: remove unused brw_nir_lower_cs_shared()
Timothy Arceri [Sun, 4 Feb 2018 22:15:52 +0000 (09:15 +1100)]
i965: remove unused brw_nir_lower_cs_shared()

This has been unused since 8761a04d0d93.

Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
6 years agovulkan/wsi: Fix OOM behavior with prime images.
Bas Nieuwenhuizen [Tue, 6 Feb 2018 14:43:36 +0000 (15:43 +0100)]
vulkan/wsi: Fix OOM behavior with prime images.

Fixes: d50937f137 "vulkan/wsi: Implement prime in a completely generic way"
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoac/nir: fix GS load input type.
Bas Nieuwenhuizen [Tue, 6 Feb 2018 11:52:43 +0000 (12:52 +0100)]
ac/nir: fix GS load input type.

Fixes: df1d5174fc "ac/nir: replace SI.buffer.load.dword with amdgcn.buffer.load"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agomesa: Factor out _mesa_disable_vertex_array_attrib.
Mathias Fröhlich [Sat, 3 Feb 2018 19:25:39 +0000 (20:25 +0100)]
mesa: Factor out _mesa_disable_vertex_array_attrib.

And use it in the enable code path.
Move _mesa_update_attribute_map_mode into its only remaining file.

Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agovbo: Move vbo_rebase into its only caller module tnl.
Mathias Fröhlich [Sat, 16 Dec 2017 09:57:47 +0000 (10:57 +0100)]
vbo: Move vbo_rebase into its only caller module tnl.

Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agomesa: Use atomics for buffer objects reference counts.
Mathias Fröhlich [Sat, 3 Feb 2018 14:06:16 +0000 (15:06 +0100)]
mesa: Use atomics for buffer objects reference counts.

The mutex is currently used for reference counting and updating
the minmax index cache.
The change uses atomics directly for reference counting and
the mutex for the minmax cache.
This is safe since the reference count is not modified beside
in _mesa_reference_buffer_object where atomics aim to be used.
While using the minmax cache, the calling code holds a reference
to the buffer object. Thus unreferencing or even referencing the
buffer object does not need to be serialized with accessing
the minmax cache.
The change reduces the time _mesa_reference_buffer_object_ takes
by about a factor of two when looking at perf results for some
of my favorite use cases.

Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agor600: fixup sparse color exports.
Dave Airlie [Mon, 5 Feb 2018 04:55:07 +0000 (14:55 +1000)]
r600: fixup sparse color exports.

If we have gaps in the shader mask we have to have 0x1 in them
according to a comment in radeonsi, and this is required to fix
the test at least on cayman.

We also need to record the highest one written to write to the
ps exports reg.

This fixes:
KHR-GL45.enhanced_layouts.fragment_data_location_api

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600: work out target mask at framebuffer bind.
Dave Airlie [Mon, 5 Feb 2018 03:54:23 +0000 (13:54 +1000)]
r600: work out target mask at framebuffer bind.

If we only get 1,2,3,6 framebuffers we want a sparse target mask.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600: work out shader export mask at shader build time (v1.1)
Dave Airlie [Mon, 5 Feb 2018 03:46:23 +0000 (13:46 +1000)]
r600: work out shader export mask at shader build time (v1.1)

Since enhanced layouts allows setting specific MRT outputs, we
can get sparse outputs, so we have to calculate the shader
mask earlier.

v1.1: update checks for state update (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600: fix xfb stream check.
Dave Airlie [Mon, 5 Feb 2018 03:09:57 +0000 (13:09 +1000)]
r600: fix xfb stream check.

This fixes:
KHR-GL45.enhanced_layouts.xfb_vertex_streams

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600/compute: add render cond support.
Dave Airlie [Sun, 4 Feb 2018 23:21:27 +0000 (09:21 +1000)]
r600/compute: add render cond support.

Set render cond and emit atom.

Fixes:
KHR-GL45.compute_shader.conditional-dispatching

Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600: fix not-very indirect compute
Dave Airlie [Sun, 4 Feb 2018 23:07:54 +0000 (09:07 +1000)]
r600: fix not-very indirect compute

We need to get the grid sizes earlier to fill in to the const
buffer.

Fixes:
KHR-GL45.compute_shader.built-in-variables
and
KHR-GL45.compute_shader.dispatch-indirect

Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600: overhaul buffer resource query.
Dave Airlie [Sun, 4 Feb 2018 22:42:52 +0000 (08:42 +1000)]
r600: overhaul buffer resource query.

This cleans up and fixes the previous fix even more.

Buffers from textures start at max const,
buffers from buffers/images come in from the 168 offset.

This fixes a bunch of:
KHR-GL45.shader_storage_buffer_object*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600/eg: fix buffer sizing.
Dave Airlie [Sun, 4 Feb 2018 20:31:48 +0000 (06:31 +1000)]
r600/eg: fix buffer sizing.

For buffers we want the size in bytes,
For images we want it in elements.

This fixes:
KHR-GL45.shader_storage_buffer_object.advanced-unsizedArrayLength-cs-std430-vec-pad

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600/images: set offset for compute shaders with number of declared samplers
Dave Airlie [Fri, 2 Feb 2018 07:07:20 +0000 (17:07 +1000)]
r600/images: set offset for compute shaders with number of declared samplers

for frag shaders we get a value in the key, I expect I need
to make compute work better

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600/compute: only mark buffer/image state dirty for fragment shaders
Dave Airlie [Mon, 5 Feb 2018 00:14:19 +0000 (10:14 +1000)]
r600/compute: only mark buffer/image state dirty for fragment shaders

The compute emission path always emits this currently, and emitting
it on the fragment path breaks the blitter.

This fixes gpu hangs in KHR-GL45.compute_shader.resource-texture

Reviewed-by: Roland Scheidegger <sorland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600/atomic: fix ATOMCAS instruction.
Dave Airlie [Mon, 5 Feb 2018 06:46:06 +0000 (16:46 +1000)]
r600/atomic: fix ATOMCAS instruction.

This has 4 srcs.

This fixes:
KHR-GL45.shader_atomic_counter_ops_tests.ShaderAtomicCounterOpsExchangeTestCase

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600/sb/cayman: fix indirect ubo access on cayman
Dave Airlie [Mon, 5 Feb 2018 06:04:18 +0000 (16:04 +1000)]
r600/sb/cayman: fix indirect ubo access on cayman

With sb enabled on cayman, this was overwriting the proper
cf index value with random ones if the dst gpr was 2 or 3,
only save the value for a MOVA instruction.

Fixes:
KHR-GL45.gpu_shader5.uniform_blocks_array_indexing
(on cayman with sb)

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agor600/eg: use texture target to pick array size not view target (v2)
Dave Airlie [Fri, 2 Feb 2018 05:17:57 +0000 (15:17 +1000)]
r600/eg: use texture target to pick array size not view target (v2)

This fixes a few CTS cases in :
KHR-GL45.texture_view.view_sampling

some multisample cases are still broken, but not sure this is
the same problem.

v2: fix more cases

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: don't support tc-compat on multisample d32s8 at all.
Dave Airlie [Tue, 6 Feb 2018 19:37:48 +0000 (19:37 +0000)]
radv: don't support tc-compat on multisample d32s8 at all.

RX550 fails
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_2

So increase the range of the workaround.

Fixes: f4c534ef6 (radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agowinsys/amdgpu: allow non page-aligned size bo creation from pointer
Michal Navratil [Sun, 4 Feb 2018 19:24:02 +0000 (20:24 +0100)]
winsys/amdgpu: allow non page-aligned size bo creation from pointer

Fix INVALID_OPERATION caused by BufferData with target
EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD when the buffer size is
not page aligned.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 17.3 18.0 <mesa-stable@lists.freedesktop.org>
6 years agomeson: ensure xmlpool/options.h is generated for libgallium
Jon Turney [Mon, 5 Feb 2018 21:11:12 +0000 (21:11 +0000)]
meson: ensure xmlpool/options.h is generated for libgallium

In file included from ../src/gallium/targets/dri/target.c:1:
In file included from ../src/gallium/auxiliary/target-helpers/drm_helper.h:8:
../src/util/xmlpool.h:103:10: fatal error: 'xmlpool/options.h' file not found

See also 26bde1e3.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
6 years agovbo: provide 64bits support to print_draw_arrays
Andres Gomez [Sun, 28 Jan 2018 23:35:17 +0000 (01:35 +0200)]
vbo: provide 64bits support to print_draw_arrays

Cc: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
6 years agovbo: take into account the size when printing VAO elements
Andres Gomez [Sun, 28 Jan 2018 23:35:16 +0000 (01:35 +0200)]
vbo: take into account the size when printing VAO elements

When using print_draw_arrays for debugging, we were printing an "n"
amount of vertex but that meant not to print all the size in the "n"
vertex, depending on the stride used.

Now we print the whole size in the "n" vertex.

Cc: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
6 years agovbo: print first element of the VAO when the binding stride is 0
Andres Gomez [Sun, 28 Jan 2018 23:35:15 +0000 (01:35 +0200)]
vbo: print first element of the VAO when the binding stride is 0

Cc: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
6 years agoanv/device: initialize the list of enabled extensions properly
Iago Toral Quiroga [Mon, 5 Feb 2018 08:49:54 +0000 (09:49 +0100)]
anv/device: initialize the list of enabled extensions properly

The loop goes through the list of enabled extensions marking them as
enabled in the list, but this relies on every other extension being
initialized to false by default.

This bug would make us, for example, advertise certain device extension
entry points as available even when the corresponding extensions had
not been enabled.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: abc62282b5c "anv: Add a per-device table of enabled extensions"
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
6 years agospirv: split constant initializers on in/out structs
Iago Toral Quiroga [Tue, 23 Jan 2018 11:20:16 +0000 (12:20 +0100)]
spirv: split constant initializers on in/out structs

The SPIR-V parser splits in/out struct variables and creates
a separate variable for each first-level member of the struct.
When the struct variable has an initializer this means that we also
need to split the initializer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoi965/nir: do int64 lowering before optimization
Iago Toral Quiroga [Fri, 1 Dec 2017 12:46:23 +0000 (13:46 +0100)]
i965/nir: do int64 lowering before optimization

Otherwise loop unrolling will fail to see the actual cost of
the unrolling operations when the loop body contains 64-bit integer
instructions, and very specially when the divmod64 lowering applies,
since its lowering is quite expensive.

Without this change, some in-development CTS tests for int64
get stuck forever trying to register allocate a shader with
over 50K SSA values. The large number of SSA values is the result
of NIR first unrolling multiple seemingly simple loops that involve
int64 instructions, only to then lower these instructions to produce
a massive pile of code (due to the divmod64 lowering in the unrolled
instructions).

With this change, loop unrolling will see the loops with the int64
code already lowered and will realize that it is too expensive to
unroll.

v2: Run nir_algebraic first so we can hopefully get rid of some of
    the int64 instructions before we even attempt to lower them.

Reviewed-by: Matt Turner <mattst88@gmail.com>
6 years agomesa: add OES_EGL_image_external_essl3 support
Ilia Mirkin [Fri, 2 Feb 2018 05:47:54 +0000 (07:47 +0200)]
mesa: add OES_EGL_image_external_essl3 support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agor600/fp64: Fix build.
Vinson Lee [Mon, 5 Feb 2018 23:24:45 +0000 (23:24 +0000)]
r600/fp64: Fix build.

  CC       r600_shader.lo
r600_shader.c: In function ‘egcm_int_to_double’:
r600_shader.c:4543:12: error: ‘ctx’ is a pointer; did you mean to use ‘->’?
     if (ctx.bc->chip_class == CAYMAN)
            ^
            ->

Fixes: 35b430157776 ("r600/fp64: fix integer->double conversion")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agor600/fp64: fix integer->double conversion
Dave Airlie [Mon, 29 Jan 2018 00:55:15 +0000 (10:55 +1000)]
r600/fp64: fix integer->double conversion

Doing a straight uint/int->fp32->fp64 conversion causes
some precision issues, Roland suggested splitting the
integer into two portions and doing two separate
int->fp32->fp64 conversions then adding the results.

This passes the tests in CTS and piglit.

[airlied: fix cypress conversion opcodes]
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agoac/nir: remove emission of nir_op_fdiv
Samuel Pitoiset [Mon, 5 Feb 2018 20:37:05 +0000 (21:37 +0100)]
ac/nir: remove emission of nir_op_fdiv

RadeonSI and RADV lower fdiv.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agotravis: add macOS meson build
Jon Turney [Tue, 16 Jan 2018 17:51:53 +0000 (17:51 +0000)]
travis: add macOS meson build

v2: Simplify set of options now we have better defaults

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agomeson: osx ld doesn't support --build-id
Jon Turney [Sun, 3 Dec 2017 21:58:12 +0000 (21:58 +0000)]
meson: osx ld doesn't support --build-id

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agomeson: build src/glx/apple
Jon Turney [Sat, 2 Dec 2017 17:13:39 +0000 (17:13 +0000)]
meson: build src/glx/apple

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agomeson: set apple glx defines
Dylan Baker [Sat, 28 Oct 2017 04:08:07 +0000 (21:08 -0700)]
meson: set apple glx defines

Reviewed-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agomeson: better defaults for osx, windows and cygwin
Jon Turney [Fri, 2 Feb 2018 22:25:48 +0000 (22:25 +0000)]
meson: better defaults for osx, windows and cygwin

set suitable defaults for 'dri-drivers', 'gallium-drivers', 'vulkan-drivers'
and 'platforms' options for osx, windows and cygwin, adding cygwin where
appropriate.

v2: error() for unknown OS

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agoi965: Move mistakenly placed line
Matt Turner [Wed, 31 Jan 2018 19:09:36 +0000 (11:09 -0800)]
i965: Move mistakenly placed line

Ken called this out in review, but it seems I forgot to make the change.
I noticed that the control flow annotations in the fragment shader
disassembly of tests/shaders/glsl-fs-loop-continue.shader_test were not
correct, and moving this line to the correct place fixes it.

6 years agoglsl/linker: check same name is not used in block and outside
Juan A. Suarez Romero [Mon, 5 Feb 2018 16:38:39 +0000 (17:38 +0100)]
glsl/linker: check same name is not used in block and outside

According with OpenGL GLSL 3.20 spec, section 4.3.9:

  "It is a link-time error if any particular shader interface
   contains:
     - two different blocks, each having no instance name, and each
       having a member of the same name, or
     - a variable outside a block, and a block with no instance name,
       where the variable has the same name as a member in the block."

This fixes a previous commit 9b894c8 ("glsl/linker: link-error using the
same name in unnamed block and outside") that covered this case, but
did not take in account that precision qualifiers are ignored when
comparing blocks with no instance name.

With this commit, the original tests
KHR-GL*.shaders.uniform_block.common.name_matching keep fixed, and also
dEQP-GLES31.functional.shaders.linkage.uniform.block.differing_precision
regression is fixed, which was broken by previous commit.

v2: use helper varibles (Matteo Bruni)

Fixes: 9b894c8 ("glsl/linker: link-error using the same name in unnamed block and outside")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104668
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104777
CC: Mark Janes <mark.a.janes@intel.com>
CC: "18.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Matteo Bruni <matteo.mystral@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
6 years agomesa: enable ASTC format for CompressedTexSubImage3D
Juan A. Suarez Romero [Mon, 5 Feb 2018 16:00:11 +0000 (17:00 +0100)]
mesa: enable ASTC format for CompressedTexSubImage3D

If extensions GL_KHR_texture_compression_astc_hdr or
GL_KHR_texture_compression_astc_sliced_3d are implemented then ASTC
format are supported in CompressedTex*Îmage3D.

Fixes KHR-GLES2.texture_3d.* with this format.

CC: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
6 years agoutil/build-id: Fix address comparison for binaries with LOAD vaddr > 0
Stephan Gerhold [Wed, 24 Jan 2018 14:13:24 +0000 (15:13 +0100)]
util/build-id: Fix address comparison for binaries with LOAD vaddr > 0

build_id_find_nhdr_for_addr() fails to find the build-id if the first LOAD
segment has a virtual address other than 0x0.

For most shared libraries, the first LOAD segment has vaddr=0x0:

    Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
    LOAD           0x000000 0x00000000 0x00000000 0x2d2e26 0x2d2e26 R E 0x1000
    LOAD           0x2d2e54 0x002d3e54 0x002d3e54 0x2e248 0x2f148 RW  0x1000

However, compiling the Intel Vulkan driver as 32-bit binary on Android produces
the following ELF header with vaddr=0x8000 instead:

    Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
    PHDR           0x000034 0x00008034 0x00008034 0x00100 0x00100 R   0x4
    LOAD           0x000000 0x00008000 0x00008000 0x224a04 0x224a04 R E 0x1000
    LOAD           0x225710 0x0022e710 0x0022e710 0x25988 0x27364 RW  0x1000

build_id_find_nhdr_callback() compares the address of dli_fbase from dladdr()
and dlpi_addr from dl_iterate_phdr(). With vaddr > 0, these point to a
different memory address, e.g.:

    dli_fbase=0xd8395000 (offset 0x8000)
    dlpi_addr=0xd838d000

At least on glibc and bionic (Android) dli_fbase refers to the address where
the shared object is mapped into the process space, whereas dlpi_addr is just
the base address for the vaddrs declared in the ELF header.

To compare them correctly, we need to calculate the start of the mapping
by adding the vaddr of the first LOAD segment to the base address.

Note: musl users will need the following patch.
https://git.musl-libc.org/cgit/musl/commit/?id=b3ae7beabb9f0c219bb8a8b63567a01c6530c1ac

Cc: Chad Versace <chadversary@chromium.org>
Cc: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104642
Fixes: 5c98d38 "util: Query build-id by symbol address, not library name"
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agoradeonsi: enable vcn encode for HEVC main
Boyuan Zhang [Thu, 25 Jan 2018 20:06:35 +0000 (15:06 -0500)]
radeonsi: enable vcn encode for HEVC main

Enable vcn encode for HEVC main profile on Raven.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: implement HEVC encode functions
Boyuan Zhang [Thu, 1 Feb 2018 21:25:44 +0000 (16:25 -0500)]
st/va: implement HEVC encode functions

Implement HEVC encode functions based on VAAPI HEVC encode interface.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add HEVC encode functions
Boyuan Zhang [Thu, 1 Feb 2018 21:20:16 +0000 (16:20 -0500)]
st/va: add HEVC encode functions

Add a separate file for HEVC encode functions.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: enable dual instances encode only for H264
Boyuan Zhang [Thu, 25 Jan 2018 19:32:04 +0000 (14:32 -0500)]
st/va: enable dual instances encode only for H264

Logics that related to dual instances encode should only be done for
H264, not other codecs.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add entrypoint check for HEVC
Boyuan Zhang [Thu, 25 Jan 2018 19:21:13 +0000 (14:21 -0500)]
st/va: add entrypoint check for HEVC

Add entrypoint check for HEVC to differentiate decode and encode jobs.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add HEVC picture desc
Boyuan Zhang [Thu, 25 Jan 2018 19:18:09 +0000 (14:18 -0500)]
st/va: add HEVC picture desc

Add HEVC picture desc, and add codec check when creating and destroying
context.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: move H264 enc functions into separate file
Boyuan Zhang [Thu, 1 Feb 2018 20:47:10 +0000 (15:47 -0500)]
st/va: move H264 enc functions into separate file

Move all H264 encode related functions into separate file. Similar to
VAAPI decode side, there will be separate file for each codec on encode
side as well.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add header implementations for HEVC
Boyuan Zhang [Thu, 1 Feb 2018 20:29:30 +0000 (15:29 -0500)]
radeon/vcn: add header implementations for HEVC

Implement encoding of sps, pps, vps, aud, and slice headers for HEVC
based on HEVC specs.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add ib implementations for HEVC
Boyuan Zhang [Thu, 25 Jan 2018 16:25:20 +0000 (11:25 -0500)]
radeon/vcn: add ib implementations for HEVC

Implement required ibs for vcn HEVC encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: support picture parameters for HEVC
Boyuan Zhang [Thu, 1 Feb 2018 20:23:49 +0000 (15:23 -0500)]
radeon/vcn: support picture parameters for HEVC

Pass pipe_picture_desc instead of pipe_h264_enc_picture_desc so that
it can be used for different codecs. Add functions to handle picture
parameters that will be used for HEVC encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add vcn encode interface for HEVC
Boyuan Zhang [Thu, 1 Feb 2018 20:05:17 +0000 (15:05 -0500)]
radeon/vcn: add vcn encode interface for HEVC

Add vcn encode interface for HEVC, and rename radeon_enc_h264_enc_pic
to radeon_enc_pic since radeon_enc_pic is used by both H264 and HEVC.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agovl: add parameters for HEVC encode
Boyuan Zhang [Thu, 1 Feb 2018 19:57:37 +0000 (14:57 -0500)]
vl: add parameters for HEVC encode

Add HEVC encode interface

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agobroadcom/vc5: Ignore samplers for finding uniform offsets.
Eric Anholt [Mon, 5 Feb 2018 12:58:06 +0000 (12:58 +0000)]
broadcom/vc5: Ignore samplers for finding uniform offsets.

Fixes:
KHR-GLES3.shaders.struct.uniform.sampler_array_fragment
KHR-GLES3.shaders.struct.uniform.sampler_array_vertex
KHR-GLES3.shaders.struct.uniform.sampler_nested_fragment
KHR-GLES3.shaders.struct.uniform.sampler_nested_vertex

6 years agobroadcom/vc5: Fix non-mipfiltered sampling.
Eric Anholt [Mon, 5 Feb 2018 11:06:59 +0000 (11:06 +0000)]
broadcom/vc5: Fix non-mipfiltered sampling.

We need to clamp the LOD to 0 if mip filtering is disabled.  This is part
of fixing KHR-GLES3.shaders.struct.uniform.sampler_array_fragment.

6 years agobroadcom/vc5: Fix "hardwrae" typo in a field name in XML.
Eric Anholt [Mon, 5 Feb 2018 10:11:30 +0000 (10:11 +0000)]
broadcom/vc5: Fix "hardwrae" typo in a field name in XML.

6 years agoac/nir: fix a crash in load_gs_input() on pre-GFX9 chips
Samuel Pitoiset [Fri, 2 Feb 2018 17:56:39 +0000 (18:56 +0100)]
ac/nir: fix a crash in load_gs_input() on pre-GFX9 chips

Fixes: df1d5174fcc ("ac/nir: replace SI.buffer.load.dword with amdgcn.buffer.load")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agobroadcom/vc5: Try to merge more than 2 QPU instructions together.
Eric Anholt [Sun, 4 Feb 2018 21:37:22 +0000 (21:37 +0000)]
broadcom/vc5: Try to merge more than 2 QPU instructions together.

Obviously it would be good to have an ADD and a MUL and a signal together,
but we can even potentially have multiple signals merged, as well.

total instructions in shared programs: 100423 -> 97874 (-2.54%)
instructions in affected programs:     78812 -> 76263 (-3.23%)