David Malcolm [Mon, 15 Sep 2014 16:14:15 +0000 (16:14 +0000)]
Instruction attributes take an rtx_insn *
gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise. Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *. Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn". Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.
* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun". Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks. Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0". Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func): Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.
From-SVN: r215271
David Malcolm [Mon, 15 Sep 2014 15:57:31 +0000 (15:57 +0000)]
The various TARGET_ASM_..._MAX_SKIP hooks take an insn
gcc/ChangeLog:
* config/rs6000/rs6000.c (rs6000_loop_align_max_skip): Strengthen
param "label" from rtx to rtx_insn *.
* config/rx/rx.c (rx_max_skip_for_label): Likewise for param "lab"
and local "op".
* doc/tm.texi (TARGET_ASM_JUMP_ALIGN_MAX_SKIP): Autogenerated changes.
(TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP): Likewise.
(TARGET_ASM_LOOP_ALIGN_MAX_SKIP): Likewise.
(TARGET_ASM_LABEL_ALIGN_MAX_SKIP): Likewise.
* final.c (default_label_align_after_barrier_max_skip): Strengthen
param from rtx to rtx_insn *.
(default_loop_align_max_skip): Likewise.
(default_label_align_max_skip): Likewise.
(default_jump_align_max_skip): Likewise.
* target.def (label_align_after_barrier_max_skip): Likewise.
(loop_align_max_skip): Likewise.
(label_align_max_skip): Likewise.
(jump_align_max_skip): Likewise.
* targhooks.h (default_label_align_after_barrier_max_skip):
Likewise.
(default_loop_align_max_skip): Likewise.
(default_label_align_max_skip): Likewise.
(default_jump_align_max_skip): Likewise.
From-SVN: r215270
David Malcolm [Mon, 15 Sep 2014 15:49:09 +0000 (15:49 +0000)]
The TARGET_CAN_FOLLOW_JUMP hook takes insns
gcc/ChangeLog:
* config/arc/arc.c (arc_can_follow_jump): Strengthen both params
from const_rtx to const rtx_insn *. Update union members from rtx
to rtx_insn *.
* doc/tm.texi (TARGET_CAN_FOLLOW_JUMP): Autogenerated change.
* hooks.c (hook_bool_const_rtx_const_rtx_true): Rename to...
(hook_bool_const_rtx_insn_const_rtx_insn_true): ...this, and
strengthen both params from const_rtx to const rtx_insn *.
* hooks.h (hook_bool_const_rtx_const_rtx_true): Likewise.
(hook_bool_const_rtx_insn_const_rtx_insn_true): Likewise.
* reorg.c (follow_jumps): Strengthen param "jump" from rtx to
rtx_insn *.
* target.def (can_follow_jump): Strengthen both params from
const_rtx to const rtx_insn *, and update default implementation
from hook_bool_const_rtx_const_rtx_true to
hook_bool_const_rtx_insn_const_rtx_insn_true.
From-SVN: r215269
David Malcolm [Mon, 15 Sep 2014 15:42:57 +0000 (15:42 +0000)]
deps_start_bb takes an insn
gcc/ChangeLog:
* sched-deps.c (deps_start_bb): Strengthen param "head" and local
"insn" from rtx to rtx_insn *.
* sched-int.h (deps_start_bb): Likewise for 2nd param.
From-SVN: r215268
Andreas Krebbel [Mon, 15 Sep 2014 13:28:32 +0000 (13:28 +0000)]
longlong.h: Add __udiv_w_sdiv prototype.
2014-09-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* longlong.h: Add __udiv_w_sdiv prototype.
From-SVN: r215266
Alexander Ivchenko [Mon, 15 Sep 2014 11:36:54 +0000 (11:36 +0000)]
AVX-512. Extend vcvtps2ph insn patterns.
gcc/
* config/i386/sse.md
(define_insn "vcvtph2ps<mask_name>"): Add masking.
(define_insn "*vcvtph2ps_load<mask_name>"): Ditto.
(define_insn "vcvtph2ps256<mask_name>"): Ditto.
(define_expand "vcvtps2ph_mask"): New.
(define_insn "*vcvtps2ph<mask_name>"): Add masking.
(define_insn "*vcvtps2ph_store<mask_name>"): Ditto.
(define_insn "vcvtps2ph256<mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215263
Alexander Ivchenko [Mon, 15 Sep 2014 11:35:29 +0000 (11:35 +0000)]
AVX-512. Extend ashrv insn patterns.
gcc/
* config/i386/sse.md (define_mode_iterator VI248_AVX512BW_AVX512VL):
New.
(define_mode_iterator VI24_AVX512BW_1): Ditto.
(define_insn "<mask_codefor>ashr<mode>3<mask_name>"): Ditto.
(define_insn "<mask_codefor>ashrv2di3<mask_name>"): Ditto.
(define_insn "ashr<VI248_AVX512BW_AVX512VL:mode>3<mask_name>"): Enable
also for TARGET_AVX512VL.
(define_expand "ashrv2di3"): Update to enable TARGET_AVX512VL.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215262
Jonathan Wakely [Mon, 15 Sep 2014 10:57:51 +0000 (11:57 +0100)]
regex.h (basic_regex): Rename _Ch_typeraits template parameters to _Ch_traits.
* include/bits/regex.h (basic_regex): Rename _Ch_typeraits template
parameters to _Ch_traits.
From-SVN: r215261
David Sherwood [Mon, 15 Sep 2014 09:57:46 +0000 (09:57 +0000)]
[AArch64] Fix force_simd macro in vdup_lane_2
gcc/
* gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.
From-SVN: r215260
Markus Trippelsdorf [Mon, 15 Sep 2014 06:33:18 +0000 (06:33 +0000)]
doc/install.texi: add documentation for --disable-libsanitizer
This patch adds an item for --disable-libsanitizer to the configuration
documentation.
The option is especially useful during bisection, because it reduces
build time a lot.
2014-09-15 Markus Trippelsdorf <markus@trippelsdorf.de>
* doc/install.texi (Options specification): add
--disable-libsanitizer item.
From-SVN: r215259
GCC Administrator [Mon, 15 Sep 2014 00:16:54 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r215257
James Clarke [Sun, 14 Sep 2014 08:05:43 +0000 (08:05 +0000)]
re PR target/61407 (Build errors on latest OS X 10.10 Yosemite with Xcode 6 on GCC 4.8.3)
PR target/61407
* config/darwin-c.c (version_as_macro): Added extra 0 for OS X 10.10
and above.
* config/darwin-driver.c (darwin_find_version_from_kernel): Removed
kernel version check to avoid incrementing it after every major OS X
release.
(darwin_default_min_version): Avoid static memory buffer.
* gcc.dg/darwin-minversion-1.c: Fixed formatting
* gcc.dg/darwin-minversion-2.c: Fixed formatting
* gcc.dg/darwin-minversion-3.c: Fixed formatting
* gcc.dg/darwin-minversion-4.c: Added test for OS X 10.10
Co-Authored-By: Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
From-SVN: r215251
GCC Administrator [Sun, 14 Sep 2014 00:16:43 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r215250
François-Xavier Coudert [Sat, 13 Sep 2014 19:00:28 +0000 (19:00 +0000)]
Fix mistake in commit 215237
From-SVN: r215242
Jan Hubicka [Sat, 13 Sep 2014 16:12:20 +0000 (18:12 +0200)]
tree.c (need_assembler_name_p): Store C++ type mangling only for aggregates.
* tree.c (need_assembler_name_p): Store C++ type mangling only
for aggregates.
From-SVN: r215238
Francois-Xavier Coudert [Sat, 13 Sep 2014 12:52:23 +0000 (12:52 +0000)]
* MAINTAINERS: Move myself to reviewers (Fortran).
From-SVN: r215237
Tobias Burnus [Sat, 13 Sep 2014 08:33:32 +0000 (10:33 +0200)]
re PR fortran/63252 (tree_class_check_failed)
2014-09-13 Tobias Burnus <burnus@net-b.de>
PR fortran/63252
* trans-decl.c (gfc_build_builtin_function_decls): Fix
caf_unlock declaration.
From-SVN: r215236
Marek Polacek [Sat, 13 Sep 2014 07:54:40 +0000 (07:54 +0000)]
re PR c++/60862 (bad location in invalid conversion error)
PR c++/60862
* parser.c (cp_parser_postfix_expression) <case CPP_OPEN_PAREN>: Set
location of a call expression.
* g++.dg/diagnostic/pr60862.C: New test.
From-SVN: r215235
Marek Polacek [Sat, 13 Sep 2014 05:59:47 +0000 (05:59 +0000)]
tree.c (protected_set_expr_location): Don't check whether T is non-null here.
* tree.c (protected_set_expr_location): Don't check whether T is
non-null here.
From-SVN: r215234
GCC Administrator [Sat, 13 Sep 2014 00:16:25 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r215233
DJ Delorie [Fri, 12 Sep 2014 18:13:39 +0000 (14:13 -0400)]
msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.
* config/msp430/msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.
(extend_and_shift1_hipsi2): Likewise.
(extend_and_shift2_hipsi2): Likewise.
From-SVN: r215229
Jason Merrill [Fri, 12 Sep 2014 14:39:25 +0000 (10:39 -0400)]
re PR c++/63201 (Full specialization of a member variable template of a class template does not work)
PR c++/63201
* decl.c (start_decl): Handle specialization of member variable
template.
* pt.c (check_explicit_specialization): Adjust error.
From-SVN: r215226
Jonathan Wakely [Fri, 12 Sep 2014 14:06:50 +0000 (15:06 +0100)]
deque (__gnu_debug::deque): Make base class C++11 allocator aware.
* include/debug/deque (__gnu_debug::deque): Make base class C++11
allocator aware.
From-SVN: r215223
David Malcolm [Fri, 12 Sep 2014 14:04:35 +0000 (14:04 +0000)]
params 2 and 3 of reg_set_between_p
gcc/ChangeLog:
* config/alpha/alpha.c (alpha_ra_ever_killed): Replace NULL_RTX
with NULL when dealing with an insn.
* config/sh/sh.c (sh_reorg): Strengthen local "last_float_move"
from rtx to rtx_insn *.
* rtl.h (reg_set_between_p): Strengthen params 2 and 3 from
const_rtx to const rtx_insn *.
* rtlanal.c (reg_set_between_p): Likewise, removing a checked cast.
From-SVN: r215222
Jonathan Wakely [Fri, 12 Sep 2014 13:30:35 +0000 (14:30 +0100)]
re PR libstdc++/59603 (std::random_shuffle tries to swap element with itself)
PR libstdc++/59603
* include/bits/stl_algo.h (random_shuffle): Prevent self-swapping.
* testsuite/25_algorithms/random_shuffle/59603.cc: New.
From-SVN: r215219
Trevor Saunders [Fri, 12 Sep 2014 12:36:37 +0000 (12:36 +0000)]
fix ChangeLog typo
From-SVN: r215218
Trevor Saunders [Fri, 12 Sep 2014 12:30:29 +0000 (12:30 +0000)]
fix assert in hash_table pch routines
gcc/ChangeLog:
2014-09-12 Trevor Saunders <tsaunders@mozilla.com>
* hash-table.h (gt_pch_nx): don't call gt_pch_note_object within an
assert.
From-SVN: r215216
Joseph Myers [Fri, 12 Sep 2014 12:05:18 +0000 (13:05 +0100)]
Remove LIBGCC2_HAS_?F_MODE target macros.
This patch removes the LIBGCC2_HAS_{SF,DF,XF,TF}_MODE target macros,
replacing them by predefines with -fbuilding-libgcc, together with a
target hook that can influence those predefines when needed.
The new default is that a floating-point mode is supported in libgcc
if (a) it passes the scalar_mode_supported_p hook (otherwise it's not
plausible for it to be supported in libgcc) and (b) it's one of those
four modes (since those are the modes for which libgcc hardcodes the
possibility of support). The target hook can override the default
choice (in either direction) for modes that pass
scalar_mode_supported_p (although overriding in the direction of
returning true when the default would return false only makes sense if
all relevant functions are specially defined in libgcc for that
particular target).
The previous default settings depended on various settings such as
LIBGCC2_LONG_DOUBLE_TYPE_SIZE, as well as targets defining the above
target macros if the default wasn't correct.
The default scalar_mode_supported_p only declares a floating-point
mode to be supported if it matches one of float / double / long
double. This means that in most cases where a mode is only supported
conditionally in libgcc (TFmode only supported if it's the mode of
long double, most commonly), the default gets things right. Overrides
were needed in the following cases:
* SFmode would always have been supported in libgcc (the condition was
BITS_PER_UNIT == 8, true for all current targets), but pdp11
defaults to 64-bit float, and in that case SFmode would fail
scalar_mode_supported_p. I don't know if libgcc actually built for
pdp11 (and the port may well no longer be being used), but this
patch adds a scalar_mode_supported_p hook to it to ensure SFmode is
treated as supported.
* Certain i386 and ia64 targets need the new hook to match the
existing cases for when XFmode or TFmode support is present in
libgcc. For i386, the hook can always declare XFmode to be
supported - the cases where it's not are the cases where long double
is TFmode, in which case XFmode fails scalar_mode_supported_p[*] -
but TFmode support needs to be conditional. (And of the targets not
defining LIBGCC2_HAS_TF_MODE before this patch, some defined
LONG_DOUBLE_TYPE_SIZE to 64, so ensuring LIBGCC2_HAS_TF_MODE would
always be false, while others did not define it, so allowing it to
be true in the -mlong-double-128 case. This patch matches that
logic, although I suspect all the latter targets would have been
broken if you tried to enable -mlong-double-128 by default, for lack
of the soft-fp TFmode support in libgcc, which is separately
configured.)
[*] I don't know if it's deliberate not to support __float80 at all
with -mlong-double-128.
In order to implement the default version of the new hook,
insn-modes.h was made to contain macros such as HAVE_TFmode for each
machine mode, so the default hook can contain conditionals on whether
XFmode and TFmode exist (to match the hardcoding of a list of modes in
libgcc). This is also used in fortran/trans-types.c; previously it
had a conditional on defined(LIBGCC2_HAS_TF_MODE) (a bit dubious,
since it ignored the value of the macro), which is replaced by testing
defined(HAVE_TFmode), in conjunction with requiring
targetm.libgcc_floating_mode_supported_p.
(Fortran is testing something stronger than that hook: not only is
libgcc support required, but also libm or equivalent. Thus, it has a
test for ENABLE_LIBQUADMATH_SUPPORT in the case that the mode is
TFmode and that's not the same as any of the three standard types.
The old and new tests are intended to accept exactly the same set of
modes for all targets.)
Apart from the four target macros eliminated by this patch, it gets us
closer to eliminating LIBGCC2_LONG_DOUBLE_TYPE_SIZE as well, though a
few more places using that macro need changing first.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu; also
built cc1 for crosses to ia64-elf and pdp11-none as a minimal test of
changes for those targets.
gcc:
* target.def (libgcc_floating_mode_supported_p): New hook.
* targhooks.c (default_libgcc_floating_mode_supported_p): New
function.
* targhooks.h (default_libgcc_floating_mode_supported_p): Declare.
* doc/tm.texi.in (LIBGCC2_HAS_DF_MODE, LIBGCC2_HAS_XF_MODE)
(LIBGCC2_HAS_TF_MODE): Remove.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): New @hook.
* doc/tm.texi: Regenerate.
* genmodes.c (emit_insn_modes_h): Define HAVE_%smode for each
machine mode.
* system.h (LIBGCC2_HAS_SF_MODE, LIBGCC2_HAS_DF_MODE)
(LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE): Poison.
* config/i386/cygming.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/darwin.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/djgpp.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/dragonfly.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/freebsd.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/gnu-user-common.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/i386-interix.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p): New
function.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/sol2.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/vx-common.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/hpux.h (LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE):
Remove.
* config/ia64/ia64.c (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P):
New macro.
(ia64_libgcc_floating_mode_supported_p): New function.
* config/ia64/linux.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Define.
* config/msp430/msp430.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/pdp11/pdp11.c (TARGET_SCALAR_MODE_SUPPORTED_P): New
macro.
(pdp11_scalar_mode_supported_p): New function.
* config/rl78/rl78.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/rx/rx.h (LIBGCC2_HAS_DF_MODE): Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_HAS_%s_MODE__
macros for floating-point modes.
gcc/fortran:
* trans-types.c (gfc_init_kinds): Check
targetm.libgcc_floating_mode_supported_p for floating-point
modes. Check HAVE_TFmode instead of LIBGCC2_HAS_TF_MODE.
libgcc:
* libgcc2.h (LIBGCC2_HAS_SF_MODE): Define using
__LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* config/libbid/bid_gcc_intrinsics.h
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* fixed-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_SF_MODE): Define using __LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
From-SVN: r215215
Richard Biener [Fri, 12 Sep 2014 11:06:49 +0000 (11:06 +0000)]
re PR middle-end/63237 (error: invalid operand in unary operation)
2014-09-12 Richard Biener <rguenther@suse.de>
PR middle-end/63237
* gimple-fold.c (get_maxval_strlen): Gimplify string length.
* g++.dg/torture/pr63237.C: New testcase.
From-SVN: r215212
Marc Glisse [Fri, 12 Sep 2014 10:42:47 +0000 (12:42 +0200)]
tree.c (integer_each_onep): New function.
2014-09-12 Marc Glisse <marc.glisse@inria.fr>
gcc/
* tree.c (integer_each_onep): New function.
* tree.h (integer_each_onep): Declare it.
* fold-const.c (fold_binary_loc): Use it for ~A + 1 to -A and
-A - 1 to ~A. Disable (X & 1) ^ 1, (X ^ 1) & 1 and ~X & 1 to
(X & 1) == 0 for vector and complex.
gcc/testsuite/
* gcc.dg/vec-andxor1.c: New file.
From-SVN: r215209
Wilco Dijkstra [Fri, 12 Sep 2014 09:46:25 +0000 (09:46 +0000)]
[AArch64] Add regmove_costs for Cortex-A57 and A53
2014-09-12 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/config/aarch64/aarch64.c: (cortexa57_regmove_cost): New cost table for
A57.
(cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP cost
to spilling from integer to FP registers.
From-SVN: r215208
Wilco Dijkstra [Fri, 12 Sep 2014 09:42:42 +0000 (09:42 +0000)]
[AArch64] Fix cost for Q register moves
2014-09-12 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
move handling.
(generic_regmove_cost): Undo raised FP2FP move cost as Q register moves are
now handled correctly.
From-SVN: r215207
Wilco Dijkstra [Fri, 12 Sep 2014 09:39:42 +0000 (09:39 +0000)]
[AArch64] Add cost handling of CALLER_SAVE_REGS and POINTER_REGS
2014-09-12 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost handling
of CALLER_SAVE_REGS and POINTER_REGS.
From-SVN: r215206
Wilco Dijkstra [Fri, 12 Sep 2014 09:29:16 +0000 (09:29 +0000)]
[Ree] Ensure inserted copy don't change the number of hard registers
2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
gcc/
* ree.c (combine_reaching_defs): Ensure inserted copy don't change the
number of hard registers.
From-SVN: r215205
Alexander Ivchenko [Fri, 12 Sep 2014 07:38:47 +0000 (07:38 +0000)]
AVX-512. Extend vpternlog, valign, vrotate insns.
gcc/
* config/i386/sse.md
(define_mode_iterator VI48_AVX512VL): New.
(define_expand "<avx512>_vternlog<mode>_maskz"): Rename from
"avx512f_vternlog<mode>_maskz" and update mode iterator.
(define_insn "<avx512>_vternlog<mode><sd_maskz_name>"): Rename
from "avx512f_vternlog<mode><sd_maskz_name>" and update mode iterator.
(define_insn "<avx512>_vternlog<mode>_mask"): Rename from
"avx512f_vternlog<mode>_mask" and update mode iterator.
(define_insn "<mask_codefor><avx512>_align<mode><mask_name>"): Rename
from "<mask_codefor>avx512f_align<mode><mask_name>" and update mode
iterator.
(define_insn "<avx512>_<rotate>v<mode><mask_name>"): Rename from
"avx512f_<rotate>v<mode><mask_name>" and update mode iterator.
(define_insn "<avx512>_<rotate><mode><mask_name>"): Rename from
"avx512f_<rotate><mode><mask_name>" and update mode iterator.
(define_insn "clz<mode>2<mask_name>"): Use VI48_AVX512VL mode iterator.
(define_insn "<mask_codefor>conflict<mode><mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215203
Alexander Ivchenko [Fri, 12 Sep 2014 07:36:59 +0000 (07:36 +0000)]
AVX-512. Extend max/min insn patterns.
gcc/
* config/i386/sse.md (VI128_256): Delete.
(define_mode_iterator VI124_256): New.
(define_mode_iterator VI124_256_AVX512F_AVX512BW): Ditto.
(define_expand "<code><mode>3<mask_name><round_name>"): Delete.
(define_expand "<code><VI124_256_AVX512F_AVX512BW:mode>3"): New.
(define_insn "*avx2_<code><VI124_256:mode>3"): Rename from
"*avx2_<code><mode>3<mask_name><round_name>" and update mode iterator.
(define_expand "<code><VI48_AVX512VL:mode>3_mask"): New.
(define_insn "*avx512bw_<code><VI48_AVX512VL:mode>3<mask_name>"): Ditto.
(define_insn "<mask_codefor><code><mode>3<mask_name>"): Update mode
iterator.
(define_expand "<code><VI8_AVX2:mode>3"): Update pettern generation
in presence of AVX-512.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215202
Alexander Ivchenko [Fri, 12 Sep 2014 07:34:31 +0000 (07:34 +0000)]
AVX-512. Extend gather insn patterns.
gcc/
* config/i386/sse.md
(define_expand "<avx512>_gathersi<mode>"): Rename from
"avx512f_gathersi<mode>".
(define_insn "*avx512f_gathersi<mode>"): Use VI48F.
(define_insn "*avx512f_gathersi<mode>_2"): Ditto.
(define_expand "<avx512>_gatherdi<mode>"): Rename from
"avx512f_gatherdi<mode>".
(define_insn "*avx512f_gatherdi<mode>"): Use VI48F.
(define_insn "*avx512f_gatherdi<mode>_2"): Use VI48F, add 128/256-bit
wide versions.
(define_expand "<avx512>_scattersi<mode>"): Rename from
"avx512f_scattersi<mode>".
(define_insn "*avx512f_scattersi<mode>"): Use VI48F.
(define_expand "<avx512>_scatterdi<mode>"): Rename from
"avx512f_scatterdi<mode>".
(define_insn "*avx512f_scatterdi<mode>"): Use VI48F.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215201
Richard Sandiford [Fri, 12 Sep 2014 07:27:10 +0000 (07:27 +0000)]
ira.h (ira_finish_once): Delete.
gcc/
* ira.h (ira_finish_once): Delete.
* ira-int.h (target_ira_int::~target_ira_int): Declare.
(target_ira_int::free_ira_costs): Likewise.
(target_ira_int::free_register_move_costs): Likewise.
(ira_finish_costs_once): Delete.
* ira.c (free_register_move_costs): Replace with...
(target_ira_int::free_register_move_costs): ...this new function.
(target_ira_int::~target_ira_int): Define.
(ira_init): Call free_register_move_costs as a member function rather
than a global function.
(ira_finish_once): Delete.
* ira-costs.c (free_ira_costs): Replace with...
(target_ira_int::free_ira_costs): ...this new function.
(ira_init_costs): Call free_ira_costs as a member function rather
than a global function.
(ira_finish_costs_once): Delete.
* target-globals.c (target_globals::~target_globals): Call the
target_ira_int destructor.
* toplev.c: Include lra.h.
(finalize): Call lra_finish_once rather than ira_finish_once.
From-SVN: r215200
GCC Administrator [Fri, 12 Sep 2014 00:16:51 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r215199
Jan Hubicka [Thu, 11 Sep 2014 23:16:42 +0000 (01:16 +0200)]
common.opt (flto-odr-type-merging): New flag.
* common.opt (flto-odr-type-merging): New flag.
* ipa-deivrt.c (hash_type_name): Use ODR names for hasing if availale.
(types_same_for_odr): Likewise.
(odr_subtypes_equivalent_p): Likewise.
(add_type_duplicate): Do not walk type variants.
(register_odr_type): New function.
* ipa-utils.h (register_odr_type): Declare.
(odr_type_p): New function.
* langhooks.c (lhd_set_decl_assembler_name): Do not compute
TYPE_DECLs
* doc/invoke.texi (-flto-odr-type-merging): Document.
* tree.c (need_assembler_name_p): Compute ODR names when asked
for it.
* tree.h (DECL_ASSEMBLER_NAME): Update comment.
* lto.c (lto_read_decls): Register ODR types.
From-SVN: r215196
H.J. Lu [Thu, 11 Sep 2014 22:18:06 +0000 (22:18 +0000)]
Also turn off OPTION_MASK_ABI_X32 for -m16
PR target/63228
* config/i386/i386.c (ix86_option_override_internal): Also turn
off OPTION_MASK_ABI_X32 for -m16.
From-SVN: r215194
Segher Boessenkool [Thu, 11 Sep 2014 21:50:31 +0000 (23:50 +0200)]
rs6000.md (rs6000_mftb_<mode>): Use mode iterator GPR instead of P.
2014-09-11 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (rs6000_mftb_<mode>): Use mode iterator
GPR instead of P.
From-SVN: r215193
Marc Glisse [Thu, 11 Sep 2014 20:55:37 +0000 (20:55 +0000)]
re PR target/58757 (Advertise the lack of denormal support on alpha without -mieee)
2014-09-11 Marc Glisse <marc.glisse@inria.fr>
PR target/58757
gcc/c-family/
* c-cppbuiltin.c (builtin_define_float_constants): Correct
__*_DENORM_MIN__ without denormals.
gcc/
* ginclude/float.h (FLT_TRUE_MIN, DBL_TRUE_MIN, LDBL_TRUE_MIN):
Directly forward to __*_DENORM_MIN__.
gcc/testsuite/
* gcc.dg/c11-true_min-1.c: New testcase.
From-SVN: r215191
David Malcolm [Thu, 11 Sep 2014 20:47:39 +0000 (20:47 +0000)]
Introduce LABEL_REF_LABEL
gcc/ChangeLog:
2014-09-11 David Malcolm <dmalcolm@redhat.com>
* rtl.h (LABEL_REF_LABEL): New macro.
* alias.c (rtx_equal_for_memref_p): Use LABEL_REF_LABEL in place
of XEXP (, 0), where we know that we have a LABEL_REF.
* cfgbuild.c (make_edges): Likewise.
(purge_dead_tablejump_edges): Likewise.
* cfgexpand.c (convert_debug_memory_address): Likewise.
* cfgrtl.c (patch_jump_insn): Likewise.
* combine.c (distribute_notes): Likewise.
* cse.c (hash_rtx_cb): Likewise.
(exp_equiv_p): Likewise.
(fold_rtx): Likewise.
(check_for_label_ref): Likewise.
* cselib.c (rtx_equal_for_cselib_1): Likewise.
(cselib_hash_rtx): Likewise.
* emit-rtl.c (mark_label_nuses): Likewise.
* explow.c (convert_memory_address_addr_space): Likewise.
* final.c (output_asm_label): Likewise.
(output_addr_const): Likewise.
* gcse.c (add_label_notes): Likewise.
* genconfig.c (walk_insn_part): Likewise.
* genrecog.c (validate_pattern): Likewise.
* ifcvt.c (cond_exec_get_condition): Likewise.
(noce_emit_store_flag): Likewise.
(noce_get_alt_condition): Likewise.
(noce_get_condition): Likewise.
* jump.c (maybe_propagate_label_ref): Likewise.
(mark_jump_label_1): Likewise.
(redirect_exp_1): Likewise.
(rtx_renumbered_equal_p): Likewise.
* lra-constraints.c (operands_match_p): Likewise.
* reload.c (operands_match_p): Likewise.
(find_reloads): Likewise.
* reload1.c (set_label_offsets): Likewise.
* reorg.c (get_branch_condition): Likewise.
* rtl.c (rtx_equal_p_cb): Likewise.
(rtx_equal_p): Likewise.
* rtlanal.c (reg_mentioned_p): Likewise.
(rtx_referenced_p): Likewise.
(get_condition): Likewise.
* sched-vis.c (print_value): Likewise.
* varasm.c (const_hash_1): Likewise.
(compare_constant): Likewise.
(const_rtx_hash_1): Likewise.
(output_constant_pool_1): Likewise.
From-SVN: r215190
Segher Boessenkool [Thu, 11 Sep 2014 18:29:50 +0000 (20:29 +0200)]
htm.md (tabort, [...]): Use xor instead of minus.
2014-09-11 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/htm.md (tabort, tabortdc, tabortdci, tabortwc,
tabortwci, tbegin, tcheck, tend, trechkpt, treclaim, tsr): Use xor
instead of minus.
* config/rs6000/vector.md (cr6_test_for_zero_reverse,
cr6_test_for_lt_reverse): Ditto.
From-SVN: r215187
Paolo Carlini [Thu, 11 Sep 2014 18:08:24 +0000 (18:08 +0000)]
re PR c++/61489 (Wrong warning with -Wmissing-field-initializers.)
2014-09-11 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/61489
* doc/invoke.texi ([-Wmissing-field-initializers]): Update.
/cp
2014-09-11 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/61489
* typeck2.c (process_init_constructor_record): Do not warn about
missing field initializer if EMPTY_CONSTRUCTOR_P (init).
/testsuite
2014-09-11 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/61489
* g++.dg/warn/Wmissing-field-initializers-1.C: New.
* g++.old-deja/g++.other/warn5.C: Adjust.
From-SVN: r215186
Alan Lawrence [Thu, 11 Sep 2014 16:16:24 +0000 (16:16 +0000)]
[AArch64] Simplify vreinterpret for float64x1_t using casts.
* config/aarch64/aarch64-builtins.c (aarch64_types_unop_su_qualifiers,
TYPES_REINTERP_SU, aarch64_types_unop_sp_qualifiers, TYPE_REINTERP_SP,
aarch64_types_unop_us_qualifiers, TYPES_REINTERP_US,
aarch64_types_unop_ps_qualifiers, TYPES_REINTERP_PS, BUILTIN_VD):
Delete.
(aarch64_fold_builtin): Remove all reinterpret cases.
* config/aarch64/aarch64-protos.h (aarch64_simd_reinterpret): Delete.
* config/aarch64/aarch64-simd-builtins.def (reinterpret*) : Delete.
* config/aarch64/aarch64-simd.md (aarch64_reinterpretv8qi<mode>,
aarch64_reinterpretv4hi<mode>, aarch64_reinterpretv2si<mode>,
aarch64_reinterpretv2sf<mode>, aarch64_reinterpretdi<mode>,
aarch64_reinterpretv1df<mode>, aarch64_reinterpretv16qi<mode>,
aarch64_reinterpretv8hi<mode>, aarch64_reinterpretv4si<mode>,
aarch64_reinterpretv4sf<mode>, aarch64_reinterpretv2di<mode>,
aarch64_reinterpretv2df<mode>): Delete.
* config/aarch64/aarch64.c (aarch64_simd_reinterpret): Delete.
* config/aarch64/arm_neon.h (vreinterpret_p8_f64,
vreinterpret_p16_f64, vreinterpret_f32_f64, vreinterpret_f64_f32,
vreinterpret_f64_p8, vreinterpret_f64_p16, vreinterpret_f64_s8,
vreinterpret_f64_s16, vreinterpret_f64_s32, vreinterpret_f64_u8,
vreinterpret_f64_u16, vreinterpret_f64_u32, vreinterpret_s64_f64,
vreinterpret_u64_f64, vreinterpret_s8_f64, vreinterpret_s16_f64,
vreinterpret_s32_f64, vreinterpret_u8_f64, vreinterpret_u16_f64,
vreinterpret_u32_f64): Use cast.
* config/aarch64/iterators.md (VD_RE): Delete.
From-SVN: r215180
Alan Lawrence [Thu, 11 Sep 2014 15:34:11 +0000 (15:34 +0000)]
[AArch64] Replace temporary inline assembler for vset_lane
* config/aarch64/arm_neon.h (aarch64_vset_lane_any): New (*2).
(vset_lane_f32, vset_lane_f64, vset_lane_p8, vset_lane_p16,
vset_lane_s8, vset_lane_s16, vset_lane_s32, vset_lane_s64,
vset_lane_u8, vset_lane_u16, vset_lane_u32, vset_lane_u64,
vsetq_lane_f32, vsetq_lane_f64, vsetq_lane_p8, vsetq_lane_p16,
vsetq_lane_s8, vsetq_lane_s16, vsetq_lane_s32, vsetq_lane_s64,
vsetq_lane_u8, vsetq_lane_u16, vsetq_lane_u32, vsetq_lane_u64):
Replace inline assembler with __aarch64_vset_lane_any.
From-SVN: r215179
Alan Lawrence [Thu, 11 Sep 2014 14:49:23 +0000 (14:49 +0000)]
[AArch64 Testsuite] Add execution test of vset(q?)_lane intrinsics.
* gcc.target/aarch64/vset_lane_1.c: New test.
From-SVN: r215177
James Greenhalgh [Thu, 11 Sep 2014 14:39:41 +0000 (14:39 +0000)]
[AArch64] Cheap fix for argument types of vmull_high_lane_{us}{16,32}
gcc/
* config/aarch64/arm_neon.h (vmull_high_lane_s16): Fix argument
types.
(vmull_high_lane_s32): Likewise.
(vmull_high_lane_u16): Likewise.
(vmull_high_lane_u32): Likewise.
From-SVN: r215176
Jason Merrill [Thu, 11 Sep 2014 13:50:27 +0000 (09:50 -0400)]
re PR c++/63139 (Class-scope typedef overwrites typedef of previously defined class)
PR c++/63139
* pt.c (tsubst_pack_expansion): Simplify substitution into T....
(tsubst): Don't throw away PACK_EXPANSION_EXTRA_ARGS.
From-SVN: r215171
Jason Merrill [Thu, 11 Sep 2014 12:12:28 +0000 (08:12 -0400)]
re PR c++/58678 (pykde4-4.11.2 link error (devirtualization too trigger happy))
PR c++/58678
* ipa-devirt.c (ipa_devirt): Don't check DECL_COMDAT.
From-SVN: r215168
Jonathan Wakely [Thu, 11 Sep 2014 10:01:20 +0000 (11:01 +0100)]
re PR libstdc++/63219 (Superfluous template parameter in match_result::format overload)
PR libstdc++/63219
* include/bits/regex.h (match_results::format): Remove stray template
parameter.
* include/bits/regex_compiler.h (_RegexTranslator::_RegexTranslator):
Remove parameter name to avoid -Wunused-parameter warning.
* include/bits/regex_executor.h (_State_info::_State_info): Reorder
mem-initializers to avoid -Wreorder warning.
* include/bits/regex_executor.tcc (_Executor::_M_word_boundary):
Remove parameter name to avoid -Wunused-parameter warning.
* include/bits/regex_scanner.tcc (_Scanner::_M_advance): Add braces
to avoid -Wempty-body warning when not in debug mode.
From-SVN: r215160
Bernd Schmidt [Thu, 11 Sep 2014 09:07:23 +0000 (09:07 +0000)]
Fix declarations in some tests.
* gcc.dg/compat/struct-by-value-13_main.c (struct_by_value_13_x):
Fix declaration.
* gcc.dg/compat/struct-by-value-16a_main.c (struct_by_value_16a_x):
Fix declaration.
* gcc.dg/compat/struct-by-value-17a_main.c (struct_by_value_17a_x):
Fix declaration.
* gcc.dg/compat/struct-by-value-18a_main.c (struct_by_value_18a_x):
Fix declaration.
From-SVN: r215158
Jakub Jelinek [Thu, 11 Sep 2014 09:03:49 +0000 (11:03 +0200)]
linux64.S: Emit .note.GNU-stack even when POWERPC64 is not defined.
* src/powerpc/linux64.S: Emit .note.GNU-stack even when
POWERPC64 is not defined.
* src/powerpc/linux64_closure.S: Likewise. Also test _CALL_ELF == 2.
From-SVN: r215155
Georg-Johann Lay [Thu, 11 Sep 2014 08:08:17 +0000 (08:08 +0000)]
re PR target/63223 ([avr] Make jumptables work with -Wl,--section-start,.text=)
gcc/
PR target/63223
* config/avr/avr.md (*tablejump.3byte-pc): New insn.
(*tablejump): Restrict to !AVR_HAVE_EIJMP_EICALL. Add void clobber.
(casesi): Expand to *tablejump.3byte-pc if AVR_HAVE_EIJMP_EICALL.
libgcc/
PR target/63223
* config/avr/libgcc.S (__tablejump2__): Rewrite to use RAMPZ, ELPM
and R24 as needed. Make work for all devices and .text locations.
(__do_global_ctors, __do_global_dtors): Use word addresses.
(__tablejump__, __tablejump_elpm__): Remove functions.
* t-avr (LIB1ASMFUNCS): Remove _tablejump, _tablejump_elpm.
Add _tablejump2.
(XICALL, XIJMP): New macros.
From-SVN: r215152
Alexander Ivchenko [Thu, 11 Sep 2014 06:52:30 +0000 (06:52 +0000)]
AVX-512. Add vperm[it]2 insns support.
gcc/
* config/i386/sse.md
(define_expand "<avx512>_vpermi2var<VI48F:mode>3_maskz"): Rename from
"avx512f_vpermi2var<mode>3_maskz" and update mode iterator.
(define_expand "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_maskz"):
New.
(define_insn "<avx512>_vpermi2var<VI48F:mode>3<sd_maskz_name>"): Rename
from "avx512f_vpermi2var<mode>3<sd_maskz_name>" and update mode
iterator.
(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
New.
(define_insn "<avx512>_vpermi2var<VI48F:mode>3_mask"): Rename from
"avx512f_vpermi2var<mode>3_mask" and update mode iterator.
(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_mask"): New.
(define_expand "<avx512>_vpermt2var<VI48F:mode>3_maskz"): Rename from
"avx512f_vpermt2var<mode>3_maskz" and update mode iterator.
(define_expand "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_maskz"): New.
(define_insn "<avx512>_vpermt2var<VI48F:mode>3<sd_maskz_name>"): Rename
from "avx512f_vpermt2var<mode>3<sd_maskz_name>" and update mode
iterator.
(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
New.
(define_insn "<avx512>_vpermt2var<VI48F:mode>3_mask"): Rename from
"avx512f_vpermt2var<mode>3_mask" and update mode iterator.
(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_mask"): New.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215151
Jan Hubicka [Thu, 11 Sep 2014 06:48:23 +0000 (08:48 +0200)]
varpool.c (varpool_node::ctor_useable_for_folding_p): Do not try to access removed nodes.
* varpool.c (varpool_node::ctor_useable_for_folding_p): Do not try
to access removed nodes.
From-SVN: r215150
Jan Hubicka [Thu, 11 Sep 2014 06:46:23 +0000 (08:46 +0200)]
re PR middle-end/63186 (Undefined .L* symbols because of fnsplit)
PR tree-optimization/63186
* ipa-split.c (test_nonssa_use): Skip nonforced labels.
(mark_nonssa_use): Likewise.
(verify_non_ssa_vars): Verify all header blocks for label
definitions.
* gcc.dg/pr63186.c: New testcase.
From-SVN: r215149
Alexander Ivchenko [Thu, 11 Sep 2014 06:42:29 +0000 (06:42 +0000)]
AVX-512. Extend vpermvar insn patterns.
gcc/
* config/i386/sse.md
(define_mode_attr avx2_avx512): Rename from avx2_avx512bw.
(define_mode_iterator VI48F_256_512): Extend to AVX-512VL.
(define_insn "<avx2_avx512>_permvar<mode><mask_name>"): Rename from
"<avx2_avx512f>_permvar<mode><mask_name>".
(define_insn "<avx512>_permvar<mode><mask_name>"): New.
(define_insn "<avx2_avx512>_ashrv<VI48_AVX512F_AVX512VL:mode><mask_name>"):
Rename from "<avx2_avx512f>_ashrv<mode><mask_name>".
(define_insn "<avx2_avx512>_ashrv<VI2_AVX512VL:mode><mask_name>"):
Ditto.
(define_insn "<avx2_avx512>_<shift_insn>v<VI48_AVX512F:mode><mask_name>"):
Rename from "<avx2_avx512bw>_<shift_insn>v<mode><mask_name>".
(define_insn "<avx2_avx512>_<shift_insn>v<VI2_AVX512VL:mode><mask_name>"):
Rename from "<avx2_avx512bw>_<shift_insn>v<mode><mask_name>".
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215148
GCC Administrator [Thu, 11 Sep 2014 00:16:43 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r215147
Michael Meissner [Wed, 10 Sep 2014 21:13:37 +0000 (21:13 +0000)]
vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes.
2014-09-10 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for
V2DF, V4SF, DF, and DI modes.
(vsx_fmav2df2): Likewise.
(vsx_float_fix_<mode>2): Likewise.
(vsx_reduc_<VEC_reduc_name>_v2df_scalar): Likewise.
From-SVN: r215138
Xinliang David Li [Wed, 10 Sep 2014 20:10:25 +0000 (20:10 +0000)]
Fix PR target/63209.
From-SVN: r215136
Jakub Jelinek [Wed, 10 Sep 2014 20:02:00 +0000 (22:02 +0200)]
i386.exp: Only run vect-args.c tests if runtest_file_p says they should be run.
* gcc.target/i386/i386.exp: Only run vect-args.c tests
if runtest_file_p says they should be run.
From-SVN: r215135
Jason Merrill [Wed, 10 Sep 2014 17:28:59 +0000 (13:28 -0400)]
re PR ipa/61659 (Extra undefined symbol because of devirtualization)
PR c++/61659
* decl.c (grokfndecl): Don't set DECL_COMDAT on static inlines.
(duplicate_decls, start_decl): Likewise.
* pt.c (check_explicit_specialization): Likewise.
(push_template_decl_real): Or static templates.
From-SVN: r215134
David Malcolm [Wed, 10 Sep 2014 14:42:05 +0000 (14:42 +0000)]
error_for_asm and warning_for_asm take const rtx_insn *
gcc/ChangeLog:
2014-09-10 David Malcolm <dmalcolm@redhat.com>
* final.c (this_is_asm_operands): Strengthen this variable from
rtx to const rtx_insn *.
* output.h (this_is_asm_operands): Likewise.
* rtl-error.c (location_for_asm): Strengthen param "insn" from
const_rtx to const rtx_insn *.
(diagnostic_for_asm): Likewise.
* rtl-error.h (error_for_asm): Likewise.
(warning_for_asm): Likewise.
From-SVN: r215133
David Malcolm [Wed, 10 Sep 2014 14:35:16 +0000 (14:35 +0000)]
insn_extract takes an rtx_insn
gcc/ChangeLog:
2014-09-10 David Malcolm <dmalcolm@redhat.com>
* genextract.c (print_header): When writing out insn_extract to
insn-extract.c, strengthen the param "insn" from rtx to rtx_insn *.
* recog.h (insn_extract): Strengthen the param from rtx to
rtx_insn *.
From-SVN: r215132
Alan Lawrence [Wed, 10 Sep 2014 13:20:47 +0000 (13:20 +0000)]
[AArch64 Testsuite] Add a test of the vst[234](q?) intrinics
* gcc.target/aarch64/vstN_1.c: New test.
From-SVN: r215129
Siva Chandra Reddy [Wed, 10 Sep 2014 13:18:04 +0000 (13:18 +0000)]
hook.in: Load the xmethods.
2014-09-10 Siva Chandra Reddy <sivachandra@google.com>
* python/hook.in: Load the xmethods.
* python/Makefile.am (nobase_python_DATA): Add xmethods.py.
* python/Makefile.in: Regenerated.
* python/libstdcxx/v6/xmethods.py: New file.
* testsuite/lib/gdb-test.exp (gdb_version_check_xmethods): New
function.
(gdb-test): New optional argument LOAD_XMETHODS. Load xmethods
python script if LOAD_XMETHODS is true.
* testsuite/libstdc++-xmethods/unique_ptr.cc: New file.
* testsuite/libstdc++-xmethods/vector.cc: New file.
* testsuite/libstdc++-xmethods/xmethods.exp: New file.
From-SVN: r215128
Mike Stump [Wed, 10 Sep 2014 12:35:11 +0000 (12:35 +0000)]
install.texi (Prerequisites): Note Tcl 8.6 bug fixed in 8.6.1.
* doc/install.texi (Prerequisites): Note Tcl 8.6 bug fixed in
8.6.1.
From-SVN: r215127
Alan Lawrence [Wed, 10 Sep 2014 12:33:59 +0000 (12:33 +0000)]
[AArch64 Testsuite] Add a test of the vldN_lane intrinsic
* gcc.target/aarch64/vldN_lane_1.c: New test.
From-SVN: r215126
Martin Jambor [Wed, 10 Sep 2014 11:36:29 +0000 (13:36 +0200)]
cgraphunit.c (expand_thunk): If not expanding, set analyzed flag.
2014-09-10 Martin Jambor <mjambor@suse.cz>
* cgraphunit.c (expand_thunk): If not expanding, set analyzed flag.
(analyze): Do not set analyze flag if expand_thunk returns false;.
(create_wrapper): Likewise.
* cgraphclones.c (duplicate_thunk_for_node): Likewise.
From-SVN: r215123
Martin Jambor [Wed, 10 Sep 2014 11:34:09 +0000 (13:34 +0200)]
re PR middle-end/61654 (ICE in release_function_body, at cgraph.c:1699)
2014-09-10 Martin Jambor <mjambor@suse.cz>
PR ipa/61654
* cgraphclones.c (duplicate_thunk_for_node): Copy arguments of the
new decl properly. Analyze the new thunk if it is expanded.
gcc/testsuite/
* g++.dg/ipa/pr61654.C: New test.
From-SVN: r215122
Andreas Schwab [Wed, 10 Sep 2014 11:01:35 +0000 (11:01 +0000)]
coretypes.h (struct _dont_use_rtx_insn_here_, rtx_insn): Define.
* coretypes.h (struct _dont_use_rtx_insn_here_, rtx_insn)
[USED_FOR_TARGET]: Define.
From-SVN: r215121
Matthew Fortune [Wed, 10 Sep 2014 10:52:39 +0000 (10:52 +0000)]
MIPS: Do not reload unallocated FP_REGS pseudos via GR_REGS
gcc/
* config/mips/mips.c (mips_secondary_reload_class): Handle
regno < 0 case.
From-SVN: r215120
Robert Suchanek [Wed, 10 Sep 2014 10:36:00 +0000 (10:36 +0000)]
Fix ICE in bitmap routines with LRA and inline assembly language
gcc/
* lra-lives.c (process_bb_lives): Replace assignment with bitwise OR
assignment.
From-SVN: r215119
Jakub Jelinek [Wed, 10 Sep 2014 09:23:16 +0000 (11:23 +0200)]
flag-types.h (enum sanitize_code): Add SANITIZE_NONNULL_ATTRIBUTE and SANITIZE_RETURNS_NONNULL_ATTRIBUTE...
gcc/
* flag-types.h (enum sanitize_code): Add SANITIZE_NONNULL_ATTRIBUTE
and SANITIZE_RETURNS_NONNULL_ATTRIBUTE, or them into SANITIZE_UNDEFINED.
* opts.c (common_handle_option): Handle SANITIZE_NONNULL_ATTRIBUTE and
SANITIZE_RETURNS_NONNULL_ATTRIBUTE and disable
flag_delete_null_pointer_checks for them.
* sanitizer.def (BUILT_IN_UBSAN_HANDLE_NONNULL_ARG,
BUILT_IN_UBSAN_HANDLE_NONNULL_ARG_ABORT,
BUILT_IN_UBSAN_HANDLE_NONNULL_RETURN,
BUILT_IN_UBSAN_HANDLE_NONNULL_RETURN_ABORT): New.
* ubsan.c (instrument_bool_enum_load): Set *gsi back to
stmt's iterator.
(instrument_nonnull_arg, instrument_nonnull_return): New functions.
(pass_ubsan::gate): Return true even for SANITIZE_NONNULL_ATTRIBUTE
or SANITIZE_RETURNS_NONNULL_ATTRIBUTE.
(pass_ubsan::execute): Call instrument_nonnull_{arg,return}.
* doc/invoke.texi (-fsanitize=nonnull-attribute,
-fsanitize=returns-nonnull-attribute): Document.
gcc/testsuite/
* c-c++-common/ubsan/attrib-3.c: New test.
* c-c++-common/ubsan/nonnull-1.c: New test.
* c-c++-common/ubsan/nonnull-2.c: New test.
* c-c++-common/ubsan/nonnull-3.c: New test.
* c-c++-common/ubsan/nonnull-4.c: New test.
* c-c++-common/ubsan/nonnull-5.c: New test.
libsanitizer/
* ubsan/ubsan_handlers.cc, ubsan/ubsan_handlers.h: Cherry pick
upstream r215485, r217389, r217391 and r217400.
From-SVN: r215118
Jakub Jelinek [Wed, 10 Sep 2014 09:21:25 +0000 (11:21 +0200)]
ubsan.h (struct ubsan_mismatch_data): Removed.
* ubsan.h (struct ubsan_mismatch_data): Removed.
(ubsan_create_data): Remove MISMATCH argument, add LOCCNT argument.
* ubsan.c (ubsan_source_location): For unknown locations,
pass { NULL, 0, 0 } instead of { "<unknown>", x, y }.
(ubsan_create_data): Remove MISMATCH argument, add LOCCNT argument.
Allow more than one location and arbitrary extra arguments passed
in ... instead of through MISMATCH pointer.
(ubsan_instrument_unreachable, ubsan_expand_bounds_ifn,
ubsan_expand_null_ifn, ubsan_build_overflow_builtin,
instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust
callers.
c-family/
* c-ubsan.c (ubsan_instrument_division, ubsan_instrument_shift,
ubsan_instrument_vla, ubsan_instrument_return): Adjust
ubsan_create_data callers.
(ubsan_instrument_bounds): Don't emit UBSAN_BOUNDS at all if
index is constant or BIT_AND_EXPR with constant mask and is
small enough for the bound.
* c-gimplify.c (ubsan_walk_array_refs_r): For ADDR_EXPR of
ARRAY_REF, make sure the inner ARRAY_REF is not walked again.
From-SVN: r215117
Alexander Ivchenko [Wed, 10 Sep 2014 07:05:31 +0000 (07:05 +0000)]
AVX-512. Add patterns for compress, expand.
gcc/
* config/i386/sse.md
(define_mode_iterator VI48F): New.
(define_insn "<avx512>_compress<mode>_mask"): Rename from
"avx512f_compress<mode>_mask" and update mode iterator.
(define_insn "<avx512>_compressstore<mode>_mask"): Rename from
"avx512f_compressstore<mode>_mask" and update mode iterator.
(define_expand "<avx512>_expand<mode>_maskz"): Rename from
"avx512f_expand<mode>_maskz" and update mode iterator.
(define_insn "<avx512>_expand<mode>_mask"): Rename from
"avx512f_expand<mode>_mask" and update mode iterator.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215108
Alexander Ivchenko [Wed, 10 Sep 2014 06:54:51 +0000 (06:54 +0000)]
AVX-512. Add reduce, range, fpclass insn patterns.
gcc/
* config/i386/i386.c
(ix86_expand_args_builtin): Handle avx512dq_rangepv8df_mask_round,
avx512dq_rangepv16sf_mask_round, avx512dq_rangepv4df_mask,
avx512dq_rangepv8sf_mask, avx512dq_rangepv2df_mask,
avx512dq_rangepv4sf_mask.
* config/i386/sse.md
(define_c_enum "unspec"): Add UNSPEC_REDUCE, UNSPEC_FPCLASS,
UNSPEC_RANGE.
(define_insn "<mask_codefor>reducep<mode><mask_name>"): New.
(define_insn "reduces<mode>"): Ditto.
(define_insn "avx512dq_rangep<mode><mask_name><round_saeonly_name>"):
Ditto.
(define_insn "avx512dq_ranges<mode><round_saeonly_name>"): Ditto.
(define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Ditto.
(define_insn "avx512dq_vmfpclass<mode>"): Ditto..
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215107
Alexander Ivchenko [Wed, 10 Sep 2014 06:51:20 +0000 (06:51 +0000)]
AVX-512. Update float unspecs: storeu, rcp14, rsqrt14, scalef, getexp, fixupimm, rndscale, getmant.
gcc/
* config/i386/i386.c
(avx512f_vgetmantv2df_round): Rename from "avx512f_getmantv2df_round".
(avx512f_vgetmantv4sf_round): Rename from "avx512f_vgetmantv4sf_round".
(ix86_expand_args_builtin): Handle avx512vl_getmantv8sf_mask,
avx512vl_getmantv4df_mask, avx512vl_getmantv4sf_mask,
avx512vl_getmantv2df_mask.
(ix86_expand_round_builtin): Handle avx512f_vgetmantv2df_round,
avx512f_vgetmantv4sf_round.
* config/i386/sse.md
(define_insn "<avx512>_storeu<ssemodesuffix><avxsizesuffix>_mask"):
Rename from "avx512f_storeu<ssemodesuffix>512_mask" and update
mode iterator.
(define_insn "<mask_codefor>rcp14<mode><mask_name>"): Use VF_AVX512VL.
(define_insn "<mask_codefor>rsqrt14<mode><mask_name>"): Ditto.
(define_insn "<avx512>_scalef<mode><mask_name><round_name>"): Rename
from "avx512f_scalef<mode><mask_name><round_name>" and update mode
iterator..
(define_insn "<avx512>_getexp<mode><mask_name><round_saeonly_name>"):
Rename from "avx512f_getexp<mode><mask_name><round_saeonly_name>" and
update mode iterator.
(define_expand
"<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>"): Rename from
"avx512f_fixupimm<mode>_maskz<round_saeonly_expand_name>" and update
mode iterator.
(define_insn
"<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>"): Rename
from "avx512f_fixupimm<mode><sd_maskz_name><round_saeonly_name>" and
update mode iterator.
(define_insn "<avx512>_fixupimm<mode>_mask<round_saeonly_name>"): Rename
from "avx512f_fixupimm<mode>_mask<round_saeonly_name>" and update mode
iterator..
(define_insn
"<avx512>_rndscale<mode><mask_name><round_saeonly_name>"): rename from
"avx512f_rndscale<mode><mask_name><round_saeonly_name>" and update
mode iterator..
(define_insn "<avx512>_getmant<mode><mask_name><round_saeonly_name>"):
Rename from "avx512f_getmant<mode><mask_name><round_saeonly_name>" and
update mode iterator.
(define_insn "avx512f_vgetmant<mode><round_saeonly_name>"): Rename from
"avx512f_getmant<mode><round_saeonly_name>".
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215106
Jan Hubicka [Wed, 10 Sep 2014 06:33:36 +0000 (08:33 +0200)]
re PR lto/63166 (ICE (LTO): ipa_intraprocedural_devirtualization, at ipa-prop.c:2611)
PR ipa/63166
* ipa-prop.c (compute_known_type_jump_func): Fix conditional.
* g++.dg/lto/pr63166_0.ii: New testcase.
* g++.dg/lto/pr63166_1.ii: New testcase.
From-SVN: r215105
Alexander Ivchenko [Wed, 10 Sep 2014 06:28:03 +0000 (06:28 +0000)]
AVX-512. Extend FMA patterns.
gcc/
* config/i386/sse.md (define_mode_iterator VF_AVX512VL): New.
(define_mode_iterator FMAMODEM): Allow 128/256bit EVEX version.
(define_mode_iterator FMAMODE_AVX512): New.
(define_mode_iterator FMAMODE): Remove conditions.
(define_expand "fma4i_fmadd_<mode>"): Use FMAMODE_AVX512 mode iterator.
(define_expand "<avx512>_fmadd_<mode>_maskz<round_expand_name>"): Rename
from "<avx512>_fmadd_<mode>_maskz<round_expand_name>" and use VF_AVX512VL
mode iterator.
(define_mode_iterator FMAMODE_NOVF512): Remove.
(define_insn "*fma_fmadd_<mode>"): Rename from
"<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>" and use
FMAMODE mode iterator.
(define_mode_iterator VF_SF_AVX512VL): New.
(define_insn "<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmadd_<mode>_mask<round_name>"): Rename from
"avx512f_fmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmadd_<mode>_mask3<round_name>"): Rename from
"avx512f_fmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fmsub_<mode>"): Rename from
"<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>" and use
FMAMODE mode iterator.
(define_insn "<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmsub_<mode>_mask<round_name>"): Rename from
"avx512f_fmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmsub_<mode>_mask3<round_name>"): Rename from
"avx512f_fmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fnmadd_<mode>"): Rename from
"<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>" and
use FMAMODE mode iterator.
(define_insn "<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fnmadd_<mode>_mask<round_name>"): Rename from
"avx512f_fnmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fnmadd_<mode>_mask3<round_name>"): Rename from
"avx512f_fnmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fnmsub_<mode>"): Rename from
"<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>" and use
FMAMODE mode iterator.
(define_insn "<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fnmsub_<mode>_mask<round_name>"): Rename from
"avx512f_fnmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fnmsub_<mode>_mask3<round_name>"): Rename from
"avx512f_fnmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_expand "<avx512>_fmaddsub_<mode>_maskz<round_expand_name>"):
Rename from "avx512f_fmaddsub_<mode>_maskz<round_expand_name>" and
use VF_AVX512VL mode iterator.
(define_insn "*fma_fmaddsub_<mode>"): Rename from
"<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>" and
remove subst usage.
(define_insn "<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmaddsub_<mode>_mask<round_name>"): Rename from
"avx512f_fmaddsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmaddsub_<mode>_mask3<round_name>"): Rename from
"avx512f_fmaddsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fmsubadd_<mode>"): Rename from
"<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>" and
remove usage of subst.
(define_insn "<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmsubadd_<mode>_mask<round_name>"): Rename from
"avx512f_fmsubadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmsubadd_<mode>_mask3<round_name>"): Rename from
"avx512f_fmsubadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215104
Tony Wang [Wed, 10 Sep 2014 04:45:32 +0000 (04:45 +0000)]
re PR libgcc/56846 (_Unwind_Backtrace on ARM and noexcept)
2014-09-10 Tony Wang <tony.wang@arm.com>
libstdc++-v3/
PR target/56846
* libsupc++/eh_personality.cc (PERSONALITY_FUNCTION):
Return with CONTINUE_UNWINDING when the state pattern
contains: _US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND
From-SVN: r215101
Kugan Vivekanandarajah [Wed, 10 Sep 2014 00:19:23 +0000 (00:19 +0000)]
revert: calls.c (precompute_arguments): Check promoted_for_signed_and_unsigned_p and set the promoted mode.
gcc/ChangeLog:
2014-09-10 Kugan Vivekanandarajah <kuganv@linaro.org>
Revert r213751:
* calls.c (precompute_arguments): Check
promoted_for_signed_and_unsigned_p and set the promoted mode.
(promoted_for_signed_and_unsigned_p): New function.
(expand_expr_real_1): Check promoted_for_signed_and_unsigned_p
and set the promoted mode.
* expr.h (promoted_for_signed_and_unsigned_p): New function definition.
* cfgexpand.c (expand_gimple_stmt_1): Call emit_move_insn if
SUBREG is promoted with SRP_SIGNED_AND_UNSIGNED.
From-SVN: r215100
GCC Administrator [Wed, 10 Sep 2014 00:16:26 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r215099
Manuel López-Ibáñez [Tue, 9 Sep 2014 22:17:54 +0000 (22:17 +0000)]
opth-gen.awk: Generate mapping from cpp message reasons to the options that enable them.
gcc/ChangeLog:
2014-09-09 Manuel López-Ibáñez <manu@gcc.gnu.org>
* opth-gen.awk: Generate mapping from cpp message reasons to the
options that enable them.
* doc/options.texi (CppReason): Document.
gcc/c-family/ChangeLog:
2014-09-09 Manuel López-Ibáñez <manu@gcc.gnu.org>
* c.opt: Add CppReason to various flags.
(Wdate-time): Re-sort.
* c-common.c: Include c-common.h earlier.
(struct reason_option_codes_t): Delete.
(c_option_controlling_cpp_error): Prefix global type and struct
with cpp_.
From-SVN: r215095
Manuel López-Ibáñez [Tue, 9 Sep 2014 21:41:43 +0000 (21:41 +0000)]
invoke.texi (Wnormalized=): Update.
gcc/ChangeLog:
2014-09-09 Manuel López-Ibáñez <manu@gcc.gnu.org>
* doc/invoke.texi (Wnormalized=): Update.
libcpp/ChangeLog:
2014-09-09 Manuel López-Ibáñez <manu@gcc.gnu.org>
* include/cpplib.h (struct cpp_options): Declare warn_normalize as
int instead of enum.
gcc/c-family/ChangeLog:
2014-09-09 Manuel López-Ibáñez <manu@gcc.gnu.org>
* c.opt (Wnormalized): New.
(Wnormalized=): Use Enum and Reject Negative.
* c-opts.c (c_common_handle_option): Do not handle Wnormalized here.
gcc/testsuite/ChangeLog:
2014-09-09 Manuel López-Ibáñez <manu@gcc.gnu.org>
* gcc.dg/cpp/warn-normalized-3.c: Delete useless dg-prune-output.
From-SVN: r215093
Janne Blomqvist [Tue, 9 Sep 2014 21:23:25 +0000 (00:23 +0300)]
Fix pad status check.
2014-09-10 Janne Blomqvist <jb@gcc.gnu.org>
* io/transfer.c (read_block_form): Fix pad status check (found by
Thomas Schwinge with -Wlogical-not-parentheses).
From-SVN: r215092
Segher Boessenkool [Tue, 9 Sep 2014 18:49:08 +0000 (20:49 +0200)]
re PR target/63195 (stage3 build/gengtype miscompiled)
2014-09-09 Segher Boessenkool <segher@kernel.crashing.org>
PR target/63195
* config/rs6000/rs6000.md (*bool<mode>3): Allow only register
operands. Split off the constant operand alternative to ...
(*bool<mode>3_imm): New.
From-SVN: r215091
Jonathan Wakely [Tue, 9 Sep 2014 17:29:32 +0000 (18:29 +0100)]
Make std::deque meet C++11 allocator requirements.
* include/bits/deque.tcc (deque::operator=(const deque&)): Handle
allocator propagation.
(deque::emplace_front, deque::emplace_back): Use allocator traits.
(deque::_M_push_back_aux, deque::_M_push_front_aux): Likewise.
(deque::_M_pop_back_aux, deque::_M_pop_front_aux): Likewise.
* include/bits/stl_deque.h (__deque_buf_size): Add constexpr.
(_Deque_iterator): Handle allocators with custom pointers.
(_Deque_base): Likewise. Use allocator traits.
(deque): Likewise. Add allocator-extended constructors.
(deque::_M_move_assign1, deque::_M_move_assign2): Implement move
assignment via tag dispatching.
(deque::_M_replace_map): Replace existing data.
* include/debug/deque (deque): Add allocator-extended constructors.
* include/profile/deque (deque): Likewise.
* testsuite/23_containers/deque/allocator/copy.cc: New.
* testsuite/23_containers/deque/allocator/copy_assign.cc: New.
* testsuite/23_containers/deque/allocator/ext_ptr.cc: New.
* testsuite/23_containers/deque/allocator/minimal.cc: New.
* testsuite/23_containers/deque/allocator/move.cc: New.
* testsuite/23_containers/deque/allocator/move_assign-2.cc: New.
* testsuite/23_containers/deque/allocator/move_assign.cc: New.
* testsuite/23_containers/deque/allocator/noexcept.cc: New.
* testsuite/23_containers/deque/allocator/swap.cc: New.
* testsuite/23_containers/deque/requirements/dr438/assign_neg.cc:
Adjust dg-error line number.
* testsuite/23_containers/deque/requirements/dr438/
constructor_1_neg.cc: Likewise.
* testsuite/23_containers/deque/requirements/dr438/
constructor_2_neg.cc: Likewise.
* testsuite/23_containers/deque/requirements/dr438/insert_neg.cc:
Likewise.
* testsuite/23_containers/vector/52591.cc: Test both the propagating
and always-equal cases.
From-SVN: r215090
David Malcolm [Tue, 9 Sep 2014 17:02:34 +0000 (17:02 +0000)]
single_set takes an insn
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* rtl.h (single_set_2): Strengthen first param from const_rtx to
const rtx_insn *, and move prototype to above...
(single_set): ...this. Convert this from a macro to an inline
function, enforcing the requirement that the param is a const
rtx_insn *.
(find_args_size_adjust): Strengthen param from rtx to rtx_insn *.
* config/arm/aarch-common-protos.h (aarch_crypto_can_dual_issue):
Strengthen both params from rtx to rtx_insn *.
* config/arm/aarch-common.c (aarch_crypto_can_dual_issue):
Likewise; introduce locals "producer_set", "consumer_set", using
them in place of "producer" and "consumer" when dealing with SET
rather than insn.
* config/avr/avr.c (avr_out_plus): Add checked cast to rtx_insn *
when invoking single_set in region guarded by INSN_P.
(avr_out_bitop): Likewise.
(_reg_unused_after): Introduce local rtx_sequence * "seq" in
region guarded by GET_CODE check, using methods to strengthen
local "this_insn" from rtx to rtx_insn *, and for clarity.
* config/avr/avr.md (define_insn_and_split "xload8<mode>_A"):
Strengthen local "insn" from rtx to rtx_insn *.
(define_insn_and_split "xload<mode>_A"): Likewise.
* config/bfin/bfin.c (trapping_loads_p): Likewise for param
"insn".
(find_load): Likewise for return type.
(workaround_speculation): Likewise for both locals named
"load_insn".
* config/cris/cris.c (cris_cc0_user_requires_cmp): Likewise for
local "cc0_user".
* config/cris/cris.md (define_peephole2 ; moversideqi): Likewise
for local "prev".
* config/h8300/h8300-protos.h (notice_update_cc): Likewise for
param 2.
* config/h8300/h8300.c (notice_update_cc): Likewise.
* config/i386/i386.c (ix86_flags_dependent): Likewise for params
"insn" and "dep_insn".
(exact_store_load_dependency): Likewise for both params.
(ix86_macro_fusion_pair_p): Eliminate local named "single_set"
since this now clashes with inline function. Instead, delay
calling single_set until the point where its needed, and then
assign the result to "compare_set" and rework the conditional that
follows.
* config/ia64/ia64.md (define_expand "tablejump"): Strengthen
local "last" from rtx to rtx_insn *.
* config/mips/mips-protos.h (mips_load_store_insns): Likewise for
second param.
(mips_store_data_bypass_p): Likewise for both params.
* config/mips/mips.c (mips_load_store_insns): Likewise for second
param.
(mips_store_data_bypass_p): Likewise for both params.
(mips_orphaned_high_part_p): Likewise for param "insn".
* config/mn10300/mn10300.c (extract_bundle): Likewise.
(mn10300_bundle_liw): Likewise for locals "r", "insn1", "insn2".
Introduce local rtx "insn2_pat".
* config/rl78/rl78.c (move_elim_pass): Likewise for locals "insn",
"ninsn".
(rl78_remove_unused_sets): Likewise for locals "insn", "ninsn".
Introduce local rtx "set", using it in place of "insn" for the
result of single_set. This appears to fix a bug, since the call
to find_regno_note on a SET does nothing.
* config/rs6000/rs6000.c (set_to_load_agen): Strengthen both
params from rtx to rtx_insn *.
(set_to_load_agen): Likewise.
* config/s390/s390.c (s390_label_align): Likewise for local
"prev_insn". Introduce new rtx locals "set" and "src", using
them in place of "prev_insn" for the results of single_set
and SET_SRC respectively.
(s390_swap_cmp): Strengthen local "jump" from rtx to rtx_insn *.
Introduce new rtx local "set" using in place of "jump" for the
result of single_set. Use SET_SRC (set) rather than plain
XEXP (set, 1).
* config/sh/sh.c (noncall_uses_reg): Strengthen param 2from
rtx to rtx_insn *.
(noncall_uses_reg): Likewise.
(reg_unused_after): Introduce local rtx_sequence * "seq" in region
guarded by GET_CODE check, using its methods for clarity, and to
enable strengthening local "this_insn" from rtx to rtx_insn *.
* config/sh/sh.md (define_expand "mulhisi3"): Strengthen local
"insn" from rtx to rtx_insn *.
(define_expand "umulhisi3"): Likewise.
(define_expand "smulsi3_highpart"): Likewise.
(define_expand "umulsi3_highpart"): Likewise.
* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
local "after". Replace GET_CODE check with a dyn_cast,
introducing new local rtx_sequence * "seq", using insn method for
typesafety.
* dwarf2cfi.c (dwarf2out_frame_debug): Strengthen param "insn"
from rtx to rtx_insn *. Introduce local rtx "pat", using it in
place of "insn" once we're dealing with patterns rather than the
input insn.
(scan_insn_after): Strengthen param "insn" from rtx to rtx_insn *.
(scan_trace): Likewise for local "elt", updating lookups within
sequence to use insn method rather than element method.
* expr.c (find_args_size_adjust): Strengthen param "insn" from rtx
to rtx_insn *.
* gcse.c (gcse_emit_move_after): Likewise for local "new_rtx".
* ifcvt.c (noce_try_abs): Likewise for local "insn".
* ira.c (fix_reg_equiv_init): Add checked cast to rtx_insn * when
invoking single_set.
* lra-constraints.c (insn_rhs_dead_pseudo_p): Strengthen param
"insn" from rtx to rtx_insn *.
(skip_usage_debug_insns): Likewise for return type, adding a
checked cast.
(check_secondary_memory_needed_p): Likewise for local "insn".
(inherit_reload_reg): Likewise.
* modulo-sched.c (sms_schedule): Likewise for local "count_init".
* recog.c (peep2_attempt): Likewise for local "old_insn", adding
checked casts.
(store_data_bypass_p): Likewise for both params.
(if_test_bypass_p): Likewise.
* recog.h (store_data_bypass_p): Likewise for both params.
(if_test_bypass_p): Likewise.
* reload.c (find_equiv_reg): Likewise for local "where".
* reorg.c (delete_jump): Likewise for param "insn".
* rtlanal.c (single_set_2): Strenghen param "insn" from const_rtx
to const rtx_insn *.
* store-motion.c (replace_store_insn): Likewise for param "del".
(delete_store): Strengthen local "i" from rtx to rtx_insn_list *,
and use its methods for clarity, and to strengthen local "del"
from rtx to rtx_insn *.
(build_store_vectors): Use insn method of "st" when calling
replace_store_insn for typesafety and clarity.
From-SVN: r215089
Bill Schmidt [Tue, 9 Sep 2014 16:53:07 +0000 (16:53 +0000)]
rs6000.c (rtx_is_swappable_p): Add UNSPEC_VSX_CVDPSPN as an unswappable operand...
[gcc]
2014-09-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rtx_is_swappable_p): Add
UNSPEC_VSX_CVDPSPN as an unswappable operand, and add commentary
on how to make it legal in future.
[gcc/testsuite]
2014-09-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/swaps-p8-15.c: Remove scan-assembler-not for
xxpermdi and add commentary about adding it back later; remove
unused typedef.
From-SVN: r215088
David Malcolm [Tue, 9 Sep 2014 16:34:56 +0000 (16:34 +0000)]
recog_memoized works on an rtx_insn *
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* caller-save.c (rtx saveinsn): Strengthen this variable from rtx
to rtx_insn *.
(restinsn): Likewise.
* config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move):
Likewise for param.
* config/aarch64/aarch64.c (aarch64_simd_attr_length_move):
Likewise.
* config/arc/arc-protos.h (arc_adjust_insn_length): Likewise for
first param.
(arc_hazard): Likewise for both params.
* config/arc/arc.c (arc600_corereg_hazard): Likewise, adding
checked casts to rtx_sequence * and uses of the insn method for
type-safety.
(arc_hazard): Strengthen both params from rtx to rtx_insn *.
(arc_adjust_insn_length): Likewise for param "insn".
(struct insn_length_parameters_s): Likewise for first param of
"get_variants" callback field.
(arc_get_insn_variants): Likewise for first param and local
"inner". Replace a check of GET_CODE with a dyn_cast to
rtx_sequence *, using methods for type-safety and clarity.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Use casts to
rtx_sequence * and uses of the insn method for type-safety when
invoking arc_adjust_insn_length.
* config/arm/arm-protos.h (arm_attr_length_move_neon): Likewise
for param.
(arm_address_offset_is_imm): Likewise.
(struct tune_params): Likewise for params 1 and 3 of the
"sched_adjust_cost" callback field.
* config/arm/arm.c (cortex_a9_sched_adjust_cost): Likewise for
params 1 and 3 ("insn" and "dep").
(xscale_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(cortexa7_older_only): Likewise for param "insn".
(cortexa7_younger): Likewise.
(arm_attr_length_move_neon): Likewise.
(arm_address_offset_is_imm): Likewise.
* config/avr/avr-protos.h (avr_notice_update_cc): Likewise.
* config/avr/avr.c (avr_notice_update_cc): Likewise.
* config/bfin/bfin.c (hwloop_pattern_reg): Likewise.
(workaround_speculation): Likewise for local "last_condjump".
* config/c6x/c6x.c (shadow_p): Likewise for param "insn".
(shadow_or_blockage_p): Likewise.
(get_unit_reqs): Likewise.
(get_unit_operand_masks): Likewise.
(c6x_registers_update): Likewise.
(returning_call_p): Likewise.
(can_use_callp): Likewise.
(convert_to_callp): Likewise.
(find_last_same_clock): Likwise for local "t".
(reorg_split_calls): Likewise for local "shadow".
(hwloop_pattern_reg): Likewise for param "insn".
* config/frv/frv-protos.h (frv_final_prescan_insn): Likewise.
* config/frv/frv.c (frv_final_prescan_insn): Likewise.
(frv_extract_membar): Likewise.
(frv_optimize_membar_local): Strengthen param "last_membar" from
rtx * to rtx_insn **.
(frv_optimize_membar_global): Strengthen param "membar" from rtx
to rtx_insn *.
(frv_optimize_membar): Strengthen local "last_membar" from rtx *
to rtx_insn **.
* config/ia64/ia64-protos.h (ia64_st_address_bypass_p): Strengthen
both params from rtx to rtx_insn *.
(ia64_ld_address_bypass_p): Likewise.
* config/ia64/ia64.c (ia64_safe_itanium_class): Likewise for param
"insn".
(ia64_safe_type): Likewise.
(group_barrier_needed): Likewise.
(safe_group_barrier_needed): Likewise.
(ia64_single_set): Likewise.
(is_load_p): Likewise.
(record_memory_reference): Likewise.
(get_mode_no_for_insn): Likewise.
(important_for_bundling_p): Likewise.
(unknown_for_bundling_p): Likewise.
(ia64_st_address_bypass_p): Likewise for both params.
(ia64_ld_address_bypass_p): Likewise.
(expand_vselect): Introduce new local rtx_insn * "insn", using it
in place of rtx "x" after the emit_insn call.
* config/i386/i386-protos.h (x86_extended_QIreg_mentioned_p):
Strengthen param from rtx to rtx_insn *.
(ix86_agi_dependent): Likewise for both params.
(ix86_attr_length_immediate_default): Likewise for param 1.
(ix86_attr_length_address_default): Likewise for param.
(ix86_attr_length_vex_default): Likewise for param 1.
* config/i386/i386.c (ix86_attr_length_immediate_default):
Likewise for param "insn".
(ix86_attr_length_address_default): Likewise.
(ix86_attr_length_vex_default): Likewise.
(ix86_agi_dependent): Likewise for both params.
(x86_extended_QIreg_mentioned_p): Likewise for param "insn".
(vselect_insn): Likewise for this variable.
* config/m68k/m68k-protos.h (m68k_sched_attr_opx_type): Likewise
for param 1.
(m68k_sched_attr_opy_type): Likewise.
* config/m68k/m68k.c (sched_get_operand): Likewise.
(sched_attr_op_type): Likewise.
(m68k_sched_attr_opx_type): Likewise.
(m68k_sched_attr_opy_type): Likewise.
(sched_get_reg_operand): Likewise.
(sched_get_mem_operand): Likewise.
(m68k_sched_address_bypass_p): Likewise for both params.
(sched_get_indexed_address_scale): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/m68k/m68k.h (m68k_sched_address_bypass_p): Likewise.
(m68k_sched_indexed_address_bypass_p): Likewise.
* config/mep/mep.c (mep_jmp_return_reorg): Strengthen locals
"label", "ret" from rtx to rtx_insn *, adding a checked cast and
removing another.
* config/mips/mips-protos.h (mips_linked_madd_p): Strengthen both
params from rtx to rtx_insn *.
(mips_fmadd_bypass): Likewise.
* config/mips/mips.c (mips_fmadd_bypass): Likewise.
(mips_linked_madd_p): Likewise.
(mips_macc_chains_last_hilo): Likewise for this variable.
(mips_macc_chains_record): Likewise for param.
(vr4130_last_insn): Likewise for this variable.
(vr4130_swap_insns_p): Likewise for both params.
(mips_ls2_variable_issue): Likewise for param.
(mips_need_noat_wrapper_p): Likewise for param "insn".
(mips_expand_vselect): Add a new local rtx_insn * "insn", using it
in place of "x" after the emit_insn.
* config/pa/pa-protos.h (pa_fpstore_bypass_p): Strengthen both
params from rtx to rtx_insn *.
* config/pa/pa.c (pa_fpstore_bypass_p): Likewise.
(pa_combine_instructions): Introduce local "par" for result of
gen_rtx_PARALLEL, moving decl and usage of new_rtx for after call
to make_insn_raw.
(pa_can_combine_p): Strengthen param "new_rtx" from rtx to rtx_insn *.
* config/rl78/rl78.c (insn_ok_now): Likewise for param "insn".
(rl78_alloc_physical_registers_op1): Likewise.
(rl78_alloc_physical_registers_op2): Likewise.
(rl78_alloc_physical_registers_ro1): Likewise.
(rl78_alloc_physical_registers_cmp): Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
(rl78_alloc_address_registers_macax): Likewise.
(rl78_alloc_physical_registers): Likewise for locals "insn", "curr".
* config/s390/predicates.md (execute_operation): Likewise for
local "insn".
* config/s390/s390-protos.h (s390_agen_dep_p): Likewise for both
params.
* config/s390/s390.c (s390_safe_attr_type): Likewise for param.
(addr_generation_dependency_p): Likewise for param "insn".
(s390_agen_dep_p): Likewise for both params.
(s390_fpload_toreg): Likewise for param "insn".
* config/sh/sh-protos.h (sh_loop_align): Likewise for param.
* config/sh/sh.c (sh_loop_align): Likewise for param and local
"next".
* config/sh/sh.md (define_peephole2): Likewise for local "insn2".
* config/sh/sh_treg_combine.cc
(sh_treg_combine::make_inv_ccreg_insn): Likewise for return type
and local "i".
(sh_treg_combine::try_eliminate_cstores): Likewise for local "i".
* config/stormy16/stormy16.c (combine_bnp): Likewise for locals
"and_insn", "load", "shift".
* config/tilegx/tilegx.c (match_pcrel_step2): Likewise for param
"insn".
* final.c (final_scan_insn): Introduce local rtx_insn * "other"
for XEXP (note, 0) of the REG_CC_SETTER note.
(cleanup_subreg_operands): Strengthen param "insn" from rtx to
rtx_insn *, eliminating a checked cast made redundant by this.
* gcse.c (process_insert_insn): Strengthen local "insn" from rtx
to rtx_insn *.
* genattr.c (main): When writing out the prototype to
const_num_delay_slots, strengthen the param from rtx to
rtx_insn *.
* genattrtab.c (write_const_num_delay_slots): Likewise when
writing out the implementation of const_num_delay_slots.
* hw-doloop.h (struct hw_doloop_hooks): Strengthen the param
"insn" of callback field "end_pattern_reg" from rtx to rtx_insn *.
* ifcvt.c (noce_emit_store_flag): Eliminate local rtx "tmp" in
favor of new rtx locals "src" and "set" and new local rtx_insn *
"insn" and "seq".
(noce_emit_move_insn): Strengthen locals "seq" and "insn" from rtx
to rtx_insn *.
(noce_emit_cmove): Eliminate local rtx "tmp" in favor of new rtx
locals "cond", "if_then_else", "set" and new rtx_insn * locals
"insn" and "seq".
(noce_try_cmove_arith): Strengthen locals "insn_a" and "insn_b",
"last" from rtx to rtx_insn *. Likewise for a local "tmp",
renaming to "tmp_insn". Eliminate the other local rtx "tmp" from
the top-level scope, replacing with new more tightly-scoped rtx
locals "reg", "pat", "mem" and rtx_insn * "insn", "copy_of_a",
"new_insn", "copy_of_insn_b", and make local rtx "set" more
tightly-scoped.
* ira-int.h (ira_setup_alts): Strengthen param "insn" from rtx to
rtx_insn *.
* ira.c (setup_prohibited_mode_move_regs): Likewise for local
"move_insn".
(ira_setup_alts): Likewise for param "insn".
* lra-constraints.c (emit_inc): Likewise for local "add_insn".
* lra.c (emit_add3_insn): Split local rtx "insn" in two, an rtx
and an rtx_insn *.
(lra_emit_add): Eliminate top-level local rtx "insn" in favor of
new more-tightly scoped rtx locals "add3_insn", "insn",
"add2_insn" and rtx_insn * "move_insn".
* postreload-gcse.c (eliminate_partially_redundant_load): Add
checked cast on result of gen_move_insn when invoking
extract_insn.
* recog.c (insn_invalid_p): Strengthen param "insn" from rtx to
rtx_insn *.
(verify_changes): Add a checked cast on "object" when invoking
insn_invalid_p.
(extract_insn_cached): Strengthen param "insn" from rtx to
rtx_insn *.
(extract_constrain_insn_cached): Likewise.
(extract_insn): Likewise.
* recog.h (insn_invalid_p): Likewise for param 1.
(recog_memoized): Likewise for param.
(extract_insn): Likewise.
(extract_constrain_insn_cached): Likewise.
(extract_insn_cached): Likewise.
* reload.c (can_reload_into): Likewise for local "test_insn".
* reload.h (cleanup_subreg_operands): Likewise for param.
* reload1.c (emit_insn_if_valid_for_reload): Rename param from
"insn" to "pat", reintroducing "insn" as an rtx_insn * on the
result of emit_insn. Remove a checked cast made redundant by this
change.
* sel-sched-ir.c (sel_insn_rtx_cost): Strengthen param "insn" from
rtx to rtx_insn *.
* sel-sched.c (get_reg_class): Likewise.
From-SVN: r215087
Marcus Shawcroft [Tue, 9 Sep 2014 15:53:01 +0000 (15:53 +0000)]
Add crtfastmath for AArch64.
gcc/Changelog
2014-09-09 Marcus Shawcroft <marcus.shawcroft@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
* config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC): Define.
(ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.
libgcc/Changelog
2014-09-09 Marcus Shawcroft <marcus.shawcroft@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config.host (aarch64*): Include crtfastmath and t-crtfm.
* config/aarch64/crtfastmath.c: New file.
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
From-SVN: r215086
Kyrylo Tkachov [Tue, 9 Sep 2014 15:27:42 +0000 (15:27 +0000)]
[ARM][tests] Make input and output arrays 128-bit aligned in vectorisation tests
* gcc.target/arm/vect-lceilf_1.c: Make input and output arrays global
and 16-byte aligned.
* gcc.target/arm/vect-lfloorf_1.c: Likewise.
* gcc.target/arm/vect-lroundf_1.c: Likewise.
* gcc.target/arm/vect-rounding-btruncf.c: Likewise.
* gcc.target/arm/vect-rounding-ceilf.c: Likewise.
* gcc.target/arm/vect-rounding-floorf.c: Likewise.
* gcc.target/arm/vect-rounding-roundf.c: Likewise.
From-SVN: r215085
David Malcolm [Tue, 9 Sep 2014 15:20:07 +0000 (15:20 +0000)]
INSN_LOCATION takes an rtx_insn
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* rtl.h (INSN_LOCATION): Strengthen param from const_rtx to
const rtx_insn *, and from rtx to rtx_insn * for the other
overloaded variant.
(RTL_LOCATION): Add a checked cast to rtx_insn * when invoking
INSN_LOCATION, since we know INSN_P holds.
(insn_line): Strengthen param from const_rtx to const rtx_insn *.
(insn_file): Likewise.
(insn_scope): Likewise.
(insn_location): Likewise.
* config/mips/mips.c (mips16_gp_pseudo_reg): Strengthen local
"insn" from rtx to rtx_insn *, introducing a new local rtx "set"
for the result of gen_load_const_gp.
* config/rs6000/rs6000-protos.h (output_call): Strengthen first
param from rtx to rtx_insn *.
* config/rs6000/rs6000.c (output_call): Likewise.
* dwarf2out.c (dwarf2out_var_location): Likewise for local "prev",
introducing a checked cast to rtx_sequence * and use of the insn
method.
* emit-rtl.c (emit_copy_of_insn_after): Strengthen both params
from rtx to rtx_insn *.
(insn_scope): Strengthen param from const_rtx to const rtx_insn *.
(insn_line): Likewise.
(insn_file): Likewise.
(insn_location): Likewise.
* emit-rtl.h (emit_copy_of_insn_after): Strengthen both params
from rtx to rtx_insn *.
* print-rtl.c (print_rtx): Introduce local "in_insn" via a checked
cast, using it for calls to INSN_HAS_LOCATION and insn_location.
* recog.c (peep2_attempt): Introduce local rtx_insn * "peepinsn"
via a checked cast.
* reorg.c (relax_delay_slots): Strengthen locals named "after"
from rtx to rtx_insn *; use methods of "pat" for type-safety.
From-SVN: r215084
David Malcolm [Tue, 9 Sep 2014 15:14:03 +0000 (15:14 +0000)]
Handcode gen_rtx_INSN
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* combine.c (try_combine): Eliminate checked cast on result of
gen_rtx_INSN.
* emit-rtl.c (gen_rtx_INSN): New function, improving over the prior
autogenerated one by strengthening the return type and params 2 and 3
from rtx to rtx_insn *, and by naming the params.
* gengenrtl.c (special_rtx): Add INSN to those that are
special-cased.
* rtl.h (gen_rtx_INSN): New prototype.
From-SVN: r215083
David Malcolm [Tue, 9 Sep 2014 15:10:39 +0000 (15:10 +0000)]
struct ira_reg_equiv_s's "init_insns" is an rtx_insn_list
gcc/ChangeLog:
2014-09-09 David Malcolm <dmalcolm@redhat.com>
* ira.c (ira_update_equiv_info_by_shuffle_insn): Use NULL rather
than NULL_RTX.
(no_equiv): Likewise.
(update_equiv_regs): Likewise.
(setup_reg_equiv): Likewise. Strengthen locals "elem",
"prev_elem", "next_elem" from rtx to rtx_insn_list *, and "insn"
from rtx to rtx_insn *. Use methods of "elem" for typesafety and
clarity.
* ira.h (struct ira_reg_equiv_s): Strengthen field "init_insns"
from rtx to rtx_insn_list *.
* lra-assigns.c (spill_for): Strengthen local "x" from rtx to
rtx_insn_list * and use methods for clarity and typesafety.
* lra-constraints.c (contains_deleted_insn_p): Likewise for param
"list".
(init_insn_rhs_dead_pseudo_p): Likewise for local "insns". Remove
redundant check on INSN_P (insns): this cannot hold, as "insns" is
an INSN_LIST, not an insn.
(reverse_equiv_p): Strengthen local "insns" from rtx to
rtx_insn_list * and use methods for clarity and typesafety.
(contains_reloaded_insn_p): Likewise for local "list".
From-SVN: r215082
Alan Lawrence [Tue, 9 Sep 2014 14:08:56 +0000 (14:08 +0000)]
[AArch64 Testsuite] Add a test of vldN_dup intrinsics
* gcc.target/aarch64/vldN_dup_1.c: New test.
From-SVN: r215078
projects / gcc.git / log