i965/fs: Brown bag fix.

i965/vec4: Add ability to reswizzle arbitrary swizzles.

Before commit 04895f5c we would only reswizzle dot product instructions
(since they wrote the same value into all channels, and we didn't have
to think about anything else). That commit extended reswizzling to cases
when the swizzle was single valued -- i.e., writing the same result into
all channels.

But allowing reswizzling of arbitrary things is actually really easy and
is even less code. (Why didn't we do this in the first place?!)

total instructions in shared programs: 4266079 -> 4261000 (-0.12%)
instructions in affected programs:     351933 -> 346854 (-1.44%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Reswizzle sources when necessary.

Despite the comment above the function claiming otherwise, the function
did not reswizzle sources, which would lead to bad code generation since
commit 04895f5c, which began claiming we could do such swizzling when we
could not.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82932
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Clean up emitting of untyped atomic and surface reads

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Fix basic block tracking in try_rep_send().

The 'start' instruction is always in the current block, except for the
case of shader time, which emits code in a pattern seen no where else.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Pass block to insert and remove functions missed earlier.

Otherwise, the basic block start/end IPs don't get updated properly,
leading to a broken CFG.  This usually results in the following
assertion failure:

brw_fs_live_variables.cpp:141:
void brw::fs_live_variables::setup_def_use():
Assertion `ip == block->start_ip' failed.

Fixes KWin, WebGL demos, and a score of Piglit tests on Sandybridge and
earlier hardware.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Mark cfg dumping functions const.

The dump() methods don't alter the CFG or basic blocks, so we should
mark them as const.  This lets you call them even if you have a const
cfg_t - which is the case in certain portions of the code (such as live
interval handling).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Update if_block/else_block in the dead control flow pass.

I think this bug crept in only recently.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Connect cfg properly in predicated break peephole.

If the ENDIF instruction was the only instruction in its block, we'd
leave the successors of the merged if+jump block in a bad state.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83080
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

st/mesa: use 1.0f as boolean true on drivers without integer support

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82882

Cc: 10.2 10.3 mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa: set UniformBooleanTrue = 1.0f by default

because NativeIntegers is 0 by default.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82882

Cc: 10.2 10.3 mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

automake: check if the linker supports --dynamic-list

As older versions of gnu ld did not support --dynamic-list check to see
if it is supported before using it.  Non gnu linkers such the apple one
likely lack this option as well.

Fixes the build on OpenBSD which has binutils 2.15 and 2.17.
The --dynamic-list option seems to been have introduced sometime after
binutils 2.17 was released as it is present in 2.18.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

st/xvmc/tests: avoid non portable error.h functions

To improve compatibility with OpenBSD.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

kms-swrast: Support Prime fd handling

Allows using prime fds as display target and from display target.
Test for PRIME capability after initializing kms_swrast screen.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com>

configure.ac: Add AC_SYS_LARGEFILE

Making sure large file support is enabled across the tree even on 32-bit
systems.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

clover/util: Null-terminate the result of compat::string::c_str().

Reported-by: EdB <edb+mesa@sigluy.net>

clover/util: Implement compat::string using aggregation instead of inheritance.

clover/util: Have compat::vector track separate size and capacity.

In order to make the behaviour of resize() and reserve() closer to the
standard.

Reported-by: EdB <edb+mesa@sigluy.net>

clover: Use conversion operator to initialize build log from compat::string.

Fixes binary garbage in the compilation logs caused by
compat::string::c_str() not being null-terminated (which is a bug on
its own that will be fixed in another commit).

Reported-by: EdB <edb+mesa@sigluy.net>

Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404

Reverts
* "i965: Modify state upload to allow 2 different sets of state atoms."
   8e27a4d2b3e4e74e9a77446bce49607433d86be3
* "i965: Modify dirty bit handling to support 2 pipelines."
   373143ed9187c4d4ce1e3c486b5dd0880d18ec8b
* "i965: Create a macro for checking a dirty bit."
   c5bdf9be1eca190417998d548fd140c1eca37a54
   Conflicts:
src/mesa/drivers/dri/i965/brw_context.h
* "i965: Create a macro for setting all dirty bits."
   6f56e1424d923fd80c84090fbf4506c9eaaffea1
   Conflicts:
src/mesa/drivers/dri/i965/brw_blorp.cpp
src/mesa/drivers/dri/i965/brw_state_cache.c
src/mesa/drivers/dri/i965/brw_state_upload.c
* "i965: Create a macro for setting a dirty bit."
   88e3d404dad009d8cff5124cf8acee7daeaceb64

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

freedreno/ir3: fix constlen with relative addressing

We can't rely on the value from the assembler if relative addressing is
used.  So instead use the max of declared-consts (which does not include
compiler immediates) and what we get from the assembler (which does).

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: fix error in bail logic

all_delayed will also be true if we didn't attempt to schedule anything
due to no more instructions using current addr/pred.  We rely on coming
in to block_sched_undelayed() to detect and clean up when there are no
more uses of the current addr/pred, which isn't necessarily an error.

This fixes a regression introduced in b823abed.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: bit of debug

Make it easier to figure out which compiler stage failed.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

vc4: Merge qcompile and tgsi_to_qir

The split between these two didn't make much sense.  I'm going to want the
chance to look at uniform contents in optimization passes, and the QPU
emit I think is going to end up rewriting the uniforms stream.

i965/fs: Use prog rather than fp->Base in fs_visitor

Reduce fs_visitor's dependence on gl_fragment_program.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Use stage_prog_data instead of prog_data->base in fs_visitor

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Add init function to fs_visitor

This common init routine can be used by constructors for multiple program
types.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

vc4: Add a CSE optimization pass.

Debugging a regression in discard support was just too full of duplicate
instructions, so I decided to remove them instead of re-analyzing each of
them as I dumped their outputs in simulation.

vc4: Switch to using native integers.

There were troubles with bools without using native integers
(st_glsl_to_tgsi seemed to think bool true was 1.0f sometimes, when as a
uniform it's stored as ~0), and since I've got native integers other than
divide, I might as well just support them.

vc4: Expose compares at a lower level in QIR.

Before, we had some special opcodes like CMP and SNE that emitted multiple
instructions.  Now, we reduce those operations significantly, giving
optimization more to look at for reducing redundant operations.

The downside is that QOP_SF is pretty special -- we're going to have to
track it separately when we're doing instruction scheduling, and we want
to peephole it into the instruction generating the destination write in
most cases (and not allocate the destination reg, probably.  Unless it's
used for some other purpose, as well).

vc4: Stop being so clever in CMP handling.

This kind of cleverness should be in a general merging-of-ADD-and-MUL
instruction scheduler, rather than individual opcodes.

state_tracker: Fix bug in conditional discards with native ints.

A bool is 0 or ~0, and KILL_IF takes a float arg that's <0 for discard or
>= 0 for not.  By negating it, we ended up doing a floating point subtract
of (0 - ~0), which ended up as an inf.  To make this actually work, we
need to convert the bool to a float.

Reviewed-by: Brian Paul <brianp@vmware.com>

swrast: s/INLINE/inline/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

osmesa: s/INLINE/inline/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

xlib: s/INLINE/inline/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

meta: s/INLINE/inline/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: s/INLINE/inline/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

r600g,radeonsi: make sure there's enough CS space before resuming queries

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83432

Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

mesa: invalidate draw state in glPopClientAttrib

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82538

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>

Revert "r600g,radeonsi: initialize HTILE to fully-expanded state"

This reverts commit f05fe294e7e8dfb08be172f426252192c0ba17ab.

Apparently the hw doesn't like this. Revert to the "cleared" state.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83418

winsys/svga: Fix incorrect type usage in IOCTL v2

While similar in layout, the size of the SVGA3dSize type may be smaller than
the struct drm_vmw_size type that is part of the ioctl interface. The kernel
driver could accordingly overwrite a memory area following the size variable
on the stack. Typically that would be another local variable, causing
breakage in, for example, ubuntu 12.04.5 where the handle local variable
becomes overwritten.

v2: Fix whitespace errors

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Cc: "10.1 10.2 10.3" <mesa-stable@lists.freedesktop.org>

glapi: Add KHR_debug functions to check_table test

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>

egl: Restrict multiplication in calloc arguments to use compile-time constants

As explained in the previous commit, we want to avoid the possibility of
integer-multiplication overflow while allocating buffers.

In these two cases, the final allocation size is the product of three values:
one variable and two that are fixed constants at compile time.

In this commit, we move the explicit multiplication to involve only the
compile-time constants, preventing any overflow from that multiplication, (and
allowing calloc to catch any potential overflow from the remainining implicit
multiplication).

Reviewed-by: Matt Turner <mattst88@gmail.com>

Eliminate several cases of multiplication in arguments to calloc

In commit 32f2fd1c5d6088692551c80352b7d6fa35b0cd09, several calls to
_mesa_calloc(x) were replaced with calls to calloc(1, x). This is strictly
equivalent to what the code was doing previously.

But for cases where "x" involves multiplication, now that we are explicitly
using the two-argument calloc, we can do one step better and replace:

calloc(1, A * B);

with:

calloc(A, B);

The advantage of the latter is that calloc will detect any overflow that would
have resulted from the multiplication and will fail the allocation, (whereas
the former would return a small allocation). So this fix can change
potentially exploitable buffer overruns into segmentation faults.

Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Report progress from opt_copy_propagation_elements().

It's been altering the tree and reporting "false" since January 2011.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Skip rewriting instructions in opt_cpe when unnecessary.

Previously, opt_copy_propagation_elements would always rewrite the
instruction stream, even if was the same thing as before.  In order to
report progress correctly, we'll need to bail if the suggested
replacement is identical (or equivalent) to the original code.

This also introduced unnecessary noop swizzles, as far as I can tell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Initialize source_chan in opt_copy_propagation_elements.

Previously, if chans < 4, we passed uninitialized stack garbage to the
ir_swizzle constructor for the excess components.  Thankfully, it
ignores that data, as it's unnecessary, so no harm actually comes of it.

However, it's obviously better to initialize it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Handle ir_triop_csel in emit_bool_to_cond_code().

ir_triop_csel can return a boolean expression, so we need to handle it
here; we simply forgot when we added it.

Fixes Piglit's EXT_shader_integer_mix/{vs,fs}-mix-if-bool.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

i965: Move curb_read_length/total_scratch to brw_stage_prog_data.

All shader stages have these fields, so it makes sense to store them in
the common base structure, rather than duplicating them in each.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

build: Rename md5 to checksums as part of .PHONY target

In commit 46d03d37bf3a75e86f9f8ab56c6a939d04f23383 I renamed a Makefile target
from md5 to checksums, (as we switched from MD5 checksums to SHA-256
checksums, so the more general name is more future proof).

But that commit missed one mention of "md5" as a dependency of the .PHONY
target. Rename that here as well.

glsl: fix assertion which fails for unsigned array indices.

According to the GLSL 1.40 spec, section 5.7 Structure and Array Operations:

"Array elements are accessed using an expression whose type is int or uint."

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

i965/copy_image: Divide the x offsets by block width when using the blitter

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/copy_image: Use the correct block dimension

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

meta/copy_image: Use the correct texture level when creating views

Previously, we were accidentally assuming that the level of both textures
was 0.  Now we actually use the correct level in our hacked texture view.
This doesn't 100% fix the meta path because the texture type is getting
lost somewhere in the pipeline.  However, it actually copies to/from the
correct layer now.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/copy_image: Use the correct texture level

Previously, we were using the source images level for both source and
destination.  Also, we weren't taking the MinLevel from a potential texture
view into account.  This commit fixes both problems.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

gallivm: Fix build against LLVM SVN >= r216982

Only MCJIT is available anymore.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>

r600g: fix alpha-test with HyperZ enabled, fixing L4D2 tree corruption

*_update_db_shader_control depends on the alpha test state. The problem was
it was in a block which is only entered if the pixel shader is changed.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74863

Cc: mesa-stable@lists.freedesktop.org
Tested-by: Benjamin Bellec <b.bellec@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

r600g,radeonsi: Preserve existing buffer flags

The default case was accidentally clearing RADEON_FLAG_CPU_ACCESS from the
previous fall-through cases.

Reported-by: Mathias Fröhlich <Mathias.Froehlich@gmx.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

main: Don't leak temporary texture rows

Reviewed-by: Dave Airlie <airlied@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

r300g: pointless assignment of info.indexed

Did this code mean to do something else, you tell me!

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

omx/h264: remove stray semicolon after if

Coverity reported this, looks wrong to me.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

vdpau: unlock the mutex on error paths in attribute setting.

Coverity pointed out we never dropped the lock here, so fix
it by using a common exit path.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

u_primconvert: Use u_upload_mgr for our little IB allocations.

tex-miplevel-selection was hammering my memory manager with primconverts
on individual quads.  This gets all those converted IBs packed into larger
IBs.

Reviewed-by: Rob Clark <robclark@freedesktop.org>

u_primconvert: Shut up compiler warning.

gcc isn't detecting that src is set before used, since both are under if
(info->indexed).

Reviewed-by: Rob Clark <robclark@freedesktop.org>

gbm: Fix gallium build when X11 is in a non-system directory

pipe-loader.h will include Xlib.h when HAVE_PIPE_LOADER_XLIB is set in the
build.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

vc4: Handle a couple of the transfer map flags.

This is part of fixing extremely long runtimes on some piglit tests that
involve streaming vertex reuploads due to format conversions, and will
similarly be important for X performance, which relies on these flags.

meta: Make MESA_META_DRAW_BUFFERS restore properly

A meta begin/end pair with MESA_META_DRAW_BUFFERS will change visible GL
state.  We recreate the draw buffer enums from the buffer bitfield, which
changes GL_BACK to GL_BACK_LEFT (and GL_FRONT to GL_FRONT_LEFT).

This commit modifes the save/restore logic to instead copy the buffer enums
from the gl_framebuffer and then set them on restore using
_mesa_drawbuffers().

It's not clear how this breaks the benchmark in 82796, but fixing meta to not
leak the state change fixes the regression.

No piglit regressions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=82796
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Cc: mesa-stable@lists.freedesktop.org

Revert "mesa: fix make tarballs"

This reverts commit 0fbb9a599df898d4e1166d6d6f00cb34a0524bea.

Rather than adding hacks around the issue drop the sources from the
final tarball, and re-add them back with 'make dist'. This fixes a
problem when running parallel 'make install' fails as it recreates
sources and triggers partial recompilation.

Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83355
Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>

mesa/program_cache: calloc the correct size for the cache.

Coverity reported this, and I think this is the right solution,
since cache->items is struct cache_item ** not struct cache_item *,
we also realloc it using struct cache_item * at some point.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeonsi: Compile dummy pixel shader on demand

It's never used under normal circumstances.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

u_blitter: Create all shaders on demand

Not all of these are used in every context, so this can make a
significant difference for short-lived contexts such as in piglit tests.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPU

This allows the kernel to prevent such BOs from ever being stored in the
CPU inaccessible part of VRAM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: free uniform_map on failure path.

If we fails in reserve_explicit_locations, we leak uniform_map.

Reported-by: coverity scanner.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

main/cs: Add gl_context::ComputeProgram

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

mesa: Convert NewDriverState to 64-bits

i965 will have more than 32 bits when BRW_STATE_COMPUTE_PROGRAM is added.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

i965: Modify state upload to allow 2 different sets of state atoms.

The set of state atoms for compute shaders is currently empty; it will
be filled in by future patches.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Modify dirty bit handling to support 2 pipelines.

The hardware state for compute shaders is almost entirely orthogonal
to the hardware state for 3D rendering.  To avoid sending unnecessary
state to the hardware, we'll need to have a separate set of state
atoms for the compute pipeline and the 3D pipeline.  That means we
need to maintain two separate sets of dirty bits to determine which
state atoms need to be run.

But the dirty bits are not completely independent; for example, if
BRW_NEW_SURFACES is flagged while doing 3D rendering, then not only do
we need to re-run 3D state atoms that depend on BRW_NEW_SURFACES, but
we also need to re-run compute state atoms that depend on
BRW_NEW_SURFACES.  But we'll also need to re-run those state atoms the
next time the compute pipeline is run.

To accomplish this, we record two sets of dirty bits, one for each
pipeline.  When bits are dirtied (via SET_DIRTY_BIT() or
SET_DIRTY_ALL()) we set them to the dirty state in both pipelines.
When brw_state_upload() is run, we clear the dirty bits just for the
pipeline that was run.

Note that since the number of pipelines is known at compile time to be
2, the compiler should unroll the loops in SET_DIRTY_BIT() and
SET_DIRTY_ALL().

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Create a macro for checking a dirty bit.

This will make it easier to extend dirty bit handling to support
compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Create a macro for setting all dirty bits.

This will make it easier to extend dirty bit handling to support
compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Create a macro for setting a dirty bit.

This will make it easier to extend dirty bit handling to support
compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: add missing parens in vec4 visitor

coverity reported this, Matt said it look like missing parens,
not bad identing, so lets try that.

Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>

nouveau: don't leak dec struct on error

This one path doesn't goto fail, so it seems to leak dec.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

xvmc/tests: %C isn't a valid printf specifier.

Reported-by: Coverity scanner.
Signed-off-by: Dave Airlie <airlied@redhat.com>

nouveau/nv40: quiten coverity warning in unused vertex texture code.

This fixes the code, but we never run it anyways, so silence coverity.

Signed-off-by: Dave Airlie <airlied@redhat.com>

nv50: remove unused variables

Recent code changes have caused these to no longer be used. Remove them.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

mesa: force height of 1D textures to be 1 in texture views

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

nv50: attach the buffer bo to the miptree structures

The current code... makes no sense. Use nouveau_bo_ref to attach the bo
to the exposed resource so as to have the proper lifetime guarantees.

Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

nv50: mt address may not be the underlying bo's start address

With VP2, nv50_miptree is faked because the underlying bo's have to be
laid out in a certain way. This is done by adjusting the address. Make
sure that blits (and everything else for consistency) use the mt address
rather than the bo address as a base.

This fixes retrieving chroma plane with VDPAU.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82255
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

nv50: set the miptree address when clearing bo's in vp2 init

The mt address is about to be used more, make sure it's set
appropriately.

Reported-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

nv50/ir: avoid creating instructions that can't be emitted

When constant folding a MAD operation, we first fold the multiply and
generate an ADD. However we do so without making sure that the immediate
can be handled in the saturate case. If it can't, load the immediate in
a separate instruction.

Reported-by: Tiziano Bacocco <tizbac2@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

nvc0: don't make 1d staging textures linear

Experimentally, the sampler doesn't appear to like these, neither as
buffer nor as rect textures. So remove 1D from the list of texture types
to make linear when used for staging.

This fixes the OSD in mplayer for VDPAU.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

nv50: zero out unbound samplers

Samplers are only defined up to num_samplers, so set all samplers above
nr to NULL so that we don't try to read them again later.

Tested-by: Christian Ruppert <idl0r@qasl.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

nvc0/ir: avoid infinite recursion when finding first uses of tex

In certain circumstances, findFirstUses could end up doubling back on
instructions it had already processed, resulting in an infinite
recursion. Avoid this by keeping track of already-visited instructions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83079
Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>

freedreno/ir3: add DDX/DDY

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/ir3: don't keep IR around

Once we've assembled the shader, no need to keep the intermediate
around.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

i965/fs: Don't segfault when debug-logging a null program

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Don't segfault when debug-logging a null program

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radeonsi: implement EXPCLEAR optimization for depth

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

r600g,radeonsi: initialize HTILE to fully-expanded state

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: implement fast depth clear

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>