Jeff Law [Thu, 9 Nov 2017 23:26:08 +0000 (16:26 -0700)]
vr-values.h: New file with vr_values class.
* vr-values.h: New file with vr_values class.
* tree-vrp.c: Include vr-values.h
(vrp_value_range_pool, vrp_equiv_obstack, num_vr_values): Move static
data objects into the vr_values class.
(vr_value, values_propagated, vr_phi_edge_counts): Likewise.
(get_value_range): Make it a member function within vr_values class.
(set_defs_to_varying, update_value_range, add_equivalence): Likewise.
(vrp_stmt_computes_nonzero_p, op_with_boolean_value_range_p): Likewise.
(op_with_constant_singleton_value_range): Likewise.
(extract_range_for_var_from_comparison_expr): Likewise.
(extract_range_from_assert, extract_range_from_ssa_name): Likewise.
(extract_range_from_binary_expr): Likewise.
(extract_range_from_unary_expr): Likewise.
(extract_range_from_cond_expr, extrat_range_from_comparison): Likewise.
(check_for_binary_op_overflow, extract_range_basic): Likewise.
(extract_range_from_assignment, adjust_range_with_scev): Likewise.
(dump_all_value_ranges, get_vr_for_comparison): Likewise.
(compare_name_with_value, compare_names): Likewise.
(vrp_evaluate_conditional_warnv_with_ops_using_ranges): Likewise.
(vrp_evaluate_conditional_warnv_with_ops): Likewise. Remove prototype.
(vrp_evaluate_conditional, vrp_visit_cond_stmt): Likewise.
(vrp_visit_switch_stmt, extract_range_from_stmt): Likewise.
(extract_range_from_phi_node): Likewise.
(simplify_truth_ops_using_ranges): Likewise.
(simplify_div_or_mod_using_ranges): Likewise.
(simplify_min_or_max_using_ranges, simplify_abs_using_ranges): Likewise.
(simplify_bit_ops_using_ranges, simplify_cond_using_ranges_1): Likewise.
(simplify_cond_using_ranges_2, simplify_switch_using_ranges): Likewise.
(simplify_float_conversion_using_ranges): Likewise.
(simplify_internal_call_using_ranges): Likewise.
(two_valued_val_range_p, simplify_stmt_using_ranges): Likewise.
(vrp_visit_assignment_or_call): Likewise. Smuggle class instance
poitner via x_vr_values for calls into gimple folder.
(vrp_initialize_lattice): Make this the vr_values ctor.
(vrp_free_lattice): Make this the vr_values dtor.
(set_vr_value): New function.
(class vrp_prop): Add vr_values data member. Add various member
functions as well as member functions that delegate to vr_values.
(check_array_ref): Make a member function within vrp_prop class.
(search_for_addr_array, vrp_initialize): Likewise.
(vrp_finalize): Likewise. Revamp to avoid direct access to
vr_value, values_propagated, etc.
(check_array_bounds): Extract vrp_prop class instance pointer from
walk info structure. Use it to call member functions.
(check_all_array_refs): Make a member function within vrp_prop class.
Smuggle class instance pointer via walk info structure.
(x_vr_values): New local static.
(vrp_valueize): Use x_vr_values to get class instance.
(vr_valueize_1): Likewise.
(class vrp_folder): Add vr_values data member. Add various member
functions as well as member functions that delegate to vr_values.
(fold_predicate_in): Make a mber fucntion within vrp_folder class.
(simplify_stmt_for_jump_threading): Extract smuggled vr_values
class instance from vr_values. Use it to call member functions.
(vrp_dom_walker): Add vr_values data member.
(vrp_dom_walker::after_dom_children): Smuggle vr_values class
instance via x_vr_values.
(identify_jump_threads): Accept vr_values as argument. Store
it into the walker structure.
(evrp_dom_walker): Add vr_values class data member. Add various
delegators.
(evrp_dom_walker::try_find_new_range): Use vr_values data
member to access the memory allocator.
(evrp_dom_walker::before_dom_children): Store vr_values class
instance into the vrp_folder class.
(evrp_dom_walker::push_value_range): Rework to avoid direct
access to num_vr_values and vr_value.
(evrp_dom_walker::pop_value_range): Likewise.
(execute_early_vrp): Remove call to vrp_initialize_lattice.
Use vr_values to get to dump_all_value_ranges member function.
Remove call to vrp_free_lattice. Call vrp_initialize, vrp_finalize,
and simplify_cond_using_ranges_2 via vrp_prop class instance.
Pass vr_values class instance down to identify_jump_threads.
Remove call to vrp_free_lattice.
(debug_all_value_ranges): Remove.
From-SVN: r254613
Jeff Law [Thu, 9 Nov 2017 23:04:20 +0000 (16:04 -0700)]
tree-vrp.c (vrp_prop): Move class to earlier point in the file.
* tree-vrp.c (vrp_prop): Move class to earlier point in the file.
(vrp_folder): Likewise.
From-SVN: r254612
Jeff Law [Thu, 9 Nov 2017 22:57:18 +0000 (15:57 -0700)]
tree-vrp.c (set_value_range): Do not reference vrp_equiv_obstack.
* tree-vrp.c (set_value_range): Do not reference vrp_equiv_obstack.
Get it from the existing bitmap instead.
(vrp_intersect_ranges_1): Likewise.
From-SVN: r254611
Ian Lance Taylor [Thu, 9 Nov 2017 21:56:59 +0000 (21:56 +0000)]
sync/atomic, runtime/internal/atomic: don't assume reads from 0 fail
For a misaligned address force a panic rather than assuming that reading
from the address 0 will cause one.
Reviewed-on: https://go-review.googlesource.com/69850
From-SVN: r254610
Jakub Jelinek [Thu, 9 Nov 2017 19:24:59 +0000 (20:24 +0100)]
gimple-ssa-store-merging.c (struct store_immediate_info): Add bit_not_p field.
* gimple-ssa-store-merging.c (struct store_immediate_info): Add
bit_not_p field.
(store_immediate_info::store_immediate_info): Add bitnotp argument,
set bit_not_p to it.
(imm_store_chain_info::coalesce_immediate_stores): Break group
if bit_not_p is different.
(count_multiple_uses, split_group,
imm_store_chain_info::output_merged_store): Handle info->bit_not_p.
(handled_load): Avoid multiple chained BIT_NOT_EXPRs.
(pass_store_merging::process_store): Handle BIT_{AND,IOR,XOR}_EXPR
result inverted using BIT_NOT_EXPR, compute bit_not_p, pass it
to store_immediate_info ctor.
From-SVN: r254606
Paul Thomas [Thu, 9 Nov 2017 19:12:41 +0000 (19:12 +0000)]
re PR fortran/78619 (ICE in copy_reference_ops_from_ref, at tree-ssa-sccvn.c:889)
2017-11-09 Paul Thomas <pault@gcc.gnu.org>
PR fortran/78619
* check.c (same_type_check): Introduce a new argument 'assoc'
with default value false. If this is true, use the symbol type
spec of BT_PROCEDURE expressions.
(gfc_check_associated): Set 'assoc' true in the call to
'same_type_check'.
2017-11-09 Paul Thomas <pault@gcc.gnu.org>
PR fortran/78619
* gfortran.dg/pr78619.f90: New test.
From-SVN: r254605
Steven G. Kargl [Thu, 9 Nov 2017 18:45:29 +0000 (18:45 +0000)]
re PR fortran/78814 (ICE in symbol_rank, at fortran/interface.c:1265)
2017-11-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/78814
* interface.c (symbol_rank): Check for NULL pointer.
2017-11-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/78814
* gfortran.dg/interface_40.f90: New testcase.
From-SVN: r254604
Jim Wilson [Thu, 9 Nov 2017 18:03:52 +0000 (18:03 +0000)]
Remove obsolete ECOFF support.
* collect2.c (OBJECT_FORMAT_COFF): Remove EXTENDED_COFF support.
(scan_prog_file): Likewise.
From-SVN: r254603
Jan Hubicka [Thu, 9 Nov 2017 16:36:07 +0000 (17:36 +0100)]
bb-reorder.c (max_entry_frequency): Remove.
* bb-reorder.c (max_entry_frequency): Remove.
(find_traces, rotate_loop, mark_bb_visited, connect_better_edge_p,
connect_traces, push_to_next_round_p): Remove prototypes.
(find_traces_1_round): Use counts only.
(push_to_next_round_p): Likewise.
(find_traces): Likewise.
(rotate_loop): Likewise.
(find_traces_1_round): Likewise.
(connect_traces): Likewise.
(edge_order): Likewise.
From-SVN: r254602
Thomas Preud'homme [Thu, 9 Nov 2017 16:34:43 +0000 (16:34 +0000)]
[ARM] Fix cmse_nonsecure_entry return insn size
A number of instructions are output in assembler form by
output_return_instruction () when compiling a function with the
cmse_nonsecure_entry attribute for Armv8-M Mainline with hardfloat float
ABI. However, the corresponding thumb2_cmse_entry_return insn pattern
does not account for all these instructions in its computing of the
length of the instruction.
This may lead GCC to use the wrong branching instruction due to
incorrect computation of the offset between the branch instruction's
address and the target address.
This commit fixes the mismatch between what output_return_instruction ()
does and what the pattern think it does and adds a note warning about
mismatch in the affected functions' heading comments to ensure code does
not get out of sync again.
Note: no test is provided because the C testcase is fragile (only works
on GCC 6) and the extracted RTL test fails to compile due to bugs in the
RTL frontend (PR82815 and PR82817)
2017-11-09 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.c (output_return_instruction): Add comments to
indicate requirement for cmse_nonsecure_entry return to account
for the size of clearing instruction output here.
(thumb_exit): Likewise.
* config/arm/thumb2.md (thumb2_cmse_entry_return): Fix length for
return in hardfloat mode.
From-SVN: r254601
Eric Botcazou [Thu, 9 Nov 2017 16:34:02 +0000 (16:34 +0000)]
controlled2.adb, [...]: Disable all warnings.
* gnat.dg/controlled2.adb, gnat.dg/controlled4.adb,
gnat.dg/finalized.adb: Disable all warnings.
From-SVN: r254600
Segher Boessenkool [Thu, 9 Nov 2017 15:53:41 +0000 (16:53 +0100)]
rs6000: Separate shrink-wrapping for the TOC register
This makes the TOC register save a component. If -msave-toc-indirect
is not explicitly disabled, it enables it, and then moves the prologue
code generated for that to a better place. So far this only matters
for indirect calls (for direct calls the save is done in the PLT stub).
The restore is always done directly after the bl insn (the compiler
generates a nop there, the linker replaces it with a load).
* config/rs6000/rs6000.c (machine_function): Add a bool,
"toc_is_wrapped_separately".
(rs6000_option_override_internal): Enable OPTION_MASK_SAVE_TOC_INDIRECT
if it wasn't explicitly set or unset, we are optimizing for speed, and
doing separate shrink-wrapping.
(rs6000_get_separate_components): Enable the TOC component if
saving the TOC register in the prologue.
(rs6000_components_for_bb): Handle the TOC component.
(rs6000_emit_prologue_components): Store the TOC register where needed.
(rs6000_set_handled_components): Mark TOC as handled, if handled.
(rs6000_emit_prologue): Don't save the TOC if that is already done.
From-SVN: r254599
Martin Jambor [Thu, 9 Nov 2017 15:31:06 +0000 (16:31 +0100)]
Moving parameter manipulation into its own file
2017-11-09 Martin Jambor <mjambor@suse.cz>
* ipa-param-manipulation.c: New file.
* ipa-param-manipulation.h: Likewise.
* Makefile.in (OBJS): Add ipa-param-manipulation.o.
(PLUGIN_HEADERS): Addded ipa-param-manipulation.h
* ipa-param.h (ipa_parm_op): Moved to ipa-param-manipulation.h.
(ipa_parm_adjustment): Likewise.
(ipa_parm_adjustment_vec): Likewise.
(ipa_get_vector_of_formal_parms): Moved declaration to
ipa-param-manipulation.h.
(ipa_get_vector_of_formal_parm_types): Likewise.
(ipa_modify_formal_parameters): Likewise.
(ipa_modify_call_arguments): Likewise.
(ipa_combine_adjustments): Likewise.
(ipa_dump_param_adjustments): Likewise.
(ipa_modify_expr): Likewise.
(ipa_get_adjustment_candidate): Likewise.
* ipa-prop.c (ipa_get_vector_of_formal_parms): Moved to
ipa-param-manipulation.c.
(ipa_get_vector_of_formal_parm_types): Likewise.
(ipa_modify_formal_parameters): Likewise.
(ipa_modify_call_arguments): Likewise.
(ipa_modify_expr): Likewise.
(get_ssa_base_param): Likewise.
(ipa_get_adjustment_candidate): Likewise.
(index_in_adjustments_multiple_times_p): Likewise.
(ipa_combine_adjustments): Likewise.
(ipa_dump_param_adjustments): Likewise.
* tree-sra.c: Also include ipa-param-manipulation.h
* omp-simd-clone.c: Include ipa-param-manipulation.h instead of
ipa-param.h.
From-SVN: r254598
Richard Sandiford [Thu, 9 Nov 2017 15:19:15 +0000 (15:19 +0000)]
Add a vect_masked_store target selector
This patch adds a target selector that says whether the target
supports IFN_MASK_STORE.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/sourcebuild.texi (vect_masked_store): Document.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_vect_masked_store):
New proc.
* gcc.dg/vect/vect-cselim-1.c (foo): Mention that the second loop
is vectorizable with masked stores. Update scan-tree-dump-times
accordingly.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254597
Richard Sandiford [Thu, 9 Nov 2017 15:18:59 +0000 (15:18 +0000)]
Add a vect_align_stack_vars target selector
This patch adds a target selector to say whether it's possible to
align a local variable to the target's preferred vector alignment.
This can be false for large vectors if the alignment is only
a preference and not a hard requirement (and thus if there is no
need to support a stack realignment mechanism).
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/sourcebuild.texi (vect_align_stack_vars): Document.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_vect_align_stack_vars): New proc.
* gcc.dg/vect/vect-23.c: Only expect the array to be aligned if
vect_align_stack_vars.
* gcc.dg/vect/vect-24.c: Likewise.
* gcc.dg/vect/vect-25.c: Likewise.
* gcc.dg/vect/vect-26.c: Likewise.
* gcc.dg/vect/vect-32-big-array.c: Likewise.
* gcc.dg/vect/vect-32.c: Likewise.
* gcc.dg/vect/vect-40.c: Likewise.
* gcc.dg/vect/vect-42.c: Likewise.
* gcc.dg/vect/vect-46.c: Likewise.
* gcc.dg/vect/vect-48.c: Likewise.
* gcc.dg/vect/vect-52.c: Likewise.
* gcc.dg/vect/vect-54.c: Likewise.
* gcc.dg/vect/vect-62.c: Likewise.
* gcc.dg/vect/vect-67.c: Likewise.
* gcc.dg/vect/vect-75-big-array.c: Likewise.
* gcc.dg/vect/vect-75.c: Likewise.
* gcc.dg/vect/vect-77-alignchecks.c: Likewise.
* gcc.dg/vect/vect-78-alignchecks.c: Likewise.
* gcc.dg/vect/vect-89-big-array.c: Likewise.
* gcc.dg/vect/vect-89.c: Likewise.
* gcc.dg/vect/vect-96.c: Likewise.
* gcc.dg/vect/vect-multitypes-3.c: Likewise.
* gcc.dg/vect/vect-multitypes-6.c: Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254596
Richard Sandiford [Thu, 9 Nov 2017 15:18:32 +0000 (15:18 +0000)]
Add a vect_variable_length target selector
This patch adds a target selector for variable-length vectors.
Initially it's always false, but the SVE patch provides a case
in which it's true.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/sourcebuild.texi (vect_variable_length): Document.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_vect_variable_length): New proc.
* gcc.dg/vect/pr60482.c: XFAIL test for no epilog loop if
vect_variable_length.
* gcc.dg/vect/slp-reduc-6.c: XFAIL two-operation SLP if
vect_variable_length.
* gcc.dg/vect/vect-alias-check-5.c: XFAIL alias optimization if
vect_variable_length.
* gfortran.dg/vect/fast-math-mgrid-resid.f: XFAIL predictive
commoning optimization if vect_variable_length.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254595
Richard Sandiford [Thu, 9 Nov 2017 15:17:29 +0000 (15:17 +0000)]
Add a vect_unaligned_possible target selector
This patch adds a target selector that says whether we can ever
generate an "unaligned" accesses, where "unaligned" is relative
to the target's preferred vector alignment. This is already true if:
vect_no_align && { ! vect_hw_misalign }
i.e. if the target doesn't have any alignment mechanism and also
doesn't allow unaligned accesses. It is also true (for the things
tested by gcc.dg/vect) if the target only wants things to be aligned
to an element; in that case every normal scalar access is "vector aligned".
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/sourcebuild.texi (vect_unaligned_possible): Document.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_vect_unaligned_possible): New proc.
* gcc.dg/vect/slp-25.c: Extend XFAIL of peeling for alignment from
vect_no_align && { ! vect_hw_misalign } to ! vect_unaligned_possible.
* gcc.dg/vect/vect-multitypes-1.c: Likewise.
* gcc.dg/vect/vect-109.c: XFAIL vectorisation of an unaligned
access to ! vect_unaligned_possible.
* gcc.dg/vect/vect-33.c: Likewise.
* gcc.dg/vect/vect-42.c: Likewise.
* gcc.dg/vect/vect-56.c: Likewise.
* gcc.dg/vect/vect-60.c: Likewise.
* gcc.dg/vect/vect-96.c: Likewise.
* gcc.dg/vect/vect-peel-1.c: Likewise.
* gcc.dg/vect/vect-27.c: Extend XFAIL of unaligned vectorization from
vect_no_align && { ! vect_hw_misalign } to ! vect_unaligned_possible.
* gcc.dg/vect/vect-29.c: Likewise.
* gcc.dg/vect/vect-44.c: Likewise.
* gcc.dg/vect/vect-48.c: Likewise.
* gcc.dg/vect/vect-50.c: Likewise.
* gcc.dg/vect/vect-52.c: Likewise.
* gcc.dg/vect/vect-72.c: Likewise.
* gcc.dg/vect/vect-75-big-array.c: Likewise.
* gcc.dg/vect/vect-75.c: Likewise.
* gcc.dg/vect/vect-77-alignchecks.c: Likewise.
* gcc.dg/vect/vect-77-global.c: Likewise.
* gcc.dg/vect/vect-78-alignchecks.c: Likewise.
* gcc.dg/vect/vect-78-global.c: Likewise.
* gcc.dg/vect/vect-multitypes-3.c: Likewise.
* gcc.dg/vect/vect-multitypes-4.c: Likewise.
* gcc.dg/vect/vect-multitypes-6.c: Likewise.
* gcc.dg/vect/vect-peel-4.c: Likewise.
* gcc.dg/vect/vect-peel-3.c: Likewise, and also for peeling
for alignment.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254594
Richard Sandiford [Thu, 9 Nov 2017 15:16:55 +0000 (15:16 +0000)]
Add a vect_element_align_preferred target selector
This patch adds a target selector for targets whose
preferred_vector_alignment is the alignment of one element. We'll never
peel in that case, and the step of a loop that operates on normal (as
opposed to packed) elements will always divide the preferred alignment.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/sourcebuild.texi (vect_element_align_preferred): Document.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_vect_element_align_preferred): New proc.
(check_effective_target_vect_peeling_profitable): Test it.
* gcc.dg/vect/no-section-anchors-vect-31.c: Don't expect peeling
if vect_element_align_preferred.
* gcc.dg/vect/no-section-anchors-vect-64.c: Likewise.
* gcc.dg/vect/pr65310.c: Likewise.
* gcc.dg/vect/vect-26.c: Likewise.
* gcc.dg/vect/vect-54.c: Likewise.
* gcc.dg/vect/vect-56.c: Likewise.
* gcc.dg/vect/vect-58.c: Likewise.
* gcc.dg/vect/vect-60.c: Likewise.
* gcc.dg/vect/vect-89-big-array.c: Likewise.
* gcc.dg/vect/vect-89.c: Likewise.
* gcc.dg/vect/vect-92.c: Likewise.
* gcc.dg/vect/vect-peel-1.c: Likewise.
* gcc.dg/vect/vect-outer-3a-big-array.c: Expect the step to
divide the alignment if vect_element_align_preferred.
* gcc.dg/vect/vect-outer-3a.c: Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254593
Richard Sandiford [Thu, 9 Nov 2017 15:16:42 +0000 (15:16 +0000)]
Add vect_perm3_* target selectors
SLP load permutation fails if any individual permutation requires more
than two vector inputs. For 128-bit vectors, it's possible to permute
3 contiguous loads of 32-bit and 8-bit elements, but not 16-bit elements
or 64-bit elements. The results are reversed for 256-bit vectors,
and so on for wider vectors.
This patch adds a routine that tests whether a permute will require
three vectors for a given vector count and element size, then adds
vect_perm3_* target selectors for the cases that we currently use.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/sourcebuild.texi (vect_perm_short, vect_perm_byte): Document
previously undocumented selectors.
(vect_perm3_byte, vect_perm3_short, vect_perm3_int): Document.
gcc/testsuite/
* lib/target-supports.exp (vect_perm_supported): New proc.
(check_effective_target_vect_perm3_int): Likewise.
(check_effective_target_vect_perm3_short): Likewise.
(check_effective_target_vect_perm3_byte): Likewise.
* gcc.dg/vect/slp-perm-1.c: Expect SLP load permutation to
succeed if vect_perm3_int.
* gcc.dg/vect/slp-perm-5.c: Likewise.
* gcc.dg/vect/slp-perm-6.c: Likewise.
* gcc.dg/vect/slp-perm-7.c: Likewise.
* gcc.dg/vect/slp-perm-8.c: Likewise vect_perm3_byte.
* gcc.dg/vect/slp-perm-9.c: Likewise vect_perm3_short.
Use vect_perm_short instead of vect_perm. Add a scan-tree-dump-not
test for vect_perm3_short targets.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254592
Richard Sandiford [Thu, 9 Nov 2017 15:16:06 +0000 (15:16 +0000)]
Don't assume vect_multiple_sizes means 2 sizes
Some tests assumed that there would only be 2 vector sizes if
vect_multiple_sizes, whereas for SVE there are three (SVE, 128-bit
and 64-bit). This patch replaces scan-tree-dump-times with
scan-tree-dump for vect_multiple_sizes but keeps it for
!vect_multiple_sizes.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/testsuite/
* gcc.dg/vect/no-vfa-vect-101.c: Use scan-tree-dump rather than
scan-tree-dump-times for vect_multiple_sizes.
* gcc.dg/vect/no-vfa-vect-102.c: Likewise.
* gcc.dg/vect/no-vfa-vect-102a.c: Likewise.
* gcc.dg/vect/no-vfa-vect-37.c: Likewise.
* gcc.dg/vect/no-vfa-vect-79.c: Likewise.
* gcc.dg/vect/vect-104.c: Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254591
Richard Sandiford [Thu, 9 Nov 2017 15:15:47 +0000 (15:15 +0000)]
Add available_vector_sizes to target-supports.exp
This patch adds a routine that lists the available vector sizes
for a target and uses it for some existing target conditions.
Later patches add more uses.
The cases are taken from multiple_sizes.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/testsuite/
* lib/target-supports.exp (available_vector_sizes): New proc.
(check_effective_target_vect_multiple_sizes): Use it.
(check_effective_target_vect64): Likewise.
(check_effective_target_vect_sizes_32B_16B): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254590
Richard Sandiford [Thu, 9 Nov 2017 15:15:36 +0000 (15:15 +0000)]
Add VECTOR_BITS to tree-vect.h
Several vector tests are sensitive to the vector size. This patch adds
a VECTOR_BITS macro to tree-vect.h to select the expected vector size
and uses it to influence iteration counts and array sizes. The tests
keep the original values if the vector size is small enough.
For now VECTOR_BITS is always 128, but the SVE patches add other values.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/testsuite/
* gcc.dg/vect/tree-vect.h (VECTOR_BITS): Define.
* gcc.dg/vect/bb-slp-pr69907.c: Include tree-vect.h.
(N): New macro.
(foo): Use it instead of hard-coded 320.
* gcc.dg/vect/no-scevccp-outer-7.c (N): Redefine if the default
value is too small for VECTOR_BITS.
* gcc.dg/vect/no-scevccp-vect-iv-3.c (N): Likewise.
* gcc.dg/vect/no-section-anchors-vect-31.c (N): Likewise.
* gcc.dg/vect/no-section-anchors-vect-36.c (N): Likewise.
* gcc.dg/vect/slp-perm-9.c (N): Likewise.
* gcc.dg/vect/vect-32.c (N): Likewise.
* gcc.dg/vect/vect-75.c (N, OFF): Likewise.
* gcc.dg/vect/vect-77-alignchecks.c (N, OFF): Likewise.
* gcc.dg/vect/vect-78-alignchecks.c (N, OFF): Likewise.
* gcc.dg/vect/vect-89.c (N): Likewise.
* gcc.dg/vect/vect-96.c (N): Likewise.
* gcc.dg/vect/vect-multitypes-3.c (N): Likewise.
* gcc.dg/vect/vect-multitypes-6.c (N): Likewise.
* gcc.dg/vect/vect-over-widen-1.c (N): Likewise.
* gcc.dg/vect/vect-over-widen-4.c (N): Likewise.
* gcc.dg/vect/vect-reduc-pattern-1a.c (N): Likewise.
* gcc.dg/vect/vect-reduc-pattern-1b.c (N): Likewise.
* gcc.dg/vect/vect-reduc-pattern-2a.c (N): Likewise.
* gcc.dg/vect/no-section-anchors-vect-64.c (NINTS): New macro.
(N): Redefine in terms of NINTS.
(ia, ib, ic): Use NINTS instead of hard-coded constants in the
array bounds.
* gcc.dg/vect/no-section-anchors-vect-69.c (NINTS): New macro.
(N): Redefine in terms of NINTS.
(test1): Replace a and b fields with NINTS - 2 ints of padding.
(main1): Use NINTS instead of hard-coded constants.
* gcc.dg/vect/section-anchors-vect-69.c (NINTS): New macro.
(N): Redefine in terms of NINTS.
(test1): Replace a and b fields with NINTS - 2 ints of padding.
(test2): Remove incorrect comments about alignment.
(main1): Use NINTS instead of hard-coded constants.
* gcc.dg/vect/pr45752.c (N): Redefine if the default value is
too small for VECTOR_BITS.
(main): Continue to use canned results for the default value of N,
but compute the expected results from scratch for other values.
* gcc.dg/vect/slp-perm-1.c (N, main): As for pr45752.c.
* gcc.dg/vect/slp-perm-4.c (N, main): Likewise.
* gcc.dg/vect/slp-perm-5.c (N, main): Likewise.
* gcc.dg/vect/slp-perm-6.c (N, main): Likewise.
* gcc.dg/vect/slp-perm-7.c (N, main): Likewise.
* gcc.dg/vect/pr65518.c (NINTS, N, RESULT): New macros.
(giga): Use NINTS as the array bound.
(main): Use NINTS, N and RESULT.
* gcc.dg/vect/pr65947-5.c (N): Redefine if the default value is
too small for VECTOR_BITS.
(main): Fill in any remaining elements of A programmatically.
* gcc.dg/vect/pr81136.c: Include tree-vect.h.
(a): Use VECTOR_BITS to set the alignment of the target structure.
* gcc.dg/vect/slp-19c.c (N): Redefine if the default value is
too small for VECTOR_BITS.
(main1): Continue to use the canned input for the default value of N,
but compute the input from scratch for other values.
* gcc.dg/vect/slp-28.c (N): Redefine if the default value is
too small for VECTOR_BITS.
(in1, in2, in3): Remove initialization.
(check1, check2): Delete.
(main1): Initialize in1, in2 and in3 here. Check every element
of the vectors and compute the expected values directly instead
of using an array.
* gcc.dg/vect/slp-perm-8.c (N): Redefine if the default value is
too small for VECTOR_BITS.
(foo, main): Change type of "i" to int.
* gcc.dg/vect/vect-103.c (NINTS): New macro.
(N): Redefine in terms of N.
(c): Delete.
(main1): Use NINTS. Check the result from a and b directly.
* gcc.dg/vect/vect-67.c (NINTS): New macro.
(N): Redefine in terms of N.
(main1): Use NINTS for the inner array bounds.
* gcc.dg/vect/vect-70.c (NINTS, OUTERN): New macros.
(N): Redefine in terms of NINTS.
(s): Keep the outer dimensions as 4 even if N is larger than 24.
(tmp1): New variable.
(main1): Only define a local tmp1 if NINTS is relatively small.
Use OUTERN for the outer loops and NINTS for the inner loops.
* gcc.dg/vect/vect-91.c (OFF): New macro.
(a, main3): Use it.
* gcc.dg/vect/vect-92.c (NITER): New macro.
(main1, main2): Use it.
* gcc.dg/vect/vect-93.c (N): Rename to...
(N1): ...this.
(main): Update accordingly.
(N2): New macro.
(main1): Use N1 instead of 3001 and N2 insteaed of 10.
* gcc.dg/vect/vect-multitypes-1.c (NSHORTS, NINTS): New macros.
(N): Redefine in terms of NSHORTS.
(main1): Use NINTS - 1 instead of 3 and NSHORTS - 1 instead of 7.
(main): Likewise.
* gcc.dg/vect/vect-over-widen-3-big-array.c (N): Define to VECTOR_BITS.
(foo): Truncate the expected value to the type of *d.
* gcc.dg/vect/vect-peel-3.c (NINTS, EXTRA): New macros.
(ia, ib, ic, main): Use EXTRA.
(main): Use NINTS.
(RES_A, RES_B, REC_C): New macros.
(RES): Redefine as their sum.
* gcc.dg/vect/vect-reduc-or_1.c (N): New macro.
(in): Change number of elements to N.
(main): Update accordingly. Calculate the expected result.
* gcc.dg/vect/vect-reduc-or_2.c (N, in, main): As for
vect-reduc-or-1.c.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254589
Richard Sandiford [Thu, 9 Nov 2017 15:15:25 +0000 (15:15 +0000)]
Consistently use asm volatile ("" ::: "memory") in vect tests
The vectoriser tests used a combination of:
1) if (impossible condition) abort ();
2) volatile int x; ... *x = ...;
3) asm volatile ("" ::: "memory");
to prevent vectorisation of a set-up loop. The problem with 1) is that
the compiler can often tell that the condition is false and optimise
it away before vectorisation.
This was already happening in slp-perm-9.c, which is why the test was
expecting one loop to be vectorised even when the required permutes
weren't supported. It becomes a bigger problem with SVE, which is
able to vectorise more set-up loops.
The point of this patch is therefore to replace 1) with something else.
2) should work most of the time, but we don't usually treat non-volatile
accesses as aliasing unrelated volatile accesses, so I think in principle
we could split the loop into one that does the set-up and one that does
the volatile accesses. 3) seems more robust because it's also a wild
read and write.
The patch therefore tries to replace all instances of 1) and 2) with 3).
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/testsuite/
* gcc.dg/vect/bb-slp-cond-1.c (main): Add an asm volatile
to the set-up loop.
* gcc.dg/vect/slp-perm-7.c (main): Prevent vectorisation with
asm volatile ("" ::: "memory") instead of a conditional abort.
Update the expected vector loop count accordingly.
* gcc.dg/vect/slp-perm-9.c (main): Likewise.
* gcc.dg/vect/bb-slp-1.c (main1): Prevent vectorisation with
asm volatile ("" ::: "memory") instead of a conditional abort.
* gcc.dg/vect/slp-23.c (main): Likewise,
* gcc.dg/vect/slp-35.c (main): Likewise,
* gcc.dg/vect/slp-37.c (main): Likewise,
* gcc.dg/vect/slp-perm-4.c (main): Likewise.
* gcc.dg/vect/bb-slp-24.c (foo): Likewise. Remove dummy argument.
(main): Update call accordingly.
* gcc.dg/vect/bb-slp-25.c (foo, main): As for bb-slp-24.c.
* gcc.dg/vect/bb-slp-26.c (foo, main): Likewise.
* gcc.dg/vect/bb-slp-29.c (foo, main): Likewise.
* gcc.dg/vect/no-vfa-vect-102.c (foo): Delete.
(main): Don't initialize it.
(main1): Prevent vectorisation with asm volatile ("" ::: "memory")
instead of a conditional abort.
* gcc.dg/vect/no-vfa-vect-102a.c (foo, main1, main): As for
no-vfa-vect-102.c
* gcc.dg/vect/vect-103.c (foo, main1, main): Likewise.
* gcc.dg/vect/vect-104.c (foo, main1, main): Likewise.
* gcc.dg/vect/pr42709.c (main1): Remove dummy argument.
Prevent vectorisation with asm volatile ("" ::: "memory")
instead of a conditional abort.
* gcc.dg/vect/slp-13-big-array.c (y): Delete.
(main1): Prevent vectorisation with asm volatile ("" ::: "memory")
instead of a conditional abort.
* gcc.dg/vect/slp-3-big-array.c (y, main1): As for slp-13-big-array.c.
* gcc.dg/vect/slp-34-big-array.c (y, main1): Likewise.
* gcc.dg/vect/slp-4-big-array.c (y, main1): Likewise.
* gcc.dg/vect/slp-multitypes-11-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-105.c (y, main1): Likewise.
* gcc.dg/vect/vect-105-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-112-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-15-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-2-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-34-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-6-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-73-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-74-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-75-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-76-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-80-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-97-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-all-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-reduc-1char-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-reduc-2char-big-array.c (y, main1): Likewise.
* gcc.dg/vect/vect-strided-a-mult.c (y, main1): Likewise.
* gcc.dg/vect/vect-strided-a-u16-i2.c (y, main1): Likewise.
* gcc.dg/vect/vect-strided-a-u16-i4.c (y, main1): Likewise.
* gcc.dg/vect/vect-strided-a-u16-mult.c (y, main1): Likewise.
* gcc.dg/vect/vect-strided-a-u8-i2-gap.c (y, main1): Likewise.
* gcc.dg/vect/vect-strided-a-u8-i8-gap2-big-array.c (y, main1):
Likewise.
* gcc.dg/vect/vect-strided-a-u8-i8-gap2.c (y, main1): Likewise.
* gcc.dg/vect/vect-strided-a-u8-i8-gap7-big-array.c (y, main1):
Likewise.
* gcc.dg/vect/vect-strided-a-u8-i8-gap7.c (y, main1): Likewise.
* gcc.dg/vect/slp-24.c (y): Delete.
(main): Prevent vectorisation with asm volatile ("" ::: "memory")
instead of a conditional abort.
* gcc.dg/vect/slp-24-big-array.c (y, main): As for slp-24.c.
* gcc.dg/vect/vect-98-big-array.c (y, main): Likewise.
* gcc.dg/vect/vect-bswap16.c (y, main): Likewise.
* gcc.dg/vect/vect-bswap32.c (y, main): Likewise.
* gcc.dg/vect/vect-bswap64.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-mult-char-ls.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-mult.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-same-dr.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u16-i2.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u16-i4.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u32-i4.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u32-i8.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i2-gap.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i2.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8-gap2-big-array.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8-gap2.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8-gap4-big-array.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8-gap4.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8-gap7-big-array.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8-gap7.c (y, main): Likewise.
* gcc.dg/vect/vect-strided-u8-i8.c (y, main): Likewise.
* gcc.dg/vect/vect-10-big-array.c (y): Delete.
(foo): Prevent vectorisation with asm volatile ("" ::: "memory")
instead of a conditional abort.
* gcc.dg/vect/vect-double-reduc-6-big-array.c (y, foo): As for
vect-10-big-array.c.
* gcc.dg/vect/vect-reduc-pattern-1b-big-array.c (y, foo): Likewise.
* gcc.dg/vect/vect-reduc-pattern-1c-big-array.c (y, foo): Likewise.
* gcc.dg/vect/vect-reduc-pattern-2b-big-array.c (y, foo): Likewise.
* gcc.dg/vect/vect-117.c (foo): Delete.
(main): Don't initalize it.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254588
Gary Dismukes [Thu, 9 Nov 2017 15:08:55 +0000 (15:08 +0000)]
exp_util.adb, freeze.adb: Minor reformatting.
2017-11-09 Gary Dismukes <dismukes@adacore.com>
* exp_util.adb, freeze.adb: Minor reformatting.
From-SVN: r254587
Richard Sandiford [Thu, 9 Nov 2017 15:03:01 +0000 (15:03 +0000)]
Be stricter about CONST_VECTOR operands
The recent gen_vec_duplicate patches used CONST_VECTOR for all
constants, but the documentation says:
@findex const_vector
@item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
Represents a vector constant. The square brackets stand for the vector
containing the constant elements. @var{x0}, @var{x1} and so on are
the @code{const_int}, @code{const_double} or @code{const_fixed} elements.
Both the AArch32 and AArch64 ports relied on the elements having
this form and would ICE if the element was something like a CONST
instead. This showed up as a failure in vect-126.c for both arm-eabi
and aarch64-elf (but not aarch64-linux-gnu, which is what the series
was tested on).
The two obvious options were to redefine CONST_VECTOR to accept all
constants or make gen_vec_duplicate honour the existing documentation.
It looks like other code also assumes that integer CONST_VECTORs contain
CONST_INTs, so the patch does the latter.
I deliberately didn't add an assert to gen_const_vec_duplicate
because it looks like the SPU port *does* expect to be able to create
CONST_VECTORs of symbolic constants.
Also, I think the list above should include const_wide_int for vectors
of TImode and wider.
The new routine takes a mode for consistency with the generators,
and because I think it does make sense to accept all constants for
variable-length:
(const (vec_duplicate ...))
rather than have some rtxes for which we instead use:
(vec_duplicate (const ...))
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* doc/rtl.texi (const_vector): Say that elements can be
const_wide_ints too.
* emit-rtl.h (valid_for_const_vec_duplicate_p): Declare.
* emit-rtl.c (valid_for_const_vec_duplicate_p): New function.
(gen_vec_duplicate): Use it instead of CONSTANT_P.
* optabs.c (expand_vector_broadcast): Likewise.
From-SVN: r254586
Richard Sandiford [Thu, 9 Nov 2017 14:51:57 +0000 (14:51 +0000)]
Improve ivopts handling of forced scales
This patch improves the ivopts address cost calculation for modes
in which an index must be scaled rather than unscaled. Previously
we would only try the scaled form if the unscaled form was valid.
Many of the SVE tests rely on this when matching scaled indices.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-ssa-loop-ivopts.c (get_address_cost): Try using a
scaled index even if the unscaled address was invalid.
Don't increase the complexity of using a scale in that case.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254585
Richard Sandiford [Thu, 9 Nov 2017 14:22:39 +0000 (14:22 +0000)]
Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS_PER_WORD
Originally subregs operated at the word level and subreg offsets
were measured in words. The offset units were later changed from
words to bytes (SUBREG_WORD became SUBREG_BYTE), but the fundamental
assumption that subregs should operate at the word level remained.
Whether (subreg:M1 (reg:M2 R2) N) is well-formed depended on the
way that M1 and M2 partitioned into words and whether the subword
part of N represented a lowpart. However, some questions depended
instead on the macro REGMODE_NATURAL_SIZE, which was introduced
as part of the patch that moved from SUBREG_WORD to SUBREG_BYTE.
It is used to decide whether setting (subreg:M1 (reg:M2 R2) N)
clobbers all of R2 or just part of it (df_read_modify_subreg).
Using words doesn't really make sense for modern vector
architectures. Vector registers are usually bigger than
a word and:
(a) setting the scalar lowpart of them usually clobbers the
rest of the register (contrary to the subreg rules,
where only the containing words should be clobbered).
(b) high words of vector registers are often not independently
addressable, even though that's what the subreg rules expect.
This patch therefore uses REGMODE_NATURAL_SIZE instead of
UNITS_PER_WORD to determine the size of the independently
addressable blocks in an inner register.
This is needed for SVE because the number of words in a vector
mode isn't known at compile time, so isn't a sensible basis
for calculating the number of registers.
The only existing port to define REGMODE_NATURAL_SIZE is
64-bit SPARC, where FP registers are 32 bits. (This is the
opposite of the use case for SVE, since the natural division
is smaller than a word.) I compiled the testsuite before and
after the patch for sparc64-linux-gnu and the only test whose
assembly changed was g++.dg/debug/pr65678.C, where the order
of two independent stores was reversed and where a different
register was picked for one pseudo. The new code was
otherwise equivalent to the old code.
2017-11-09 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi: Rewrite the subreg rules so that they partition
the inner register into REGMODE_NATURAL_SIZE bytes rather than
UNITS_PER_WORD bytes.
* emit-rtl.c (validate_subreg): Divide subregs into blocks
based on REGMODE_NATURAL_SIZE of the inner mode.
(gen_lowpart_common): Split the SCALAR_FLOAT_MODE_P and
!SCALAR_FLOAT_MODE_P cases. Use REGMODE_NATURAL_SIZE for the latter.
* expmed.c (lowpart_bit_field_p): Divide the value up into
chunks of REGMODE_NATURAL_SIZE rather than UNITS_PER_WORD.
* expr.c (store_constructor): Use REGMODE_NATURAL_SIZE to test
whether something is likely to occupy more than one register.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254583
Jan Hubicka [Thu, 9 Nov 2017 14:05:14 +0000 (15:05 +0100)]
re PR ipa/82879 (ICE in max, at profile-count.h:889)
PR ipa/82879
* ipa-inline-transform.c (update_noncloned_frequencies): Use
profile_count::adjust_for_ipa_scaling.
* tree-inline.c (copy_bb, copy_cfg_body): Likewise.
* profile-count.c (profile_count::adjust_for_ipa_scaling): New member
function.
* profile-count.h (profile_count::adjust_for_ipa_scaling): Declare.
From-SVN: r254582
Pierre-Marie de Rodat [Thu, 9 Nov 2017 13:59:10 +0000 (13:59 +0000)]
[multiple changes]
2017-11-09 Jerome Lambourg <lambourg@adacore.com>
* gcc-interface/Makefile.in: Add rules to build aarch64-qnx runtimes.
2017-11-09 Hristian Kirtchev <kirtchev@adacore.com>
* gcc-interface/trans.c (gnat_to_gnu): Add processing for
N_Variable_Reference_Marker nodes.
From-SVN: r254581
Pierre-Marie de Rodat [Thu, 9 Nov 2017 13:09:17 +0000 (13:09 +0000)]
[multiple changes]
2017-11-09 Ed Schonberg <schonberg@adacore.com>
* sem_ch12.adb (Analyze_Generic_Package_Declaration): Handle properly
the pragma Compile_Time_Error when it appears in a generic package
declaration and uses an expanded name to denote the current unit.
2017-11-09 Jerome Lambourg <lambourg@adacore.com>
* libgnarl/s-taprop__qnx.adb: Fix incorrect casing for pthread_self.
* tracebak.c: Add support for tracebacks in QNX.
2017-11-09 Eric Botcazou <ebotcazou@adacore.com>
* exp_aggr.adb (Aggr_Size_OK): Bump base limit from 50000 to 500000.
2017-11-09 Yannick Moy <moy@adacore.com>
* erroutc.adb, set_targ.adb: Remove pragma Annotate for CodePeer
justification.
2017-11-09 Joel Brobecker <brobecker@adacore.com>
* doc/gnat_ugn/platform_specific_information.rst: Document packages
needed on GNU/Linux by GNAT.
* gnat_ugn.texi: Regenerate.
2017-11-09 Hristian Kirtchev <kirtchev@adacore.com>
* contracts.adb (Analyze_Contracts): Remove the three parameter
version. This routine now only analyzes contracts and does not perform
any freezing actions.
(Analyze_Previous_Contracts): Removed.
(Freeze_Previous_Contracts): New routine.
* contracts.ads (Analyze_Previous_Contracts): Removed.
(Freeze_Previous_Contracts): New routine.
* sem_ch3.adb (Analyze_Declarations): Analyze the contract of an
enclosing package spec regardless of whether the list denotes the
visible or private declarations. Fix the removal of partial state
refinements when the context is a package spec.
* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Freeze previous
contracts.
* sem_ch7.adb (Analyze_Package_Body_Helper): Freeze previous contracts.
* sem_ch9.adb (Analyze_Entry_Body): Freeze previous contracts.
(Analyze_Protected_Body): Freeze previous contracts.
(Analyze_Task_Body): Freeze previous contracts.
* sem_prag.adb: Comment reformatting.
2017-11-09 Bob Duff <duff@adacore.com>
* libgnarl/g-thread.ads, libgnarl/g-thread.adb: (Make_Independent):
Export this so users can use it without importing
System.Tasking.Utilities.
* libgnarl/s-tassta.adb (Vulnerable_Complete_Task): Relax assertion
that fails when Make_Independent is called on a user task.
* libgnarl/s-taskin.ads (Master_Of_Task): Avoid unusual
capitalization style ((style) bad casing of "Master_of_Task").
From-SVN: r254580
Jakub Jelinek [Thu, 9 Nov 2017 13:08:41 +0000 (14:08 +0100)]
gimple-ssa-store-merging.c (count_multiple_uses): New function.
* gimple-ssa-store-merging.c (count_multiple_uses): New function.
(split_group): Add total_orig and total_new arguments, estimate the
number of statements related to the store group without store merging
and with store merging.
(imm_store_chain_info::output_merged_store): Adjust split_group
callers, punt if estimated number of statements with store merging
is not smaller than estimated number of statements without it.
Formatting fix.
(handled_load): Remove has_single_use checks.
(pass_store_merging::process_store): Likewise.
From-SVN: r254579
Pierre-Marie de Rodat [Thu, 9 Nov 2017 12:52:41 +0000 (12:52 +0000)]
[multiple changes]
2017-11-09 Ed Schonberg <schonberg@adacore.com>
* sem_ch12.adb (Analyze_Subprogram_Instantiation): Correct use of
uninitialized variable uncovered by Codepeer.
2017-11-09 Arnaud Charlet <charlet@adacore.com>
* namet.adb: Replace pragma Assume by pragma Assert to fix bootstrap.
2017-11-09 Javier Miranda <miranda@adacore.com>
* doc/gnat_rm/standard_and_implementation_defined_restrictions.rst:
(Static_Dispatch_Tables): Minor rewording.
* gnat_rm.texi: Regenerate.
2017-11-09 Justin Squirek <squirek@adacore.com>
* sem_ch8.adb (Analyze_Use_Package): Remove forced installation of
use_clauses within instances.
(Use_One_Package): Add condition to check for "hidden" open scopes to
avoid skipping over packages that have not been properly installed even
though they are visible.
2017-11-09 Ed Schonberg <schonberg@adacore.com>
* sem_ch4.adb (Analyze_Selected_Component): Reject properly a call to a
private operation of a protected type, when the type has no visible
operations.
From-SVN: r254578
Pierre-Marie de Rodat [Thu, 9 Nov 2017 12:46:58 +0000 (12:46 +0000)]
[multiple changes]
2017-11-09 Javier Miranda <miranda@adacore.com>
* rtsfind.ads (RE_Id, RE_Unit_Table): Add RE_HT_Link.
* exp_disp.adb (Make_DT): Initialize the HT_Link field of the TSD only
if available.
2017-11-09 Bob Duff <duff@adacore.com>
* exp_ch4.adb, exp_ch9.adb, exp_prag.adb, par-ch3.adb, sem_aggr.adb,
sem_ch12.adb, sem_ch13.adb, sem_ch4.adb, sem_disp.adb, sem_prag.adb,
sem_res.adb, sem_util.adb: Get rid of warnings about uninitialized
variables.
From-SVN: r254577
Yannick Moy [Thu, 9 Nov 2017 12:41:10 +0000 (12:41 +0000)]
exp_disp.adb (Make_DT): Default initialize Ifaces_List and Ifaces_Comp_List.
2017-11-09 Yannick Moy <moy@adacore.com>
* exp_disp.adb (Make_DT): Default initialize Ifaces_List and
Ifaces_Comp_List.
From-SVN: r254576
Richard Biener [Thu, 9 Nov 2017 12:22:32 +0000 (12:22 +0000)]
re PR tree-optimization/82902 (ICE verify_ssa failed during GIMPLE pass: phiprop)
2017-11-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/82902
* tree-ssa-phiprop.c (propagate_with_phi): Test proper type.
* g++.dg/torture/pr82902.C: New testcase.
From-SVN: r254575
Martin Liska [Thu, 9 Nov 2017 12:19:02 +0000 (13:19 +0100)]
Initialize split_branch_probability (PR target/82863).
2017-11-09 Martin Liska <mliska@suse.cz>
PR target/82863
* emit-rtl.c (init_emit_regs): Initialize split_branch_probability to
uninitialized.
2017-11-09 Martin Liska <mliska@suse.cz>
PR target/82863
* gcc.dg/pr82863.c: New test.
From-SVN: r254574
Pierre-Marie de Rodat [Thu, 9 Nov 2017 12:10:30 +0000 (12:10 +0000)]
[multiple changes]
2017-11-09 Pascal Obry <obry@adacore.com>
* libgnarl/s-taprop__mingw.adb: On Windows, initialize the thead handle
only for foreign threads. We initialize the thread handle only if not
yet initialized. This happens in Enter_Task for foreign threads only.
But for native threads (Ada tasking) we do want to keep the real
handle (from Create_Task) to be able to free the corresponding
resources in Finalize_TCB (CloseHandle).
2017-11-09 Yannick Moy <moy@adacore.com>
* sem_attr.adb (Analyze_Attribute): Default initialize P_Type,
P_Base_Type.
(Error_Attr_P): Fix name in pragma No_Return.
(Unexpected_Argument): Add pragma No_Return.
(Placement_Error): Add pragma No_Return.
2017-11-09 Javier Miranda <miranda@adacore.com>
* exp_disp.adb (Elab_Flag_Needed): Elaboration flag not needed when the
dispatch table is statically built.
(Make_DT): Declare constant the Interface_Table object associated with
an statically built dispatch table. For this purpose the Offset_To_Top
value of each interface is computed using the dummy object.
* exp_ch3.adb (Build_Init_Procedure): Do not generate code initializing
the Offset_To_Top field of secondary dispatch tables when the dispatch
table is statically built.
(Initialize_Tag): Do not generate calls to Register_Interface_Offset
when the dispatch table is statically built.
* doc/gnat_rm/standard_and_implementation_defined_restrictions.rst:
Document the new GNAT restriction Static_Dispatch_Tables.
* gnat_rm.texi: Regenerate.
2017-11-09 Hristian Kirtchev <kirtchev@adacore.com>
* sem_aggr.adb (Resolve_Delta_Record_Aggregate): Reorder declarations
to avoid a dormant bug.
2017-11-09 Jerome Lambourg <lambourg@adacore.com>
* init.c: Define missing __gnat_alternate_stack for QNX. Set it to 0,
as such capability is not available on the OS.
* link.c: Make sure linker options for QNX are correct.
* libgnarl/s-osinte__qnx.ads: Add some missing bindings to pthread.
* libgnarl/s-taprop__qnx.adb: New, derived from s-taprop__posix.adb. This brings
in particular a workaround with locks priority ceiling where a higher
priority task is allowed to lock a lower ceiling priority lock. This
also fixes the scheduling of FIFO tasks when the priority of a task is
lowered.
* libgnat/system-qnx-aarch64.ads: Fix priority ranges.
2017-11-09 Yannick Moy <moy@adacore.com>
* erroutc.adb (Output_Error_Msgs): Justify CodePeer false positive
message.
* gnatbind.adb (Scan_Bind_Arg): Simplify test to remove always true
condition.
* namet.adb (Copy_One_Character): Add assumption for static analysis,
as knowledge that Hex(2) is in the range 0..255 is too complex for
CodePeer.
(Finalize): Add assumption for static analysis, as the fact that there
are symbols in the table depends on a global invariant at this point in
the program.
* set_targ.adb (Check_Spaces): Justify CodePeer false positive message.
* stylesw.adb (Save_Style_Check_Options): Rewrite to avoid test always
true.
From-SVN: r254573
Pierre-Marie de Rodat [Thu, 9 Nov 2017 11:57:50 +0000 (11:57 +0000)]
[multiple changes]
2017-11-09 Javier Miranda <miranda@adacore.com>
* libgnat/s-rident.ads (Static_Dispatch_Tables): New restriction name.
* exp_disp.adb (Building_Static_DT): Check restriction.
(Building_Static_Secondary_DT): Check restriction.
(Make_DT): Initialize the HT_Link to No_Tag.
* opt.ads (Static_Dispatch_Tables): Rename flag...
(Building_Static_Dispatch_Tables): ... into this. This will avoid
conflict with the restriction name.
* gnat1drv.adb: Update.
* exp_aggr.adb (Is_Static_Dispatch_Table_Aggregate): Update.
* exp_ch3.adb (Expand_N_Object_Declaration): Update.
2017-11-09 Pascal Obry <obry@adacore.com>
* libgnarl/s-taprop__mingw.adb: Minor code clean-up. Better using a
named number.
From-SVN: r254572
Pierre-Marie de Rodat [Thu, 9 Nov 2017 11:49:44 +0000 (11:49 +0000)]
exp_ch3.adb, [...]: Minor reformatting.
gcc/ada/
2017-11-09 Ed Schonberg <schonberg@adacore.com>
* exp_ch3.adb, gnat1drv.adb, namet.adb, namet.ads, sem_aggr.adb,
sem_ch2.adb, sem_ch4.adb: Minor reformatting.
* sem_res.adb (Resolve_Entity_Name): Suppress spurious error on read of
out parameter when in Ada_83 mode, the oarameter is of a composite
type, and it appears as the prefix of an attribute.
2017-11-09 Bob Duff <duff@adacore.com>
* sinfo.ads: Minor comment fix.
2017-11-09 Hristian Kirtchev <kirtchev@adacore.com>
* sem_prag.ads: Add pragmas Unmodified and Unreferenced to table
Pragma_Significant_In_SPARK.
gcc/testsuite/
2017-11-09 Hristian Kirtchev <kirtchev@adacore.com>
* gnat.dg/unreferenced.adb: New testcase.
2017-11-09 Ed Schonberg <schonberg@adacore.com>
* gnat.dg/out_param.adb: New testcase.
From-SVN: r254571
Pierre-Marie de Rodat [Thu, 9 Nov 2017 11:33:12 +0000 (11:33 +0000)]
[multiple changes]
2017-11-09 Yannick Moy <moy@adacore.com>
* binde.adb (Diagnose_Elaboration_Problem): Mark procedure No_Return.
* checks.adb (Apply_Scalar_Range_Check): Rescope variable OK closer to
use. Default initialize Hi, Lo.
(Selected_Range_Checks): Retype Num_Checks more precisely.
(Determine_Range, Determine_Range_R): Default initialize Hi_Right,
Lo_Right.
* contracts.adb (Process_Contract_Cases): Mark parameter Stmts as
Unmodified.
(Process_Postconditions): Mark parameter Stmts as Unmodified.
* exp_attr.adb (Expand_Loop_Entry_Attribute): Default initialize Blk.
* exp_ch4.adb (Expand_N_Allocator): Default initialize Typ.
(Expand_Concatenate): Default initialize High_Bound.
(Optimize_Length_Comparison): Default initialize Ent, Index.
* exp_ch5.adb (Expand_Predicated_Loop): Default initialize L_Hi and
L_Lo.
* exp_ch6.adb (Expand_N_Extended_Return_Statement): Default initialize
Return_Stmt.
* exp_ch9.adb (Expand_Entry_Barrier): Default initialize Func_Body and
remove pragma Warnings(Off).
* exp_imgv.adb (Expand_Image_Attribute): Default initialize Tent.
* exp_util.adb (Find_Interface_Tag): Default initialize AI_Tag.
* freeze.adb (Check_Component_Storage_Order): Default initialize
Comp_Byte_Aligned rather than silencing messages with pragma
Warnings(Off), which does not work for CodePeer initialization
messages, and given that here the possible read of an unitialized value
depends on a proper use of parameters by the caller.
* inline.adb (Expand_Inlined_Call): Default initialize Lab_Decl, Targ.
* sem_ch12.adb (Build_Operator_Wrapper): Default initialize Expr.
* sem_ch3.adb (Build_Derived_Array_Type): Default initialize
Implicit_Base.
* sem_ch4.adb (List_Operand_Interps): Default initialize Nam and remove
pragma Warnings(Off).
(Analyze_Case_Expression): Rescope checking block within branch where
Others_Present is set by the call to Check_Choices.
* sem_ch5.adb (Analyze_Assignment): Default initialize
Save_Full_Analysis.
* sem_ch6.adb (Analyze_Function_Return): Default initialize Obj_Decl,
and restructure code to defend against previous errors, so that, in
that case, control does not flow to the elsif condition which read an
uninitialized Obj_Decl.
* sem_ch9.adb (Analyze_Requeue): Default initialize Synch_Type.
(Check_Interfaces): Default initialize Full_T_Ifaces and Priv_T_Ifaces,
which seem to be left uninitialized and possibly read in some cases.
* sem_dim.adb (Analyze_Aspect_Dimension_System): Retype Position more
precisely. This requires to exchange the test for exiting in case of
too many positions and the increment to Position, inside the loop.
* sem_eval.adb (Eval_Concatenation): Default initialize Folded_Val,
which cannot be read uninitialized, but the reasons for that are quite
subtle.
* sem_intr.adb (Check_Intrinsic_Call): Default initialize Rtyp.
* sem_prag.adb (Collect_Subprogram_Inputs_Outputs): Default initialize
Spec_Id.
* sem_res.adb (Make_Call_Into_Operator): Default initialize Opnd_Type,
and test for presence of non-null Opnd_Type before testing its scope,
in a test which would read its value uninitialized, and is very rarely
exercized (it depends on the presence of an extension of System).
* sem_spark.ads: Update comment to fix name of main analysis procedure.
* sem_warn.adb (Warn_On_Known_Condition): Default initialize
Test_Result.
* set_targ.adb (FailN): Mark procedure with No_Return.
* stylesw.adb (Save_Style_Check_Options): Delete useless code to
initialize all array Options to white space, as there is already code
doing the same for the remaining positions in Options at the end of the
procedure.
2017-11-09 Eric Botcazou <ebotcazou@adacore.com>
* exp_ch11.adb (Possible_Local_Raise): Do not issue the warning for
generic instantiations either.
From-SVN: r254570
Pierre-Marie de Rodat [Thu, 9 Nov 2017 11:24:53 +0000 (11:24 +0000)]
[multiple changes]
2017-11-09 Piotr Trojanek <trojanek@adacore.com>
* sem_prag.adb (Analyze_Part_Of): Reword error message.
(Get_SPARK_Mode_Type): Do not raise Program_Error in case pragma
SPARK_Mode appears with an illegal mode, treat this as a non-existent
mode.
2017-11-09 Ed Schonberg <schonberg@adacore.com>
* sem_ch4.adb (Analyze_Call): Reject a call to a function that returns
a limited view of a type T declared in unit U1, when the function is
declared in another unit U2 and the call appears in a procedure within
another unit.
2017-11-09 Justin Squirek <squirek@adacore.com>
* sem_ch8.adb (Analyze_Use_Package): Force installation of use_clauses
when processing generic instances.
2017-11-09 Bob Duff <duff@adacore.com>
* namet.ads, namet.adb (Valid_Name_Id): New subtype that excludes
Error_Name and No_Name. Use this (versus Name_Id) to indicate which
objects can have those special values. Valid_Name_Id could usefully be
used all over the compiler front end, but that's too much trouble for
now. If we did that, we might want to rename:
Name_Id --> Optional_Name_Id, Valid_Name_Id --> Name_Id.
For parameters of type Valid_Name_Id, remove some redundant tests,
including the ones found by CodePeer. Use Is_Valid_Name instead of
membership test when appropriate.
(Error_Name_Or_No_Name): Delete this; it's no longer needed.
* sem_ch2.adb (Analyze_Identifier): Use "not Is_Valid_Name" instead of
"in Error_Name_Or_No_Name".
(Check_Parameterless_Call): Use "not Is_Valid_Name" instead of "in
Error_Name_Or_No_Name".
From-SVN: r254569
Pierre-Marie de Rodat [Thu, 9 Nov 2017 11:13:49 +0000 (11:13 +0000)]
gnat1drv.adb (Adjust_Global_Switches): Suppress warnings in codepeer mode here unless -gnateC is specified.
gcc/ada/
2017-11-09 Arnaud Charlet <charlet@adacore.com>
* gnat1drv.adb (Adjust_Global_Switches): Suppress warnings in codepeer
mode here unless -gnateC is specified.
* switch-c.adb (Scan_Front_End_Switches): Do not suppress warnings with
-gnatC here.
2017-11-09 Piotr Trojanek <trojanek@adacore.com>
* lib-writ.adb (Write_ALI): Remove processing of the frontend xrefs as
part of the ALI writing; they are now processed directly from memory
when requested by the backend.
* lib-xref.ads (Collect_SPARK_Xrefs): Remove.
(Iterate_SPARK_Xrefs): New routine for iterating over frontend xrefs.
* lib-xref-spark_specific.adb (Traverse_Compilation_Unit): Remove.
(Add_SPARK_File): Remove.
(Add_SPARK_Xref): Refactored from removed code; filters xref entries
that are trivially uninteresting to the SPARK backend.
* spark_xrefs.ads: Remove code that is no longer needed.
* spark_xrefs.adb (dspark): Adapt to use Iterate_SPARK_Xrefs.
2017-11-09 Hristian Kirtchev <kirtchev@adacore.com>
* sem_elab.adb: Update the documentation on adding a new elaboration
schenario. Add new hash table Recorded_Top_Level_Scenarios.
(Is_Check_Emitting_Scenario): Removed.
(Is_Recorded_Top_Level_Scenario): New routine.
(Kill_Elaboration_Scenario): Reimplemented.
(Record_Elaboration_Scenario): Mark the scenario as recorded.
(Set_Is_Recorded_Top_Level_Scenario): New routine.
(Update_Elaboration_Scenario): Reimplemented.
* sinfo.adb (Is_Recorded_Scenario): Removed.
(Set_Is_Recorded_Scenario): Removed.
* sinfo.ads: Remove attribute Is_Recorded_Scenario along with
occurrences in nodes.
(Is_Recorded_Scenario): Removed along with pragma Inline.
(Set_Is_Recorded_Scenario): Removed along with pragma Inline.
2017-11-09 Piotr Trojanek <trojanek@adacore.com>
* sem_prag.adb (Analyze_Part_Of): Change "designate" to "denote" in
error message.
2017-11-09 Justin Squirek <squirek@adacore.com>
* sem_res.adb (Resolve_Allocator): Add warning messages corresponding
to the allocation of an anonymous access-to-controlled object.
gcc/testsuite/
2017-11-09 Hristian Kirtchev <kirtchev@adacore.com>
* gnat.dg/elab3.adb, gnat.dg/elab3.ads, gnat.dg/elab3_pkg.adb,
gnat.dg/elab3_pkg.ads: New testcase.
2017-11-09 Pierre-Marie de Rodat <derodat@adacore.com>
* gnat.dg/controlled2.adb, gnat.dg/controlled4.adb, gnat.dg/finalized.adb:
Disable the new warning from GNAT.
From-SVN: r254568
Martin Liska [Thu, 9 Nov 2017 10:27:21 +0000 (11:27 +0100)]
Remove non needed check in bmp_iter_set_init (PR tree-optimization/82669).
2017-11-09 Martin Liska <mliska@suse.cz>
PR tree-optimization/82669
* sbitmap.h (bmp_iter_set_init): Remove non needed check.
From-SVN: r254567
Pierre-Marie de Rodat [Thu, 9 Nov 2017 10:24:45 +0000 (10:24 +0000)]
[multiple changes]
2017-11-09 Jerome Lambourg <lambourg@adacore.com>
* sigtramp-qnx.c: Fix obvious typo.
2017-11-09 Doug Rupp <rupp@adacore.com>
* libgnarl/s-taprop__linux.adb (Monotonic_Clock): Minor reformatting.
2017-11-09 Ed Schonberg <schonberg@adacore.com>
* sem_res.adb (Resolve): If expression is an entity whose type has
implicit dereference, generate reference to it, because no reference is
generated for an overloaded entity during analysis, given that its
identity may not be known.
2017-11-09 Javier Miranda <miranda@adacore.com>
* exp_disp.adb (Expand_Interface_Thunk): Replace substraction of
offset-to-top field by addition.
(Make_Secondary_DT): Initialize the offset-to-top field with a negative
offset.
* exp_ch3.adb (Build_Offset_To_Top_Function): Build functions that
return a negative offset-to-top value.
(Initialize_Tag): Invoke runtime services Set_Dynamic_Offset_To_Top and
Set_Static_Offset_To_Top passing a negative offet-to-top value;
initialize also the offset-to-top field with a negative offset.
* libgnat/a-tags.adb (Base_Address): Displace the pointer by means of
an addition since the offset-to-top field is now a negative value.
(Displace): Displace the pointer to the object means of a substraction
since it is now a negative value.
(Set_Dynamic_Offset_to_top): Displace the pointer to the object by
means of a substraction since it is now a negative value.
2017-11-09 Eric Botcazou <ebotcazou@adacore.com>
* gnat1drv.adb (Gnat1drv): Call Errout.Finalize (Last_Call => True)
before Errout.Output_Messages also in the case of compilation errors.
2017-11-09 Javier Miranda <miranda@adacore.com>
* doc/gnat_ugn/the_gnat_compilation_model.rst (Interfacing with C++ at
the Class Level): Fix error interfacing with C strings.
* gnat_ugn.texi: Regenerate.
2017-11-09 Jerome Lambourg <lambourg@adacore.com>
* system-qnx-aarch64.ads: Fix the priority constants.
* s-osinte__qnx.ads: Fix constants for handling the locking protocols
and scheduling.
* s-osinte__qnx.adb: New file , prevents the use of priority 0 that
corresponds to an idle priority on QNX.
2017-11-09 Piotr Trojanek <trojanek@adacore.com>
* sem_prag.adb, sem_util.adb, sem_elab.adb: Fix minor typos in
comments.
From-SVN: r254566
Pierre-Marie de Rodat [Thu, 9 Nov 2017 09:47:31 +0000 (09:47 +0000)]
[multiple changes]
2017-11-09 Piotr Trojanek <trojanek@adacore.com>
* lib-xref-spark_specific.adb (Add_SPARK_Xrefs): Ignore loop parameters
in expression funtions that are expanded into variables.
2017-11-09 Piotr Trojanek <trojanek@adacore.com>
* sem_util.adb: Minor whitespace cleanup.
2017-11-09 Jerome Lambourg <lambourg@adacore.com>
* libgnarl/s-taprop__qnx.adb: Refine aarch64-qnx. Use the POSIX
s-taprop version rather than a custom one.
* sigtramp-qnx.c (aarch64-qnx): Implement the signal trampoline.
From-SVN: r254563
Martin Liska [Thu, 9 Nov 2017 09:11:17 +0000 (10:11 +0100)]
GCOV: support multiple functions per a line (PR gcov-profile/48463)
2017-11-09 Martin Liska <mliska@suse.cz>
PR gcov-profile/48463
* coverage.c (coverage_begin_function): Output also end locus
of a function and information whether the function is
artificial.
* gcov-dump.c (tag_function): Parse and print the information.
* gcov.c (INCLUDE_MAP): Add include.
(INCLUDE_SET): Likewise.
(struct line_info): Move earlier in the source file because
of vector<line_info> in function_info structure.
(line_info::line_info): Likewise.
(line_info::has_block): Likewise.
(struct source_info): Add new member index.
(source_info::get_functions_at_location): New function.
(function_info::group_line_p): New function.
(output_intermediate_line): New function.
(output_intermediate_file): Use the mentioned function.
(struct function_start): New.
(struct function_start_pair_hash): Likewise.
(process_file): Add code that identifies group functions.
Assign lines either to global or function scope.
(generate_results): Skip artificial functions.
(find_source): Assign index for each source file.
(read_graph_file): Read new flag artificial and end_line.
(add_line_counts): Assign it either to global of function scope.
(accumulate_line_counts): Isolate core of the function to
accumulate_line_info and call it for both function and global
scope lines.
(accumulate_line_info): New function.
(output_line_beginning): Fix GNU coding style.
(print_source_line): New function.
(output_line_details): Likewise.
(output_function_details): Likewise.
(output_lines): Iterate both source (global) scope and function
scope.
(struct function_line_start_cmp): New class.
* doc/gcov.texi: Reflect changes in documentation.
From-SVN: r254562
Jakub Jelinek [Thu, 9 Nov 2017 08:54:19 +0000 (09:54 +0100)]
re PR debug/82837 (ICE in output_operand: invalid expression as operand)
PR debug/82837
* dwarf2out.c (const_ok_for_output_1): Reject NEG in addition to NOT.
(mem_loc_descriptor): Handle (const (neg (...))) as (neg (const (...)))
and similarly for not instead of neg.
* gcc.dg/debug/dwarf2/pr82837.c: New test.
From-SVN: r254561
Andi Kleen [Thu, 9 Nov 2017 05:42:43 +0000 (05:42 +0000)]
Add option to force indirect calls for x86
This patch adds a -mforce-indirect-call option to force all calls
or tail calls on x86_64 between functions to indirect. This is similar to the
large code model, but doesn't affect jumps inside functions, so has much
less run time overhead.
This is useful with Intel Processor Trace (PT). PT has precise timing
for indirect calls/jumps, but not for direct ones. So if we can force
them to indirect it allows to time every function relatively accurately
(minus the overhead of the indirect branch)
Without this short functions often don't see a timing update and cannot
be measured.
The timing requires at least Skylake or Goldmont based CPUs.
I made it an option. Originally I tried to make it a new code model,
but since it can be combined with other code models (medium, pic, kernel
etc.) this turned out to be too many combinations.
For example with gcc. This first column is a ns time stamp for the
functions.
$ perf record -e intel_pt/noretcomp=1,cyc=1,cyc_thresh=1/u ./cc1 -O3 hello.c
$ perf script --itrace=cr -F callindent,time,sym,addr --ns | sed -n 180000,182000p | less
...
1184596.
432756920: build_int_cst => 79c9de c_common_nodes_and_builtins
1184596.
432756921: tree_cons => ee2080 tree_cons
1184596.
432756938: ggc_internal_alloc => 80f3e0 ggc_internal_alloc
1184596.
432756951: memset@plt => 598af0 memset@plt
1184596.
432756967: __memset_avx2_unaligned_erms => 80f605 ggc_internal_alloc
1184596.
432756969: ggc_internal_alloc => ee20a2 tree_cons
1184596.
432756973: tree_cons => 79c9f4 c_common_nodes_and_builtins
1184596.
432756974: build_int_cst => ef9a40 build_int_cst
1184596.
432756996: wide_int_to_tree => ef93a0 wide_int_to_tree
1184596.
432757000: wi::force_to_size => f48f70 wi::force_to_size
1184596.
432757005: canonize => ef94de wide_int_to_tree
1184596.
432757021: get_int_cst_ext_nunits => ee1960 get_int_cst_ext_nunits
1184596.
432757026: get_int_cst_ext_nunits => ef94fe wide_int_to_tree
1184596.
432757042: tree_int_cst_elt_check => 83e310 tree_int_cst_elt_check
1184596.
432757044: tree_int_cst_elt_check => ef9761 wide_int_to_tree
1184596.
432757046: wide_int_to_tree => ef9a9b build_int_cst
gcc/:
2017-11-08 Andi Kleen <ak@linux.intel.com>
* config/i386/i386.opt: Add -mforce-indirect-call.
* config/i386/predicates.md: Check for flag_force_indirect_call.
* doc/invoke.texi: Document -mforce-indirect-call
gcc/testsuite/:
2017-11-08 Andi Kleen <ak@linux.intel.com>
* gcc.target/i386/force-indirect-call-1.c: New test.
* gcc.target/i386/force-indirect-call-2.c: New test.
* gcc.target/i386/force-indirect-call-3.c: New test.
From-SVN: r254560
GCC Administrator [Thu, 9 Nov 2017 00:16:12 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r254559
Steven G. Kargl [Wed, 8 Nov 2017 22:56:58 +0000 (22:56 +0000)]
re PR fortran/82841 (Segfault in gfc_simplify_transfer)
2017-11-08 Steven G. Kargl <kargl@kgcc.gnu.org>
PR Fortran/82841
* simplify.c(gfc_simplify_transfer): Do not dereference a NULL pointer.
Unwrap a short line.
2017-11-08 Steven G. Kargl <kargl@kgcc.gnu.org>
PR Fortran/82841
* gfortran.dg/transfer_simplify_11.f90: new test.
From-SVN: r254555
Kito Cheng [Wed, 8 Nov 2017 22:04:49 +0000 (22:04 +0000)]
RISC-V: Fix build error
- This build error was indroduced by "RISC-V: Implement movmemsi"
and "RISC-V: Support -mpreferred-stack-boundary flag"
gcc/ChangeLog
2017-11-08 Kito Cheng <kito.cheng@gmail.com>
* config/riscv/riscv-protos.h (riscv_slow_unaligned_access_p):
New extern.
(MOVE_RATIO): Use riscv_slow_unaligned_access_p.
config/riscv/riscv.c (predict.h): New include.
(riscv_slow_unaligned_access_p): No longer static.
(riscv_block_move_straight): Add require.
config/riscv/riscv-protos.h (riscv_hard_regno_nregs): Delete.
From-SVN: r254554
Steven G. Kargl [Wed, 8 Nov 2017 20:56:43 +0000 (20:56 +0000)]
re PR fortran/82884 (ICE in gfc_resolve_character_array_constructor, at fortran/array.c:2069)
2017-11-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/82884
* arith.c (gfc_hollerith2character): Clear pad.
2017-11-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/82884
* gfortran.dg/hollerith_character_array_constructor.f90: New test.
From-SVN: r254553
Jakub Jelinek [Wed, 8 Nov 2017 20:15:42 +0000 (21:15 +0100)]
re PR target/82855 (AVX512: replace OP+movemask with OP_mask+ktest)
PR target/82855
* config/i386/sse.md (<avx512>_eq<mode>3<mask_scalar_merge_name>,
<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Use
nonimmediate_operand predicate for operand 1 instead of
register_operand.
From-SVN: r254552
Kyrylo Tkachov [Wed, 8 Nov 2017 18:32:09 +0000 (18:32 +0000)]
[AArch64] Add STP pattern to store a vec_concat of two 64-bit registers
On top of the previous vec_merge simplifications [1] we can add this pattern to perform
a store of a vec_concat of two 64-bit values in distinct registers as an STP.
This avoids constructing such a vector explicitly in a register and storing it as
a Q register.
This way for the code in the testcase we can generate:
construct_lane_1:
ldp d1, d0, [x0]
fmov d3, 1.0e+0
fmov d2, 2.0e+0
fadd d4, d1, d3
fadd d5, d0, d2
stp d4, d5, [x1, 32]
ret
construct_lane_2:
ldp x2, x0, [x0]
add x3, x2, 1
add x4, x0, 2
stp x3, x4, [x1, 32]
ret
instead of the current:
construct_lane_1:
ldp d0, d1, [x0]
fmov d3, 1.0e+0
fmov d2, 2.0e+0
fadd d0, d0, d3
fadd d1, d1, d2
dup v0.2d, v0.d[0]
ins v0.d[1], v1.d[0]
str q0, [x1, 32]
ret
construct_lane_2:
ldp x2, x3, [x0]
add x0, x2, 1
add x2, x3, 2
dup v0.2d, x0
ins v0.d[1], x2
str q0, [x1, 32]
ret
Bootstrapped and tested on aarch64-none-linux-gnu.
[1] https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00272.html
https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00273.html
https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00274.html
* config/aarch64/aarch64-simd.md (store_pair_lanes<mode>):
New pattern.
* config/aarch64/constraints.md (Uml): New constraint.
* config/aarch64/predicates.md (aarch64_mem_pair_lanes_operand): New
predicate.
* gcc.target/aarch64/store_v2vec_lanes.c: New test.
From-SVN: r254551
Kyrylo Tkachov [Wed, 8 Nov 2017 18:29:38 +0000 (18:29 +0000)]
[simplify-rtx] Simplify vec_merge of vec_duplicates into vec_concat
Another vec_merge simplification that's missing from simplify-rtx.c is transforming
a vec_merge of two vec_duplicates. For example:
(set (reg:V2DF 80)
(vec_merge:V2DF (vec_duplicate:V2DF (reg:DF 84))
(vec_duplicate:V2DF (reg:DF 81))
(const_int 2)))
Can be transformed into the simpler:
(set (reg:V2DF 80)
(vec_concat:V2DF (reg:DF 81)
(reg:DF 84)))
I believe this should always be beneficial.
I'm still looking into finding a small testcase demonstrating this, but on aarch64 SPEC
I've seen this eliminate some really bizzare codegen where GCC was generating nonsense like:
ldr q18, [sp, 448]
ins v18.d[0], v23.d[0]
ins v18.d[1], v22.d[0]
With q18 being pushed and popped off the stack in the prologue and epilogue of the function!
These are large files from SPEC that I haven't been able to analyse yet as to why GCC even attempts
to do that, but with this patch it doesn't try to load a register and overwrite all its lanes.
This patch shaves off about 5k of code size from zeusmp on aarch64 at -O3, so I believe it's a good
thing to do.
* simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
of two vec_duplicates into a vec_concat.
From-SVN: r254550
Kyrylo Tkachov [Wed, 8 Nov 2017 18:27:57 +0000 (18:27 +0000)]
vec_merge + vec_duplicate + vec_concat simplification
Another vec_merge simplification that's missing is transforming:
(vec_merge (vec_duplicate x) (vec_concat (y) (z)) (const_int N))
into
(vec_concat x z) if N == 1 (0b01) or
(vec_concat y x) if N == 2 (0b10)
For the testcase in this patch on aarch64 this allows us to try matching during combine the pattern:
(set (reg:V2DI 78 [ x ])
(vec_concat:V2DI
(mem:DI (reg/v/f:DI 76 [ y ]) [1 *y_4(D)+0 S8 A64])
(mem:DI (plus:DI (reg/v/f:DI 76 [ y ])
(const_int 8 [0x8])) [1 MEM[(long long int *)y_4(D) + 8B]+0 S8 A64])))
rather than the more complex:
(set (reg:V2DI 78 [ x ])
(vec_merge:V2DI (vec_duplicate:V2DI (mem:DI (plus:DI (reg/v/f:DI 76 [ y ])
(const_int 8 [0x8])) [1 MEM[(long long int *)y_4(D) + 8B]+0 S8 A64]))
(vec_duplicate:V2DI (mem:DI (reg/v/f:DI 76 [ y ]) [1 *y_4(D)+0 S8 A64]))
(const_int 2 [0x2])))
We don't actually have an aarch64 pattern for the simplified version above, but it's a simple enough
form to add, so this patch adds such a pattern that performs a concatenated load of two 64-bit vectors
in adjacent memory locations as a single Q-register LDR. The new aarch64 pattern is needed to demonstrate
the effectiveness of the simplify-rtx change, so I've kept them together as one patch.
Now for the testcase in the patch we can generate:
construct_lanedi:
ldr q0, [x0]
ret
construct_lanedf:
ldr q0, [x0]
ret
instead of:
construct_lanedi:
ld1r {v0.2d}, [x0]
ldr x0, [x0, 8]
ins v0.d[1], x0
ret
construct_lanedf:
ld1r {v0.2d}, [x0]
ldr d1, [x0, 8]
ins v0.d[1], v1.d[0]
ret
The new memory constraint Utq is needed because we need to allow only the Q-register addressing modes but
the MEM expressions in the RTL pattern have 64-bit vector modes, and if we don't constrain them they will
allow the D-register addressing modes during register allocation/address mode selection, which will produce
invalid assembly.
Bootstrapped and tested on aarch64-none-linux-gnu.
* simplify-rtx.c (simplify_ternary_operation, VEC_MERGE):
Simplify vec_merge of vec_duplicate and vec_concat.
* config/aarch64/constraints.md (Utq): New constraint.
* config/aarch64/aarch64-simd.md (load_pair_lanes<mode>): New
define_insn.
* gcc.target/aarch64/load_v2vec_lanes_1.c: New test.
From-SVN: r254549
Kyrylo Tkachov [Wed, 8 Nov 2017 18:23:35 +0000 (18:23 +0000)]
Simplify vec_merge of vec_duplicate with const_vector
I'm trying to improve some of the RTL-level handling of vector lane operations on aarch64 and that
involves dealing with a lot of vec_merge operations. One simplification that I noticed missing
from simplify-rtx are combinations of vec_merge with vec_duplicate.
In this particular case:
(vec_merge (vec_duplicate (X)) (const_vector [A, B]) (const_int N))
which can be replaced with
(vec_concat (X) (B)) if N == 1 (0b01) or
(vec_concat (A) (X)) if N == 2 (0b10).
For the aarch64 testcase in this patch this simplifications allows us to try to combine:
(set (reg:V2DI 77 [ x ])
(vec_concat:V2DI (mem:DI (reg:DI 0 x0 [ y ]) [1 *y_3(D)+0 S8 A64])
(const_int 0 [0])))
instead of the more complex:
(set (reg:V2DI 77 [ x ])
(vec_merge:V2DI (vec_duplicate:V2DI (mem:DI (reg:DI 0 x0 [ y ]) [1 *y_3(D)+0 S8 A64]))
(const_vector:V2DI [
(const_int 0 [0])
(const_int 0 [0])
])
(const_int 1 [0x1])))
For the simplified form above we already have an aarch64 pattern: *aarch64_combinez<mode> which
is missing a DI/DFmode version due to an oversight, so this patch extends that pattern as well to
use the VDC mode iterator that includes DI and DFmode (as well as V2HF which VD_BHSI was missing).
The aarch64 hunk is needed to see the benefit of the simplify-rtx.c hunk, so I didn't split them
into separate patches.
Before this for the testcase we'd generate:
construct_lanedi:
movi v0.4s, 0
ldr x0, [x0]
ins v0.d[0], x0
ret
construct_lanedf:
movi v0.2d, 0
ldr d1, [x0]
ins v0.d[0], v1.d[0]
ret
but now we can generate:
construct_lanedi:
ldr d0, [x0]
ret
construct_lanedf:
ldr d0, [x0]
ret
Bootstrapped and tested on aarch64-none-linux-gnu.
* simplify-rtx.c (simplify_ternary_operation, VEC_MERGE):
Simplify vec_merge of vec_duplicate and const_vector.
* config/aarch64/predicates.md (aarch64_simd_or_scalar_imm_zero):
New predicate.
* config/aarch64/aarch64-simd.md (*aarch64_combinez<mode>): Use VDC
mode iterator. Update predicate on operand 1 to
handle non-const_vec constants. Delete constraints.
(*aarch64_combinez_be<mode>): Likewise for operand 2.
* gcc.target/aarch64/construct_lane_zero_1.c: New test.
From-SVN: r254548
Pierre-Marie de Rodat [Wed, 8 Nov 2017 17:32:18 +0000 (17:32 +0000)]
[multiple changes]
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* lib-xref.ads, lib-xref-spark_specific.adb
(Traverse_Compilation_Unit): Move declaration to package body.
2017-11-08 Hristian Kirtchev <kirtchev@adacore.com>
* exp_spark.adb (Expand_SPARK_N_Object_Renaming_Declaration): Obtain
the type of the renaming from its defining entity, rather then the
subtype mark as there may not be a subtype mark.
2017-11-08 Jerome Lambourg <lambourg@adacore.com>
* adaint.c, s-oscons-tmplt.c, init.c, libgnat/system-qnx-aarch64.ads,
libgnarl/a-intnam__qnx.ads, libgnarl/s-intman__qnx.adb,
libgnarl/s-osinte__qnx.ads, libgnarl/s-qnx.ads,
libgnarl/s-taprop__qnx.adb, s-oscons-tmplt.c, sigtramp-qnx.c,
terminals.c: Initial port of GNAT for aarch64-qnx
2017-11-08 Elisa Barboni <barboni@adacore.com>
* exp_util.adb (Find_DIC_Type): Move...
* sem_util.ads, sem_util.adb (Find_DIC_Type): ... here.
2017-11-08 Justin Squirek <squirek@adacore.com>
* sem_res.adb (Resolve_Allocator): Add info messages corresponding to
the owner and corresponding coextension.
2017-11-08 Ed Schonberg <schonberg@adacore.com>
* sem_aggr.adb (Resolve_Delta_Aggregate): Divide into the
following separate procedures.
(Resolve_Delta_Array_Aggregate): Previous code form
Resolve_Delta_Aggregate.
(Resolve_Delta_Record_Aggregate): Extend previous code to cover latest
ARG decisions on the legality rules for delta aggregates for records:
in the case of a variant record, components from different variants
cannot be specified in the delta aggregate, and this must be checked
statically.
From-SVN: r254547
Pierre-Marie de Rodat [Wed, 8 Nov 2017 17:10:05 +0000 (17:10 +0000)]
[multiple changes]
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (SPARK_Scope_Record): Remove File_Num component.
* lib-xref-spark_specific.adb (Add_SPARK_Scope): Skip initialization of
removed component.
2017-11-08 Gary Dismukes <dismukes@adacore.com>
* sem_ch4.adb: Minor typo fix.
From-SVN: r254546
Pierre-Marie de Rodat [Wed, 8 Nov 2017 16:52:32 +0000 (16:52 +0000)]
[multiple changes]
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (SPARK_Scope_Record): Remove Spec_File_Num and
Spec_Scope_Num components.
* spark_xrefs.adb (dspark): Skip pretty-printing to removed components.
* lib-xref-spark_specific.adb (Add_SPARK_Scope): Skip initialization of
removed components.
(Collect_SPARK_Xrefs): Skip setting proper values of removed
components.
2017-11-08 Gary Dismukes <dismukes@adacore.com>
* exp_ch4.adb (Expand_N_Type_Conversion): Add test that the selector
name is a discriminant in check for unconditional accessibility
violation within instances.
From-SVN: r254545
Pierre-Marie de Rodat [Wed, 8 Nov 2017 16:45:55 +0000 (16:45 +0000)]
lib-xref-spark_specific.adb (Add_SPARK_Xrefs): Remove special-case for constants (with variable input).
gcc/ada/
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* lib-xref-spark_specific.adb (Add_SPARK_Xrefs): Remove special-case
for constants (with variable input).
(Is_Constant_Object_Without_Variable_Input): Remove.
2017-11-08 Hristian Kirtchev <kirtchev@adacore.com>
* exp_ch9.adb, sem_disp.adb, sem_util.adb: Minor reformatting.
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (Rtype): Remove special-casing of constants for SPARK
cross-references.
(dspark): Remove hardcoded table bound.
2017-11-08 Ed Schonberg <schonberg@adacore.com>
* sem_ch4.adb (Analyze_Aggregate): For
Ada2020 delta aggregates, use
the type of the base of the construct to determine the type (or
candidate interpretations) of the delta aggregate. This allows the
construct to appear in a context that expects a private extension.
* sem_res.adb (Resolve): Handle properly a delta aggregate with an
overloaded base.
gcc/testsuite/
2017-11-08 Ed Schonberg <schonberg@adacore.com>
* gnat.dg/delta_aggr.adb: New testcase.
From-SVN: r254544
Pierre-Marie de Rodat [Wed, 8 Nov 2017 16:31:39 +0000 (16:31 +0000)]
[multiple changes]
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (SPARK_Xref_Record): Replace file and scope indices
with Entity_Id of the reference.
* spark_xrefs.adb (dspark): Adapt pretty-printing routine.
* lib-xref-spark_specific.adb (Add_SPARK_Xrefs): Store Entity_Id of the
reference, not the file and scope indices.
2017-11-08 Arnaud Charlet <charlet@adacore.com>
* errout.ads (Current_Node): New.
* errout.adb (Error_Msg): Use Current_Node.
* par-ch6.adb, par-ch7.adb, par-ch9.adb, par-util.adb: Set Current_Node
when relevant.
* style.adb: Call Error_Msg_N when possible.
From-SVN: r254543
Piotr Trojanek [Wed, 8 Nov 2017 16:25:03 +0000 (16:25 +0000)]
spark_xrefs.ads (SPARK_Scope_Record): Rename Scope_Id component to Entity.
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (SPARK_Scope_Record): Rename Scope_Id component to
Entity.
* lib-xref-spark_specific.adb, spark_xrefs.adb: Propagate renaming of
the Scope_Id record component.
From-SVN: r254542
Piotr Trojanek [Wed, 8 Nov 2017 16:22:37 +0000 (16:22 +0000)]
spark_xrefs.ads (SPARK_File_Record): Remove string components.
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (SPARK_File_Record): Remove string components.
* spark_xrefs.adb (dspark): Remove pretty-printing of removed
SPARK_File_Record components.
* lib-xref-spark_specific.adb (Add_SPARK_File): Do not store string
representation of files/units.
From-SVN: r254541
Piotr Trojanek [Wed, 8 Nov 2017 16:16:04 +0000 (16:16 +0000)]
lib-xref.ads, [...] (Traverse_Declarations): Remove Inside_Stubs parameter.
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* lib-xref.ads, lib-xref-spark_specific.adb (Traverse_Declarations):
Remove Inside_Stubs parameter.
From-SVN: r254540
Pierre-Marie de Rodat [Wed, 8 Nov 2017 16:04:35 +0000 (16:04 +0000)]
[multiple changes]
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (SPARK_Xref_Record): Referenced object is now
represented by Entity_Id.
(SPARK_Scope_Record): Referenced scope (e.g. subprogram) is now
represented by Entity_Id; this information is not repeated as
Scope_Entity.
(Heap): Moved from lib-xref-spark_specific.adb, to reside next to
Name_Of_Heap_Variable.
* spark_xrefs.adb (dspark): Adapt debug routine to above changes in
data types.
* lib-xref-spark_specific.adb: Adapt routines for populating SPARK
scope and xrefs tables to above changes in data types.
2017-11-08 Justin Squirek <squirek@adacore.com>
* sem_ch8.adb (Mark_Use_Clauses): Add condition to always mark the
primitives of generic actuals.
(Mark_Use_Type): Add recursive call to properly mark class-wide type's
base type clauses as per ARM 8.4 (8.2/3).
2017-11-08 Ed Schonberg <schonberg@adacore.com>
* sem_ch6.adb (Analyze_Generic_Subprobram_Body): Validate
categorization dependency of the body, as is done for non-generic
units.
(New_Overloaded_Entity, Visible_Part_Type): Remove linear search
through declarations (Simple optimization, no behavior change).
From-SVN: r254539
Piotr Trojanek [Wed, 8 Nov 2017 15:48:46 +0000 (15:48 +0000)]
spark_xrefs.ads (SPARK_Xref_Record): Remove inessential components.
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* spark_xrefs.ads (SPARK_Xref_Record): Remove inessential components.
(SPARK_Scope_Record): Remove inessential components.
* spark_xrefs.adb (dspark): Remove pretty-printing of removed record
components.
* lib-xref-spark_specific.adb (Add_SPARK_Scope): Remove setting of
removed record components.
(Add_SPARK_Xrefs): Remove setting of removed record components.
From-SVN: r254538
Jakub Jelinek [Wed, 8 Nov 2017 15:48:30 +0000 (16:48 +0100)]
pr57878.C (__sso_string_base::_M_get_allocator): Return a value.
* g++.dg/pr57878.C (__sso_string_base::_M_get_allocator): Return
a value.
From-SVN: r254537
Jakub Jelinek [Wed, 8 Nov 2017 15:46:58 +0000 (16:46 +0100)]
re PR tree-optimization/78821 (GCC7: Copying whole 32 bits structure field by field not optimised into copying whole 32 bits at once)
PR tree-optimization/78821
* gimple-ssa-store-merging.c (struct store_operand_info): Add bit_not_p
data member.
(store_operand_info::store_operand_info): Initialize it to false.
(pass_store_merging::terminate_all_aliasing_chains): Rewritten to use
ref_maybe_used_by_stmt_p and stmt_may_clobber_ref_p on lhs of each
store in the group, and if chain_info is non-NULL, to ignore altogether
that chain.
(compatible_load_p): Fail if bit_not_p does not match.
(imm_store_chain_info::output_merged_store): Handle bit_not_p loads.
(handled_load): Fill in bit_not_p. Handle BIT_NOT_EXPR.
(pass_store_merging::process_store): Adjust
terminate_all_aliasing_chains calls to pass NULL in all current spots,
call terminate_all_aliasing_chains newly when adding a store into
a chain with non-NULL chain_info.
* gcc.dg/store_merging_2.c: Expect 3 store mergings instead of 2.
* gcc.dg/store_merging_13.c (f7, f8, f9, f10, f11, f12, f13): New
functions.
(main): Test also those. Expect 13 store mergings instead of 6.
* gcc.dg/store_merging_14.c (f7, f8, f9): New functions.
(main): Test also those. Expect 9 store mergings instead of 6.
From-SVN: r254536
Piotr Trojanek [Wed, 8 Nov 2017 15:38:51 +0000 (15:38 +0000)]
lib-xref-spark_specific.adb (Add_SPARK_Xrefs): Remove dead check for empty entities.
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* lib-xref-spark_specific.adb (Add_SPARK_Xrefs): Remove dead check for
empty entities.
From-SVN: r254535
Wilco Dijkstra [Wed, 8 Nov 2017 15:36:34 +0000 (15:36 +0000)]
[AArch64] Simplify aarch64_can_eliminate
Simplify aarch64_can_eliminate - if we need a frame pointer, we must
eliminate to HARD_FRAME_POINTER_REGNUM. Rather than hardcoding all
combinations from the ELIMINABLE_REGS list, just do the correct check.
gcc/
* config/aarch64/aarch64.c (aarch64_can_eliminate): Simplify logic.
From-SVN: r254534
Wilco Dijkstra [Wed, 8 Nov 2017 15:34:36 +0000 (15:34 +0000)]
[AArch64] Remove aarch64_frame_pointer_required
To implement -fomit-leaf-frame-pointer, there are 2 places where we need
to check whether we have to use a frame chain (since register allocation
may allocate LR in a leaf function that omits the frame pointer, but if
LR is spilled we must emit a frame chain). To simplify this do not force
frame_pointer_needed via aarch64_frame_pointer_required, but enable the
frame chain in aarch64_layout_frame. Now aarch64_frame_pointer_required
can be removed and aarch64_can_eliminate is simplified.
gcc/
* config/aarch64/aarch64.c (aarch64_frame_pointer_required)
Remove.
(aarch64_layout_frame): Initialise emit_frame_chain.
(aarch64_can_eliminate): Remove omit leaf frame pointer code.
(TARGET_FRAME_POINTER_REQUIRED): Remove define.
testsuite/
* gcc.target/aarch64/dwarf-cfa-reg.c: Update.
From-SVN: r254533
Pierre-Marie de Rodat [Wed, 8 Nov 2017 15:17:43 +0000 (15:17 +0000)]
sem_disp.adb (Is_Inherited_Public_Operation): Extend the functionality of this routine to handle multiple levels of derivations.
gcc/ada/
2017-11-08 Javier Miranda <miranda@adacore.com>
* sem_disp.adb (Is_Inherited_Public_Operation): Extend the
functionality of this routine to handle multiple levels of derivations.
2017-11-08 Hristian Kirtchev <kirtchev@adacore.com>
* einfo.adb: Elist36 is now used as Nested_Scenarios.
(Nested_Scenarios): New routine.
(Set_Nested_Scenarios): New routine.
(Write_Field36_Name): New routine.
* einfo.ads: Add new attribute Nested_Scenarios along with occurrences
in entities.
(Nested_Scenarios): New routine along with pragma Inline.
(Set_Nested_Scenarios): New routine along with pragma Inline.
* sem_elab.adb (Find_And_Process_Nested_Scenarios): New routine.
(Process_Nested_Scenarios): New routine.
(Traverse_Body): When a subprogram body is traversed for the first
time, find, save, and process all suitable scenarios found within.
Subsequent traversals of the same subprogram body utilize the saved
scenarios.
2017-11-08 Piotr Trojanek <trojanek@adacore.com>
* lib-xref-spark_specific.adb (Add_SPARK_Scope): Remove detection of
protected operations.
(Add_SPARK_Xrefs): Simplify detection of empty entities.
* get_spark_xrefs.ads, get_spark_xrefs.adb, put_spark_xrefs.ads,
put_spark_xrefs.adb, spark_xrefs_test.adb: Remove code for writing,
reading and testing SPARK cross-references stored in the ALI files.
* lib-xref.ads (Output_SPARK_Xrefs): Remove.
* lib-writ.adb (Write_ALI): Do not write SPARK cross-references to the
ALI file.
* spark_xrefs.ads, spark_xrefs.adb (pspark): Remove, together
with description of the SPARK xrefs ALI format.
* gcc-interface/Make-lang.in (GNAT_ADA_OBJS): Remove get_spark_refs.o
and put_spark_refs.o.
2017-11-08 Hristian Kirtchev <kirtchev@adacore.com>
* exp_ch4.adb (Apply_Accessibility_Check): Do not finalize the object
when the associated access type is subject to pragma
No_Heap_Finalization.
* exp_intr.adb (Expand_Unc_Deallocation): Use the available view of the
designated type in case it comes from a limited withed unit.
gcc/testsuite/
2017-11-08 Javier Miranda <miranda@adacore.com>
* gnat.dg/overriding_ops2.adb, gnat.dg/overriding_ops2.ads,
gnat.dg/overriding_ops2_pkg.ads, gnat.dg/overriding_ops2_pkg-high.ads:
New testcase.
From-SVN: r254532
Hristian Kirtchev [Wed, 8 Nov 2017 14:07:31 +0000 (14:07 +0000)]
exp_ch3.adb (Expand_N_Object_Declaration): Save and restore relevant SPARK-related flags.
2017-11-08 Hristian Kirtchev <kirtchev@adacore.com>
* exp_ch3.adb (Expand_N_Object_Declaration): Save and restore relevant
SPARK-related flags. Add ??? comment.
* exp_util.adb (Insert_Actions): Add an entry for node
N_Variable_Reference_Marker.
* sem.adb (Analyze): Add an entry for node N_Variable_Reference_Marker.
* sem_ch8.adb (Find_Direct_Name): Add constant Is_Assignment_LHS. Build
and record a variable reference marker for the current name.
(Find_Expanded_Name): Add constant Is_Assignment_LHS. Build and record
a variable reference marker for the current name.
* sem_elab.adb (Build_Variable_Reference_Marker): New routine.
(Extract_Variable_Reference_Attributes): Reimplemented.
(Info_Scenario): Add output for variable references and remove output
for variable reads.
(Info_Variable_Read): Removed.
(Info_Variable_Reference): New routine.
(Is_Suitable_Scenario): Variable references are now suitable scenarios
while variable reads are not.
(Output_Active_Scenarios): Add output for variable references and
remove output for variable reads.
(Output_Variable_Read): Removed.
(Output_Variable_Reference): New routine.
(Process_Variable_Read): Removed.
(Process_Variable_Reference): New routine.
(Process_Variable_Reference_Read): New routine.
* sem_elab.ads (Build_Variable_Reference_Marker): New routine.
* sem_res.adb (Resolve_Actuals): Build and record a variable reference
marker for the current actual.
* sem_spark.adb (Check_Node): Add an entry for node
N_Variable_Reference_Marker.
* sem_util.adb (Within_Subprogram_Call): Moved to the library level.
* sem_util.ads (Within_Subprogram_Call): Moved to the library level.
* sinfo.adb (Is_Read): New routine.
(Is_Write): New routine.
(Target): Updated to handle variable reference markers.
(Set_Is_Read): New routine.
(Set_Is_Write): New routine.
(Set_Target): Updated to handle variable reference markers.
* sinfo.ads: Add new attributes Is_Read and Is_Write along with
occurrences in nodes. Update attribute Target. Add new node
kind N_Variable_Reference_Marker.
(Is_Read): New routine along with pragma Inline.
(Is_Write): New routine along with pragma Inline.
(Set_Is_Read): New routine along with pragma Inline.
(Set_Is_Write): New routine along with pragma Inline.
* sprint.adb (Sprint_Node_Actual): Add an entry for node
N_Variable_Reference_Marker.
From-SVN: r254531
Andreas Schwab [Wed, 8 Nov 2017 13:56:04 +0000 (13:56 +0000)]
aarch64-vect-lane-2.c (search_line_fast): Change type to void.
* c-c++-common/torture/aarch64-vect-lane-2.c (search_line_fast):
Change type to void.
From-SVN: r254530
Arnaud Charlet [Wed, 8 Nov 2017 13:52:43 +0000 (13:52 +0000)]
sem_util.adb (Subprogram_Name): Append suffix for overloaded subprograms.
2017-11-08 Arnaud Charlet <charlet@adacore.com>
* sem_util.adb (Subprogram_Name): Append suffix for overloaded
subprograms.
From-SVN: r254529
Pierre-Marie de Rodat [Wed, 8 Nov 2017 13:46:19 +0000 (13:46 +0000)]
[multiple changes]
2017-11-08 Yannick Moy <moy@adacore.com>
* sem_ch8.adb (Use_One_Type, Update_Use_Clause_Chain): Do not report
about unused use-type or use-package clauses inside inlined bodies.
2017-11-08 Hristian Kirtchev <kirtchev@adacore.com>
* sem_elab.adb (Ensure_Prior_Elaboration): Add new parameter
In_Partial_Fin along with a comment on its usage. Do not guarantee the
prior elaboration of a unit when the need came from a partial
finalization context.
(In_Initialization_Context): Relocated to Process_Call.
(Is_Partial_Finalization_Proc): New routine.
(Process_Access): Add new parameter In_Partial_Fin along with a comment
on its usage.
(Process_Activation_Call): Add new parameter In_Partial_Fin along with
a comment on its usage.
(Process_Activation_Conditional_ABE_Impl): Add new parameter
In_Partial_Fin along with a comment on its usage. Do not emit any ABE
diagnostics when the activation occurs in a partial finalization
context.
(Process_Activation_Guaranteed_ABE_Impl): Add new parameter
In_Partial_Fin along with a comment on its usage.
(Process_Call): Add new parameter In_Partial_Fin along with a comment
on its usage. A call is within a partial finalization context when it
targets a finalizer or primitive [Deep_]Finalize, and the call appears
in initialization actions. Pass this information down to the recursive
steps of the Processing phase.
(Process_Call_Ada): Add new parameter In_Partial_Fin along with a
comment on its usage. Remove the guard which suppresses the generation
of implicit Elaborate[_All] pragmas. This is now done in
Ensure_Prior_Elaboration.
(Process_Call_Conditional_ABE): Add new parameter In_Partial_Fin along
with a comment on its usage. Do not emit any ABE diagnostics when the
call occurs in a partial finalization context.
(Process_Call_SPARK): Add new parameter In_Partial_Fin along with a
comment on its usage.
(Process_Instantiation): Add new parameter In_Partial_Fin along with a
comment on its usage.
(Process_Instantiation_Ada): Add new parameter In_Partial_Fin along
with a comment on its usage.
(Process_Instantiation_Conditional_ABE): Add new parameter
In_Partial_Fin along with a comment on its usage. Do not emit any ABE
diagnostics when the instantiation occurs in a partial finalization
context.
(Process_Instantiation_SPARK): Add new parameter In_Partial_Fin along
with a comment on its usage.
(Process_Scenario): Add new parameter In_Partial_Fin along with a
comment on its usage.
(Process_Single_Activation): Add new parameter In_Partial_Fin along
with a comment on its usage.
(Traverse_Body): Add new parameter In_Partial_Fin along with a comment
on its usage.
2017-11-08 Arnaud Charlet <charlet@adacore.com>
* sem_ch13.adb: Add optional parameter to Error_Msg.
2017-11-08 Jerome Lambourg <lambourg@adacore.com>
* fname.adb (Is_Internal_File_Name): Do not check the 8+3 naming schema
for the Interfaces.* hierarchy as longer unit names are now allowed.
2017-11-08 Arnaud Charlet <charlet@adacore.com>
* sem_util.adb (Subprogram_Name): Emit sloc for the enclosing
subprogram as well. Support more cases of entities.
(Append_Entity_Name): Add some defensive code.
From-SVN: r254528
Janne Blomqvist [Wed, 8 Nov 2017 11:51:00 +0000 (13:51 +0200)]
PR 82869 Introduce logical_type_node and use it
Earlier GFortran used to redefine boolean_type_node, which in the rest
of the compiler means the C/C++ _Bool/bool type, to the Fortran
default logical type. When this redefinition was removed, a few
issues surfaced. Namely,
1) PR 82869, where we created a boolean tmp variable, and passed it to
the runtime library as a Fortran logical variable of a different size.
2) Fortran specifies that logical operations should be done with the
default logical kind, not in any other kind.
3) Using 8-bit variables have some issues, such as
- on x86, partial register stalls and length prefix changes.
- s390 has a compare with immediate and jump instruction which
works with 32-bit but not 8-bit quantities.
This patch addresses these issues by introducing a type
logical_type_node which is a Fortran LOGICAL variable of default
kind. It is then used in places were the Fortran standard mandates, as
well as for compiler generated temporary variables.
For x86-64, using the Polyhedron benchmark suite, no performance or
code size difference worth mentioning was observed.
Regtested on x86_64-pc-linux-gnu.
gcc/fortran/ChangeLog:
2017-11-08 Janne Blomqvist <jb@gcc.gnu.org>
PR 82869
* convert.c (truthvalue_conversion): Use logical_type_node.
* trans-array.c (gfc_trans_allocate_array_storage): Likewise.
(gfc_trans_create_temp_array): Likewise.
(gfc_trans_array_ctor_element): Likewise.
(gfc_trans_array_constructor_value): Likewise.
(trans_array_constructor): Likewise.
(trans_array_bound_check): Likewise.
(gfc_conv_array_ref): Likewise.
(gfc_trans_scalarized_loop_end): Likewise.
(gfc_conv_array_extent_dim): Likewise.
(gfc_array_init_size): Likewise.
(gfc_array_allocate): Likewise.
(gfc_trans_array_bounds): Likewise.
(gfc_trans_dummy_array_bias): Likewise.
(gfc_conv_array_parameter): Likewise.
(duplicate_allocatable): Likewise.
(duplicate_allocatable_coarray): Likewise.
(structure_alloc_comps): Likewise
(get_std_lbound): Likewise
(gfc_alloc_allocatable_for_assignment): Likewise
* trans-decl.c (add_argument_checking): Likewise
(gfc_generate_function_code): Likewise
* trans-expr.c (gfc_copy_class_to_class): Likewise
(gfc_trans_class_array_init_assign): Likewise
(gfc_trans_class_init_assign): Likewise
(gfc_conv_expr_present): Likewise
(gfc_conv_substring): Likewise
(gfc_conv_cst_int_power): Likewise
(gfc_conv_expr_op): Likewise
(gfc_conv_procedure_call): Likewise
(fill_with_spaces): Likewise
(gfc_trans_string_copy): Likewise
(gfc_trans_alloc_subarray_assign): Likewise
(gfc_trans_pointer_assignment): Likewise
(gfc_trans_scalar_assign): Likewise
(fcncall_realloc_result): Likewise
(alloc_scalar_allocatable_for_assignment): Likewise
(trans_class_assignment): Likewise
(gfc_trans_assignment_1): Likewise
* trans-intrinsic.c (build_fixbound_expr): Likewise
(gfc_conv_intrinsic_aint): Likewise
(gfc_trans_same_strlen_check): Likewise
(conv_caf_send): Likewise
(trans_this_image): Likewise
(conv_intrinsic_image_status): Likewise
(trans_image_index): Likewise
(gfc_conv_intrinsic_bound): Likewise
(conv_intrinsic_cobound): Likewise
(gfc_conv_intrinsic_mod): Likewise
(gfc_conv_intrinsic_dshift): Likewise
(gfc_conv_intrinsic_dim): Likewise
(gfc_conv_intrinsic_sign): Likewise
(gfc_conv_intrinsic_ctime): Likewise
(gfc_conv_intrinsic_fdate): Likewise
(gfc_conv_intrinsic_ttynam): Likewise
(gfc_conv_intrinsic_minmax): Likewise
(gfc_conv_intrinsic_minmax_char): Likewise
(gfc_conv_intrinsic_anyall): Likewise
(gfc_conv_intrinsic_arith): Likewise
(gfc_conv_intrinsic_minmaxloc): Likewise
(gfc_conv_intrinsic_minmaxval): Likewise
(gfc_conv_intrinsic_btest): Likewise
(gfc_conv_intrinsic_bitcomp): Likewise
(gfc_conv_intrinsic_shift): Likewise
(gfc_conv_intrinsic_ishft): Likewise
(gfc_conv_intrinsic_ishftc): Likewise
(gfc_conv_intrinsic_leadz): Likewise
(gfc_conv_intrinsic_trailz): Likewise
(gfc_conv_intrinsic_mask): Likewise
(gfc_conv_intrinsic_spacing): Likewise
(gfc_conv_intrinsic_rrspacing): Likewise
(gfc_conv_intrinsic_size): Likewise
(gfc_conv_intrinsic_sizeof): Likewise
(gfc_conv_intrinsic_transfer): Likewise
(gfc_conv_allocated): Likewise
(gfc_conv_associated): Likewise
(gfc_conv_same_type_as): Likewise
(gfc_conv_intrinsic_trim): Likewise
(gfc_conv_intrinsic_repeat): Likewise
(conv_isocbinding_function): Likewise
(conv_intrinsic_ieee_is_normal): Likewise
(conv_intrinsic_ieee_is_negative): Likewise
(conv_intrinsic_ieee_copy_sign): Likewise
(conv_intrinsic_move_alloc): Likewise
* trans-io.c (set_parameter_value_chk): Likewise
(set_parameter_value_inquire): Likewise
(set_string): Likewise
* trans-openmp.c (gfc_walk_alloc_comps): Likewise
(gfc_omp_clause_default_ctor): Likewise
(gfc_omp_clause_copy_ctor): Likewise
(gfc_omp_clause_assign_op): Likewise
(gfc_omp_clause_dtor): Likewise
(gfc_omp_finish_clause): Likewise
(gfc_trans_omp_clauses): Likewise
(gfc_trans_omp_do): Likewise
* trans-stmt.c (gfc_trans_goto): Likewise
(gfc_trans_sync): Likewise
(gfc_trans_arithmetic_if): Likewise
(gfc_trans_simple_do): Likewise
(gfc_trans_do): Likewise
(gfc_trans_forall_loop): Likewise
(gfc_trans_where_2): Likewise
(gfc_trans_allocate): Likewise
(gfc_trans_deallocate): Likewise
* trans-types.c (gfc_init_types): Initialize logical_type_node and
its true/false trees.
(gfc_get_array_descr_info): Use logical_type_node.
* trans-types.h (logical_type_node): New tree.
(logical_true_node): Likewise.
(logical_false_node): Likewise.
* trans.c (gfc_trans_runtime_check): Use logical_type_node.
(gfc_call_malloc): Likewise
(gfc_allocate_using_malloc): Likewise
(gfc_allocate_allocatable): Likewise
(gfc_add_comp_finalizer_call): Likewise
(gfc_add_finalizer_call): Likewise
(gfc_deallocate_with_status): Likewise
(gfc_deallocate_scalar_with_status): Likewise
(gfc_call_realloc): Likewise
gcc/testsuite/ChangeLog:
2017-11-08 Janne Blomqvist <jb@gcc.gnu.org>
PR 82869
* gfortran.dg/logical_temp_io.f90: New test.
* gfortran.dg/logical_temp_io_kind8.f90: New test.
From-SVN: r254526
Martin Liska [Wed, 8 Nov 2017 11:46:07 +0000 (12:46 +0100)]
Fix vrp101.c test-case.
2017-11-08 Martin Liska <mliska@suse.cz>
* gcc.dg/tree-ssa/vrp101.c: Update expected pattern as
frequencies are not longer printed in dump output.
From-SVN: r254525
Martin Liska [Wed, 8 Nov 2017 11:45:35 +0000 (12:45 +0100)]
Simplify call of gimple_call_internal_p.
2017-11-08 Martin Liska <mliska@suse.cz>
* gimplify.c (expand_FALLTHROUGH_r): Simplify usage
of gimple_call_internal_p.
From-SVN: r254524
Eric Botcazou [Wed, 8 Nov 2017 10:00:31 +0000 (10:00 +0000)]
* gcc.dg/strlenopt-33g.c: Remove duplicate dg-do command.
From-SVN: r254523
Rainer Orth [Wed, 8 Nov 2017 09:39:33 +0000 (09:39 +0000)]
Fix -Wreturn-type fallout in g++.old-deja/g++.brendan/asm-extn1.C
* g++.old-deja/g++.brendan/asm-extn1.C: Accept all sparc* targets.
(main): Add return type.
From-SVN: r254522
Tom de Vries [Wed, 8 Nov 2017 08:51:52 +0000 (08:51 +0000)]
[mips] Wrap ASM_OUTPUT_LABELREF in do {} while (0)
2017-11-07 Tom de Vries <tom@codesourcery.com>
* config/mips/mips.h (ASM_OUTPUT_LABELREF): Wrap in "do {} while (0)".
From-SVN: r254521
Tom de Vries [Wed, 8 Nov 2017 08:51:43 +0000 (08:51 +0000)]
[mips] Remove semicolon after do {} while (0) in ASM_OUTPUT_CASE_END
2017-11-07 Tom de Vries <tom@codesourcery.com>
* config/mips/mips.h (ASM_OUTPUT_CASE_END): Remove semicolon after
"do {} while (0)".
From-SVN: r254520
Martin Liska [Wed, 8 Nov 2017 08:17:30 +0000 (09:17 +0100)]
Fix fallthrough attribute ignorance w/ -fsanitize=address (PR sanitizer/82792).
2017-11-08 Martin Liska <mliska@suse.cz>
PR sanitizer/82792
* gimplify.c (expand_FALLTHROUGH_r): Skip IFN_ASAN_MARK.
2017-11-08 Martin Liska <mliska@suse.cz>
PR sanitizer/82792
* g++.dg/asan/pr82792.C: New test.
From-SVN: r254519
Jakub Jelinek [Wed, 8 Nov 2017 08:17:02 +0000 (09:17 +0100)]
re PR bootstrap/82670 (UBSAN bootstrap broken after recent libsanitizer merge)
PR bootstrap/82670
* ubsan/Makefile.am (ubsan_files): Remove ubsan_init_standalone.cc
and ubsan_signals_standalone.cc.
* ubsan/Makefile.in: Regenerated.
From-SVN: r254518
Martin Liska [Wed, 8 Nov 2017 07:24:14 +0000 (08:24 +0100)]
analyze_brprob.py: fix SI units
2017-11-08 Martin Liska <mliska@suse.cz>
* analyze_brprob.py: Fix abbreviations for SI units.
From-SVN: r254517
GCC Administrator [Wed, 8 Nov 2017 00:16:19 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r254516
Eric Botcazou [Tue, 7 Nov 2017 23:58:52 +0000 (23:58 +0000)]
* gimple-pretty-print.c (dump_profile): Return "" instead of NULL.
From-SVN: r254513
Boris Kolpackov [Tue, 7 Nov 2017 22:49:25 +0000 (22:49 +0000)]
[PATCH] Install cp/operators.def as part of plugin headers
https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00498.html
2017-11-07 Boris Kolpackov <boris@codesynthesis.com>
* Make-lang.in (CP_PLUGIN_HEADERS): Add operators.def since included
in cp-tree.h.
From-SVN: r254512
Jakub Jelinek [Tue, 7 Nov 2017 20:51:05 +0000 (21:51 +0100)]
re PR c++/82835 (ICE on valid code with -fopenmp)
PR c++/82835
* cp-gimplify.c (cxx_omp_clause_apply_fn): For methods pass i - 1 to
convert_default_arg instead of i.
* testsuite/libgomp.c++/pr82835.C: New test.
From-SVN: r254511
Jakub Jelinek [Tue, 7 Nov 2017 20:49:30 +0000 (21:49 +0100)]
re PR target/82855 (AVX512: replace OP+movemask with OP_mask+ktest)
PR target/82855
* config/i386/i386.md (SWI1248_AVX512BWDQ2_64): New mode iterator.
(*cmp<mode>_ccz_1): New insn with $k alternative.
* gcc.target/i386/avx512dq-pr82855.c: New test.
From-SVN: r254510
Jakub Jelinek [Tue, 7 Nov 2017 20:48:35 +0000 (21:48 +0100)]
re PR target/82855 (AVX512: replace OP+movemask with OP_mask+ktest)
PR target/82855
* config/i386/i386.c (ix86_swap_binary_operands_p): Treat
RTX_COMM_COMPARE as commutative as well.
(ix86_binary_operator_ok): Formatting fix.
* config/i386/sse.md (*mul<mode>3<mask_name><round_name>,
*<code><mode>3<mask_name><round_saeonly_name>,
*<code><mode>3<mask_name>, *<code>tf3, *mul<mode>3<mask_name>,
*<s>mul<mode>3_highpart<mask_name>,
*vec_widen_umult_even_v16si<mask_name>,
*vec_widen_umult_even_v8si<mask_name>,
*vec_widen_umult_even_v4si<mask_name>,
*vec_widen_smult_even_v16si<mask_name>,
*vec_widen_smult_even_v8si<mask_name>, *sse4_1_mulv2siv2di3<mask_name>,
*avx2_pmaddwd, *sse2_pmaddwd, *<sse4_1_avx2>_mul<mode>3<mask_name>,
*avx2_<code><mode>3, *avx512f_<code><mode>3<mask_name>,
*sse4_1_<code><mode>3<mask_name>, *<code>v8hi3,
*sse4_1_<code><mode>3<mask_name>, *<code>v16qi3, *avx2_eq<mode>3,
<avx512>_eq<mode>3<mask_scalar_merge_name>_1, *sse4_1_eqv2di3,
*sse2_eq<mode>3, <mask_codefor><code><mode>3<mask_name>,
*<code><mode>3, *<sse2_avx2>_uavg<mode>3<mask_name>,
*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>, *ssse3_pmulhrswv4hi3): Use
!(MEM_P (operands[1]) && MEM_P (operands[2])) condition instead of
ix86_binary_operator_ok. Formatting fixes.
(*<plusminus_insn><mode>3<mask_name><round_name>,
*<plusminus_insn><mode>3, *<plusminus_insn><mode>3_m): Formatting
fixes.
From-SVN: r254509
Segher Boessenkool [Tue, 7 Nov 2017 19:33:57 +0000 (20:33 +0100)]
rs6000: Use isel for the cstore patterns
We currently generate (sometimes pretty long) sequences of integer
insns to implement the various cstore patterns. If the CPU has a fast
isel, we can use that at the same latency as of just two integer insns
(you also get a load immediate of 1, and sometimes one of 0 as well,
but those are not in the critical path: they don't depend on any other
instruction).
There are a few patterns that already are implemented with just two
instructions; so don't use isel in that case (I still need to check
all lt/gt/ltu/gtu/le/leu/ge/geu patterns with all SI/DI combinations,
one or two might be better without isel).
This introduces a new GPR2 mode iterator, for those patterns that use
two independent integer modes.
* config/rs6000/rs6000.md (GPR2): New mode_iterator.
("cstore<mode>4"): Don't always expand with rs6000_emit_int_cmove for
eq and ne if TARGET_ISEL.
(cmp): New code_iterator.
(UNS, UNSU_, UNSIK): New code_attrs.
(<code><GPR:mode><GPR2:mode>2_isel): New define_insn_and_split.
("eq<mode>3"): New define_expand, rename the define_insn_and_split
to...
("eq<mode>3"): ... this.
("ne<mode>3"): New define_expand, rename the define_insn_and_split
to...
("ne<mode>3"): ... this.
From-SVN: r254508
Julia Koval [Tue, 7 Nov 2017 19:11:08 +0000 (20:11 +0100)]
Fix SSE bits dependencies.
gcc/
PR target/82812
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): Remove MPX from flag.
(ix86_handle_option): Move MPX to isa_flags2 and GFNI to isa_flags.
* config/i386/i386-c.c (ix86_target_macros_internal): Ditto.
* config/i386/i386.opt: Ditto.
* config/i386/i386.c (ix86_target_string): Ditto.
(ix86_option_override_internal): Ditto.
(ix86_init_mpx_builtins): Move MPX to args2.
(ix86_expand_builtin): Special handling for OPTION_MASK_ISA_GFNI.
* config/i386/i386-builtin.def (__builtin_ia32_vgf2p8affineinvqb_v64qi,
__builtin_ia32_vgf2p8affineinvqb_v64qi_mask,
__builtin_ia32_vgf2p8affineinvqb_v32qi,
__builtin_ia32_vgf2p8affineinvqb_v32qi_mask,
__builtin_ia32_vgf2p8affineinvqb_v16qi,
__builtin_ia32_vgf2p8affineinvqb_v16qi_mask): Move to ARGS array.
From-SVN: r254507
Jonathan Wakely [Tue, 7 Nov 2017 19:08:06 +0000 (19:08 +0000)]
Check for S_ISSOCK before use
* src/filesystem/ops-common.h (make_file_type) [S_ISSOCK]: Only use
S_ISSOCK when defined.
From-SVN: r254506
Uros Bizjak [Tue, 7 Nov 2017 18:51:22 +0000 (19:51 +0100)]
re PR target/80425 (Extra inter-unit register move with zero-extension)
PR target/80425
* config/i386.i386.md (*zero_extendsidi2): Change (?r,*Yj), (?*Yi,r)
and (*x,m) to ($r,Yj), ($Yi,r) and ($x,m).
(zero-extendsidi peephole2): Remove peephole.
testsuite/ChangeLog:
PR target/80425
* gcc.target/i386/pr80425-3.c: New test.
From-SVN: r254505
Ian Lance Taylor [Tue, 7 Nov 2017 18:19:19 +0000 (18:19 +0000)]
compiler: don't double count "." in nested_function_num
Nested functions are named "outerfunc.$nestedN", where N is a
number. nested_function_num extracts that number. The name is
first passed to unpack_hidden_name, which handles the "." and
should result "$nestedN". Don't expect the "." again.
This fixes assertion failure when escape analysis is enabled
and -fgo-debug-escape is on. The failure looks
go1: internal compiler error: in nested_function_num, at go/gofrontend/names.cc:241
0x7bd7d3 Gogo::nested_function_num(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> > const&)
Reviewed-on: https://go-review.googlesource.com/76213
From-SVN: r254504
Eric Botcazou [Tue, 7 Nov 2017 17:37:29 +0000 (17:37 +0000)]
re PR c/53037 (warn_if_not_aligned(X))
PR c/53037
* stor-layout.c: Include attribs.h.
(handle_warn_if_not_align): Replace test on TYPE_USER_ALIGN with
explicit lookup of "aligned" attribute.
From-SVN: r254503
Andreas Schwab [Tue, 7 Nov 2017 17:27:46 +0000 (17:27 +0000)]
* g++.dg/pr50763-3.C (evalPoint): Return a value.
From-SVN: r254502
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